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TARGET_NUCLEO_F103RB/TOOLCHAIN_IAR/stm32f1xx_hal_sd.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f1xx_hal_sd.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of SD HAL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F1xx_HAL_SD_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F1xx_HAL_SD_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #if defined(STM32F103xE) || defined(STM32F103xG)
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 43 extern "C" {
AnnaBridge 171:3a7713b1edbc 44 #endif
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 47 #include "stm32f1xx_ll_sdmmc.h"
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /** @addtogroup STM32F1xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 50 * @{
AnnaBridge 171:3a7713b1edbc 51 */
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @defgroup SD SD
AnnaBridge 171:3a7713b1edbc 54 * @brief SD HAL module driver
AnnaBridge 171:3a7713b1edbc 55 * @{
AnnaBridge 171:3a7713b1edbc 56 */
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59 /** @defgroup SD_Exported_Types SD Exported Types
AnnaBridge 171:3a7713b1edbc 60 * @{
AnnaBridge 171:3a7713b1edbc 61 */
AnnaBridge 171:3a7713b1edbc 62
AnnaBridge 171:3a7713b1edbc 63 /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure
AnnaBridge 171:3a7713b1edbc 64 * @{
AnnaBridge 171:3a7713b1edbc 65 */
AnnaBridge 171:3a7713b1edbc 66 typedef enum
AnnaBridge 171:3a7713b1edbc 67 {
AnnaBridge 171:3a7713b1edbc 68 HAL_SD_STATE_RESET = 0x00000000U, /*!< SD not yet initialized or disabled */
AnnaBridge 171:3a7713b1edbc 69 HAL_SD_STATE_READY = 0x00000001U, /*!< SD initialized and ready for use */
AnnaBridge 171:3a7713b1edbc 70 HAL_SD_STATE_TIMEOUT = 0x00000002U, /*!< SD Timeout state */
AnnaBridge 171:3a7713b1edbc 71 HAL_SD_STATE_BUSY = 0x00000003U, /*!< SD process ongoing */
AnnaBridge 171:3a7713b1edbc 72 HAL_SD_STATE_PROGRAMMING = 0x00000004U, /*!< SD Programming State */
AnnaBridge 171:3a7713b1edbc 73 HAL_SD_STATE_RECEIVING = 0x00000005U, /*!< SD Receinving State */
AnnaBridge 171:3a7713b1edbc 74 HAL_SD_STATE_TRANSFER = 0x00000006U, /*!< SD Transfert State */
AnnaBridge 171:3a7713b1edbc 75 HAL_SD_STATE_ERROR = 0x0000000FU /*!< SD is in error state */
AnnaBridge 171:3a7713b1edbc 76 }HAL_SD_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 77 /**
AnnaBridge 171:3a7713b1edbc 78 * @}
AnnaBridge 171:3a7713b1edbc 79 */
AnnaBridge 171:3a7713b1edbc 80
AnnaBridge 171:3a7713b1edbc 81 /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure
AnnaBridge 171:3a7713b1edbc 82 * @{
AnnaBridge 171:3a7713b1edbc 83 */
AnnaBridge 171:3a7713b1edbc 84 typedef enum
AnnaBridge 171:3a7713b1edbc 85 {
AnnaBridge 171:3a7713b1edbc 86 HAL_SD_CARD_READY = 0x00000001U, /*!< Card state is ready */
AnnaBridge 171:3a7713b1edbc 87 HAL_SD_CARD_IDENTIFICATION = 0x00000002U, /*!< Card is in identification state */
AnnaBridge 171:3a7713b1edbc 88 HAL_SD_CARD_STANDBY = 0x00000003U, /*!< Card is in standby state */
AnnaBridge 171:3a7713b1edbc 89 HAL_SD_CARD_TRANSFER = 0x00000004U, /*!< Card is in transfer state */
AnnaBridge 171:3a7713b1edbc 90 HAL_SD_CARD_SENDING = 0x00000005U, /*!< Card is sending an operation */
AnnaBridge 171:3a7713b1edbc 91 HAL_SD_CARD_RECEIVING = 0x00000006U, /*!< Card is receiving operation information */
AnnaBridge 171:3a7713b1edbc 92 HAL_SD_CARD_PROGRAMMING = 0x00000007U, /*!< Card is in programming state */
AnnaBridge 171:3a7713b1edbc 93 HAL_SD_CARD_DISCONNECTED = 0x00000008U, /*!< Card is disconnected */
AnnaBridge 171:3a7713b1edbc 94 HAL_SD_CARD_ERROR = 0x000000FFU /*!< Card response Error */
AnnaBridge 171:3a7713b1edbc 95 }HAL_SD_CardStateTypeDef;
AnnaBridge 171:3a7713b1edbc 96 /**
AnnaBridge 171:3a7713b1edbc 97 * @}
AnnaBridge 171:3a7713b1edbc 98 */
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition
AnnaBridge 171:3a7713b1edbc 101 * @{
AnnaBridge 171:3a7713b1edbc 102 */
AnnaBridge 171:3a7713b1edbc 103 #define SD_InitTypeDef SDIO_InitTypeDef
AnnaBridge 171:3a7713b1edbc 104 #define SD_TypeDef SDIO_TypeDef
AnnaBridge 171:3a7713b1edbc 105
AnnaBridge 171:3a7713b1edbc 106 /**
AnnaBridge 171:3a7713b1edbc 107 * @brief SD Card Information Structure definition
AnnaBridge 171:3a7713b1edbc 108 */
AnnaBridge 171:3a7713b1edbc 109 typedef struct
AnnaBridge 171:3a7713b1edbc 110 {
AnnaBridge 171:3a7713b1edbc 111 uint32_t CardType; /*!< Specifies the card Type */
AnnaBridge 171:3a7713b1edbc 112
AnnaBridge 171:3a7713b1edbc 113 uint32_t CardVersion; /*!< Specifies the card version */
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115 uint32_t Class; /*!< Specifies the class of the card class */
AnnaBridge 171:3a7713b1edbc 116
AnnaBridge 171:3a7713b1edbc 117 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
AnnaBridge 171:3a7713b1edbc 118
AnnaBridge 171:3a7713b1edbc 119 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 uint32_t BlockSize; /*!< Specifies one block size in bytes */
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
AnnaBridge 171:3a7713b1edbc 124
AnnaBridge 171:3a7713b1edbc 125 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 }HAL_SD_CardInfoTypeDef;
AnnaBridge 171:3a7713b1edbc 128
AnnaBridge 171:3a7713b1edbc 129 /**
AnnaBridge 171:3a7713b1edbc 130 * @brief SD handle Structure definition
AnnaBridge 171:3a7713b1edbc 131 */
AnnaBridge 171:3a7713b1edbc 132 typedef struct
AnnaBridge 171:3a7713b1edbc 133 {
AnnaBridge 171:3a7713b1edbc 134 SD_TypeDef *Instance; /*!< SD registers base address */
AnnaBridge 171:3a7713b1edbc 135
AnnaBridge 171:3a7713b1edbc 136 SD_InitTypeDef Init; /*!< SD required parameters */
AnnaBridge 171:3a7713b1edbc 137
AnnaBridge 171:3a7713b1edbc 138 HAL_LockTypeDef Lock; /*!< SD locking object */
AnnaBridge 171:3a7713b1edbc 139
AnnaBridge 171:3a7713b1edbc 140 uint32_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 uint32_t TxXferSize; /*!< SD Tx Transfer size */
AnnaBridge 171:3a7713b1edbc 143
AnnaBridge 171:3a7713b1edbc 144 uint32_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */
AnnaBridge 171:3a7713b1edbc 145
AnnaBridge 171:3a7713b1edbc 146 uint32_t RxXferSize; /*!< SD Rx Transfer size */
AnnaBridge 171:3a7713b1edbc 147
AnnaBridge 171:3a7713b1edbc 148 __IO uint32_t Context; /*!< SD transfer context */
AnnaBridge 171:3a7713b1edbc 149
AnnaBridge 171:3a7713b1edbc 150 __IO HAL_SD_StateTypeDef State; /*!< SD card State */
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 __IO uint32_t ErrorCode; /*!< SD Card Error codes */
AnnaBridge 171:3a7713b1edbc 153
AnnaBridge 171:3a7713b1edbc 154 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
AnnaBridge 171:3a7713b1edbc 155
AnnaBridge 171:3a7713b1edbc 156 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */
AnnaBridge 171:3a7713b1edbc 159
AnnaBridge 171:3a7713b1edbc 160 uint32_t CSD[4]; /*!< SD card specific data table */
AnnaBridge 171:3a7713b1edbc 161
AnnaBridge 171:3a7713b1edbc 162 uint32_t CID[4]; /*!< SD card identification number table */
AnnaBridge 171:3a7713b1edbc 163
AnnaBridge 171:3a7713b1edbc 164 }SD_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 165
AnnaBridge 171:3a7713b1edbc 166 /**
AnnaBridge 171:3a7713b1edbc 167 * @}
AnnaBridge 171:3a7713b1edbc 168 */
AnnaBridge 171:3a7713b1edbc 169
AnnaBridge 171:3a7713b1edbc 170 /** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register
AnnaBridge 171:3a7713b1edbc 171 * @{
AnnaBridge 171:3a7713b1edbc 172 */
AnnaBridge 171:3a7713b1edbc 173 typedef struct
AnnaBridge 171:3a7713b1edbc 174 {
AnnaBridge 171:3a7713b1edbc 175 __IO uint8_t CSDStruct; /*!< CSD structure */
AnnaBridge 171:3a7713b1edbc 176 __IO uint8_t SysSpecVersion; /*!< System specification version */
AnnaBridge 171:3a7713b1edbc 177 __IO uint8_t Reserved1; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 178 __IO uint8_t TAAC; /*!< Data read access time 1 */
AnnaBridge 171:3a7713b1edbc 179 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
AnnaBridge 171:3a7713b1edbc 180 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
AnnaBridge 171:3a7713b1edbc 181 __IO uint16_t CardComdClasses; /*!< Card command classes */
AnnaBridge 171:3a7713b1edbc 182 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
AnnaBridge 171:3a7713b1edbc 183 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
AnnaBridge 171:3a7713b1edbc 184 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
AnnaBridge 171:3a7713b1edbc 185 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
AnnaBridge 171:3a7713b1edbc 186 __IO uint8_t DSRImpl; /*!< DSR implemented */
AnnaBridge 171:3a7713b1edbc 187 __IO uint8_t Reserved2; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 188 __IO uint32_t DeviceSize; /*!< Device Size */
AnnaBridge 171:3a7713b1edbc 189 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
AnnaBridge 171:3a7713b1edbc 190 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
AnnaBridge 171:3a7713b1edbc 191 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
AnnaBridge 171:3a7713b1edbc 192 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
AnnaBridge 171:3a7713b1edbc 193 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
AnnaBridge 171:3a7713b1edbc 194 __IO uint8_t EraseGrSize; /*!< Erase group size */
AnnaBridge 171:3a7713b1edbc 195 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
AnnaBridge 171:3a7713b1edbc 196 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
AnnaBridge 171:3a7713b1edbc 197 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
AnnaBridge 171:3a7713b1edbc 198 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
AnnaBridge 171:3a7713b1edbc 199 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
AnnaBridge 171:3a7713b1edbc 200 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
AnnaBridge 171:3a7713b1edbc 201 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
AnnaBridge 171:3a7713b1edbc 202 __IO uint8_t Reserved3; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 203 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
AnnaBridge 171:3a7713b1edbc 204 __IO uint8_t FileFormatGrouop; /*!< File format group */
AnnaBridge 171:3a7713b1edbc 205 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
AnnaBridge 171:3a7713b1edbc 206 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
AnnaBridge 171:3a7713b1edbc 207 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
AnnaBridge 171:3a7713b1edbc 208 __IO uint8_t FileFormat; /*!< File format */
AnnaBridge 171:3a7713b1edbc 209 __IO uint8_t ECC; /*!< ECC code */
AnnaBridge 171:3a7713b1edbc 210 __IO uint8_t CSD_CRC; /*!< CSD CRC */
AnnaBridge 171:3a7713b1edbc 211 __IO uint8_t Reserved4; /*!< Always 1 */
AnnaBridge 171:3a7713b1edbc 212
AnnaBridge 171:3a7713b1edbc 213 }HAL_SD_CardCSDTypeDef;
AnnaBridge 171:3a7713b1edbc 214 /**
AnnaBridge 171:3a7713b1edbc 215 * @}
AnnaBridge 171:3a7713b1edbc 216 */
AnnaBridge 171:3a7713b1edbc 217
AnnaBridge 171:3a7713b1edbc 218 /** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register
AnnaBridge 171:3a7713b1edbc 219 * @{
AnnaBridge 171:3a7713b1edbc 220 */
AnnaBridge 171:3a7713b1edbc 221 typedef struct
AnnaBridge 171:3a7713b1edbc 222 {
AnnaBridge 171:3a7713b1edbc 223 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
AnnaBridge 171:3a7713b1edbc 224 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
AnnaBridge 171:3a7713b1edbc 225 __IO uint32_t ProdName1; /*!< Product Name part1 */
AnnaBridge 171:3a7713b1edbc 226 __IO uint8_t ProdName2; /*!< Product Name part2 */
AnnaBridge 171:3a7713b1edbc 227 __IO uint8_t ProdRev; /*!< Product Revision */
AnnaBridge 171:3a7713b1edbc 228 __IO uint32_t ProdSN; /*!< Product Serial Number */
AnnaBridge 171:3a7713b1edbc 229 __IO uint8_t Reserved1; /*!< Reserved1 */
AnnaBridge 171:3a7713b1edbc 230 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
AnnaBridge 171:3a7713b1edbc 231 __IO uint8_t CID_CRC; /*!< CID CRC */
AnnaBridge 171:3a7713b1edbc 232 __IO uint8_t Reserved2; /*!< Always 1 */
AnnaBridge 171:3a7713b1edbc 233
AnnaBridge 171:3a7713b1edbc 234 }HAL_SD_CardCIDTypeDef;
AnnaBridge 171:3a7713b1edbc 235 /**
AnnaBridge 171:3a7713b1edbc 236 * @}
AnnaBridge 171:3a7713b1edbc 237 */
AnnaBridge 171:3a7713b1edbc 238
AnnaBridge 171:3a7713b1edbc 239 /** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13
AnnaBridge 171:3a7713b1edbc 240 * @{
AnnaBridge 171:3a7713b1edbc 241 */
AnnaBridge 171:3a7713b1edbc 242 typedef struct
AnnaBridge 171:3a7713b1edbc 243 {
AnnaBridge 171:3a7713b1edbc 244 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */
AnnaBridge 171:3a7713b1edbc 245 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */
AnnaBridge 171:3a7713b1edbc 246 __IO uint16_t CardType; /*!< Carries information about card type */
AnnaBridge 171:3a7713b1edbc 247 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */
AnnaBridge 171:3a7713b1edbc 248 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */
AnnaBridge 171:3a7713b1edbc 249 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */
AnnaBridge 171:3a7713b1edbc 250 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */
AnnaBridge 171:3a7713b1edbc 251 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */
AnnaBridge 171:3a7713b1edbc 252 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */
AnnaBridge 171:3a7713b1edbc 253 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 }HAL_SD_CardStatusTypeDef;
AnnaBridge 171:3a7713b1edbc 256 /**
AnnaBridge 171:3a7713b1edbc 257 * @}
AnnaBridge 171:3a7713b1edbc 258 */
AnnaBridge 171:3a7713b1edbc 259
AnnaBridge 171:3a7713b1edbc 260 /**
AnnaBridge 171:3a7713b1edbc 261 * @}
AnnaBridge 171:3a7713b1edbc 262 */
AnnaBridge 171:3a7713b1edbc 263
AnnaBridge 171:3a7713b1edbc 264 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 265 /** @defgroup SD_Exported_Constants Exported Constants
AnnaBridge 171:3a7713b1edbc 266 * @{
AnnaBridge 171:3a7713b1edbc 267 */
AnnaBridge 171:3a7713b1edbc 268
AnnaBridge 171:3a7713b1edbc 269 #define BLOCKSIZE 512U /*!< Block size is 512 bytes */
AnnaBridge 171:3a7713b1edbc 270
AnnaBridge 171:3a7713b1edbc 271 /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition
AnnaBridge 171:3a7713b1edbc 272 * @{
AnnaBridge 171:3a7713b1edbc 273 */
AnnaBridge 171:3a7713b1edbc 274 #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
AnnaBridge 171:3a7713b1edbc 275 #define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
AnnaBridge 171:3a7713b1edbc 276 #define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
AnnaBridge 171:3a7713b1edbc 277 #define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
AnnaBridge 171:3a7713b1edbc 278 #define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
AnnaBridge 171:3a7713b1edbc 279 #define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
AnnaBridge 171:3a7713b1edbc 280 #define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
AnnaBridge 171:3a7713b1edbc 281 #define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
AnnaBridge 171:3a7713b1edbc 282 #define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the
AnnaBridge 171:3a7713b1edbc 283 number of transferred bytes does not match the block length */
AnnaBridge 171:3a7713b1edbc 284 #define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
AnnaBridge 171:3a7713b1edbc 285 #define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
AnnaBridge 171:3a7713b1edbc 286 #define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
AnnaBridge 171:3a7713b1edbc 287 #define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock
AnnaBridge 171:3a7713b1edbc 288 command or if there was an attempt to access a locked card */
AnnaBridge 171:3a7713b1edbc 289 #define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
AnnaBridge 171:3a7713b1edbc 290 #define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
AnnaBridge 171:3a7713b1edbc 291 #define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
AnnaBridge 171:3a7713b1edbc 292 #define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
AnnaBridge 171:3a7713b1edbc 293 #define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
AnnaBridge 171:3a7713b1edbc 294 #define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
AnnaBridge 171:3a7713b1edbc 295 #define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
AnnaBridge 171:3a7713b1edbc 296 #define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
AnnaBridge 171:3a7713b1edbc 297 #define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
AnnaBridge 171:3a7713b1edbc 298 #define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
AnnaBridge 171:3a7713b1edbc 299 #define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out
AnnaBridge 171:3a7713b1edbc 300 of erase sequence command was received */
AnnaBridge 171:3a7713b1edbc 301 #define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
AnnaBridge 171:3a7713b1edbc 302 #define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
AnnaBridge 171:3a7713b1edbc 303 #define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
AnnaBridge 171:3a7713b1edbc 304 #define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
AnnaBridge 171:3a7713b1edbc 305 #define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
AnnaBridge 171:3a7713b1edbc 306 #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
AnnaBridge 171:3a7713b1edbc 307 #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
AnnaBridge 171:3a7713b1edbc 308 #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
AnnaBridge 171:3a7713b1edbc 309 #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
AnnaBridge 171:3a7713b1edbc 310
AnnaBridge 171:3a7713b1edbc 311 /**
AnnaBridge 171:3a7713b1edbc 312 * @}
AnnaBridge 171:3a7713b1edbc 313 */
AnnaBridge 171:3a7713b1edbc 314
AnnaBridge 171:3a7713b1edbc 315 /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration
AnnaBridge 171:3a7713b1edbc 316 * @{
AnnaBridge 171:3a7713b1edbc 317 */
AnnaBridge 171:3a7713b1edbc 318 #define SD_CONTEXT_NONE 0x00000000U /*!< None */
AnnaBridge 171:3a7713b1edbc 319 #define SD_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */
AnnaBridge 171:3a7713b1edbc 320 #define SD_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */
AnnaBridge 171:3a7713b1edbc 321 #define SD_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */
AnnaBridge 171:3a7713b1edbc 322 #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */
AnnaBridge 171:3a7713b1edbc 323 #define SD_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */
AnnaBridge 171:3a7713b1edbc 324 #define SD_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */
AnnaBridge 171:3a7713b1edbc 325
AnnaBridge 171:3a7713b1edbc 326 /**
AnnaBridge 171:3a7713b1edbc 327 * @}
AnnaBridge 171:3a7713b1edbc 328 */
AnnaBridge 171:3a7713b1edbc 329
AnnaBridge 171:3a7713b1edbc 330 /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards
AnnaBridge 171:3a7713b1edbc 331 * @{
AnnaBridge 171:3a7713b1edbc 332 */
AnnaBridge 171:3a7713b1edbc 333 #define CARD_SDSC 0x00000000U
AnnaBridge 171:3a7713b1edbc 334 #define CARD_SDHC_SDXC 0x00000001U
AnnaBridge 171:3a7713b1edbc 335 #define CARD_SECURED 0x00000003U
AnnaBridge 171:3a7713b1edbc 336
AnnaBridge 171:3a7713b1edbc 337 /**
AnnaBridge 171:3a7713b1edbc 338 * @}
AnnaBridge 171:3a7713b1edbc 339 */
AnnaBridge 171:3a7713b1edbc 340
AnnaBridge 171:3a7713b1edbc 341 /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version
AnnaBridge 171:3a7713b1edbc 342 * @{
AnnaBridge 171:3a7713b1edbc 343 */
AnnaBridge 171:3a7713b1edbc 344 #define CARD_V1_X 0x00000000U
AnnaBridge 171:3a7713b1edbc 345 #define CARD_V2_X 0x00000001U
AnnaBridge 171:3a7713b1edbc 346 /**
AnnaBridge 171:3a7713b1edbc 347 * @}
AnnaBridge 171:3a7713b1edbc 348 */
AnnaBridge 171:3a7713b1edbc 349
AnnaBridge 171:3a7713b1edbc 350 /**
AnnaBridge 171:3a7713b1edbc 351 * @}
AnnaBridge 171:3a7713b1edbc 352 */
AnnaBridge 171:3a7713b1edbc 353
AnnaBridge 171:3a7713b1edbc 354 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 355 /** @defgroup SD_Exported_macros SD Exported Macros
AnnaBridge 171:3a7713b1edbc 356 * @brief macros to handle interrupts and specific clock configurations
AnnaBridge 171:3a7713b1edbc 357 * @{
AnnaBridge 171:3a7713b1edbc 358 */
AnnaBridge 171:3a7713b1edbc 359
AnnaBridge 171:3a7713b1edbc 360 /**
AnnaBridge 171:3a7713b1edbc 361 * @brief Enable the SD device.
AnnaBridge 171:3a7713b1edbc 362 * @retval None
AnnaBridge 171:3a7713b1edbc 363 */
AnnaBridge 171:3a7713b1edbc 364 #define __HAL_SD_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 365
AnnaBridge 171:3a7713b1edbc 366 /**
AnnaBridge 171:3a7713b1edbc 367 * @brief Disable the SD device.
AnnaBridge 171:3a7713b1edbc 368 * @retval None
AnnaBridge 171:3a7713b1edbc 369 */
AnnaBridge 171:3a7713b1edbc 370 #define __HAL_SD_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 371
AnnaBridge 171:3a7713b1edbc 372 /**
AnnaBridge 171:3a7713b1edbc 373 * @brief Enable the SDMMC DMA transfer.
AnnaBridge 171:3a7713b1edbc 374 * @retval None
AnnaBridge 171:3a7713b1edbc 375 */
AnnaBridge 171:3a7713b1edbc 376 #define __HAL_SD_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 377
AnnaBridge 171:3a7713b1edbc 378 /**
AnnaBridge 171:3a7713b1edbc 379 * @brief Disable the SDMMC DMA transfer.
AnnaBridge 171:3a7713b1edbc 380 * @retval None
AnnaBridge 171:3a7713b1edbc 381 */
AnnaBridge 171:3a7713b1edbc 382 #define __HAL_SD_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 383
AnnaBridge 171:3a7713b1edbc 384 /**
AnnaBridge 171:3a7713b1edbc 385 * @brief Enable the SD device interrupt.
AnnaBridge 171:3a7713b1edbc 386 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 387 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled.
AnnaBridge 171:3a7713b1edbc 388 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 389 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 390 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 391 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 392 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 393 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 394 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 395 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 396 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 397 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 398 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 399 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 400 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 401 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 402 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 403 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 404 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 405 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 406 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 407 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 408 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 409 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 410 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 411 * @retval None
AnnaBridge 171:3a7713b1edbc 412 */
AnnaBridge 171:3a7713b1edbc 413 #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 414
AnnaBridge 171:3a7713b1edbc 415 /**
AnnaBridge 171:3a7713b1edbc 416 * @brief Disable the SD device interrupt.
AnnaBridge 171:3a7713b1edbc 417 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 418 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled.
AnnaBridge 171:3a7713b1edbc 419 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 420 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 421 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 422 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 423 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 424 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 425 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 426 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 427 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 428 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 429 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 430 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 431 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 432 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 433 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 434 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 435 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 436 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 437 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 438 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 439 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 440 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 441 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 442 * @retval None
AnnaBridge 171:3a7713b1edbc 443 */
AnnaBridge 171:3a7713b1edbc 444 #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 445
AnnaBridge 171:3a7713b1edbc 446 /**
AnnaBridge 171:3a7713b1edbc 447 * @brief Check whether the specified SD flag is set or not.
AnnaBridge 171:3a7713b1edbc 448 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 449 * @param __FLAG__: specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 450 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 451 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 452 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 453 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 171:3a7713b1edbc 454 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
AnnaBridge 171:3a7713b1edbc 455 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 171:3a7713b1edbc 456 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 171:3a7713b1edbc 457 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 458 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 171:3a7713b1edbc 459 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 171:3a7713b1edbc 460 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 461 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
AnnaBridge 171:3a7713b1edbc 462 * @arg SDIO_FLAG_TXACT: Data transmit in progress
AnnaBridge 171:3a7713b1edbc 463 * @arg SDIO_FLAG_RXACT: Data receive in progress
AnnaBridge 171:3a7713b1edbc 464 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
AnnaBridge 171:3a7713b1edbc 465 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
AnnaBridge 171:3a7713b1edbc 466 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
AnnaBridge 171:3a7713b1edbc 467 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
AnnaBridge 171:3a7713b1edbc 468 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
AnnaBridge 171:3a7713b1edbc 469 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
AnnaBridge 171:3a7713b1edbc 470 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
AnnaBridge 171:3a7713b1edbc 471 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
AnnaBridge 171:3a7713b1edbc 472 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 171:3a7713b1edbc 473 * @retval The new state of SD FLAG (SET or RESET).
AnnaBridge 171:3a7713b1edbc 474 */
AnnaBridge 171:3a7713b1edbc 475 #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 171:3a7713b1edbc 476
AnnaBridge 171:3a7713b1edbc 477 /**
AnnaBridge 171:3a7713b1edbc 478 * @brief Clear the SD's pending flags.
AnnaBridge 171:3a7713b1edbc 479 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 480 * @param __FLAG__: specifies the flag to clear.
AnnaBridge 171:3a7713b1edbc 481 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 482 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 483 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 484 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 171:3a7713b1edbc 485 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
AnnaBridge 171:3a7713b1edbc 486 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 171:3a7713b1edbc 487 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 171:3a7713b1edbc 488 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 489 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 171:3a7713b1edbc 490 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 171:3a7713b1edbc 491 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 492 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 171:3a7713b1edbc 493 * @retval None
AnnaBridge 171:3a7713b1edbc 494 */
AnnaBridge 171:3a7713b1edbc 495 #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 171:3a7713b1edbc 496
AnnaBridge 171:3a7713b1edbc 497 /**
AnnaBridge 171:3a7713b1edbc 498 * @brief Check whether the specified SD interrupt has occurred or not.
AnnaBridge 171:3a7713b1edbc 499 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 500 * @param __INTERRUPT__: specifies the SDMMC interrupt source to check.
AnnaBridge 171:3a7713b1edbc 501 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 502 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 503 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 504 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 505 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 506 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 507 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 508 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 509 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 510 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 511 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 512 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 513 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 514 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 515 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 516 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 517 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 518 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 519 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 520 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 521 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 522 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 523 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 524 * @retval The new state of SD IT (SET or RESET).
AnnaBridge 171:3a7713b1edbc 525 */
AnnaBridge 171:3a7713b1edbc 526 #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 527
AnnaBridge 171:3a7713b1edbc 528 /**
AnnaBridge 171:3a7713b1edbc 529 * @brief Clear the SD's interrupt pending bits.
AnnaBridge 171:3a7713b1edbc 530 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 531 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
AnnaBridge 171:3a7713b1edbc 532 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 533 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 534 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 535 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 536 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 537 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 538 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 539 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 540 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 541 * @arg SDIO_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 542 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 543 * @retval None
AnnaBridge 171:3a7713b1edbc 544 */
AnnaBridge 171:3a7713b1edbc 545 #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 546
AnnaBridge 171:3a7713b1edbc 547 /**
AnnaBridge 171:3a7713b1edbc 548 * @}
AnnaBridge 171:3a7713b1edbc 549 */
AnnaBridge 171:3a7713b1edbc 550
AnnaBridge 171:3a7713b1edbc 551 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 552 /** @defgroup SD_Exported_Functions SD Exported Functions
AnnaBridge 171:3a7713b1edbc 553 * @{
AnnaBridge 171:3a7713b1edbc 554 */
AnnaBridge 171:3a7713b1edbc 555
AnnaBridge 171:3a7713b1edbc 556 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 557 * @{
AnnaBridge 171:3a7713b1edbc 558 */
AnnaBridge 171:3a7713b1edbc 559 HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 560 HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 561 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 562 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 563 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 564 /**
AnnaBridge 171:3a7713b1edbc 565 * @}
AnnaBridge 171:3a7713b1edbc 566 */
AnnaBridge 171:3a7713b1edbc 567
AnnaBridge 171:3a7713b1edbc 568 /** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions
AnnaBridge 171:3a7713b1edbc 569 * @{
AnnaBridge 171:3a7713b1edbc 570 */
AnnaBridge 171:3a7713b1edbc 571 /* Blocking mode: Polling */
AnnaBridge 171:3a7713b1edbc 572 HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 573 HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 574 HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
AnnaBridge 171:3a7713b1edbc 575 /* Non-Blocking mode: IT */
AnnaBridge 171:3a7713b1edbc 576 HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 577 HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 578 /* Non-Blocking mode: DMA */
AnnaBridge 171:3a7713b1edbc 579 HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 580 HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 581
AnnaBridge 171:3a7713b1edbc 582 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 583
AnnaBridge 171:3a7713b1edbc 584 /* Callback in non blocking modes (DMA) */
AnnaBridge 171:3a7713b1edbc 585 void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 586 void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 587 void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 588 void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 589 /**
AnnaBridge 171:3a7713b1edbc 590 * @}
AnnaBridge 171:3a7713b1edbc 591 */
AnnaBridge 171:3a7713b1edbc 592
AnnaBridge 171:3a7713b1edbc 593 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 594 * @{
AnnaBridge 171:3a7713b1edbc 595 */
AnnaBridge 171:3a7713b1edbc 596 HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode);
AnnaBridge 171:3a7713b1edbc 597 /**
AnnaBridge 171:3a7713b1edbc 598 * @}
AnnaBridge 171:3a7713b1edbc 599 */
AnnaBridge 171:3a7713b1edbc 600
AnnaBridge 171:3a7713b1edbc 601 /** @defgroup SD_Exported_Functions_Group4 SD card related functions
AnnaBridge 171:3a7713b1edbc 602 * @{
AnnaBridge 171:3a7713b1edbc 603 */
AnnaBridge 171:3a7713b1edbc 604 HAL_StatusTypeDef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
AnnaBridge 171:3a7713b1edbc 605 HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 606 HAL_StatusTypeDef HAL_SD_GetCardCID(SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID);
AnnaBridge 171:3a7713b1edbc 607 HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD);
AnnaBridge 171:3a7713b1edbc 608 HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus);
AnnaBridge 171:3a7713b1edbc 609 HAL_StatusTypeDef HAL_SD_GetCardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo);
AnnaBridge 171:3a7713b1edbc 610 /**
AnnaBridge 171:3a7713b1edbc 611 * @}
AnnaBridge 171:3a7713b1edbc 612 */
AnnaBridge 171:3a7713b1edbc 613
AnnaBridge 171:3a7713b1edbc 614 /** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions
AnnaBridge 171:3a7713b1edbc 615 * @{
AnnaBridge 171:3a7713b1edbc 616 */
AnnaBridge 171:3a7713b1edbc 617 HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 618 uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 619 /**
AnnaBridge 171:3a7713b1edbc 620 * @}
AnnaBridge 171:3a7713b1edbc 621 */
AnnaBridge 171:3a7713b1edbc 622
AnnaBridge 171:3a7713b1edbc 623 /** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management
AnnaBridge 171:3a7713b1edbc 624 * @{
AnnaBridge 171:3a7713b1edbc 625 */
AnnaBridge 171:3a7713b1edbc 626 HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 627 HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 628 /**
AnnaBridge 171:3a7713b1edbc 629 * @}
AnnaBridge 171:3a7713b1edbc 630 */
AnnaBridge 171:3a7713b1edbc 631
AnnaBridge 171:3a7713b1edbc 632 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 633 /** @defgroup SD_Private_Types SD Private Types
AnnaBridge 171:3a7713b1edbc 634 * @{
AnnaBridge 171:3a7713b1edbc 635 */
AnnaBridge 171:3a7713b1edbc 636
AnnaBridge 171:3a7713b1edbc 637 /**
AnnaBridge 171:3a7713b1edbc 638 * @}
AnnaBridge 171:3a7713b1edbc 639 */
AnnaBridge 171:3a7713b1edbc 640
AnnaBridge 171:3a7713b1edbc 641 /* Private defines -----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 642 /** @defgroup SD_Private_Defines SD Private Defines
AnnaBridge 171:3a7713b1edbc 643 * @{
AnnaBridge 171:3a7713b1edbc 644 */
AnnaBridge 171:3a7713b1edbc 645
AnnaBridge 171:3a7713b1edbc 646 /**
AnnaBridge 171:3a7713b1edbc 647 * @}
AnnaBridge 171:3a7713b1edbc 648 */
AnnaBridge 171:3a7713b1edbc 649
AnnaBridge 171:3a7713b1edbc 650 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 651 /** @defgroup SD_Private_Variables SD Private Variables
AnnaBridge 171:3a7713b1edbc 652 * @{
AnnaBridge 171:3a7713b1edbc 653 */
AnnaBridge 171:3a7713b1edbc 654
AnnaBridge 171:3a7713b1edbc 655 /**
AnnaBridge 171:3a7713b1edbc 656 * @}
AnnaBridge 171:3a7713b1edbc 657 */
AnnaBridge 171:3a7713b1edbc 658
AnnaBridge 171:3a7713b1edbc 659 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 660 /** @defgroup SD_Private_Constants SD Private Constants
AnnaBridge 171:3a7713b1edbc 661 * @{
AnnaBridge 171:3a7713b1edbc 662 */
AnnaBridge 171:3a7713b1edbc 663
AnnaBridge 171:3a7713b1edbc 664 /**
AnnaBridge 171:3a7713b1edbc 665 * @}
AnnaBridge 171:3a7713b1edbc 666 */
AnnaBridge 171:3a7713b1edbc 667
AnnaBridge 171:3a7713b1edbc 668 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 669 /** @defgroup SD_Private_Macros SD Private Macros
AnnaBridge 171:3a7713b1edbc 670 * @{
AnnaBridge 171:3a7713b1edbc 671 */
AnnaBridge 171:3a7713b1edbc 672
AnnaBridge 171:3a7713b1edbc 673 /**
AnnaBridge 171:3a7713b1edbc 674 * @}
AnnaBridge 171:3a7713b1edbc 675 */
AnnaBridge 171:3a7713b1edbc 676
AnnaBridge 171:3a7713b1edbc 677 /* Private functions prototypes ----------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 678 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
AnnaBridge 171:3a7713b1edbc 679 * @{
AnnaBridge 171:3a7713b1edbc 680 */
AnnaBridge 171:3a7713b1edbc 681
AnnaBridge 171:3a7713b1edbc 682 /**
AnnaBridge 171:3a7713b1edbc 683 * @}
AnnaBridge 171:3a7713b1edbc 684 */
AnnaBridge 171:3a7713b1edbc 685
AnnaBridge 171:3a7713b1edbc 686 /* Private functions ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 687 /** @defgroup SD_Private_Functions SD Private Functions
AnnaBridge 171:3a7713b1edbc 688 * @{
AnnaBridge 171:3a7713b1edbc 689 */
AnnaBridge 171:3a7713b1edbc 690
AnnaBridge 171:3a7713b1edbc 691 /**
AnnaBridge 171:3a7713b1edbc 692 * @}
AnnaBridge 171:3a7713b1edbc 693 */
AnnaBridge 171:3a7713b1edbc 694
AnnaBridge 171:3a7713b1edbc 695
AnnaBridge 171:3a7713b1edbc 696 /**
AnnaBridge 171:3a7713b1edbc 697 * @}
AnnaBridge 171:3a7713b1edbc 698 */
AnnaBridge 171:3a7713b1edbc 699
AnnaBridge 171:3a7713b1edbc 700 /**
AnnaBridge 171:3a7713b1edbc 701 * @}
AnnaBridge 171:3a7713b1edbc 702 */
AnnaBridge 171:3a7713b1edbc 703
AnnaBridge 171:3a7713b1edbc 704 /**
AnnaBridge 171:3a7713b1edbc 705 * @}
AnnaBridge 171:3a7713b1edbc 706 */
AnnaBridge 171:3a7713b1edbc 707 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 708 }
AnnaBridge 171:3a7713b1edbc 709 #endif
AnnaBridge 171:3a7713b1edbc 710
AnnaBridge 171:3a7713b1edbc 711 #endif /* STM32F103xE || STM32F103xG */
AnnaBridge 171:3a7713b1edbc 712
AnnaBridge 171:3a7713b1edbc 713 #endif /* __STM32F1xx_HAL_SD_H */
AnnaBridge 171:3a7713b1edbc 714
AnnaBridge 171:3a7713b1edbc 715 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/