mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F103RB/TOOLCHAIN_IAR/stm32f1xx_hal.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f1xx_hal.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief This file contains all the functions prototypes for the HAL
AnnaBridge 171:3a7713b1edbc 6 * module driver.
AnnaBridge 171:3a7713b1edbc 7 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 8 * @attention
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 11 *
AnnaBridge 171:3a7713b1edbc 12 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 13 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 14 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 15 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 17 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 18 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 20 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 21 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 22 *
AnnaBridge 171:3a7713b1edbc 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 33 *
AnnaBridge 171:3a7713b1edbc 34 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 35 */
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 38 #ifndef __STM32F1xx_HAL_H
AnnaBridge 171:3a7713b1edbc 39 #define __STM32F1xx_HAL_H
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 42 extern "C" {
AnnaBridge 171:3a7713b1edbc 43 #endif
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 46 #include "stm32f1xx_hal_conf.h"
AnnaBridge 171:3a7713b1edbc 47
AnnaBridge 171:3a7713b1edbc 48 /** @addtogroup STM32F1xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 49 * @{
AnnaBridge 171:3a7713b1edbc 50 */
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 /** @addtogroup HAL
AnnaBridge 171:3a7713b1edbc 53 * @{
AnnaBridge 171:3a7713b1edbc 54 */
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 57 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58
AnnaBridge 171:3a7713b1edbc 59 /** @defgroup HAL_Exported_Constants HAL Exported Constants
AnnaBridge 171:3a7713b1edbc 60 * @{
AnnaBridge 171:3a7713b1edbc 61 */
AnnaBridge 171:3a7713b1edbc 62
AnnaBridge 171:3a7713b1edbc 63 /** @defgroup HAL_TICK_FREQ Tick Frequency
AnnaBridge 171:3a7713b1edbc 64 * @{
AnnaBridge 171:3a7713b1edbc 65 */
AnnaBridge 171:3a7713b1edbc 66 typedef enum
AnnaBridge 171:3a7713b1edbc 67 {
AnnaBridge 171:3a7713b1edbc 68 HAL_TICK_FREQ_10HZ = 100U,
AnnaBridge 171:3a7713b1edbc 69 HAL_TICK_FREQ_100HZ = 10U,
AnnaBridge 171:3a7713b1edbc 70 HAL_TICK_FREQ_1KHZ = 1U,
AnnaBridge 171:3a7713b1edbc 71 HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
AnnaBridge 171:3a7713b1edbc 72 } HAL_TickFreqTypeDef;
AnnaBridge 171:3a7713b1edbc 73 /**
AnnaBridge 171:3a7713b1edbc 74 * @}
AnnaBridge 171:3a7713b1edbc 75 */
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 /**
AnnaBridge 171:3a7713b1edbc 78 * @}
AnnaBridge 171:3a7713b1edbc 79 */
AnnaBridge 171:3a7713b1edbc 80 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 81 /** @defgroup HAL_Exported_Macros HAL Exported Macros
AnnaBridge 171:3a7713b1edbc 82 * @{
AnnaBridge 171:3a7713b1edbc 83 */
AnnaBridge 171:3a7713b1edbc 84
AnnaBridge 171:3a7713b1edbc 85 /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
AnnaBridge 171:3a7713b1edbc 86 * @brief Freeze/Unfreeze Peripherals in Debug mode
AnnaBridge 171:3a7713b1edbc 87 * Note: On devices STM32F10xx8 and STM32F10xxB,
AnnaBridge 171:3a7713b1edbc 88 * STM32F101xC/D/E and STM32F103xC/D/E,
AnnaBridge 171:3a7713b1edbc 89 * STM32F101xF/G and STM32F103xF/G
AnnaBridge 171:3a7713b1edbc 90 * STM32F10xx4 and STM32F10xx6
AnnaBridge 171:3a7713b1edbc 91 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
AnnaBridge 171:3a7713b1edbc 92 * debug mode (not accessible by the user software in normal mode).
AnnaBridge 171:3a7713b1edbc 93 * Refer to errata sheet of these devices for more details.
AnnaBridge 171:3a7713b1edbc 94 * @{
AnnaBridge 171:3a7713b1edbc 95 */
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 /* Peripherals on APB1 */
AnnaBridge 171:3a7713b1edbc 98 /**
AnnaBridge 171:3a7713b1edbc 99 * @brief TIM2 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 100 */
AnnaBridge 171:3a7713b1edbc 101 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
AnnaBridge 171:3a7713b1edbc 102 #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
AnnaBridge 171:3a7713b1edbc 103
AnnaBridge 171:3a7713b1edbc 104 /**
AnnaBridge 171:3a7713b1edbc 105 * @brief TIM3 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 106 */
AnnaBridge 171:3a7713b1edbc 107 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
AnnaBridge 171:3a7713b1edbc 108 #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
AnnaBridge 171:3a7713b1edbc 109
AnnaBridge 171:3a7713b1edbc 110 #if defined (DBGMCU_CR_DBG_TIM4_STOP)
AnnaBridge 171:3a7713b1edbc 111 /**
AnnaBridge 171:3a7713b1edbc 112 * @brief TIM4 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 113 */
AnnaBridge 171:3a7713b1edbc 114 #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
AnnaBridge 171:3a7713b1edbc 115 #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
AnnaBridge 171:3a7713b1edbc 116 #endif
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 #if defined (DBGMCU_CR_DBG_TIM5_STOP)
AnnaBridge 171:3a7713b1edbc 119 /**
AnnaBridge 171:3a7713b1edbc 120 * @brief TIM5 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 121 */
AnnaBridge 171:3a7713b1edbc 122 #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
AnnaBridge 171:3a7713b1edbc 123 #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
AnnaBridge 171:3a7713b1edbc 124 #endif
AnnaBridge 171:3a7713b1edbc 125
AnnaBridge 171:3a7713b1edbc 126 #if defined (DBGMCU_CR_DBG_TIM6_STOP)
AnnaBridge 171:3a7713b1edbc 127 /**
AnnaBridge 171:3a7713b1edbc 128 * @brief TIM6 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 129 */
AnnaBridge 171:3a7713b1edbc 130 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
AnnaBridge 171:3a7713b1edbc 131 #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
AnnaBridge 171:3a7713b1edbc 132 #endif
AnnaBridge 171:3a7713b1edbc 133
AnnaBridge 171:3a7713b1edbc 134 #if defined (DBGMCU_CR_DBG_TIM7_STOP)
AnnaBridge 171:3a7713b1edbc 135 /**
AnnaBridge 171:3a7713b1edbc 136 * @brief TIM7 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 137 */
AnnaBridge 171:3a7713b1edbc 138 #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
AnnaBridge 171:3a7713b1edbc 139 #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
AnnaBridge 171:3a7713b1edbc 140 #endif
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 #if defined (DBGMCU_CR_DBG_TIM12_STOP)
AnnaBridge 171:3a7713b1edbc 143 /**
AnnaBridge 171:3a7713b1edbc 144 * @brief TIM12 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 145 */
AnnaBridge 171:3a7713b1edbc 146 #define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
AnnaBridge 171:3a7713b1edbc 147 #define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
AnnaBridge 171:3a7713b1edbc 148 #endif
AnnaBridge 171:3a7713b1edbc 149
AnnaBridge 171:3a7713b1edbc 150 #if defined (DBGMCU_CR_DBG_TIM13_STOP)
AnnaBridge 171:3a7713b1edbc 151 /**
AnnaBridge 171:3a7713b1edbc 152 * @brief TIM13 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 153 */
AnnaBridge 171:3a7713b1edbc 154 #define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
AnnaBridge 171:3a7713b1edbc 155 #define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
AnnaBridge 171:3a7713b1edbc 156 #endif
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 #if defined (DBGMCU_CR_DBG_TIM14_STOP)
AnnaBridge 171:3a7713b1edbc 159 /**
AnnaBridge 171:3a7713b1edbc 160 * @brief TIM14 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 161 */
AnnaBridge 171:3a7713b1edbc 162 #define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
AnnaBridge 171:3a7713b1edbc 163 #define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
AnnaBridge 171:3a7713b1edbc 164 #endif
AnnaBridge 171:3a7713b1edbc 165
AnnaBridge 171:3a7713b1edbc 166 /**
AnnaBridge 171:3a7713b1edbc 167 * @brief WWDG Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 168 */
AnnaBridge 171:3a7713b1edbc 169 #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
AnnaBridge 171:3a7713b1edbc 170 #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
AnnaBridge 171:3a7713b1edbc 171
AnnaBridge 171:3a7713b1edbc 172 /**
AnnaBridge 171:3a7713b1edbc 173 * @brief IWDG Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 174 */
AnnaBridge 171:3a7713b1edbc 175 #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
AnnaBridge 171:3a7713b1edbc 176 #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 /**
AnnaBridge 171:3a7713b1edbc 179 * @brief I2C1 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 180 */
AnnaBridge 171:3a7713b1edbc 181 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
AnnaBridge 171:3a7713b1edbc 182 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
AnnaBridge 171:3a7713b1edbc 183
AnnaBridge 171:3a7713b1edbc 184 #if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
AnnaBridge 171:3a7713b1edbc 185 /**
AnnaBridge 171:3a7713b1edbc 186 * @brief I2C2 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 187 */
AnnaBridge 171:3a7713b1edbc 188 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
AnnaBridge 171:3a7713b1edbc 189 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
AnnaBridge 171:3a7713b1edbc 190 #endif
AnnaBridge 171:3a7713b1edbc 191
AnnaBridge 171:3a7713b1edbc 192 #if defined (DBGMCU_CR_DBG_CAN1_STOP)
AnnaBridge 171:3a7713b1edbc 193 /**
AnnaBridge 171:3a7713b1edbc 194 * @brief CAN1 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 195 */
AnnaBridge 171:3a7713b1edbc 196 #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
AnnaBridge 171:3a7713b1edbc 197 #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
AnnaBridge 171:3a7713b1edbc 198 #endif
AnnaBridge 171:3a7713b1edbc 199
AnnaBridge 171:3a7713b1edbc 200 #if defined (DBGMCU_CR_DBG_CAN2_STOP)
AnnaBridge 171:3a7713b1edbc 201 /**
AnnaBridge 171:3a7713b1edbc 202 * @brief CAN2 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 203 */
AnnaBridge 171:3a7713b1edbc 204 #define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
AnnaBridge 171:3a7713b1edbc 205 #define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
AnnaBridge 171:3a7713b1edbc 206 #endif
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 /* Peripherals on APB2 */
AnnaBridge 171:3a7713b1edbc 209 #if defined (DBGMCU_CR_DBG_TIM1_STOP)
AnnaBridge 171:3a7713b1edbc 210 /**
AnnaBridge 171:3a7713b1edbc 211 * @brief TIM1 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 212 */
AnnaBridge 171:3a7713b1edbc 213 #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
AnnaBridge 171:3a7713b1edbc 214 #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
AnnaBridge 171:3a7713b1edbc 215 #endif
AnnaBridge 171:3a7713b1edbc 216
AnnaBridge 171:3a7713b1edbc 217 #if defined (DBGMCU_CR_DBG_TIM8_STOP)
AnnaBridge 171:3a7713b1edbc 218 /**
AnnaBridge 171:3a7713b1edbc 219 * @brief TIM8 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 220 */
AnnaBridge 171:3a7713b1edbc 221 #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
AnnaBridge 171:3a7713b1edbc 222 #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
AnnaBridge 171:3a7713b1edbc 223 #endif
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 #if defined (DBGMCU_CR_DBG_TIM9_STOP)
AnnaBridge 171:3a7713b1edbc 226 /**
AnnaBridge 171:3a7713b1edbc 227 * @brief TIM9 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 228 */
AnnaBridge 171:3a7713b1edbc 229 #define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
AnnaBridge 171:3a7713b1edbc 230 #define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
AnnaBridge 171:3a7713b1edbc 231 #endif
AnnaBridge 171:3a7713b1edbc 232
AnnaBridge 171:3a7713b1edbc 233 #if defined (DBGMCU_CR_DBG_TIM10_STOP)
AnnaBridge 171:3a7713b1edbc 234 /**
AnnaBridge 171:3a7713b1edbc 235 * @brief TIM10 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 236 */
AnnaBridge 171:3a7713b1edbc 237 #define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
AnnaBridge 171:3a7713b1edbc 238 #define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
AnnaBridge 171:3a7713b1edbc 239 #endif
AnnaBridge 171:3a7713b1edbc 240
AnnaBridge 171:3a7713b1edbc 241 #if defined (DBGMCU_CR_DBG_TIM11_STOP)
AnnaBridge 171:3a7713b1edbc 242 /**
AnnaBridge 171:3a7713b1edbc 243 * @brief TIM11 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 244 */
AnnaBridge 171:3a7713b1edbc 245 #define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
AnnaBridge 171:3a7713b1edbc 246 #define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
AnnaBridge 171:3a7713b1edbc 247 #endif
AnnaBridge 171:3a7713b1edbc 248
AnnaBridge 171:3a7713b1edbc 249
AnnaBridge 171:3a7713b1edbc 250 #if defined (DBGMCU_CR_DBG_TIM15_STOP)
AnnaBridge 171:3a7713b1edbc 251 /**
AnnaBridge 171:3a7713b1edbc 252 * @brief TIM15 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 253 */
AnnaBridge 171:3a7713b1edbc 254 #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
AnnaBridge 171:3a7713b1edbc 255 #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
AnnaBridge 171:3a7713b1edbc 256 #endif
AnnaBridge 171:3a7713b1edbc 257
AnnaBridge 171:3a7713b1edbc 258 #if defined (DBGMCU_CR_DBG_TIM16_STOP)
AnnaBridge 171:3a7713b1edbc 259 /**
AnnaBridge 171:3a7713b1edbc 260 * @brief TIM16 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 261 */
AnnaBridge 171:3a7713b1edbc 262 #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
AnnaBridge 171:3a7713b1edbc 263 #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
AnnaBridge 171:3a7713b1edbc 264 #endif
AnnaBridge 171:3a7713b1edbc 265
AnnaBridge 171:3a7713b1edbc 266 #if defined (DBGMCU_CR_DBG_TIM17_STOP)
AnnaBridge 171:3a7713b1edbc 267 /**
AnnaBridge 171:3a7713b1edbc 268 * @brief TIM17 Peripherals Debug mode
AnnaBridge 171:3a7713b1edbc 269 */
AnnaBridge 171:3a7713b1edbc 270 #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
AnnaBridge 171:3a7713b1edbc 271 #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
AnnaBridge 171:3a7713b1edbc 272 #endif
AnnaBridge 171:3a7713b1edbc 273
AnnaBridge 171:3a7713b1edbc 274 /**
AnnaBridge 171:3a7713b1edbc 275 * @}
AnnaBridge 171:3a7713b1edbc 276 */
AnnaBridge 171:3a7713b1edbc 277
AnnaBridge 171:3a7713b1edbc 278 /** @defgroup HAL_Private_Macros HAL Private Macros
AnnaBridge 171:3a7713b1edbc 279 * @{
AnnaBridge 171:3a7713b1edbc 280 */
AnnaBridge 171:3a7713b1edbc 281 #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
AnnaBridge 171:3a7713b1edbc 282 ((FREQ) == HAL_TICK_FREQ_100HZ) || \
AnnaBridge 171:3a7713b1edbc 283 ((FREQ) == HAL_TICK_FREQ_1KHZ))
AnnaBridge 171:3a7713b1edbc 284 /**
AnnaBridge 171:3a7713b1edbc 285 * @}
AnnaBridge 171:3a7713b1edbc 286 */
AnnaBridge 171:3a7713b1edbc 287
AnnaBridge 171:3a7713b1edbc 288 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 289 /** @addtogroup HAL_Exported_Functions
AnnaBridge 171:3a7713b1edbc 290 * @{
AnnaBridge 171:3a7713b1edbc 291 */
AnnaBridge 171:3a7713b1edbc 292 /** @addtogroup HAL_Exported_Functions_Group1
AnnaBridge 171:3a7713b1edbc 293 * @{
AnnaBridge 171:3a7713b1edbc 294 */
AnnaBridge 171:3a7713b1edbc 295 /* Initialization and de-initialization functions ******************************/
AnnaBridge 171:3a7713b1edbc 296 HAL_StatusTypeDef HAL_Init(void);
AnnaBridge 171:3a7713b1edbc 297 HAL_StatusTypeDef HAL_DeInit(void);
AnnaBridge 171:3a7713b1edbc 298 void HAL_MspInit(void);
AnnaBridge 171:3a7713b1edbc 299 void HAL_MspDeInit(void);
AnnaBridge 171:3a7713b1edbc 300 HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
AnnaBridge 171:3a7713b1edbc 301 /**
AnnaBridge 171:3a7713b1edbc 302 * @}
AnnaBridge 171:3a7713b1edbc 303 */
AnnaBridge 171:3a7713b1edbc 304
AnnaBridge 171:3a7713b1edbc 305 /** @addtogroup HAL_Exported_Functions_Group2
AnnaBridge 171:3a7713b1edbc 306 * @{
AnnaBridge 171:3a7713b1edbc 307 */
AnnaBridge 171:3a7713b1edbc 308 /* Peripheral Control functions ************************************************/
AnnaBridge 171:3a7713b1edbc 309 void HAL_IncTick(void);
AnnaBridge 171:3a7713b1edbc 310 void HAL_Delay(uint32_t Delay);
AnnaBridge 171:3a7713b1edbc 311 uint32_t HAL_GetTick(void);
AnnaBridge 171:3a7713b1edbc 312 uint32_t HAL_GetTickPrio(void);
AnnaBridge 171:3a7713b1edbc 313 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
AnnaBridge 171:3a7713b1edbc 314 HAL_TickFreqTypeDef HAL_GetTickFreq(void);
AnnaBridge 171:3a7713b1edbc 315 void HAL_SuspendTick(void);
AnnaBridge 171:3a7713b1edbc 316 void HAL_ResumeTick(void);
AnnaBridge 171:3a7713b1edbc 317 uint32_t HAL_GetHalVersion(void);
AnnaBridge 171:3a7713b1edbc 318 uint32_t HAL_GetREVID(void);
AnnaBridge 171:3a7713b1edbc 319 uint32_t HAL_GetDEVID(void);
AnnaBridge 171:3a7713b1edbc 320 void HAL_DBGMCU_EnableDBGSleepMode(void);
AnnaBridge 171:3a7713b1edbc 321 void HAL_DBGMCU_DisableDBGSleepMode(void);
AnnaBridge 171:3a7713b1edbc 322 void HAL_DBGMCU_EnableDBGStopMode(void);
AnnaBridge 171:3a7713b1edbc 323 void HAL_DBGMCU_DisableDBGStopMode(void);
AnnaBridge 171:3a7713b1edbc 324 void HAL_DBGMCU_EnableDBGStandbyMode(void);
AnnaBridge 171:3a7713b1edbc 325 void HAL_DBGMCU_DisableDBGStandbyMode(void);
AnnaBridge 171:3a7713b1edbc 326 void HAL_GetUID(uint32_t *UID);
AnnaBridge 171:3a7713b1edbc 327 /**
AnnaBridge 171:3a7713b1edbc 328 * @}
AnnaBridge 171:3a7713b1edbc 329 */
AnnaBridge 171:3a7713b1edbc 330
AnnaBridge 171:3a7713b1edbc 331 /**
AnnaBridge 171:3a7713b1edbc 332 * @}
AnnaBridge 171:3a7713b1edbc 333 */
AnnaBridge 171:3a7713b1edbc 334 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 335 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 336 /** @defgroup HAL_Private_Variables HAL Private Variables
AnnaBridge 171:3a7713b1edbc 337 * @{
AnnaBridge 171:3a7713b1edbc 338 */
AnnaBridge 171:3a7713b1edbc 339 /**
AnnaBridge 171:3a7713b1edbc 340 * @}
AnnaBridge 171:3a7713b1edbc 341 */
AnnaBridge 171:3a7713b1edbc 342 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 343 /** @defgroup HAL_Private_Constants HAL Private Constants
AnnaBridge 171:3a7713b1edbc 344 * @{
AnnaBridge 171:3a7713b1edbc 345 */
AnnaBridge 171:3a7713b1edbc 346 /**
AnnaBridge 171:3a7713b1edbc 347 * @}
AnnaBridge 171:3a7713b1edbc 348 */
AnnaBridge 171:3a7713b1edbc 349 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 350 /* Private functions ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 351 /**
AnnaBridge 171:3a7713b1edbc 352 * @}
AnnaBridge 171:3a7713b1edbc 353 */
AnnaBridge 171:3a7713b1edbc 354
AnnaBridge 171:3a7713b1edbc 355 /**
AnnaBridge 171:3a7713b1edbc 356 * @}
AnnaBridge 171:3a7713b1edbc 357 */
AnnaBridge 171:3a7713b1edbc 358
AnnaBridge 171:3a7713b1edbc 359 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 360 }
AnnaBridge 171:3a7713b1edbc 361 #endif
AnnaBridge 171:3a7713b1edbc 362
AnnaBridge 171:3a7713b1edbc 363 #endif /* __STM32F1xx_HAL_H */
AnnaBridge 171:3a7713b1edbc 364
AnnaBridge 171:3a7713b1edbc 365 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/