The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_NUCLEO_F103RB/TOOLCHAIN_GCC_ARM/stm32f1xx_hal_dac_ex.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /** |
AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f1xx_hal_dac_ex.h |
AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of DAC HAL Extension module. |
AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
AnnaBridge | 171:3a7713b1edbc | 8 | * |
AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 32 | * |
AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 34 | */ |
AnnaBridge | 171:3a7713b1edbc | 35 | |
AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F1xx_HAL_DAC_EX_H |
AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F1xx_HAL_DAC_EX_H |
AnnaBridge | 171:3a7713b1edbc | 39 | |
AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
AnnaBridge | 171:3a7713b1edbc | 43 | |
AnnaBridge | 171:3a7713b1edbc | 44 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
AnnaBridge | 171:3a7713b1edbc | 45 | |
AnnaBridge | 171:3a7713b1edbc | 46 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 47 | #include "stm32f1xx_hal_def.h" |
AnnaBridge | 171:3a7713b1edbc | 48 | |
AnnaBridge | 171:3a7713b1edbc | 49 | /** @addtogroup STM32F1xx_HAL_Driver |
AnnaBridge | 171:3a7713b1edbc | 50 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 51 | */ |
AnnaBridge | 171:3a7713b1edbc | 52 | |
AnnaBridge | 171:3a7713b1edbc | 53 | /** @addtogroup DACEx |
AnnaBridge | 171:3a7713b1edbc | 54 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 55 | */ |
AnnaBridge | 171:3a7713b1edbc | 56 | |
AnnaBridge | 171:3a7713b1edbc | 57 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 58 | |
AnnaBridge | 171:3a7713b1edbc | 59 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 60 | |
AnnaBridge | 171:3a7713b1edbc | 61 | /** @defgroup DACEx_Exported_Constants DACEx Exported Constants |
AnnaBridge | 171:3a7713b1edbc | 62 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 63 | */ |
AnnaBridge | 171:3a7713b1edbc | 64 | |
AnnaBridge | 171:3a7713b1edbc | 65 | /** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangleamplitude |
AnnaBridge | 171:3a7713b1edbc | 66 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 67 | */ |
AnnaBridge | 171:3a7713b1edbc | 68 | #define DAC_LFSRUNMASK_BIT0 0x00000000U /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 69 | #define DAC_LFSRUNMASK_BITS1_0 ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 70 | #define DAC_LFSRUNMASK_BITS2_0 ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 71 | #define DAC_LFSRUNMASK_BITS3_0 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 72 | #define DAC_LFSRUNMASK_BITS4_0 ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 73 | #define DAC_LFSRUNMASK_BITS5_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 74 | #define DAC_LFSRUNMASK_BITS6_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 75 | #define DAC_LFSRUNMASK_BITS7_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 76 | #define DAC_LFSRUNMASK_BITS8_0 ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 77 | #define DAC_LFSRUNMASK_BITS9_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 78 | #define DAC_LFSRUNMASK_BITS10_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 79 | #define DAC_LFSRUNMASK_BITS11_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ |
AnnaBridge | 171:3a7713b1edbc | 80 | #define DAC_TRIANGLEAMPLITUDE_1 0x00000000U /*!< Select max triangle amplitude of 1 */ |
AnnaBridge | 171:3a7713b1edbc | 81 | #define DAC_TRIANGLEAMPLITUDE_3 ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */ |
AnnaBridge | 171:3a7713b1edbc | 82 | #define DAC_TRIANGLEAMPLITUDE_7 ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7 */ |
AnnaBridge | 171:3a7713b1edbc | 83 | #define DAC_TRIANGLEAMPLITUDE_15 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */ |
AnnaBridge | 171:3a7713b1edbc | 84 | #define DAC_TRIANGLEAMPLITUDE_31 ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31 */ |
AnnaBridge | 171:3a7713b1edbc | 85 | #define DAC_TRIANGLEAMPLITUDE_63 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */ |
AnnaBridge | 171:3a7713b1edbc | 86 | #define DAC_TRIANGLEAMPLITUDE_127 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127 */ |
AnnaBridge | 171:3a7713b1edbc | 87 | #define DAC_TRIANGLEAMPLITUDE_255 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */ |
AnnaBridge | 171:3a7713b1edbc | 88 | #define DAC_TRIANGLEAMPLITUDE_511 ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511 */ |
AnnaBridge | 171:3a7713b1edbc | 89 | #define DAC_TRIANGLEAMPLITUDE_1023 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */ |
AnnaBridge | 171:3a7713b1edbc | 90 | #define DAC_TRIANGLEAMPLITUDE_2047 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047 */ |
AnnaBridge | 171:3a7713b1edbc | 91 | #define DAC_TRIANGLEAMPLITUDE_4095 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */ |
AnnaBridge | 171:3a7713b1edbc | 92 | |
AnnaBridge | 171:3a7713b1edbc | 93 | /** |
AnnaBridge | 171:3a7713b1edbc | 94 | * @} |
AnnaBridge | 171:3a7713b1edbc | 95 | */ |
AnnaBridge | 171:3a7713b1edbc | 96 | |
AnnaBridge | 171:3a7713b1edbc | 97 | /** @defgroup DACEx_trigger_selection DAC trigger selection |
AnnaBridge | 171:3a7713b1edbc | 98 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 99 | */ |
AnnaBridge | 171:3a7713b1edbc | 100 | #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC1_DHRxxxx register |
AnnaBridge | 171:3a7713b1edbc | 101 | has been loaded, and not by external trigger */ |
AnnaBridge | 171:3a7713b1edbc | 102 | #define DAC_TRIGGER_T6_TRGO ((uint32_t) DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 103 | #define DAC_TRIGGER_T7_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 104 | #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 105 | #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 106 | #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 107 | #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 108 | |
AnnaBridge | 171:3a7713b1edbc | 109 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) |
AnnaBridge | 171:3a7713b1edbc | 110 | /* For STM32F10x high-density and XL-density devices: TIM8 */ |
AnnaBridge | 171:3a7713b1edbc | 111 | #define DAC_TRIGGER_T8_TRGO ((uint32_t) DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 112 | #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ |
AnnaBridge | 171:3a7713b1edbc | 113 | |
AnnaBridge | 171:3a7713b1edbc | 114 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) |
AnnaBridge | 171:3a7713b1edbc | 115 | /* For STM32F10x connectivity line devices and STM32F100x devices: TIM3 */ |
AnnaBridge | 171:3a7713b1edbc | 116 | #define DAC_TRIGGER_T3_TRGO ((uint32_t) DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 117 | #endif /* STM32F100xB || STM32F100xE || STM32F105xC || STM32F107xC */ |
AnnaBridge | 171:3a7713b1edbc | 118 | |
AnnaBridge | 171:3a7713b1edbc | 119 | /* Availability of trigger from TIM5 and TIM15: */ |
AnnaBridge | 171:3a7713b1edbc | 120 | /* - For STM32F10x value line devices STM32F100xB: */ |
AnnaBridge | 171:3a7713b1edbc | 121 | /* trigger from TIM15 is available, TIM5 not available. */ |
AnnaBridge | 171:3a7713b1edbc | 122 | /* - For STM32F10x value line devices STM32F100xE: */ |
AnnaBridge | 171:3a7713b1edbc | 123 | /* trigger from TIM15 and TIM5 are both available, */ |
AnnaBridge | 171:3a7713b1edbc | 124 | /* selection depends on remap (with TIM5 as default configuration). */ |
AnnaBridge | 171:3a7713b1edbc | 125 | /* - Other STM32F1 devices: */ |
AnnaBridge | 171:3a7713b1edbc | 126 | /* trigger from TIM5 is available, TIM15 not available. */ |
AnnaBridge | 171:3a7713b1edbc | 127 | #if defined (STM32F100xB) |
AnnaBridge | 171:3a7713b1edbc | 128 | #define DAC_TRIGGER_T15_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 129 | #else |
AnnaBridge | 171:3a7713b1edbc | 130 | |
AnnaBridge | 171:3a7713b1edbc | 131 | #define DAC_TRIGGER_T5_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ |
AnnaBridge | 171:3a7713b1edbc | 132 | |
AnnaBridge | 171:3a7713b1edbc | 133 | #if defined (STM32F100xE) |
AnnaBridge | 171:3a7713b1edbc | 134 | /*!< DAC trigger availability depending on STM32F1 devices: |
AnnaBridge | 171:3a7713b1edbc | 135 | For STM32F100x high-density value line devices, the TIM15 TRGO event can be selected |
AnnaBridge | 171:3a7713b1edbc | 136 | as replacement of TIM5 TRGO if the MISC_REMAP bit in the AFIO_MAPR2 register is set. |
AnnaBridge | 171:3a7713b1edbc | 137 | Refer to macro "__HAL_AFIO_REMAP_MISC_ENABLE()/__HAL_AFIO_REMAP_MISC_DISABLE()". |
AnnaBridge | 171:3a7713b1edbc | 138 | Otherwise, TIM5 TRGO is used and TIM15 TRGO is not used (default case). |
AnnaBridge | 171:3a7713b1edbc | 139 | For more details please refer to the AFIO section. */ |
AnnaBridge | 171:3a7713b1edbc | 140 | #define DAC_TRIGGER_T15_TRGO DAC_TRIGGER_T5_TRGO |
AnnaBridge | 171:3a7713b1edbc | 141 | #endif /* STM32F100xE */ |
AnnaBridge | 171:3a7713b1edbc | 142 | |
AnnaBridge | 171:3a7713b1edbc | 143 | #endif /* STM32F100xB */ |
AnnaBridge | 171:3a7713b1edbc | 144 | /** |
AnnaBridge | 171:3a7713b1edbc | 145 | * @} |
AnnaBridge | 171:3a7713b1edbc | 146 | */ |
AnnaBridge | 171:3a7713b1edbc | 147 | |
AnnaBridge | 171:3a7713b1edbc | 148 | #if defined (STM32F100xB) || defined (STM32F100xE) |
AnnaBridge | 171:3a7713b1edbc | 149 | /** @defgroup DAC_flags_definition DAC flags definition |
AnnaBridge | 171:3a7713b1edbc | 150 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 151 | */ |
AnnaBridge | 171:3a7713b1edbc | 152 | #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
AnnaBridge | 171:3a7713b1edbc | 153 | #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
AnnaBridge | 171:3a7713b1edbc | 154 | |
AnnaBridge | 171:3a7713b1edbc | 155 | /** |
AnnaBridge | 171:3a7713b1edbc | 156 | * @} |
AnnaBridge | 171:3a7713b1edbc | 157 | */ |
AnnaBridge | 171:3a7713b1edbc | 158 | |
AnnaBridge | 171:3a7713b1edbc | 159 | /** @defgroup DAC_IT_definition DAC IT definition |
AnnaBridge | 171:3a7713b1edbc | 160 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 161 | */ |
AnnaBridge | 171:3a7713b1edbc | 162 | #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
AnnaBridge | 171:3a7713b1edbc | 163 | #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
AnnaBridge | 171:3a7713b1edbc | 164 | |
AnnaBridge | 171:3a7713b1edbc | 165 | /** |
AnnaBridge | 171:3a7713b1edbc | 166 | * @} |
AnnaBridge | 171:3a7713b1edbc | 167 | */ |
AnnaBridge | 171:3a7713b1edbc | 168 | #endif /* STM32F100xB || STM32F100xE */ |
AnnaBridge | 171:3a7713b1edbc | 169 | |
AnnaBridge | 171:3a7713b1edbc | 170 | /** |
AnnaBridge | 171:3a7713b1edbc | 171 | * @} |
AnnaBridge | 171:3a7713b1edbc | 172 | */ |
AnnaBridge | 171:3a7713b1edbc | 173 | |
AnnaBridge | 171:3a7713b1edbc | 174 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 175 | |
AnnaBridge | 171:3a7713b1edbc | 176 | #if defined (STM32F100xB) || defined (STM32F100xE) |
AnnaBridge | 171:3a7713b1edbc | 177 | /** @defgroup DACEx_Exported_Macros DACEx Exported Macros |
AnnaBridge | 171:3a7713b1edbc | 178 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 179 | */ |
AnnaBridge | 171:3a7713b1edbc | 180 | |
AnnaBridge | 171:3a7713b1edbc | 181 | /** @brief Enable the DAC interrupt |
AnnaBridge | 171:3a7713b1edbc | 182 | * @param __HANDLE__: specifies the DAC handle |
AnnaBridge | 171:3a7713b1edbc | 183 | * @param __INTERRUPT__: specifies the DAC interrupt. |
AnnaBridge | 171:3a7713b1edbc | 184 | * This parameter can be any combination of the following values: |
AnnaBridge | 171:3a7713b1edbc | 185 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
AnnaBridge | 171:3a7713b1edbc | 186 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
AnnaBridge | 171:3a7713b1edbc | 187 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 188 | */ |
AnnaBridge | 171:3a7713b1edbc | 189 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) |
AnnaBridge | 171:3a7713b1edbc | 190 | |
AnnaBridge | 171:3a7713b1edbc | 191 | /** @brief Disable the DAC interrupt |
AnnaBridge | 171:3a7713b1edbc | 192 | * @param __HANDLE__: specifies the DAC handle |
AnnaBridge | 171:3a7713b1edbc | 193 | * @param __INTERRUPT__: specifies the DAC interrupt. |
AnnaBridge | 171:3a7713b1edbc | 194 | * This parameter can be any combination of the following values: |
AnnaBridge | 171:3a7713b1edbc | 195 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
AnnaBridge | 171:3a7713b1edbc | 196 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
AnnaBridge | 171:3a7713b1edbc | 197 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 198 | */ |
AnnaBridge | 171:3a7713b1edbc | 199 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) |
AnnaBridge | 171:3a7713b1edbc | 200 | |
AnnaBridge | 171:3a7713b1edbc | 201 | /** @brief Checks if the specified DAC interrupt source is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 202 | * @param __HANDLE__: DAC handle |
AnnaBridge | 171:3a7713b1edbc | 203 | * @param __INTERRUPT__: DAC interrupt source to check |
AnnaBridge | 171:3a7713b1edbc | 204 | * This parameter can be any combination of the following values: |
AnnaBridge | 171:3a7713b1edbc | 205 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
AnnaBridge | 171:3a7713b1edbc | 206 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
AnnaBridge | 171:3a7713b1edbc | 207 | * @retval State of interruption (SET or RESET) |
AnnaBridge | 171:3a7713b1edbc | 208 | */ |
AnnaBridge | 171:3a7713b1edbc | 209 | #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
AnnaBridge | 171:3a7713b1edbc | 210 | |
AnnaBridge | 171:3a7713b1edbc | 211 | /** @brief Get the selected DAC's flag status. |
AnnaBridge | 171:3a7713b1edbc | 212 | * @param __HANDLE__: specifies the DAC handle. |
AnnaBridge | 171:3a7713b1edbc | 213 | * @param __FLAG__: specifies the DAC flag to get. |
AnnaBridge | 171:3a7713b1edbc | 214 | * This parameter can be any combination of the following values: |
AnnaBridge | 171:3a7713b1edbc | 215 | * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag |
AnnaBridge | 171:3a7713b1edbc | 216 | * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag |
AnnaBridge | 171:3a7713b1edbc | 217 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 218 | */ |
AnnaBridge | 171:3a7713b1edbc | 219 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
AnnaBridge | 171:3a7713b1edbc | 220 | |
AnnaBridge | 171:3a7713b1edbc | 221 | /** @brief Clear the DAC's flag. |
AnnaBridge | 171:3a7713b1edbc | 222 | * @param __HANDLE__: specifies the DAC handle. |
AnnaBridge | 171:3a7713b1edbc | 223 | * @param __FLAG__: specifies the DAC flag to clear. |
AnnaBridge | 171:3a7713b1edbc | 224 | * This parameter can be any combination of the following values: |
AnnaBridge | 171:3a7713b1edbc | 225 | * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag |
AnnaBridge | 171:3a7713b1edbc | 226 | * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag |
AnnaBridge | 171:3a7713b1edbc | 227 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 228 | */ |
AnnaBridge | 171:3a7713b1edbc | 229 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) |
AnnaBridge | 171:3a7713b1edbc | 230 | |
AnnaBridge | 171:3a7713b1edbc | 231 | |
AnnaBridge | 171:3a7713b1edbc | 232 | /** |
AnnaBridge | 171:3a7713b1edbc | 233 | * @} |
AnnaBridge | 171:3a7713b1edbc | 234 | */ |
AnnaBridge | 171:3a7713b1edbc | 235 | #endif /* STM32F100xB || STM32F100xE */ |
AnnaBridge | 171:3a7713b1edbc | 236 | |
AnnaBridge | 171:3a7713b1edbc | 237 | /* Private macro -------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 238 | |
AnnaBridge | 171:3a7713b1edbc | 239 | /** @defgroup DACEx_Private_Macros DACEx Private Macros |
AnnaBridge | 171:3a7713b1edbc | 240 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 241 | */ |
AnnaBridge | 171:3a7713b1edbc | 242 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) |
AnnaBridge | 171:3a7713b1edbc | 243 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
AnnaBridge | 171:3a7713b1edbc | 244 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 245 | ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 246 | ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 247 | ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 248 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 249 | ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 250 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
AnnaBridge | 171:3a7713b1edbc | 251 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
AnnaBridge | 171:3a7713b1edbc | 252 | #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ |
AnnaBridge | 171:3a7713b1edbc | 253 | #if defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) |
AnnaBridge | 171:3a7713b1edbc | 254 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
AnnaBridge | 171:3a7713b1edbc | 255 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 256 | ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 257 | ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 258 | ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 259 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 260 | ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 261 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
AnnaBridge | 171:3a7713b1edbc | 262 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
AnnaBridge | 171:3a7713b1edbc | 263 | #endif /* STM32F100xE || STM32F105xC || STM32F107xC */ |
AnnaBridge | 171:3a7713b1edbc | 264 | #if defined (STM32F100xB) |
AnnaBridge | 171:3a7713b1edbc | 265 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
AnnaBridge | 171:3a7713b1edbc | 266 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 267 | ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 268 | ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 269 | ((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 270 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 271 | ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ |
AnnaBridge | 171:3a7713b1edbc | 272 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
AnnaBridge | 171:3a7713b1edbc | 273 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
AnnaBridge | 171:3a7713b1edbc | 274 | #endif /* STM32F100xB */ |
AnnaBridge | 171:3a7713b1edbc | 275 | |
AnnaBridge | 171:3a7713b1edbc | 276 | #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ |
AnnaBridge | 171:3a7713b1edbc | 277 | ((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 278 | ((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 279 | ((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 280 | ((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 281 | ((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 282 | ((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 283 | ((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 284 | ((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 285 | ((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 286 | ((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 287 | ((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \ |
AnnaBridge | 171:3a7713b1edbc | 288 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \ |
AnnaBridge | 171:3a7713b1edbc | 289 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \ |
AnnaBridge | 171:3a7713b1edbc | 290 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \ |
AnnaBridge | 171:3a7713b1edbc | 291 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \ |
AnnaBridge | 171:3a7713b1edbc | 292 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \ |
AnnaBridge | 171:3a7713b1edbc | 293 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \ |
AnnaBridge | 171:3a7713b1edbc | 294 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \ |
AnnaBridge | 171:3a7713b1edbc | 295 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \ |
AnnaBridge | 171:3a7713b1edbc | 296 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \ |
AnnaBridge | 171:3a7713b1edbc | 297 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \ |
AnnaBridge | 171:3a7713b1edbc | 298 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \ |
AnnaBridge | 171:3a7713b1edbc | 299 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_4095)) |
AnnaBridge | 171:3a7713b1edbc | 300 | |
AnnaBridge | 171:3a7713b1edbc | 301 | /** |
AnnaBridge | 171:3a7713b1edbc | 302 | * @} |
AnnaBridge | 171:3a7713b1edbc | 303 | */ |
AnnaBridge | 171:3a7713b1edbc | 304 | |
AnnaBridge | 171:3a7713b1edbc | 305 | |
AnnaBridge | 171:3a7713b1edbc | 306 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 307 | |
AnnaBridge | 171:3a7713b1edbc | 308 | /** @addtogroup DACEx_Exported_Functions |
AnnaBridge | 171:3a7713b1edbc | 309 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 310 | */ |
AnnaBridge | 171:3a7713b1edbc | 311 | |
AnnaBridge | 171:3a7713b1edbc | 312 | /** @addtogroup DACEx_Exported_Functions_Group1 |
AnnaBridge | 171:3a7713b1edbc | 313 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 314 | */ |
AnnaBridge | 171:3a7713b1edbc | 315 | /* Extension features functions ***********************************************/ |
AnnaBridge | 171:3a7713b1edbc | 316 | |
AnnaBridge | 171:3a7713b1edbc | 317 | uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac); |
AnnaBridge | 171:3a7713b1edbc | 318 | HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); |
AnnaBridge | 171:3a7713b1edbc | 319 | HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); |
AnnaBridge | 171:3a7713b1edbc | 320 | HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2); |
AnnaBridge | 171:3a7713b1edbc | 321 | |
AnnaBridge | 171:3a7713b1edbc | 322 | void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac); |
AnnaBridge | 171:3a7713b1edbc | 323 | void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac); |
AnnaBridge | 171:3a7713b1edbc | 324 | void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef* hdac); |
AnnaBridge | 171:3a7713b1edbc | 325 | |
AnnaBridge | 171:3a7713b1edbc | 326 | #if defined (STM32F100xB) || defined (STM32F100xE) |
AnnaBridge | 171:3a7713b1edbc | 327 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
AnnaBridge | 171:3a7713b1edbc | 328 | void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
AnnaBridge | 171:3a7713b1edbc | 329 | void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef* hdac); |
AnnaBridge | 171:3a7713b1edbc | 330 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
AnnaBridge | 171:3a7713b1edbc | 331 | |
AnnaBridge | 171:3a7713b1edbc | 332 | /** |
AnnaBridge | 171:3a7713b1edbc | 333 | * @} |
AnnaBridge | 171:3a7713b1edbc | 334 | */ |
AnnaBridge | 171:3a7713b1edbc | 335 | |
AnnaBridge | 171:3a7713b1edbc | 336 | |
AnnaBridge | 171:3a7713b1edbc | 337 | |
AnnaBridge | 171:3a7713b1edbc | 338 | |
AnnaBridge | 171:3a7713b1edbc | 339 | /** |
AnnaBridge | 171:3a7713b1edbc | 340 | * @} |
AnnaBridge | 171:3a7713b1edbc | 341 | */ |
AnnaBridge | 171:3a7713b1edbc | 342 | |
AnnaBridge | 171:3a7713b1edbc | 343 | /** @addtogroup DACEx_Private_Functions |
AnnaBridge | 171:3a7713b1edbc | 344 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 345 | */ |
AnnaBridge | 171:3a7713b1edbc | 346 | void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma); |
AnnaBridge | 171:3a7713b1edbc | 347 | void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma); |
AnnaBridge | 171:3a7713b1edbc | 348 | void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma); |
AnnaBridge | 171:3a7713b1edbc | 349 | |
AnnaBridge | 171:3a7713b1edbc | 350 | /** |
AnnaBridge | 171:3a7713b1edbc | 351 | * @} |
AnnaBridge | 171:3a7713b1edbc | 352 | */ |
AnnaBridge | 171:3a7713b1edbc | 353 | |
AnnaBridge | 171:3a7713b1edbc | 354 | /** |
AnnaBridge | 171:3a7713b1edbc | 355 | * @} |
AnnaBridge | 171:3a7713b1edbc | 356 | */ |
AnnaBridge | 171:3a7713b1edbc | 357 | |
AnnaBridge | 171:3a7713b1edbc | 358 | /** |
AnnaBridge | 171:3a7713b1edbc | 359 | * @} |
AnnaBridge | 171:3a7713b1edbc | 360 | */ |
AnnaBridge | 171:3a7713b1edbc | 361 | |
AnnaBridge | 171:3a7713b1edbc | 362 | #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
AnnaBridge | 171:3a7713b1edbc | 363 | |
AnnaBridge | 171:3a7713b1edbc | 364 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 365 | } |
AnnaBridge | 171:3a7713b1edbc | 366 | #endif |
AnnaBridge | 171:3a7713b1edbc | 367 | |
AnnaBridge | 171:3a7713b1edbc | 368 | #endif /*__STM32F1xx_HAL_DAC_EX_H */ |
AnnaBridge | 171:3a7713b1edbc | 369 | |
AnnaBridge | 171:3a7713b1edbc | 370 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |