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TARGET_NUCLEO_F030R8/TOOLCHAIN_GCC_ARM/stm32f0xx_hal_usart_ex.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 171:3a7713b1edbc | 1 | /** |
AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f0xx_hal_usart_ex.h |
AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of USART HAL Extended module. |
AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
AnnaBridge | 171:3a7713b1edbc | 8 | * |
AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 32 | * |
AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 34 | */ |
AnnaBridge | 171:3a7713b1edbc | 35 | |
AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F0xx_HAL_USART_EX_H |
AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F0xx_HAL_USART_EX_H |
AnnaBridge | 171:3a7713b1edbc | 39 | |
AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
AnnaBridge | 171:3a7713b1edbc | 43 | |
AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f0xx_hal_def.h" |
AnnaBridge | 171:3a7713b1edbc | 46 | |
AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32F0xx_HAL_Driver |
AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 49 | */ |
AnnaBridge | 171:3a7713b1edbc | 50 | |
AnnaBridge | 171:3a7713b1edbc | 51 | /** @addtogroup USARTEx |
AnnaBridge | 171:3a7713b1edbc | 52 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 53 | */ |
AnnaBridge | 171:3a7713b1edbc | 54 | |
AnnaBridge | 171:3a7713b1edbc | 55 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 56 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 57 | /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants |
AnnaBridge | 171:3a7713b1edbc | 58 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 59 | */ |
AnnaBridge | 171:3a7713b1edbc | 60 | |
AnnaBridge | 171:3a7713b1edbc | 61 | /** @defgroup USARTEx_Word_Length USARTEx Word Length |
AnnaBridge | 171:3a7713b1edbc | 62 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 63 | */ |
AnnaBridge | 171:3a7713b1edbc | 64 | #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \ |
AnnaBridge | 171:3a7713b1edbc | 65 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \ |
AnnaBridge | 171:3a7713b1edbc | 66 | defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) |
AnnaBridge | 171:3a7713b1edbc | 67 | #define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */ |
AnnaBridge | 171:3a7713b1edbc | 68 | #define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ |
AnnaBridge | 171:3a7713b1edbc | 69 | #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */ |
AnnaBridge | 171:3a7713b1edbc | 70 | #else |
AnnaBridge | 171:3a7713b1edbc | 71 | #define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ |
AnnaBridge | 171:3a7713b1edbc | 72 | #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long USART frame */ |
AnnaBridge | 171:3a7713b1edbc | 73 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || defined (STM32F070xB) || \ |
AnnaBridge | 171:3a7713b1edbc | 74 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
AnnaBridge | 171:3a7713b1edbc | 75 | defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */ |
AnnaBridge | 171:3a7713b1edbc | 76 | /** |
AnnaBridge | 171:3a7713b1edbc | 77 | * @} |
AnnaBridge | 171:3a7713b1edbc | 78 | */ |
AnnaBridge | 171:3a7713b1edbc | 79 | |
AnnaBridge | 171:3a7713b1edbc | 80 | /** @defgroup USART_Request_Parameters USARTEx Request Parameters |
AnnaBridge | 171:3a7713b1edbc | 81 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 82 | */ |
AnnaBridge | 171:3a7713b1edbc | 83 | #define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
AnnaBridge | 171:3a7713b1edbc | 84 | #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) |
AnnaBridge | 171:3a7713b1edbc | 85 | #define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
AnnaBridge | 171:3a7713b1edbc | 86 | #else |
AnnaBridge | 171:3a7713b1edbc | 87 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */ |
AnnaBridge | 171:3a7713b1edbc | 88 | /** |
AnnaBridge | 171:3a7713b1edbc | 89 | * @} |
AnnaBridge | 171:3a7713b1edbc | 90 | */ |
AnnaBridge | 171:3a7713b1edbc | 91 | |
AnnaBridge | 171:3a7713b1edbc | 92 | /** @defgroup USART_Flags USART Flags |
AnnaBridge | 171:3a7713b1edbc | 93 | * Elements values convention: 0xXXXX |
AnnaBridge | 171:3a7713b1edbc | 94 | * - 0xXXXX : Flag mask in the ISR register |
AnnaBridge | 171:3a7713b1edbc | 95 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 96 | */ |
AnnaBridge | 171:3a7713b1edbc | 97 | #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) |
AnnaBridge | 171:3a7713b1edbc | 98 | #define USART_FLAG_REACK (0x00400000U) /*!< USART receive enable acknowledge flag */ |
AnnaBridge | 171:3a7713b1edbc | 99 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */ |
AnnaBridge | 171:3a7713b1edbc | 100 | #define USART_FLAG_TEACK (0x00200000U) /*!< USART transmit enable acknowledge flag */ |
AnnaBridge | 171:3a7713b1edbc | 101 | #define USART_FLAG_BUSY (0x00010000U) /*!< USART busy flag */ |
AnnaBridge | 171:3a7713b1edbc | 102 | #define USART_FLAG_CTS (0x00000400U) /*!< USART clear to send flag */ |
AnnaBridge | 171:3a7713b1edbc | 103 | #define USART_FLAG_CTSIF (0x00000200U) /*!< USART clear to send interrupt flag */ |
AnnaBridge | 171:3a7713b1edbc | 104 | #define USART_FLAG_TXE (0x00000080U) /*!< USART transmit data register empty */ |
AnnaBridge | 171:3a7713b1edbc | 105 | #define USART_FLAG_TC (0x00000040U) /*!< USART transmission complete */ |
AnnaBridge | 171:3a7713b1edbc | 106 | #define USART_FLAG_RXNE (0x00000020U) /*!< USART read data register not empty */ |
AnnaBridge | 171:3a7713b1edbc | 107 | #define USART_FLAG_IDLE (0x00000010U) /*!< USART idle flag */ |
AnnaBridge | 171:3a7713b1edbc | 108 | #define USART_FLAG_ORE (0x00000008U) /*!< USART overrun error */ |
AnnaBridge | 171:3a7713b1edbc | 109 | #define USART_FLAG_NE (0x00000004U) /*!< USART noise error */ |
AnnaBridge | 171:3a7713b1edbc | 110 | #define USART_FLAG_FE (0x00000002U) /*!< USART frame error */ |
AnnaBridge | 171:3a7713b1edbc | 111 | #define USART_FLAG_PE (0x00000001U) /*!< USART parity error */ |
AnnaBridge | 171:3a7713b1edbc | 112 | /** |
AnnaBridge | 171:3a7713b1edbc | 113 | * @} |
AnnaBridge | 171:3a7713b1edbc | 114 | */ |
AnnaBridge | 171:3a7713b1edbc | 115 | |
AnnaBridge | 171:3a7713b1edbc | 116 | /** |
AnnaBridge | 171:3a7713b1edbc | 117 | * @} |
AnnaBridge | 171:3a7713b1edbc | 118 | */ |
AnnaBridge | 171:3a7713b1edbc | 119 | |
AnnaBridge | 171:3a7713b1edbc | 120 | /* Exported macros ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 121 | /** @defgroup USARTEx_Exported_Macros USARTEx Exported Macros |
AnnaBridge | 171:3a7713b1edbc | 122 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 123 | */ |
AnnaBridge | 171:3a7713b1edbc | 124 | |
AnnaBridge | 171:3a7713b1edbc | 125 | /** @brief Flush the USART Data registers. |
AnnaBridge | 171:3a7713b1edbc | 126 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 127 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 128 | */ |
AnnaBridge | 171:3a7713b1edbc | 129 | #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) |
AnnaBridge | 171:3a7713b1edbc | 130 | #define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__) \ |
AnnaBridge | 171:3a7713b1edbc | 131 | do{ \ |
AnnaBridge | 171:3a7713b1edbc | 132 | SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \ |
AnnaBridge | 171:3a7713b1edbc | 133 | SET_BIT((__HANDLE__)->Instance->RQR, USART_TXDATA_FLUSH_REQUEST); \ |
AnnaBridge | 171:3a7713b1edbc | 134 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 135 | #else |
AnnaBridge | 171:3a7713b1edbc | 136 | #define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__) \ |
AnnaBridge | 171:3a7713b1edbc | 137 | do{ \ |
AnnaBridge | 171:3a7713b1edbc | 138 | SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \ |
AnnaBridge | 171:3a7713b1edbc | 139 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 140 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */ |
AnnaBridge | 171:3a7713b1edbc | 141 | |
AnnaBridge | 171:3a7713b1edbc | 142 | /** |
AnnaBridge | 171:3a7713b1edbc | 143 | * @} |
AnnaBridge | 171:3a7713b1edbc | 144 | */ |
AnnaBridge | 171:3a7713b1edbc | 145 | |
AnnaBridge | 171:3a7713b1edbc | 146 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 147 | /** @defgroup USARTEx_Private_Macros USARTEx Private Macros |
AnnaBridge | 171:3a7713b1edbc | 148 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 149 | */ |
AnnaBridge | 171:3a7713b1edbc | 150 | |
AnnaBridge | 171:3a7713b1edbc | 151 | /** @brief Report the USART clock source. |
AnnaBridge | 171:3a7713b1edbc | 152 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 153 | * @param __CLOCKSOURCE__ output variable. |
AnnaBridge | 171:3a7713b1edbc | 154 | * @retval the USART clocking source, written in __CLOCKSOURCE__. |
AnnaBridge | 171:3a7713b1edbc | 155 | */ |
AnnaBridge | 171:3a7713b1edbc | 156 | #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) |
AnnaBridge | 171:3a7713b1edbc | 157 | #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
AnnaBridge | 171:3a7713b1edbc | 158 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 159 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 160 | { \ |
AnnaBridge | 171:3a7713b1edbc | 161 | case RCC_USART1CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 162 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 163 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 164 | case RCC_USART1CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 165 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 166 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 167 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 168 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 169 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 170 | case RCC_USART1CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 171 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 172 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 173 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 174 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 175 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 176 | } \ |
AnnaBridge | 171:3a7713b1edbc | 177 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 178 | #elif defined (STM32F030x8) || defined (STM32F070x6) || \ |
AnnaBridge | 171:3a7713b1edbc | 179 | defined (STM32F042x6) || defined (STM32F048xx) || \ |
AnnaBridge | 171:3a7713b1edbc | 180 | defined (STM32F051x8) || defined (STM32F058xx) |
AnnaBridge | 171:3a7713b1edbc | 181 | #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
AnnaBridge | 171:3a7713b1edbc | 182 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 183 | if((__HANDLE__)->Instance == USART1) \ |
AnnaBridge | 171:3a7713b1edbc | 184 | { \ |
AnnaBridge | 171:3a7713b1edbc | 185 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 186 | { \ |
AnnaBridge | 171:3a7713b1edbc | 187 | case RCC_USART1CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 188 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 189 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 190 | case RCC_USART1CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 191 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 192 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 193 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 194 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 195 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 196 | case RCC_USART1CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 197 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 198 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 199 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 200 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 201 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 202 | } \ |
AnnaBridge | 171:3a7713b1edbc | 203 | } \ |
AnnaBridge | 171:3a7713b1edbc | 204 | else if((__HANDLE__)->Instance == USART2) \ |
AnnaBridge | 171:3a7713b1edbc | 205 | { \ |
AnnaBridge | 171:3a7713b1edbc | 206 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 207 | } \ |
AnnaBridge | 171:3a7713b1edbc | 208 | else \ |
AnnaBridge | 171:3a7713b1edbc | 209 | { \ |
AnnaBridge | 171:3a7713b1edbc | 210 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 211 | } \ |
AnnaBridge | 171:3a7713b1edbc | 212 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 213 | #elif defined (STM32F070xB) |
AnnaBridge | 171:3a7713b1edbc | 214 | #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
AnnaBridge | 171:3a7713b1edbc | 215 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 216 | if((__HANDLE__)->Instance == USART1) \ |
AnnaBridge | 171:3a7713b1edbc | 217 | { \ |
AnnaBridge | 171:3a7713b1edbc | 218 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 219 | { \ |
AnnaBridge | 171:3a7713b1edbc | 220 | case RCC_USART1CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 221 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 222 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 223 | case RCC_USART1CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 224 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 225 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 226 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 227 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 228 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 229 | case RCC_USART1CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 230 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 231 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 232 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 233 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 234 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 235 | } \ |
AnnaBridge | 171:3a7713b1edbc | 236 | } \ |
AnnaBridge | 171:3a7713b1edbc | 237 | else if((__HANDLE__)->Instance == USART2) \ |
AnnaBridge | 171:3a7713b1edbc | 238 | { \ |
AnnaBridge | 171:3a7713b1edbc | 239 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 240 | } \ |
AnnaBridge | 171:3a7713b1edbc | 241 | else if((__HANDLE__)->Instance == USART3) \ |
AnnaBridge | 171:3a7713b1edbc | 242 | { \ |
AnnaBridge | 171:3a7713b1edbc | 243 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 244 | } \ |
AnnaBridge | 171:3a7713b1edbc | 245 | else if((__HANDLE__)->Instance == USART4) \ |
AnnaBridge | 171:3a7713b1edbc | 246 | { \ |
AnnaBridge | 171:3a7713b1edbc | 247 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 248 | } \ |
AnnaBridge | 171:3a7713b1edbc | 249 | else \ |
AnnaBridge | 171:3a7713b1edbc | 250 | { \ |
AnnaBridge | 171:3a7713b1edbc | 251 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 252 | } \ |
AnnaBridge | 171:3a7713b1edbc | 253 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 254 | #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) |
AnnaBridge | 171:3a7713b1edbc | 255 | #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
AnnaBridge | 171:3a7713b1edbc | 256 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 257 | if((__HANDLE__)->Instance == USART1) \ |
AnnaBridge | 171:3a7713b1edbc | 258 | { \ |
AnnaBridge | 171:3a7713b1edbc | 259 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 260 | { \ |
AnnaBridge | 171:3a7713b1edbc | 261 | case RCC_USART1CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 262 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 263 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 264 | case RCC_USART1CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 265 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 266 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 267 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 268 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 269 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 270 | case RCC_USART1CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 271 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 272 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 273 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 274 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 275 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 276 | } \ |
AnnaBridge | 171:3a7713b1edbc | 277 | } \ |
AnnaBridge | 171:3a7713b1edbc | 278 | else if((__HANDLE__)->Instance == USART2) \ |
AnnaBridge | 171:3a7713b1edbc | 279 | { \ |
AnnaBridge | 171:3a7713b1edbc | 280 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 281 | { \ |
AnnaBridge | 171:3a7713b1edbc | 282 | case RCC_USART2CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 283 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 284 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 285 | case RCC_USART2CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 286 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 287 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 288 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 289 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 290 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 291 | case RCC_USART2CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 292 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 293 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 294 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 295 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 296 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 297 | } \ |
AnnaBridge | 171:3a7713b1edbc | 298 | } \ |
AnnaBridge | 171:3a7713b1edbc | 299 | else if((__HANDLE__)->Instance == USART3) \ |
AnnaBridge | 171:3a7713b1edbc | 300 | { \ |
AnnaBridge | 171:3a7713b1edbc | 301 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 302 | } \ |
AnnaBridge | 171:3a7713b1edbc | 303 | else if((__HANDLE__)->Instance == USART4) \ |
AnnaBridge | 171:3a7713b1edbc | 304 | { \ |
AnnaBridge | 171:3a7713b1edbc | 305 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 306 | } \ |
AnnaBridge | 171:3a7713b1edbc | 307 | else \ |
AnnaBridge | 171:3a7713b1edbc | 308 | { \ |
AnnaBridge | 171:3a7713b1edbc | 309 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 310 | } \ |
AnnaBridge | 171:3a7713b1edbc | 311 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 312 | #elif defined(STM32F091xC) || defined (STM32F098xx) |
AnnaBridge | 171:3a7713b1edbc | 313 | #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
AnnaBridge | 171:3a7713b1edbc | 314 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 315 | if((__HANDLE__)->Instance == USART1) \ |
AnnaBridge | 171:3a7713b1edbc | 316 | { \ |
AnnaBridge | 171:3a7713b1edbc | 317 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 318 | { \ |
AnnaBridge | 171:3a7713b1edbc | 319 | case RCC_USART1CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 320 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 321 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 322 | case RCC_USART1CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 323 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 324 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 325 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 326 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 327 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 328 | case RCC_USART1CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 329 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 330 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 331 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 332 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 333 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 334 | } \ |
AnnaBridge | 171:3a7713b1edbc | 335 | } \ |
AnnaBridge | 171:3a7713b1edbc | 336 | else if((__HANDLE__)->Instance == USART2) \ |
AnnaBridge | 171:3a7713b1edbc | 337 | { \ |
AnnaBridge | 171:3a7713b1edbc | 338 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 339 | { \ |
AnnaBridge | 171:3a7713b1edbc | 340 | case RCC_USART2CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 341 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 342 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 343 | case RCC_USART2CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 344 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 345 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 346 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 347 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 348 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 349 | case RCC_USART2CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 350 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 351 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 352 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 353 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 354 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 355 | } \ |
AnnaBridge | 171:3a7713b1edbc | 356 | } \ |
AnnaBridge | 171:3a7713b1edbc | 357 | else if((__HANDLE__)->Instance == USART3) \ |
AnnaBridge | 171:3a7713b1edbc | 358 | { \ |
AnnaBridge | 171:3a7713b1edbc | 359 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 360 | { \ |
AnnaBridge | 171:3a7713b1edbc | 361 | case RCC_USART3CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 362 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 363 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 364 | case RCC_USART3CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 365 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 366 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 367 | case RCC_USART3CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 368 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 369 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 370 | case RCC_USART3CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 371 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 372 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 373 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 374 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 375 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 376 | } \ |
AnnaBridge | 171:3a7713b1edbc | 377 | } \ |
AnnaBridge | 171:3a7713b1edbc | 378 | else if((__HANDLE__)->Instance == USART4) \ |
AnnaBridge | 171:3a7713b1edbc | 379 | { \ |
AnnaBridge | 171:3a7713b1edbc | 380 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 381 | } \ |
AnnaBridge | 171:3a7713b1edbc | 382 | else if((__HANDLE__)->Instance == USART5) \ |
AnnaBridge | 171:3a7713b1edbc | 383 | { \ |
AnnaBridge | 171:3a7713b1edbc | 384 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 385 | } \ |
AnnaBridge | 171:3a7713b1edbc | 386 | else if((__HANDLE__)->Instance == USART6) \ |
AnnaBridge | 171:3a7713b1edbc | 387 | { \ |
AnnaBridge | 171:3a7713b1edbc | 388 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 389 | } \ |
AnnaBridge | 171:3a7713b1edbc | 390 | else if((__HANDLE__)->Instance == USART7) \ |
AnnaBridge | 171:3a7713b1edbc | 391 | { \ |
AnnaBridge | 171:3a7713b1edbc | 392 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 393 | } \ |
AnnaBridge | 171:3a7713b1edbc | 394 | else if((__HANDLE__)->Instance == USART8) \ |
AnnaBridge | 171:3a7713b1edbc | 395 | { \ |
AnnaBridge | 171:3a7713b1edbc | 396 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 397 | } \ |
AnnaBridge | 171:3a7713b1edbc | 398 | else \ |
AnnaBridge | 171:3a7713b1edbc | 399 | { \ |
AnnaBridge | 171:3a7713b1edbc | 400 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 401 | } \ |
AnnaBridge | 171:3a7713b1edbc | 402 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 403 | #elif defined(STM32F030xC) |
AnnaBridge | 171:3a7713b1edbc | 404 | #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
AnnaBridge | 171:3a7713b1edbc | 405 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 406 | if((__HANDLE__)->Instance == USART1) \ |
AnnaBridge | 171:3a7713b1edbc | 407 | { \ |
AnnaBridge | 171:3a7713b1edbc | 408 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 409 | { \ |
AnnaBridge | 171:3a7713b1edbc | 410 | case RCC_USART1CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 411 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 412 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 413 | case RCC_USART1CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 414 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 415 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 416 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 417 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 418 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 419 | case RCC_USART1CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 420 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 421 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 422 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 423 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 424 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 425 | } \ |
AnnaBridge | 171:3a7713b1edbc | 426 | } \ |
AnnaBridge | 171:3a7713b1edbc | 427 | else if((__HANDLE__)->Instance == USART2) \ |
AnnaBridge | 171:3a7713b1edbc | 428 | { \ |
AnnaBridge | 171:3a7713b1edbc | 429 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 430 | } \ |
AnnaBridge | 171:3a7713b1edbc | 431 | else if((__HANDLE__)->Instance == USART3) \ |
AnnaBridge | 171:3a7713b1edbc | 432 | { \ |
AnnaBridge | 171:3a7713b1edbc | 433 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 434 | } \ |
AnnaBridge | 171:3a7713b1edbc | 435 | else if((__HANDLE__)->Instance == USART4) \ |
AnnaBridge | 171:3a7713b1edbc | 436 | { \ |
AnnaBridge | 171:3a7713b1edbc | 437 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 438 | } \ |
AnnaBridge | 171:3a7713b1edbc | 439 | else if((__HANDLE__)->Instance == USART5) \ |
AnnaBridge | 171:3a7713b1edbc | 440 | { \ |
AnnaBridge | 171:3a7713b1edbc | 441 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 442 | } \ |
AnnaBridge | 171:3a7713b1edbc | 443 | else if((__HANDLE__)->Instance == USART6) \ |
AnnaBridge | 171:3a7713b1edbc | 444 | { \ |
AnnaBridge | 171:3a7713b1edbc | 445 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 446 | } \ |
AnnaBridge | 171:3a7713b1edbc | 447 | else \ |
AnnaBridge | 171:3a7713b1edbc | 448 | { \ |
AnnaBridge | 171:3a7713b1edbc | 449 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
AnnaBridge | 171:3a7713b1edbc | 450 | } \ |
AnnaBridge | 171:3a7713b1edbc | 451 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 452 | #endif /* defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) */ |
AnnaBridge | 171:3a7713b1edbc | 453 | |
AnnaBridge | 171:3a7713b1edbc | 454 | |
AnnaBridge | 171:3a7713b1edbc | 455 | /** @brief Compute the USART mask to apply to retrieve the received data |
AnnaBridge | 171:3a7713b1edbc | 456 | * according to the word length and to the parity bits activation. |
AnnaBridge | 171:3a7713b1edbc | 457 | * @note If PCE = 1, the parity bit is not included in the data extracted |
AnnaBridge | 171:3a7713b1edbc | 458 | * by the reception API(). |
AnnaBridge | 171:3a7713b1edbc | 459 | * This masking operation is not carried out in the case of |
AnnaBridge | 171:3a7713b1edbc | 460 | * DMA transfers. |
AnnaBridge | 171:3a7713b1edbc | 461 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 462 | * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field. |
AnnaBridge | 171:3a7713b1edbc | 463 | */ |
AnnaBridge | 171:3a7713b1edbc | 464 | #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \ |
AnnaBridge | 171:3a7713b1edbc | 465 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \ |
AnnaBridge | 171:3a7713b1edbc | 466 | defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) |
AnnaBridge | 171:3a7713b1edbc | 467 | #define USART_MASK_COMPUTATION(__HANDLE__) \ |
AnnaBridge | 171:3a7713b1edbc | 468 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 469 | if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \ |
AnnaBridge | 171:3a7713b1edbc | 470 | { \ |
AnnaBridge | 171:3a7713b1edbc | 471 | if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ |
AnnaBridge | 171:3a7713b1edbc | 472 | { \ |
AnnaBridge | 171:3a7713b1edbc | 473 | (__HANDLE__)->Mask = 0x01FFU; \ |
AnnaBridge | 171:3a7713b1edbc | 474 | } \ |
AnnaBridge | 171:3a7713b1edbc | 475 | else \ |
AnnaBridge | 171:3a7713b1edbc | 476 | { \ |
AnnaBridge | 171:3a7713b1edbc | 477 | (__HANDLE__)->Mask = 0x00FFU; \ |
AnnaBridge | 171:3a7713b1edbc | 478 | } \ |
AnnaBridge | 171:3a7713b1edbc | 479 | } \ |
AnnaBridge | 171:3a7713b1edbc | 480 | else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \ |
AnnaBridge | 171:3a7713b1edbc | 481 | { \ |
AnnaBridge | 171:3a7713b1edbc | 482 | if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ |
AnnaBridge | 171:3a7713b1edbc | 483 | { \ |
AnnaBridge | 171:3a7713b1edbc | 484 | (__HANDLE__)->Mask = 0x00FFU; \ |
AnnaBridge | 171:3a7713b1edbc | 485 | } \ |
AnnaBridge | 171:3a7713b1edbc | 486 | else \ |
AnnaBridge | 171:3a7713b1edbc | 487 | { \ |
AnnaBridge | 171:3a7713b1edbc | 488 | (__HANDLE__)->Mask = 0x007FU; \ |
AnnaBridge | 171:3a7713b1edbc | 489 | } \ |
AnnaBridge | 171:3a7713b1edbc | 490 | } \ |
AnnaBridge | 171:3a7713b1edbc | 491 | else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \ |
AnnaBridge | 171:3a7713b1edbc | 492 | { \ |
AnnaBridge | 171:3a7713b1edbc | 493 | if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ |
AnnaBridge | 171:3a7713b1edbc | 494 | { \ |
AnnaBridge | 171:3a7713b1edbc | 495 | (__HANDLE__)->Mask = 0x007FU; \ |
AnnaBridge | 171:3a7713b1edbc | 496 | } \ |
AnnaBridge | 171:3a7713b1edbc | 497 | else \ |
AnnaBridge | 171:3a7713b1edbc | 498 | { \ |
AnnaBridge | 171:3a7713b1edbc | 499 | (__HANDLE__)->Mask = 0x003FU; \ |
AnnaBridge | 171:3a7713b1edbc | 500 | } \ |
AnnaBridge | 171:3a7713b1edbc | 501 | } \ |
AnnaBridge | 171:3a7713b1edbc | 502 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 503 | #else |
AnnaBridge | 171:3a7713b1edbc | 504 | #define USART_MASK_COMPUTATION(__HANDLE__) \ |
AnnaBridge | 171:3a7713b1edbc | 505 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 506 | if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \ |
AnnaBridge | 171:3a7713b1edbc | 507 | { \ |
AnnaBridge | 171:3a7713b1edbc | 508 | if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ |
AnnaBridge | 171:3a7713b1edbc | 509 | { \ |
AnnaBridge | 171:3a7713b1edbc | 510 | (__HANDLE__)->Mask = 0x01FFU; \ |
AnnaBridge | 171:3a7713b1edbc | 511 | } \ |
AnnaBridge | 171:3a7713b1edbc | 512 | else \ |
AnnaBridge | 171:3a7713b1edbc | 513 | { \ |
AnnaBridge | 171:3a7713b1edbc | 514 | (__HANDLE__)->Mask = 0x00FFU; \ |
AnnaBridge | 171:3a7713b1edbc | 515 | } \ |
AnnaBridge | 171:3a7713b1edbc | 516 | } \ |
AnnaBridge | 171:3a7713b1edbc | 517 | else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \ |
AnnaBridge | 171:3a7713b1edbc | 518 | { \ |
AnnaBridge | 171:3a7713b1edbc | 519 | if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ |
AnnaBridge | 171:3a7713b1edbc | 520 | { \ |
AnnaBridge | 171:3a7713b1edbc | 521 | (__HANDLE__)->Mask = 0x00FFU; \ |
AnnaBridge | 171:3a7713b1edbc | 522 | } \ |
AnnaBridge | 171:3a7713b1edbc | 523 | else \ |
AnnaBridge | 171:3a7713b1edbc | 524 | { \ |
AnnaBridge | 171:3a7713b1edbc | 525 | (__HANDLE__)->Mask = 0x007FU; \ |
AnnaBridge | 171:3a7713b1edbc | 526 | } \ |
AnnaBridge | 171:3a7713b1edbc | 527 | } \ |
AnnaBridge | 171:3a7713b1edbc | 528 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 529 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \ |
AnnaBridge | 171:3a7713b1edbc | 530 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \ |
AnnaBridge | 171:3a7713b1edbc | 531 | defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */ |
AnnaBridge | 171:3a7713b1edbc | 532 | |
AnnaBridge | 171:3a7713b1edbc | 533 | |
AnnaBridge | 171:3a7713b1edbc | 534 | /** |
AnnaBridge | 171:3a7713b1edbc | 535 | * @brief Ensure that USART frame length is valid. |
AnnaBridge | 171:3a7713b1edbc | 536 | * @param __LENGTH__ USART frame length. |
AnnaBridge | 171:3a7713b1edbc | 537 | * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
AnnaBridge | 171:3a7713b1edbc | 538 | */ |
AnnaBridge | 171:3a7713b1edbc | 539 | #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \ |
AnnaBridge | 171:3a7713b1edbc | 540 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \ |
AnnaBridge | 171:3a7713b1edbc | 541 | defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) |
AnnaBridge | 171:3a7713b1edbc | 542 | #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \ |
AnnaBridge | 171:3a7713b1edbc | 543 | ((__LENGTH__) == USART_WORDLENGTH_8B) || \ |
AnnaBridge | 171:3a7713b1edbc | 544 | ((__LENGTH__) == USART_WORDLENGTH_9B)) |
AnnaBridge | 171:3a7713b1edbc | 545 | #else |
AnnaBridge | 171:3a7713b1edbc | 546 | #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_8B) || \ |
AnnaBridge | 171:3a7713b1edbc | 547 | ((__LENGTH__) == USART_WORDLENGTH_9B)) |
AnnaBridge | 171:3a7713b1edbc | 548 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || defined (STM32F070xB) || \ |
AnnaBridge | 171:3a7713b1edbc | 549 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
AnnaBridge | 171:3a7713b1edbc | 550 | defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */ |
AnnaBridge | 171:3a7713b1edbc | 551 | |
AnnaBridge | 171:3a7713b1edbc | 552 | /** |
AnnaBridge | 171:3a7713b1edbc | 553 | * @brief Ensure that USART request parameter is valid. |
AnnaBridge | 171:3a7713b1edbc | 554 | * @param __PARAM__ USART request parameter. |
AnnaBridge | 171:3a7713b1edbc | 555 | * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) |
AnnaBridge | 171:3a7713b1edbc | 556 | */ |
AnnaBridge | 171:3a7713b1edbc | 557 | #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) |
AnnaBridge | 171:3a7713b1edbc | 558 | #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \ |
AnnaBridge | 171:3a7713b1edbc | 559 | ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST)) |
AnnaBridge | 171:3a7713b1edbc | 560 | #else |
AnnaBridge | 171:3a7713b1edbc | 561 | #define IS_USART_REQUEST_PARAMETER(__PARAM__) ((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) |
AnnaBridge | 171:3a7713b1edbc | 562 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */ |
AnnaBridge | 171:3a7713b1edbc | 563 | |
AnnaBridge | 171:3a7713b1edbc | 564 | /** |
AnnaBridge | 171:3a7713b1edbc | 565 | * @} |
AnnaBridge | 171:3a7713b1edbc | 566 | */ |
AnnaBridge | 171:3a7713b1edbc | 567 | |
AnnaBridge | 171:3a7713b1edbc | 568 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 569 | |
AnnaBridge | 171:3a7713b1edbc | 570 | /** |
AnnaBridge | 171:3a7713b1edbc | 571 | * @} |
AnnaBridge | 171:3a7713b1edbc | 572 | */ |
AnnaBridge | 171:3a7713b1edbc | 573 | |
AnnaBridge | 171:3a7713b1edbc | 574 | /** |
AnnaBridge | 171:3a7713b1edbc | 575 | * @} |
AnnaBridge | 171:3a7713b1edbc | 576 | */ |
AnnaBridge | 171:3a7713b1edbc | 577 | |
AnnaBridge | 171:3a7713b1edbc | 578 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 579 | } |
AnnaBridge | 171:3a7713b1edbc | 580 | #endif |
AnnaBridge | 171:3a7713b1edbc | 581 | |
AnnaBridge | 171:3a7713b1edbc | 582 | #endif /* __STM32F0xx_HAL_USART_EX_H */ |
AnnaBridge | 171:3a7713b1edbc | 583 | |
AnnaBridge | 171:3a7713b1edbc | 584 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
AnnaBridge | 171:3a7713b1edbc | 585 |