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TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/stm32l1xx_ll_pwr.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32l1xx_ll_pwr.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of PWR LL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32L1xx_LL_PWR_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32L1xx_LL_PWR_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32l1xx.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32L1xx_LL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 #if defined(PWR)
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @defgroup PWR_LL PWR
AnnaBridge 171:3a7713b1edbc 54 * @{
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 60 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 61 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 62 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 63 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
AnnaBridge 171:3a7713b1edbc 64 * @{
AnnaBridge 171:3a7713b1edbc 65 */
AnnaBridge 171:3a7713b1edbc 66
AnnaBridge 171:3a7713b1edbc 67 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge 171:3a7713b1edbc 68 * @brief Flags defines which can be used with LL_PWR_WriteReg function
AnnaBridge 171:3a7713b1edbc 69 * @{
AnnaBridge 171:3a7713b1edbc 70 */
AnnaBridge 171:3a7713b1edbc 71 #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
AnnaBridge 171:3a7713b1edbc 72 #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
AnnaBridge 171:3a7713b1edbc 73 /**
AnnaBridge 171:3a7713b1edbc 74 * @}
AnnaBridge 171:3a7713b1edbc 75 */
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 171:3a7713b1edbc 78 * @brief Flags defines which can be used with LL_PWR_ReadReg function
AnnaBridge 171:3a7713b1edbc 79 * @{
AnnaBridge 171:3a7713b1edbc 80 */
AnnaBridge 171:3a7713b1edbc 81 #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
AnnaBridge 171:3a7713b1edbc 82 #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
AnnaBridge 171:3a7713b1edbc 83 #if defined(PWR_PVD_SUPPORT)
AnnaBridge 171:3a7713b1edbc 84 #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
AnnaBridge 171:3a7713b1edbc 85 #endif /* PWR_PVD_SUPPORT */
AnnaBridge 171:3a7713b1edbc 86 #if defined(PWR_CSR_VREFINTRDYF)
AnnaBridge 171:3a7713b1edbc 87 #define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */
AnnaBridge 171:3a7713b1edbc 88 #endif /* PWR_CSR_VREFINTRDYF */
AnnaBridge 171:3a7713b1edbc 89 #define LL_PWR_CSR_VOS PWR_CSR_VOSF /*!< Voltage scaling select flag */
AnnaBridge 171:3a7713b1edbc 90 #define LL_PWR_CSR_REGLPF PWR_CSR_REGLPF /*!< Regulator low power flag */
AnnaBridge 171:3a7713b1edbc 91 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */
AnnaBridge 171:3a7713b1edbc 92 #define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */
AnnaBridge 171:3a7713b1edbc 93 #if defined(PWR_CSR_EWUP3)
AnnaBridge 171:3a7713b1edbc 94 #define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */
AnnaBridge 171:3a7713b1edbc 95 #endif /* PWR_CSR_EWUP3 */
AnnaBridge 171:3a7713b1edbc 96 /**
AnnaBridge 171:3a7713b1edbc 97 * @}
AnnaBridge 171:3a7713b1edbc 98 */
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
AnnaBridge 171:3a7713b1edbc 101 * @{
AnnaBridge 171:3a7713b1edbc 102 */
AnnaBridge 171:3a7713b1edbc 103 #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0) /*!< 1.8V (range 1) */
AnnaBridge 171:3a7713b1edbc 104 #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1) /*!< 1.5V (range 2) */
AnnaBridge 171:3a7713b1edbc 105 #define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /*!< 1.2V (range 3) */
AnnaBridge 171:3a7713b1edbc 106 /**
AnnaBridge 171:3a7713b1edbc 107 * @}
AnnaBridge 171:3a7713b1edbc 108 */
AnnaBridge 171:3a7713b1edbc 109
AnnaBridge 171:3a7713b1edbc 110 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
AnnaBridge 171:3a7713b1edbc 111 * @{
AnnaBridge 171:3a7713b1edbc 112 */
AnnaBridge 171:3a7713b1edbc 113 #define LL_PWR_MODE_STOP 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
AnnaBridge 171:3a7713b1edbc 114 #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
AnnaBridge 171:3a7713b1edbc 115 /**
AnnaBridge 171:3a7713b1edbc 116 * @}
AnnaBridge 171:3a7713b1edbc 117 */
AnnaBridge 171:3a7713b1edbc 118
AnnaBridge 171:3a7713b1edbc 119 /** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES Regulator Mode In Low Power Modes
AnnaBridge 171:3a7713b1edbc 120 * @{
AnnaBridge 171:3a7713b1edbc 121 */
AnnaBridge 171:3a7713b1edbc 122 #define LL_PWR_REGU_LPMODES_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep/sleep/low-power run mode */
AnnaBridge 171:3a7713b1edbc 123 #define LL_PWR_REGU_LPMODES_LOW_POWER (PWR_CR_LPSDSR) /*!< Voltage Regulator in low-power mode during deepsleep/sleep/low-power run mode */
AnnaBridge 171:3a7713b1edbc 124 /**
AnnaBridge 171:3a7713b1edbc 125 * @}
AnnaBridge 171:3a7713b1edbc 126 */
AnnaBridge 171:3a7713b1edbc 127 #if defined(PWR_CR_LPDS)
AnnaBridge 171:3a7713b1edbc 128 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
AnnaBridge 171:3a7713b1edbc 129 * @{
AnnaBridge 171:3a7713b1edbc 130 */
AnnaBridge 171:3a7713b1edbc 131 #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
AnnaBridge 171:3a7713b1edbc 132 #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
AnnaBridge 171:3a7713b1edbc 133 /**
AnnaBridge 171:3a7713b1edbc 134 * @}
AnnaBridge 171:3a7713b1edbc 135 */
AnnaBridge 171:3a7713b1edbc 136 #endif /* PWR_CR_LPDS */
AnnaBridge 171:3a7713b1edbc 137
AnnaBridge 171:3a7713b1edbc 138 #if defined(PWR_PVD_SUPPORT)
AnnaBridge 171:3a7713b1edbc 139 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
AnnaBridge 171:3a7713b1edbc 140 * @{
AnnaBridge 171:3a7713b1edbc 141 */
AnnaBridge 171:3a7713b1edbc 142 #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 1.9 V */
AnnaBridge 171:3a7713b1edbc 143 #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.1 V */
AnnaBridge 171:3a7713b1edbc 144 #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.3 V */
AnnaBridge 171:3a7713b1edbc 145 #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
AnnaBridge 171:3a7713b1edbc 146 #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.7 V */
AnnaBridge 171:3a7713b1edbc 147 #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.9 V */
AnnaBridge 171:3a7713b1edbc 148 #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 3.1 V */
AnnaBridge 171:3a7713b1edbc 149 #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< External input analog voltage (Compare internally to VREFINT) */
AnnaBridge 171:3a7713b1edbc 150 /**
AnnaBridge 171:3a7713b1edbc 151 * @}
AnnaBridge 171:3a7713b1edbc 152 */
AnnaBridge 171:3a7713b1edbc 153 #endif /* PWR_PVD_SUPPORT */
AnnaBridge 171:3a7713b1edbc 154 /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
AnnaBridge 171:3a7713b1edbc 155 * @{
AnnaBridge 171:3a7713b1edbc 156 */
AnnaBridge 171:3a7713b1edbc 157 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */
AnnaBridge 171:3a7713b1edbc 158 #define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */
AnnaBridge 171:3a7713b1edbc 159 #if defined(PWR_CSR_EWUP3)
AnnaBridge 171:3a7713b1edbc 160 #define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */
AnnaBridge 171:3a7713b1edbc 161 #endif /* PWR_CSR_EWUP3 */
AnnaBridge 171:3a7713b1edbc 162 /**
AnnaBridge 171:3a7713b1edbc 163 * @}
AnnaBridge 171:3a7713b1edbc 164 */
AnnaBridge 171:3a7713b1edbc 165
AnnaBridge 171:3a7713b1edbc 166 /**
AnnaBridge 171:3a7713b1edbc 167 * @}
AnnaBridge 171:3a7713b1edbc 168 */
AnnaBridge 171:3a7713b1edbc 169
AnnaBridge 171:3a7713b1edbc 170
AnnaBridge 171:3a7713b1edbc 171 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 172 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
AnnaBridge 171:3a7713b1edbc 173 * @{
AnnaBridge 171:3a7713b1edbc 174 */
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
AnnaBridge 171:3a7713b1edbc 177 * @{
AnnaBridge 171:3a7713b1edbc 178 */
AnnaBridge 171:3a7713b1edbc 179
AnnaBridge 171:3a7713b1edbc 180 /**
AnnaBridge 171:3a7713b1edbc 181 * @brief Write a value in PWR register
AnnaBridge 171:3a7713b1edbc 182 * @param __REG__ Register to be written
AnnaBridge 171:3a7713b1edbc 183 * @param __VALUE__ Value to be written in the register
AnnaBridge 171:3a7713b1edbc 184 * @retval None
AnnaBridge 171:3a7713b1edbc 185 */
AnnaBridge 171:3a7713b1edbc 186 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
AnnaBridge 171:3a7713b1edbc 187
AnnaBridge 171:3a7713b1edbc 188 /**
AnnaBridge 171:3a7713b1edbc 189 * @brief Read a value in PWR register
AnnaBridge 171:3a7713b1edbc 190 * @param __REG__ Register to be read
AnnaBridge 171:3a7713b1edbc 191 * @retval Register value
AnnaBridge 171:3a7713b1edbc 192 */
AnnaBridge 171:3a7713b1edbc 193 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
AnnaBridge 171:3a7713b1edbc 194 /**
AnnaBridge 171:3a7713b1edbc 195 * @}
AnnaBridge 171:3a7713b1edbc 196 */
AnnaBridge 171:3a7713b1edbc 197
AnnaBridge 171:3a7713b1edbc 198 /**
AnnaBridge 171:3a7713b1edbc 199 * @}
AnnaBridge 171:3a7713b1edbc 200 */
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 203 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
AnnaBridge 171:3a7713b1edbc 204 * @{
AnnaBridge 171:3a7713b1edbc 205 */
AnnaBridge 171:3a7713b1edbc 206
AnnaBridge 171:3a7713b1edbc 207 /** @defgroup PWR_LL_EF_Configuration Configuration
AnnaBridge 171:3a7713b1edbc 208 * @{
AnnaBridge 171:3a7713b1edbc 209 */
AnnaBridge 171:3a7713b1edbc 210 /**
AnnaBridge 171:3a7713b1edbc 211 * @brief Switch the Regulator from main mode to low-power mode
AnnaBridge 171:3a7713b1edbc 212 * @rmtoll CR LPRUN LL_PWR_EnableLowPowerRunMode
AnnaBridge 171:3a7713b1edbc 213 * @note Remind to set the Regulator to low power before enabling
AnnaBridge 171:3a7713b1edbc 214 * LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER).
AnnaBridge 171:3a7713b1edbc 215 * @retval None
AnnaBridge 171:3a7713b1edbc 216 */
AnnaBridge 171:3a7713b1edbc 217 __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void)
AnnaBridge 171:3a7713b1edbc 218 {
AnnaBridge 171:3a7713b1edbc 219 SET_BIT(PWR->CR, PWR_CR_LPRUN);
AnnaBridge 171:3a7713b1edbc 220 }
AnnaBridge 171:3a7713b1edbc 221
AnnaBridge 171:3a7713b1edbc 222 /**
AnnaBridge 171:3a7713b1edbc 223 * @brief Switch the Regulator from low-power mode to main mode
AnnaBridge 171:3a7713b1edbc 224 * @rmtoll CR LPRUN LL_PWR_DisableLowPowerRunMode
AnnaBridge 171:3a7713b1edbc 225 * @retval None
AnnaBridge 171:3a7713b1edbc 226 */
AnnaBridge 171:3a7713b1edbc 227 __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void)
AnnaBridge 171:3a7713b1edbc 228 {
AnnaBridge 171:3a7713b1edbc 229 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
AnnaBridge 171:3a7713b1edbc 230 }
AnnaBridge 171:3a7713b1edbc 231
AnnaBridge 171:3a7713b1edbc 232 /**
AnnaBridge 171:3a7713b1edbc 233 * @brief Check if the Regulator is in low-power mode
AnnaBridge 171:3a7713b1edbc 234 * @rmtoll CR LPRUN LL_PWR_IsEnabledLowPowerRunMode
AnnaBridge 171:3a7713b1edbc 235 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 236 */
AnnaBridge 171:3a7713b1edbc 237 __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void)
AnnaBridge 171:3a7713b1edbc 238 {
AnnaBridge 171:3a7713b1edbc 239 return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN));
AnnaBridge 171:3a7713b1edbc 240 }
AnnaBridge 171:3a7713b1edbc 241
AnnaBridge 171:3a7713b1edbc 242 /**
AnnaBridge 171:3a7713b1edbc 243 * @brief Set voltage Regulator to low-power and switch from
AnnaBridge 171:3a7713b1edbc 244 * run main mode to run low-power mode.
AnnaBridge 171:3a7713b1edbc 245 * @rmtoll CR LPSDSR LL_PWR_EnterLowPowerRunMode\n
AnnaBridge 171:3a7713b1edbc 246 * CR LPRUN LL_PWR_EnterLowPowerRunMode
AnnaBridge 171:3a7713b1edbc 247 * @note This "high level" function is introduced to provide functional
AnnaBridge 171:3a7713b1edbc 248 * compatibility with other families. Notice that the two registers
AnnaBridge 171:3a7713b1edbc 249 * have to be written sequentially, so this function is not atomic.
AnnaBridge 171:3a7713b1edbc 250 * To assure atomicity you can call separately the following functions:
AnnaBridge 171:3a7713b1edbc 251 * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER);
AnnaBridge 171:3a7713b1edbc 252 * - @ref LL_PWR_EnableLowPowerRunMode();
AnnaBridge 171:3a7713b1edbc 253 * @retval None
AnnaBridge 171:3a7713b1edbc 254 */
AnnaBridge 171:3a7713b1edbc 255 __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void)
AnnaBridge 171:3a7713b1edbc 256 {
AnnaBridge 171:3a7713b1edbc 257 SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */
AnnaBridge 171:3a7713b1edbc 258 SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */
AnnaBridge 171:3a7713b1edbc 259 }
AnnaBridge 171:3a7713b1edbc 260
AnnaBridge 171:3a7713b1edbc 261 /**
AnnaBridge 171:3a7713b1edbc 262 * @brief Set voltage Regulator to main and switch from
AnnaBridge 171:3a7713b1edbc 263 * run main mode to low-power mode.
AnnaBridge 171:3a7713b1edbc 264 * @rmtoll CR LPSDSR LL_PWR_ExitLowPowerRunMode\n
AnnaBridge 171:3a7713b1edbc 265 * CR LPRUN LL_PWR_ExitLowPowerRunMode
AnnaBridge 171:3a7713b1edbc 266 * @note This "high level" function is introduced to provide functional
AnnaBridge 171:3a7713b1edbc 267 * compatibility with other families. Notice that the two registers
AnnaBridge 171:3a7713b1edbc 268 * have to be written sequentially, so this function is not atomic.
AnnaBridge 171:3a7713b1edbc 269 * To assure atomicity you can call separately the following functions:
AnnaBridge 171:3a7713b1edbc 270 * - @ref LL_PWR_DisableLowPowerRunMode();
AnnaBridge 171:3a7713b1edbc 271 * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN);
AnnaBridge 171:3a7713b1edbc 272 * @retval None
AnnaBridge 171:3a7713b1edbc 273 */
AnnaBridge 171:3a7713b1edbc 274 __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void)
AnnaBridge 171:3a7713b1edbc 275 {
AnnaBridge 171:3a7713b1edbc 276 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */
AnnaBridge 171:3a7713b1edbc 277 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */
AnnaBridge 171:3a7713b1edbc 278 }
AnnaBridge 171:3a7713b1edbc 279 /**
AnnaBridge 171:3a7713b1edbc 280 * @brief Set the main internal Regulator output voltage
AnnaBridge 171:3a7713b1edbc 281 * @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling
AnnaBridge 171:3a7713b1edbc 282 * @param VoltageScaling This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 283 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
AnnaBridge 171:3a7713b1edbc 284 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
AnnaBridge 171:3a7713b1edbc 285 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
AnnaBridge 171:3a7713b1edbc 286 * @retval None
AnnaBridge 171:3a7713b1edbc 287 */
AnnaBridge 171:3a7713b1edbc 288 __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
AnnaBridge 171:3a7713b1edbc 289 {
AnnaBridge 171:3a7713b1edbc 290 MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
AnnaBridge 171:3a7713b1edbc 291 }
AnnaBridge 171:3a7713b1edbc 292
AnnaBridge 171:3a7713b1edbc 293 /**
AnnaBridge 171:3a7713b1edbc 294 * @brief Get the main internal Regulator output voltage
AnnaBridge 171:3a7713b1edbc 295 * @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling
AnnaBridge 171:3a7713b1edbc 296 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 297 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
AnnaBridge 171:3a7713b1edbc 298 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
AnnaBridge 171:3a7713b1edbc 299 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
AnnaBridge 171:3a7713b1edbc 300 */
AnnaBridge 171:3a7713b1edbc 301 __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
AnnaBridge 171:3a7713b1edbc 302 {
AnnaBridge 171:3a7713b1edbc 303 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));
AnnaBridge 171:3a7713b1edbc 304 }
AnnaBridge 171:3a7713b1edbc 305
AnnaBridge 171:3a7713b1edbc 306 /**
AnnaBridge 171:3a7713b1edbc 307 * @brief Enable access to the backup domain
AnnaBridge 171:3a7713b1edbc 308 * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
AnnaBridge 171:3a7713b1edbc 309 * @retval None
AnnaBridge 171:3a7713b1edbc 310 */
AnnaBridge 171:3a7713b1edbc 311 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
AnnaBridge 171:3a7713b1edbc 312 {
AnnaBridge 171:3a7713b1edbc 313 SET_BIT(PWR->CR, PWR_CR_DBP);
AnnaBridge 171:3a7713b1edbc 314 }
AnnaBridge 171:3a7713b1edbc 315
AnnaBridge 171:3a7713b1edbc 316 /**
AnnaBridge 171:3a7713b1edbc 317 * @brief Disable access to the backup domain
AnnaBridge 171:3a7713b1edbc 318 * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
AnnaBridge 171:3a7713b1edbc 319 * @retval None
AnnaBridge 171:3a7713b1edbc 320 */
AnnaBridge 171:3a7713b1edbc 321 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
AnnaBridge 171:3a7713b1edbc 322 {
AnnaBridge 171:3a7713b1edbc 323 CLEAR_BIT(PWR->CR, PWR_CR_DBP);
AnnaBridge 171:3a7713b1edbc 324 }
AnnaBridge 171:3a7713b1edbc 325
AnnaBridge 171:3a7713b1edbc 326 /**
AnnaBridge 171:3a7713b1edbc 327 * @brief Check if the backup domain is enabled
AnnaBridge 171:3a7713b1edbc 328 * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
AnnaBridge 171:3a7713b1edbc 329 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 330 */
AnnaBridge 171:3a7713b1edbc 331 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
AnnaBridge 171:3a7713b1edbc 332 {
AnnaBridge 171:3a7713b1edbc 333 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
AnnaBridge 171:3a7713b1edbc 334 }
AnnaBridge 171:3a7713b1edbc 335
AnnaBridge 171:3a7713b1edbc 336 /**
AnnaBridge 171:3a7713b1edbc 337 * @brief Set voltage Regulator mode during low power modes
AnnaBridge 171:3a7713b1edbc 338 * @rmtoll CR LPSDSR LL_PWR_SetRegulModeLP
AnnaBridge 171:3a7713b1edbc 339 * @param RegulMode This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 340 * @arg @ref LL_PWR_REGU_LPMODES_MAIN
AnnaBridge 171:3a7713b1edbc 341 * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
AnnaBridge 171:3a7713b1edbc 342 * @retval None
AnnaBridge 171:3a7713b1edbc 343 */
AnnaBridge 171:3a7713b1edbc 344 __STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode)
AnnaBridge 171:3a7713b1edbc 345 {
AnnaBridge 171:3a7713b1edbc 346 MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode);
AnnaBridge 171:3a7713b1edbc 347 }
AnnaBridge 171:3a7713b1edbc 348
AnnaBridge 171:3a7713b1edbc 349 /**
AnnaBridge 171:3a7713b1edbc 350 * @brief Get voltage Regulator mode during low power modes
AnnaBridge 171:3a7713b1edbc 351 * @rmtoll CR LPSDSR LL_PWR_GetRegulModeLP
AnnaBridge 171:3a7713b1edbc 352 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 353 * @arg @ref LL_PWR_REGU_LPMODES_MAIN
AnnaBridge 171:3a7713b1edbc 354 * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
AnnaBridge 171:3a7713b1edbc 355 */
AnnaBridge 171:3a7713b1edbc 356 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void)
AnnaBridge 171:3a7713b1edbc 357 {
AnnaBridge 171:3a7713b1edbc 358 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR));
AnnaBridge 171:3a7713b1edbc 359 }
AnnaBridge 171:3a7713b1edbc 360
AnnaBridge 171:3a7713b1edbc 361 #if defined(PWR_CR_LPDS)
AnnaBridge 171:3a7713b1edbc 362 /**
AnnaBridge 171:3a7713b1edbc 363 * @brief Set voltage Regulator mode during deep sleep mode
AnnaBridge 171:3a7713b1edbc 364 * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
AnnaBridge 171:3a7713b1edbc 365 * @param RegulMode This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 366 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
AnnaBridge 171:3a7713b1edbc 367 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
AnnaBridge 171:3a7713b1edbc 368 * @retval None
AnnaBridge 171:3a7713b1edbc 369 */
AnnaBridge 171:3a7713b1edbc 370 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
AnnaBridge 171:3a7713b1edbc 371 {
AnnaBridge 171:3a7713b1edbc 372 MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
AnnaBridge 171:3a7713b1edbc 373 }
AnnaBridge 171:3a7713b1edbc 374
AnnaBridge 171:3a7713b1edbc 375 /**
AnnaBridge 171:3a7713b1edbc 376 * @brief Get voltage Regulator mode during deep sleep mode
AnnaBridge 171:3a7713b1edbc 377 * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
AnnaBridge 171:3a7713b1edbc 378 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 379 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
AnnaBridge 171:3a7713b1edbc 380 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
AnnaBridge 171:3a7713b1edbc 381 */
AnnaBridge 171:3a7713b1edbc 382 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
AnnaBridge 171:3a7713b1edbc 383 {
AnnaBridge 171:3a7713b1edbc 384 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
AnnaBridge 171:3a7713b1edbc 385 }
AnnaBridge 171:3a7713b1edbc 386 #endif /* PWR_CR_LPDS */
AnnaBridge 171:3a7713b1edbc 387
AnnaBridge 171:3a7713b1edbc 388 /**
AnnaBridge 171:3a7713b1edbc 389 * @brief Set Power Down mode when CPU enters deepsleep
AnnaBridge 171:3a7713b1edbc 390 * @rmtoll CR PDDS LL_PWR_SetPowerMode
AnnaBridge 171:3a7713b1edbc 391 * @param PDMode This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 392 * @arg @ref LL_PWR_MODE_STOP
AnnaBridge 171:3a7713b1edbc 393 * @arg @ref LL_PWR_MODE_STANDBY
AnnaBridge 171:3a7713b1edbc 394 * @note Set the Regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER)
AnnaBridge 171:3a7713b1edbc 395 * before setting MODE_STOP. If the Regulator remains in "main mode",
AnnaBridge 171:3a7713b1edbc 396 * it consumes more power without providing any additional feature.
AnnaBridge 171:3a7713b1edbc 397 * In MODE_STANDBY the Regulator is automatically off.
AnnaBridge 171:3a7713b1edbc 398 * @retval None
AnnaBridge 171:3a7713b1edbc 399 */
AnnaBridge 171:3a7713b1edbc 400 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
AnnaBridge 171:3a7713b1edbc 401 {
AnnaBridge 171:3a7713b1edbc 402 MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode);
AnnaBridge 171:3a7713b1edbc 403 }
AnnaBridge 171:3a7713b1edbc 404
AnnaBridge 171:3a7713b1edbc 405 /**
AnnaBridge 171:3a7713b1edbc 406 * @brief Get Power Down mode when CPU enters deepsleep
AnnaBridge 171:3a7713b1edbc 407 * @rmtoll CR PDDS LL_PWR_GetPowerMode
AnnaBridge 171:3a7713b1edbc 408 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 409 * @arg @ref LL_PWR_MODE_STOP
AnnaBridge 171:3a7713b1edbc 410 * @arg @ref LL_PWR_MODE_STANDBY
AnnaBridge 171:3a7713b1edbc 411 */
AnnaBridge 171:3a7713b1edbc 412 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
AnnaBridge 171:3a7713b1edbc 413 {
AnnaBridge 171:3a7713b1edbc 414 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS));
AnnaBridge 171:3a7713b1edbc 415 }
AnnaBridge 171:3a7713b1edbc 416
AnnaBridge 171:3a7713b1edbc 417 #if defined(PWR_PVD_SUPPORT)
AnnaBridge 171:3a7713b1edbc 418 /**
AnnaBridge 171:3a7713b1edbc 419 * @brief Configure the voltage threshold detected by the Power Voltage Detector
AnnaBridge 171:3a7713b1edbc 420 * @rmtoll CR PLS LL_PWR_SetPVDLevel
AnnaBridge 171:3a7713b1edbc 421 * @param PVDLevel This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 422 * @arg @ref LL_PWR_PVDLEVEL_0
AnnaBridge 171:3a7713b1edbc 423 * @arg @ref LL_PWR_PVDLEVEL_1
AnnaBridge 171:3a7713b1edbc 424 * @arg @ref LL_PWR_PVDLEVEL_2
AnnaBridge 171:3a7713b1edbc 425 * @arg @ref LL_PWR_PVDLEVEL_3
AnnaBridge 171:3a7713b1edbc 426 * @arg @ref LL_PWR_PVDLEVEL_4
AnnaBridge 171:3a7713b1edbc 427 * @arg @ref LL_PWR_PVDLEVEL_5
AnnaBridge 171:3a7713b1edbc 428 * @arg @ref LL_PWR_PVDLEVEL_6
AnnaBridge 171:3a7713b1edbc 429 * @arg @ref LL_PWR_PVDLEVEL_7
AnnaBridge 171:3a7713b1edbc 430 * @retval None
AnnaBridge 171:3a7713b1edbc 431 */
AnnaBridge 171:3a7713b1edbc 432 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
AnnaBridge 171:3a7713b1edbc 433 {
AnnaBridge 171:3a7713b1edbc 434 MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
AnnaBridge 171:3a7713b1edbc 435 }
AnnaBridge 171:3a7713b1edbc 436
AnnaBridge 171:3a7713b1edbc 437 /**
AnnaBridge 171:3a7713b1edbc 438 * @brief Get the voltage threshold detection
AnnaBridge 171:3a7713b1edbc 439 * @rmtoll CR PLS LL_PWR_GetPVDLevel
AnnaBridge 171:3a7713b1edbc 440 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 441 * @arg @ref LL_PWR_PVDLEVEL_0
AnnaBridge 171:3a7713b1edbc 442 * @arg @ref LL_PWR_PVDLEVEL_1
AnnaBridge 171:3a7713b1edbc 443 * @arg @ref LL_PWR_PVDLEVEL_2
AnnaBridge 171:3a7713b1edbc 444 * @arg @ref LL_PWR_PVDLEVEL_3
AnnaBridge 171:3a7713b1edbc 445 * @arg @ref LL_PWR_PVDLEVEL_4
AnnaBridge 171:3a7713b1edbc 446 * @arg @ref LL_PWR_PVDLEVEL_5
AnnaBridge 171:3a7713b1edbc 447 * @arg @ref LL_PWR_PVDLEVEL_6
AnnaBridge 171:3a7713b1edbc 448 * @arg @ref LL_PWR_PVDLEVEL_7
AnnaBridge 171:3a7713b1edbc 449 */
AnnaBridge 171:3a7713b1edbc 450 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
AnnaBridge 171:3a7713b1edbc 451 {
AnnaBridge 171:3a7713b1edbc 452 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
AnnaBridge 171:3a7713b1edbc 453 }
AnnaBridge 171:3a7713b1edbc 454
AnnaBridge 171:3a7713b1edbc 455 /**
AnnaBridge 171:3a7713b1edbc 456 * @brief Enable Power Voltage Detector
AnnaBridge 171:3a7713b1edbc 457 * @rmtoll CR PVDE LL_PWR_EnablePVD
AnnaBridge 171:3a7713b1edbc 458 * @retval None
AnnaBridge 171:3a7713b1edbc 459 */
AnnaBridge 171:3a7713b1edbc 460 __STATIC_INLINE void LL_PWR_EnablePVD(void)
AnnaBridge 171:3a7713b1edbc 461 {
AnnaBridge 171:3a7713b1edbc 462 SET_BIT(PWR->CR, PWR_CR_PVDE);
AnnaBridge 171:3a7713b1edbc 463 }
AnnaBridge 171:3a7713b1edbc 464
AnnaBridge 171:3a7713b1edbc 465 /**
AnnaBridge 171:3a7713b1edbc 466 * @brief Disable Power Voltage Detector
AnnaBridge 171:3a7713b1edbc 467 * @rmtoll CR PVDE LL_PWR_DisablePVD
AnnaBridge 171:3a7713b1edbc 468 * @retval None
AnnaBridge 171:3a7713b1edbc 469 */
AnnaBridge 171:3a7713b1edbc 470 __STATIC_INLINE void LL_PWR_DisablePVD(void)
AnnaBridge 171:3a7713b1edbc 471 {
AnnaBridge 171:3a7713b1edbc 472 CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
AnnaBridge 171:3a7713b1edbc 473 }
AnnaBridge 171:3a7713b1edbc 474
AnnaBridge 171:3a7713b1edbc 475 /**
AnnaBridge 171:3a7713b1edbc 476 * @brief Check if Power Voltage Detector is enabled
AnnaBridge 171:3a7713b1edbc 477 * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
AnnaBridge 171:3a7713b1edbc 478 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 479 */
AnnaBridge 171:3a7713b1edbc 480 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
AnnaBridge 171:3a7713b1edbc 481 {
AnnaBridge 171:3a7713b1edbc 482 return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
AnnaBridge 171:3a7713b1edbc 483 }
AnnaBridge 171:3a7713b1edbc 484 #endif /* PWR_PVD_SUPPORT */
AnnaBridge 171:3a7713b1edbc 485
AnnaBridge 171:3a7713b1edbc 486 /**
AnnaBridge 171:3a7713b1edbc 487 * @brief Enable the WakeUp PINx functionality
AnnaBridge 171:3a7713b1edbc 488 * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n
AnnaBridge 171:3a7713b1edbc 489 * @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n
AnnaBridge 171:3a7713b1edbc 490 * @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin
AnnaBridge 171:3a7713b1edbc 491 * @param WakeUpPin This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 492 * @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge 171:3a7713b1edbc 493 * @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge 171:3a7713b1edbc 494 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
AnnaBridge 171:3a7713b1edbc 495 *
AnnaBridge 171:3a7713b1edbc 496 * (*) not available on all devices
AnnaBridge 171:3a7713b1edbc 497 * @retval None
AnnaBridge 171:3a7713b1edbc 498 */
AnnaBridge 171:3a7713b1edbc 499 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
AnnaBridge 171:3a7713b1edbc 500 {
AnnaBridge 171:3a7713b1edbc 501 SET_BIT(PWR->CSR, WakeUpPin);
AnnaBridge 171:3a7713b1edbc 502 }
AnnaBridge 171:3a7713b1edbc 503
AnnaBridge 171:3a7713b1edbc 504 /**
AnnaBridge 171:3a7713b1edbc 505 * @brief Disable the WakeUp PINx functionality
AnnaBridge 171:3a7713b1edbc 506 * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n
AnnaBridge 171:3a7713b1edbc 507 * @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n
AnnaBridge 171:3a7713b1edbc 508 * @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin
AnnaBridge 171:3a7713b1edbc 509 * @param WakeUpPin This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 510 * @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge 171:3a7713b1edbc 511 * @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge 171:3a7713b1edbc 512 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
AnnaBridge 171:3a7713b1edbc 513 *
AnnaBridge 171:3a7713b1edbc 514 * (*) not available on all devices
AnnaBridge 171:3a7713b1edbc 515 * @retval None
AnnaBridge 171:3a7713b1edbc 516 */
AnnaBridge 171:3a7713b1edbc 517 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
AnnaBridge 171:3a7713b1edbc 518 {
AnnaBridge 171:3a7713b1edbc 519 CLEAR_BIT(PWR->CSR, WakeUpPin);
AnnaBridge 171:3a7713b1edbc 520 }
AnnaBridge 171:3a7713b1edbc 521
AnnaBridge 171:3a7713b1edbc 522 /**
AnnaBridge 171:3a7713b1edbc 523 * @brief Check if the WakeUp PINx functionality is enabled
AnnaBridge 171:3a7713b1edbc 524 * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n
AnnaBridge 171:3a7713b1edbc 525 * @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n
AnnaBridge 171:3a7713b1edbc 526 * @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin
AnnaBridge 171:3a7713b1edbc 527 * @param WakeUpPin This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 528 * @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge 171:3a7713b1edbc 529 * @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge 171:3a7713b1edbc 530 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
AnnaBridge 171:3a7713b1edbc 531 *
AnnaBridge 171:3a7713b1edbc 532 * (*) not available on all devices
AnnaBridge 171:3a7713b1edbc 533 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 534 */
AnnaBridge 171:3a7713b1edbc 535 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
AnnaBridge 171:3a7713b1edbc 536 {
AnnaBridge 171:3a7713b1edbc 537 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
AnnaBridge 171:3a7713b1edbc 538 }
AnnaBridge 171:3a7713b1edbc 539
AnnaBridge 171:3a7713b1edbc 540 /**
AnnaBridge 171:3a7713b1edbc 541 * @brief Enable ultra low-power mode by enabling VREFINT switch off in low-power modes
AnnaBridge 171:3a7713b1edbc 542 * @rmtoll CR ULP LL_PWR_EnableUltraLowPower
AnnaBridge 171:3a7713b1edbc 543 * @retval None
AnnaBridge 171:3a7713b1edbc 544 */
AnnaBridge 171:3a7713b1edbc 545 __STATIC_INLINE void LL_PWR_EnableUltraLowPower(void)
AnnaBridge 171:3a7713b1edbc 546 {
AnnaBridge 171:3a7713b1edbc 547 SET_BIT(PWR->CR, PWR_CR_ULP);
AnnaBridge 171:3a7713b1edbc 548 }
AnnaBridge 171:3a7713b1edbc 549
AnnaBridge 171:3a7713b1edbc 550 /**
AnnaBridge 171:3a7713b1edbc 551 * @brief Disable ultra low-power mode by disabling VREFINT switch off in low-power modes
AnnaBridge 171:3a7713b1edbc 552 * @rmtoll CR ULP LL_PWR_DisableUltraLowPower
AnnaBridge 171:3a7713b1edbc 553 * @retval None
AnnaBridge 171:3a7713b1edbc 554 */
AnnaBridge 171:3a7713b1edbc 555 __STATIC_INLINE void LL_PWR_DisableUltraLowPower(void)
AnnaBridge 171:3a7713b1edbc 556 {
AnnaBridge 171:3a7713b1edbc 557 CLEAR_BIT(PWR->CR, PWR_CR_ULP);
AnnaBridge 171:3a7713b1edbc 558 }
AnnaBridge 171:3a7713b1edbc 559
AnnaBridge 171:3a7713b1edbc 560 /**
AnnaBridge 171:3a7713b1edbc 561 * @brief Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled
AnnaBridge 171:3a7713b1edbc 562 * @rmtoll CR ULP LL_PWR_IsEnabledUltraLowPower
AnnaBridge 171:3a7713b1edbc 563 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 564 */
AnnaBridge 171:3a7713b1edbc 565 __STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void)
AnnaBridge 171:3a7713b1edbc 566 {
AnnaBridge 171:3a7713b1edbc 567 return (READ_BIT(PWR->CR, PWR_CR_ULP) == (PWR_CR_ULP));
AnnaBridge 171:3a7713b1edbc 568 }
AnnaBridge 171:3a7713b1edbc 569
AnnaBridge 171:3a7713b1edbc 570 /**
AnnaBridge 171:3a7713b1edbc 571 * @brief Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode
AnnaBridge 171:3a7713b1edbc 572 * @rmtoll CR FWU LL_PWR_EnableFastWakeUp
AnnaBridge 171:3a7713b1edbc 573 * @note Works in conjunction with ultra low power mode.
AnnaBridge 171:3a7713b1edbc 574 * @retval None
AnnaBridge 171:3a7713b1edbc 575 */
AnnaBridge 171:3a7713b1edbc 576 __STATIC_INLINE void LL_PWR_EnableFastWakeUp(void)
AnnaBridge 171:3a7713b1edbc 577 {
AnnaBridge 171:3a7713b1edbc 578 SET_BIT(PWR->CR, PWR_CR_FWU);
AnnaBridge 171:3a7713b1edbc 579 }
AnnaBridge 171:3a7713b1edbc 580
AnnaBridge 171:3a7713b1edbc 581 /**
AnnaBridge 171:3a7713b1edbc 582 * @brief Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode
AnnaBridge 171:3a7713b1edbc 583 * @rmtoll CR FWU LL_PWR_DisableFastWakeUp
AnnaBridge 171:3a7713b1edbc 584 * @note Works in conjunction with ultra low power mode.
AnnaBridge 171:3a7713b1edbc 585 * @retval None
AnnaBridge 171:3a7713b1edbc 586 */
AnnaBridge 171:3a7713b1edbc 587 __STATIC_INLINE void LL_PWR_DisableFastWakeUp(void)
AnnaBridge 171:3a7713b1edbc 588 {
AnnaBridge 171:3a7713b1edbc 589 CLEAR_BIT(PWR->CR, PWR_CR_FWU);
AnnaBridge 171:3a7713b1edbc 590 }
AnnaBridge 171:3a7713b1edbc 591
AnnaBridge 171:3a7713b1edbc 592 /**
AnnaBridge 171:3a7713b1edbc 593 * @brief Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored
AnnaBridge 171:3a7713b1edbc 594 * @rmtoll CR FWU LL_PWR_IsEnabledFastWakeUp
AnnaBridge 171:3a7713b1edbc 595 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 596 */
AnnaBridge 171:3a7713b1edbc 597 __STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void)
AnnaBridge 171:3a7713b1edbc 598 {
AnnaBridge 171:3a7713b1edbc 599 return (READ_BIT(PWR->CR, PWR_CR_FWU) == (PWR_CR_FWU));
AnnaBridge 171:3a7713b1edbc 600 }
AnnaBridge 171:3a7713b1edbc 601
AnnaBridge 171:3a7713b1edbc 602
AnnaBridge 171:3a7713b1edbc 603 /**
AnnaBridge 171:3a7713b1edbc 604 * @}
AnnaBridge 171:3a7713b1edbc 605 */
AnnaBridge 171:3a7713b1edbc 606
AnnaBridge 171:3a7713b1edbc 607 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 171:3a7713b1edbc 608 * @{
AnnaBridge 171:3a7713b1edbc 609 */
AnnaBridge 171:3a7713b1edbc 610
AnnaBridge 171:3a7713b1edbc 611 /**
AnnaBridge 171:3a7713b1edbc 612 * @brief Get Wake-up Flag
AnnaBridge 171:3a7713b1edbc 613 * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
AnnaBridge 171:3a7713b1edbc 614 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 615 */
AnnaBridge 171:3a7713b1edbc 616 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
AnnaBridge 171:3a7713b1edbc 617 {
AnnaBridge 171:3a7713b1edbc 618 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
AnnaBridge 171:3a7713b1edbc 619 }
AnnaBridge 171:3a7713b1edbc 620
AnnaBridge 171:3a7713b1edbc 621 /**
AnnaBridge 171:3a7713b1edbc 622 * @brief Get Standby Flag
AnnaBridge 171:3a7713b1edbc 623 * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
AnnaBridge 171:3a7713b1edbc 624 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 625 */
AnnaBridge 171:3a7713b1edbc 626 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
AnnaBridge 171:3a7713b1edbc 627 {
AnnaBridge 171:3a7713b1edbc 628 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
AnnaBridge 171:3a7713b1edbc 629 }
AnnaBridge 171:3a7713b1edbc 630
AnnaBridge 171:3a7713b1edbc 631 #if defined(PWR_PVD_SUPPORT)
AnnaBridge 171:3a7713b1edbc 632 /**
AnnaBridge 171:3a7713b1edbc 633 * @brief Indicate whether VDD voltage is below the selected PVD threshold
AnnaBridge 171:3a7713b1edbc 634 * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
AnnaBridge 171:3a7713b1edbc 635 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 636 */
AnnaBridge 171:3a7713b1edbc 637 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
AnnaBridge 171:3a7713b1edbc 638 {
AnnaBridge 171:3a7713b1edbc 639 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
AnnaBridge 171:3a7713b1edbc 640 }
AnnaBridge 171:3a7713b1edbc 641 #endif /* PWR_PVD_SUPPORT */
AnnaBridge 171:3a7713b1edbc 642
AnnaBridge 171:3a7713b1edbc 643 #if defined(PWR_CSR_VREFINTRDYF)
AnnaBridge 171:3a7713b1edbc 644 /**
AnnaBridge 171:3a7713b1edbc 645 * @brief Get Internal Reference VrefInt Flag
AnnaBridge 171:3a7713b1edbc 646 * @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY
AnnaBridge 171:3a7713b1edbc 647 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 648 */
AnnaBridge 171:3a7713b1edbc 649 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
AnnaBridge 171:3a7713b1edbc 650 {
AnnaBridge 171:3a7713b1edbc 651 return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF));
AnnaBridge 171:3a7713b1edbc 652 }
AnnaBridge 171:3a7713b1edbc 653 #endif /* PWR_CSR_VREFINTRDYF */
AnnaBridge 171:3a7713b1edbc 654 /**
AnnaBridge 171:3a7713b1edbc 655 * @brief Indicate whether the Regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
AnnaBridge 171:3a7713b1edbc 656 * @rmtoll CSR VOSF LL_PWR_IsActiveFlag_VOS
AnnaBridge 171:3a7713b1edbc 657 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 658 */
AnnaBridge 171:3a7713b1edbc 659 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void)
AnnaBridge 171:3a7713b1edbc 660 {
AnnaBridge 171:3a7713b1edbc 661 return (READ_BIT(PWR->CSR, LL_PWR_CSR_VOS) == (LL_PWR_CSR_VOS));
AnnaBridge 171:3a7713b1edbc 662 }
AnnaBridge 171:3a7713b1edbc 663 /**
AnnaBridge 171:3a7713b1edbc 664 * @brief Indicate whether the Regulator is ready in main mode or is in low-power mode
AnnaBridge 171:3a7713b1edbc 665 * @rmtoll CSR REGLPF LL_PWR_IsActiveFlag_REGLPF
AnnaBridge 171:3a7713b1edbc 666 * @note Take care, return value "0" means the Regulator is ready. Return value "1" means the output voltage range is still changing.
AnnaBridge 171:3a7713b1edbc 667 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 668 */
AnnaBridge 171:3a7713b1edbc 669 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void)
AnnaBridge 171:3a7713b1edbc 670 {
AnnaBridge 171:3a7713b1edbc 671 return (READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == (PWR_CSR_REGLPF));
AnnaBridge 171:3a7713b1edbc 672 }
AnnaBridge 171:3a7713b1edbc 673 /**
AnnaBridge 171:3a7713b1edbc 674 * @brief Clear Standby Flag
AnnaBridge 171:3a7713b1edbc 675 * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
AnnaBridge 171:3a7713b1edbc 676 * @retval None
AnnaBridge 171:3a7713b1edbc 677 */
AnnaBridge 171:3a7713b1edbc 678 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
AnnaBridge 171:3a7713b1edbc 679 {
AnnaBridge 171:3a7713b1edbc 680 SET_BIT(PWR->CR, PWR_CR_CSBF);
AnnaBridge 171:3a7713b1edbc 681 }
AnnaBridge 171:3a7713b1edbc 682
AnnaBridge 171:3a7713b1edbc 683 /**
AnnaBridge 171:3a7713b1edbc 684 * @brief Clear Wake-up Flags
AnnaBridge 171:3a7713b1edbc 685 * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
AnnaBridge 171:3a7713b1edbc 686 * @retval None
AnnaBridge 171:3a7713b1edbc 687 */
AnnaBridge 171:3a7713b1edbc 688 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
AnnaBridge 171:3a7713b1edbc 689 {
AnnaBridge 171:3a7713b1edbc 690 SET_BIT(PWR->CR, PWR_CR_CWUF);
AnnaBridge 171:3a7713b1edbc 691 }
AnnaBridge 171:3a7713b1edbc 692
AnnaBridge 171:3a7713b1edbc 693 /**
AnnaBridge 171:3a7713b1edbc 694 * @}
AnnaBridge 171:3a7713b1edbc 695 */
AnnaBridge 171:3a7713b1edbc 696
AnnaBridge 171:3a7713b1edbc 697 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 171:3a7713b1edbc 698 /** @defgroup PWR_LL_EF_Init De-initialization function
AnnaBridge 171:3a7713b1edbc 699 * @{
AnnaBridge 171:3a7713b1edbc 700 */
AnnaBridge 171:3a7713b1edbc 701 ErrorStatus LL_PWR_DeInit(void);
AnnaBridge 171:3a7713b1edbc 702 /**
AnnaBridge 171:3a7713b1edbc 703 * @}
AnnaBridge 171:3a7713b1edbc 704 */
AnnaBridge 171:3a7713b1edbc 705 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 171:3a7713b1edbc 706
AnnaBridge 171:3a7713b1edbc 707 /** @defgroup PWR_LL_EF_Legacy_Functions PWR legacy functions name
AnnaBridge 171:3a7713b1edbc 708 * @{
AnnaBridge 171:3a7713b1edbc 709 */
AnnaBridge 171:3a7713b1edbc 710 /* Old functions name kept for legacy purpose, to be replaced by the */
AnnaBridge 171:3a7713b1edbc 711 /* current functions name. */
AnnaBridge 171:3a7713b1edbc 712 #define LL_PWR_IsActiveFlag_VOSF LL_PWR_IsActiveFlag_VOS
AnnaBridge 171:3a7713b1edbc 713 /**
AnnaBridge 171:3a7713b1edbc 714 * @}
AnnaBridge 171:3a7713b1edbc 715 */
AnnaBridge 171:3a7713b1edbc 716
AnnaBridge 171:3a7713b1edbc 717 /**
AnnaBridge 171:3a7713b1edbc 718 * @}
AnnaBridge 171:3a7713b1edbc 719 */
AnnaBridge 171:3a7713b1edbc 720
AnnaBridge 171:3a7713b1edbc 721 /**
AnnaBridge 171:3a7713b1edbc 722 * @}
AnnaBridge 171:3a7713b1edbc 723 */
AnnaBridge 171:3a7713b1edbc 724
AnnaBridge 171:3a7713b1edbc 725 #endif /* defined(PWR) */
AnnaBridge 171:3a7713b1edbc 726
AnnaBridge 171:3a7713b1edbc 727 /**
AnnaBridge 171:3a7713b1edbc 728 * @}
AnnaBridge 171:3a7713b1edbc 729 */
AnnaBridge 171:3a7713b1edbc 730
AnnaBridge 171:3a7713b1edbc 731 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 732 }
AnnaBridge 171:3a7713b1edbc 733 #endif
AnnaBridge 171:3a7713b1edbc 734
AnnaBridge 171:3a7713b1edbc 735 #endif /* __STM32L1xx_LL_PWR_H */
AnnaBridge 171:3a7713b1edbc 736
AnnaBridge 171:3a7713b1edbc 737 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/