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TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/stm32l1xx_hal_adc_ex.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32l1xx_hal_adc_ex.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of ADC HAL Extension module. |
| AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 8 | * |
| AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 10 | * |
| AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 21 | * |
| AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 32 | * |
| AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 34 | */ |
| AnnaBridge | 171:3a7713b1edbc | 35 | |
| AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32L1xx_HAL_ADC_EX_H |
| AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32L1xx_HAL_ADC_EX_H |
| AnnaBridge | 171:3a7713b1edbc | 39 | |
| AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 43 | |
| AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32l1xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 46 | |
| AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32L1xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 49 | */ |
| AnnaBridge | 171:3a7713b1edbc | 50 | |
| AnnaBridge | 171:3a7713b1edbc | 51 | /** @addtogroup ADCEx |
| AnnaBridge | 171:3a7713b1edbc | 52 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 53 | */ |
| AnnaBridge | 171:3a7713b1edbc | 54 | |
| AnnaBridge | 171:3a7713b1edbc | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 56 | /** @defgroup ADCEx_Exported_Types ADCEx Exported Types |
| AnnaBridge | 171:3a7713b1edbc | 57 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 58 | */ |
| AnnaBridge | 171:3a7713b1edbc | 59 | |
| AnnaBridge | 171:3a7713b1edbc | 60 | /** |
| AnnaBridge | 171:3a7713b1edbc | 61 | * @brief ADC Configuration injected Channel structure definition |
| AnnaBridge | 171:3a7713b1edbc | 62 | * @note Parameters of this structure are shared within 2 scopes: |
| AnnaBridge | 171:3a7713b1edbc | 63 | * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset |
| AnnaBridge | 171:3a7713b1edbc | 64 | * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, |
| AnnaBridge | 171:3a7713b1edbc | 65 | * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. |
| AnnaBridge | 171:3a7713b1edbc | 66 | * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. |
| AnnaBridge | 171:3a7713b1edbc | 67 | * ADC state can be either: |
| AnnaBridge | 171:3a7713b1edbc | 68 | * - For all parameters: ADC disabled |
| AnnaBridge | 171:3a7713b1edbc | 69 | * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group. |
| AnnaBridge | 171:3a7713b1edbc | 70 | * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group. |
| AnnaBridge | 171:3a7713b1edbc | 71 | */ |
| AnnaBridge | 171:3a7713b1edbc | 72 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 73 | { |
| AnnaBridge | 171:3a7713b1edbc | 74 | uint32_t InjectedChannel; /*!< Selection of ADC channel to configure |
| AnnaBridge | 171:3a7713b1edbc | 75 | This parameter can be a value of @ref ADC_channels |
| AnnaBridge | 171:3a7713b1edbc | 76 | Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */ |
| AnnaBridge | 171:3a7713b1edbc | 77 | uint32_t InjectedRank; /*!< Rank in the injected group sequencer |
| AnnaBridge | 171:3a7713b1edbc | 78 | This parameter must be a value of @ref ADCEx_injected_rank |
| AnnaBridge | 171:3a7713b1edbc | 79 | Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ |
| AnnaBridge | 171:3a7713b1edbc | 80 | uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. |
| AnnaBridge | 171:3a7713b1edbc | 81 | Unit: ADC clock cycles |
| AnnaBridge | 171:3a7713b1edbc | 82 | Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits). |
| AnnaBridge | 171:3a7713b1edbc | 83 | This parameter can be a value of @ref ADC_sampling_times |
| AnnaBridge | 171:3a7713b1edbc | 84 | Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. |
| AnnaBridge | 171:3a7713b1edbc | 85 | If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. |
| AnnaBridge | 171:3a7713b1edbc | 86 | Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), |
| AnnaBridge | 171:3a7713b1edbc | 87 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
| AnnaBridge | 171:3a7713b1edbc | 88 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */ |
| AnnaBridge | 171:3a7713b1edbc | 89 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). |
| AnnaBridge | 171:3a7713b1edbc | 90 | Offset value must be a positive number. |
| AnnaBridge | 171:3a7713b1edbc | 91 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), |
| AnnaBridge | 171:3a7713b1edbc | 92 | this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
| AnnaBridge | 171:3a7713b1edbc | 93 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. |
| AnnaBridge | 171:3a7713b1edbc | 94 | To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. |
| AnnaBridge | 171:3a7713b1edbc | 95 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. |
| AnnaBridge | 171:3a7713b1edbc | 96 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 97 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 98 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). |
| AnnaBridge | 171:3a7713b1edbc | 99 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
| AnnaBridge | 171:3a7713b1edbc | 100 | Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. |
| AnnaBridge | 171:3a7713b1edbc | 101 | This parameter can be set to ENABLE or DISABLE. |
| AnnaBridge | 171:3a7713b1edbc | 102 | Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. |
| AnnaBridge | 171:3a7713b1edbc | 103 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 104 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 105 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one |
| AnnaBridge | 171:3a7713b1edbc | 106 | This parameter can be set to ENABLE or DISABLE. |
| AnnaBridge | 171:3a7713b1edbc | 107 | Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) |
| AnnaBridge | 171:3a7713b1edbc | 108 | Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) |
| AnnaBridge | 171:3a7713b1edbc | 109 | Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. |
| AnnaBridge | 171:3a7713b1edbc | 110 | To maintain JAUTO always enabled, DMA must be configured in circular mode. |
| AnnaBridge | 171:3a7713b1edbc | 111 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 112 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 113 | uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. |
| AnnaBridge | 171:3a7713b1edbc | 114 | If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. |
| AnnaBridge | 171:3a7713b1edbc | 115 | If set to external trigger source, triggering is on event rising edge. |
| AnnaBridge | 171:3a7713b1edbc | 116 | This parameter can be a value of @ref ADCEx_External_trigger_source_Injected |
| AnnaBridge | 171:3a7713b1edbc | 117 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
| AnnaBridge | 171:3a7713b1edbc | 118 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) |
| AnnaBridge | 171:3a7713b1edbc | 119 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 120 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 121 | uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group. |
| AnnaBridge | 171:3a7713b1edbc | 122 | This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected. |
| AnnaBridge | 171:3a7713b1edbc | 123 | If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded. |
| AnnaBridge | 171:3a7713b1edbc | 124 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 125 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 126 | }ADC_InjectionConfTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 127 | /** |
| AnnaBridge | 171:3a7713b1edbc | 128 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 129 | */ |
| AnnaBridge | 171:3a7713b1edbc | 130 | |
| AnnaBridge | 171:3a7713b1edbc | 131 | |
| AnnaBridge | 171:3a7713b1edbc | 132 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 133 | |
| AnnaBridge | 171:3a7713b1edbc | 134 | /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants |
| AnnaBridge | 171:3a7713b1edbc | 135 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 136 | */ |
| AnnaBridge | 171:3a7713b1edbc | 137 | |
| AnnaBridge | 171:3a7713b1edbc | 138 | /** @defgroup ADCEx_injected_rank ADCEx rank into injected group |
| AnnaBridge | 171:3a7713b1edbc | 139 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 140 | */ |
| AnnaBridge | 171:3a7713b1edbc | 141 | #define ADC_INJECTED_RANK_1 (0x00000001U) |
| AnnaBridge | 171:3a7713b1edbc | 142 | #define ADC_INJECTED_RANK_2 (0x00000002U) |
| AnnaBridge | 171:3a7713b1edbc | 143 | #define ADC_INJECTED_RANK_3 (0x00000003U) |
| AnnaBridge | 171:3a7713b1edbc | 144 | #define ADC_INJECTED_RANK_4 (0x00000004U) |
| AnnaBridge | 171:3a7713b1edbc | 145 | /** |
| AnnaBridge | 171:3a7713b1edbc | 146 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 147 | */ |
| AnnaBridge | 171:3a7713b1edbc | 148 | |
| AnnaBridge | 171:3a7713b1edbc | 149 | /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group |
| AnnaBridge | 171:3a7713b1edbc | 150 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 151 | */ |
| AnnaBridge | 171:3a7713b1edbc | 152 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 153 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0) |
| AnnaBridge | 171:3a7713b1edbc | 154 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1) |
| AnnaBridge | 171:3a7713b1edbc | 155 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN) |
| AnnaBridge | 171:3a7713b1edbc | 156 | /** |
| AnnaBridge | 171:3a7713b1edbc | 157 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 158 | */ |
| AnnaBridge | 171:3a7713b1edbc | 159 | |
| AnnaBridge | 171:3a7713b1edbc | 160 | /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger source Injected |
| AnnaBridge | 171:3a7713b1edbc | 161 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 162 | */ |
| AnnaBridge | 171:3a7713b1edbc | 163 | /* External triggers for injected groups of ADC1 */ |
| AnnaBridge | 171:3a7713b1edbc | 164 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC_EXTERNALTRIGINJEC_T2_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 165 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC_EXTERNALTRIGINJEC_T2_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 166 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC_EXTERNALTRIGINJEC_T3_CC4 |
| AnnaBridge | 171:3a7713b1edbc | 167 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC_EXTERNALTRIGINJEC_T4_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 168 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ADC_EXTERNALTRIGINJEC_T4_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 169 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ADC_EXTERNALTRIGINJEC_T4_CC2 |
| AnnaBridge | 171:3a7713b1edbc | 170 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC_EXTERNALTRIGINJEC_T4_CC3 |
| AnnaBridge | 171:3a7713b1edbc | 171 | #define ADC_EXTERNALTRIGINJECCONV_T7_TRGO ADC_EXTERNALTRIGINJEC_T7_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 172 | #define ADC_EXTERNALTRIGINJECCONV_T9_CC1 ADC_EXTERNALTRIGINJEC_T9_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 173 | #define ADC_EXTERNALTRIGINJECCONV_T9_TRGO ADC_EXTERNALTRIGINJEC_T9_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 174 | #define ADC_EXTERNALTRIGINJECCONV_T10_CC1 ADC_EXTERNALTRIGINJEC_T10_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 175 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC_EXTERNALTRIGINJEC_EXT_IT15 |
| AnnaBridge | 171:3a7713b1edbc | 176 | #define ADC_INJECTED_SOFTWARE_START (0x00000010U) |
| AnnaBridge | 171:3a7713b1edbc | 177 | /** |
| AnnaBridge | 171:3a7713b1edbc | 178 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 179 | */ |
| AnnaBridge | 171:3a7713b1edbc | 180 | |
| AnnaBridge | 171:3a7713b1edbc | 181 | /** |
| AnnaBridge | 171:3a7713b1edbc | 182 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 183 | */ |
| AnnaBridge | 171:3a7713b1edbc | 184 | |
| AnnaBridge | 171:3a7713b1edbc | 185 | |
| AnnaBridge | 171:3a7713b1edbc | 186 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 187 | |
| AnnaBridge | 171:3a7713b1edbc | 188 | /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants |
| AnnaBridge | 171:3a7713b1edbc | 189 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 190 | */ |
| AnnaBridge | 171:3a7713b1edbc | 191 | |
| AnnaBridge | 171:3a7713b1edbc | 192 | /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADCEx Internal HAL driver Ext trig src Injected |
| AnnaBridge | 171:3a7713b1edbc | 193 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 194 | */ |
| AnnaBridge | 171:3a7713b1edbc | 195 | |
| AnnaBridge | 171:3a7713b1edbc | 196 | /* List of external triggers of injected group for ADC1: */ |
| AnnaBridge | 171:3a7713b1edbc | 197 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| AnnaBridge | 171:3a7713b1edbc | 198 | #define ADC_EXTERNALTRIGINJEC_T9_CC1 (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 199 | #define ADC_EXTERNALTRIGINJEC_T9_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 200 | #define ADC_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 )) |
| AnnaBridge | 171:3a7713b1edbc | 201 | #define ADC_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 202 | #define ADC_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_2 )) |
| AnnaBridge | 171:3a7713b1edbc | 203 | #define ADC_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 204 | #define ADC_EXTERNALTRIGINJEC_T4_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 )) |
| AnnaBridge | 171:3a7713b1edbc | 205 | #define ADC_EXTERNALTRIGINJEC_T4_CC2 ((uint32_t)( ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 206 | #define ADC_EXTERNALTRIGINJEC_T4_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 )) |
| AnnaBridge | 171:3a7713b1edbc | 207 | #define ADC_EXTERNALTRIGINJEC_T10_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 208 | #define ADC_EXTERNALTRIGINJEC_T7_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 )) |
| AnnaBridge | 171:3a7713b1edbc | 209 | #define ADC_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 210 | /** |
| AnnaBridge | 171:3a7713b1edbc | 211 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 212 | */ |
| AnnaBridge | 171:3a7713b1edbc | 213 | |
| AnnaBridge | 171:3a7713b1edbc | 214 | /** |
| AnnaBridge | 171:3a7713b1edbc | 215 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 216 | */ |
| AnnaBridge | 171:3a7713b1edbc | 217 | |
| AnnaBridge | 171:3a7713b1edbc | 218 | |
| AnnaBridge | 171:3a7713b1edbc | 219 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 220 | |
| AnnaBridge | 171:3a7713b1edbc | 221 | /** @defgroup ADCEx_Exported_Macros ADCEx Exported Macros |
| AnnaBridge | 171:3a7713b1edbc | 222 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 223 | */ |
| AnnaBridge | 171:3a7713b1edbc | 224 | /* Macro for internal HAL driver usage, and possibly can be used into code of */ |
| AnnaBridge | 171:3a7713b1edbc | 225 | /* final user. */ |
| AnnaBridge | 171:3a7713b1edbc | 226 | |
| AnnaBridge | 171:3a7713b1edbc | 227 | /** |
| AnnaBridge | 171:3a7713b1edbc | 228 | * @brief Selection of channels bank. |
| AnnaBridge | 171:3a7713b1edbc | 229 | * Note: Banks availability depends on devices categories. |
| AnnaBridge | 171:3a7713b1edbc | 230 | * This macro is intended to change bank selection quickly on the fly, |
| AnnaBridge | 171:3a7713b1edbc | 231 | * without going through ADC init structure update and execution of function |
| AnnaBridge | 171:3a7713b1edbc | 232 | * 'HAL_ADC_Init()'. |
| AnnaBridge | 171:3a7713b1edbc | 233 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 234 | * @param __BANK__: Bank selection. This parameter can be a value of @ref ADC_ChannelsBank. |
| AnnaBridge | 171:3a7713b1edbc | 235 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 236 | */ |
| AnnaBridge | 171:3a7713b1edbc | 237 | #define __HAL_ADC_CHANNELS_BANK(__HANDLE__, __BANK__) \ |
| AnnaBridge | 171:3a7713b1edbc | 238 | MODIFY_REG((__HANDLE__)->Instance->CR2, ADC_CR2_CFG, (__BANK__)) |
| AnnaBridge | 171:3a7713b1edbc | 239 | |
| AnnaBridge | 171:3a7713b1edbc | 240 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 241 | /** |
| AnnaBridge | 171:3a7713b1edbc | 242 | * @brief Configures the ADC channels speed. |
| AnnaBridge | 171:3a7713b1edbc | 243 | * Limited to channels 3, 8, 13 and to devices category Cat.3, Cat.4, Cat.5. |
| AnnaBridge | 171:3a7713b1edbc | 244 | * - For ADC_CHANNEL_3: Used as ADC direct channel (fast channel) if OPAMP1 is |
| AnnaBridge | 171:3a7713b1edbc | 245 | * in power down mode. |
| AnnaBridge | 171:3a7713b1edbc | 246 | * - For ADC_CHANNEL_8: Used as ADC direct channel (fast channel) if OPAMP2 is |
| AnnaBridge | 171:3a7713b1edbc | 247 | * in power down mode. |
| AnnaBridge | 171:3a7713b1edbc | 248 | * - For ADC_CHANNEL_13: Used as ADC re-routed channel if OPAMP3 is in |
| AnnaBridge | 171:3a7713b1edbc | 249 | * power down mode. Otherwise, channel 13 is connected to OPAMP3 output and |
| AnnaBridge | 171:3a7713b1edbc | 250 | * routed through switches COMP1_SW1 and VCOMP to ADC switch matrix. |
| AnnaBridge | 171:3a7713b1edbc | 251 | * (Note: OPAMP3 is available on STM32L1 Cat.4 only). |
| AnnaBridge | 171:3a7713b1edbc | 252 | * @param __CHANNEL__: ADC channel |
| AnnaBridge | 171:3a7713b1edbc | 253 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 254 | * @arg ADC_CHANNEL_3: Channel 3 is selected. |
| AnnaBridge | 171:3a7713b1edbc | 255 | * @arg ADC_CHANNEL_8: Channel 8 is selected. |
| AnnaBridge | 171:3a7713b1edbc | 256 | * @arg ADC_CHANNEL_13: Channel 13 is selected. |
| AnnaBridge | 171:3a7713b1edbc | 257 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 258 | */ |
| AnnaBridge | 171:3a7713b1edbc | 259 | #define __HAL_ADC_CHANNEL_SPEED_FAST(__CHANNEL__) \ |
| AnnaBridge | 171:3a7713b1edbc | 260 | ( ( ((__CHANNEL__) == ADC_CHANNEL_3) \ |
| AnnaBridge | 171:3a7713b1edbc | 261 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 262 | (SET_BIT(COMP->CSR, COMP_CSR_FCH3)) \ |
| AnnaBridge | 171:3a7713b1edbc | 263 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 264 | ( ( ((__CHANNEL__) == ADC_CHANNEL_8) \ |
| AnnaBridge | 171:3a7713b1edbc | 265 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 266 | (SET_BIT(COMP->CSR, COMP_CSR_FCH8)) \ |
| AnnaBridge | 171:3a7713b1edbc | 267 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 268 | ( ( ((__CHANNEL__) == ADC_CHANNEL_13) \ |
| AnnaBridge | 171:3a7713b1edbc | 269 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 270 | (SET_BIT(COMP->CSR, COMP_CSR_RCH13)) \ |
| AnnaBridge | 171:3a7713b1edbc | 271 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 272 | (SET_BIT(COMP->CSR, 0x00000000)) \ |
| AnnaBridge | 171:3a7713b1edbc | 273 | ) \ |
| AnnaBridge | 171:3a7713b1edbc | 274 | ) \ |
| AnnaBridge | 171:3a7713b1edbc | 275 | ) |
| AnnaBridge | 171:3a7713b1edbc | 276 | |
| AnnaBridge | 171:3a7713b1edbc | 277 | #define __HAL_ADC_CHANNEL_SPEED_SLOW(__CHANNEL__) \ |
| AnnaBridge | 171:3a7713b1edbc | 278 | ( ( ((__CHANNEL__) == ADC_CHANNEL_3) \ |
| AnnaBridge | 171:3a7713b1edbc | 279 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 280 | (CLEAR_BIT(COMP->CSR, COMP_CSR_FCH3)) \ |
| AnnaBridge | 171:3a7713b1edbc | 281 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 282 | ( ( ((__CHANNEL__) == ADC_CHANNEL_8) \ |
| AnnaBridge | 171:3a7713b1edbc | 283 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 284 | (CLEAR_BIT(COMP->CSR, COMP_CSR_FCH8)) \ |
| AnnaBridge | 171:3a7713b1edbc | 285 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 286 | ( ( ((__CHANNEL__) == ADC_CHANNEL_13) \ |
| AnnaBridge | 171:3a7713b1edbc | 287 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 288 | (CLEAR_BIT(COMP->CSR, COMP_CSR_RCH13)) \ |
| AnnaBridge | 171:3a7713b1edbc | 289 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 290 | (SET_BIT(COMP->CSR, 0x00000000)) \ |
| AnnaBridge | 171:3a7713b1edbc | 291 | ) \ |
| AnnaBridge | 171:3a7713b1edbc | 292 | ) \ |
| AnnaBridge | 171:3a7713b1edbc | 293 | ) |
| AnnaBridge | 171:3a7713b1edbc | 294 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 295 | |
| AnnaBridge | 171:3a7713b1edbc | 296 | /** |
| AnnaBridge | 171:3a7713b1edbc | 297 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 298 | */ |
| AnnaBridge | 171:3a7713b1edbc | 299 | |
| AnnaBridge | 171:3a7713b1edbc | 300 | /* Private macro ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 301 | |
| AnnaBridge | 171:3a7713b1edbc | 302 | /** @defgroup ADCEx_Private_Macro ADCEx Private Macro |
| AnnaBridge | 171:3a7713b1edbc | 303 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 304 | */ |
| AnnaBridge | 171:3a7713b1edbc | 305 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ |
| AnnaBridge | 171:3a7713b1edbc | 306 | /* code of final user. */ |
| AnnaBridge | 171:3a7713b1edbc | 307 | |
| AnnaBridge | 171:3a7713b1edbc | 308 | /** |
| AnnaBridge | 171:3a7713b1edbc | 309 | * @brief Set ADC ranks available in register SQR1. |
| AnnaBridge | 171:3a7713b1edbc | 310 | * Register SQR1 bits availability depends on device category. |
| AnnaBridge | 171:3a7713b1edbc | 311 | * @param _NbrOfConversion_: Regular channel sequence length |
| AnnaBridge | 171:3a7713b1edbc | 312 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 313 | */ |
| AnnaBridge | 171:3a7713b1edbc | 314 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 315 | #define __ADC_SQR1_SQXX (ADC_SQR1_SQ28 | ADC_SQR1_SQ27 | ADC_SQR1_SQ26 | ADC_SQR1_SQ25) |
| AnnaBridge | 171:3a7713b1edbc | 316 | #else |
| AnnaBridge | 171:3a7713b1edbc | 317 | #define __ADC_SQR1_SQXX (ADC_SQR1_SQ27 | ADC_SQR1_SQ26 | ADC_SQR1_SQ25) |
| AnnaBridge | 171:3a7713b1edbc | 318 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 319 | |
| AnnaBridge | 171:3a7713b1edbc | 320 | /** |
| AnnaBridge | 171:3a7713b1edbc | 321 | * @brief Set the ADC's sample time for channel numbers between 30 and 31. |
| AnnaBridge | 171:3a7713b1edbc | 322 | * Register SMPR0 availability depends on device category. If register is not |
| AnnaBridge | 171:3a7713b1edbc | 323 | * available on the current device, this macro does nothing. |
| AnnaBridge | 171:3a7713b1edbc | 324 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 325 | * @param _SAMPLETIME_: Sample time parameter. |
| AnnaBridge | 171:3a7713b1edbc | 326 | * @param _CHANNELNB_: Channel number. |
| AnnaBridge | 171:3a7713b1edbc | 327 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 328 | */ |
| AnnaBridge | 171:3a7713b1edbc | 329 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 330 | #define ADC_SMPR0(_SAMPLETIME_, _CHANNELNB_) \ |
| AnnaBridge | 171:3a7713b1edbc | 331 | ((_SAMPLETIME_) << (3 * ((_CHANNELNB_) - 30))) |
| AnnaBridge | 171:3a7713b1edbc | 332 | #else |
| AnnaBridge | 171:3a7713b1edbc | 333 | #define ADC_SMPR0(_SAMPLETIME_, _CHANNELNB_) \ |
| AnnaBridge | 171:3a7713b1edbc | 334 | (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 335 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 336 | |
| AnnaBridge | 171:3a7713b1edbc | 337 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 338 | /** |
| AnnaBridge | 171:3a7713b1edbc | 339 | * @brief Set the ADC's sample time for channel numbers between 20 and 29. |
| AnnaBridge | 171:3a7713b1edbc | 340 | * @param _SAMPLETIME_: Sample time parameter. |
| AnnaBridge | 171:3a7713b1edbc | 341 | * @param _CHANNELNB_: Channel number. |
| AnnaBridge | 171:3a7713b1edbc | 342 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 343 | */ |
| AnnaBridge | 171:3a7713b1edbc | 344 | #define ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) \ |
| AnnaBridge | 171:3a7713b1edbc | 345 | ((_SAMPLETIME_) << (3 * ((_CHANNELNB_) - 20))) |
| AnnaBridge | 171:3a7713b1edbc | 346 | #else |
| AnnaBridge | 171:3a7713b1edbc | 347 | /** |
| AnnaBridge | 171:3a7713b1edbc | 348 | * @brief Set the ADC's sample time for channel numbers between 20 and 26. |
| AnnaBridge | 171:3a7713b1edbc | 349 | * @param _SAMPLETIME_: Sample time parameter. |
| AnnaBridge | 171:3a7713b1edbc | 350 | * @param _CHANNELNB_: Channel number. |
| AnnaBridge | 171:3a7713b1edbc | 351 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 352 | */ |
| AnnaBridge | 171:3a7713b1edbc | 353 | #define ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) \ |
| AnnaBridge | 171:3a7713b1edbc | 354 | ((_SAMPLETIME_) << (3 * ((_CHANNELNB_) - 20))) |
| AnnaBridge | 171:3a7713b1edbc | 355 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 356 | |
| AnnaBridge | 171:3a7713b1edbc | 357 | /** |
| AnnaBridge | 171:3a7713b1edbc | 358 | * @brief Defines the highest channel available in register SMPR1. Channels |
| AnnaBridge | 171:3a7713b1edbc | 359 | * availability depends on device category: |
| AnnaBridge | 171:3a7713b1edbc | 360 | * Highest channel in register SMPR1 is channel 26 for devices Cat.1, Cat.2, Cat.3 |
| AnnaBridge | 171:3a7713b1edbc | 361 | * Highest channel in register SMPR1 is channel 29 for devices Cat.4, Cat.5 |
| AnnaBridge | 171:3a7713b1edbc | 362 | * @param None |
| AnnaBridge | 171:3a7713b1edbc | 363 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 364 | */ |
| AnnaBridge | 171:3a7713b1edbc | 365 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 366 | #define ADC_SMPR1_CHANNEL_MAX ADC_CHANNEL_29 |
| AnnaBridge | 171:3a7713b1edbc | 367 | #else |
| AnnaBridge | 171:3a7713b1edbc | 368 | #define ADC_SMPR1_CHANNEL_MAX ADC_CHANNEL_26 |
| AnnaBridge | 171:3a7713b1edbc | 369 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 370 | |
| AnnaBridge | 171:3a7713b1edbc | 371 | |
| AnnaBridge | 171:3a7713b1edbc | 372 | /** |
| AnnaBridge | 171:3a7713b1edbc | 373 | * @brief Define mask of configuration bits of ADC and regular group in |
| AnnaBridge | 171:3a7713b1edbc | 374 | * register CR2 (bits of ADC enable, conversion start and injected group are |
| AnnaBridge | 171:3a7713b1edbc | 375 | * excluded of this mask). |
| AnnaBridge | 171:3a7713b1edbc | 376 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 377 | */ |
| AnnaBridge | 171:3a7713b1edbc | 378 | #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 379 | #define ADC_CR2_MASK_ADCINIT() \ |
| AnnaBridge | 171:3a7713b1edbc | 380 | (ADC_CR2_EXTEN | ADC_CR2_EXTSEL | ADC_CR2_ALIGN | ADC_CR2_EOCS | ADC_CR2_DDS | ADC_CR2_DELS | ADC_CR2_CFG | ADC_CR2_CONT) |
| AnnaBridge | 171:3a7713b1edbc | 381 | #else |
| AnnaBridge | 171:3a7713b1edbc | 382 | #define ADC_CR2_MASK_ADCINIT() \ |
| AnnaBridge | 171:3a7713b1edbc | 383 | (ADC_CR2_EXTEN | ADC_CR2_EXTSEL | ADC_CR2_ALIGN | ADC_CR2_EOCS | ADC_CR2_DDS | ADC_CR2_DELS | ADC_CR2_CONT) |
| AnnaBridge | 171:3a7713b1edbc | 384 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 385 | |
| AnnaBridge | 171:3a7713b1edbc | 386 | |
| AnnaBridge | 171:3a7713b1edbc | 387 | /** |
| AnnaBridge | 171:3a7713b1edbc | 388 | * @brief Get the maximum ADC conversion cycles on all channels. |
| AnnaBridge | 171:3a7713b1edbc | 389 | * Returns the selected sampling time + conversion time (12.5 ADC clock cycles) |
| AnnaBridge | 171:3a7713b1edbc | 390 | * Approximation of sampling time within 2 ranges, returns the highest value: |
| AnnaBridge | 171:3a7713b1edbc | 391 | * below 24 cycles {4 cycles; 9 cycles; 16 cycles; 24 cycles} |
| AnnaBridge | 171:3a7713b1edbc | 392 | * between 48 cycles and 384 cycles {48 cycles; 96 cycles; 192 cycles; 384 cycles} |
| AnnaBridge | 171:3a7713b1edbc | 393 | * Unit: ADC clock cycles |
| AnnaBridge | 171:3a7713b1edbc | 394 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 395 | * @retval ADC conversion cycles on all channels |
| AnnaBridge | 171:3a7713b1edbc | 396 | */ |
| AnnaBridge | 171:3a7713b1edbc | 397 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 398 | #define ADC_CONVCYCLES_MAX_RANGE(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 399 | (( (((__HANDLE__)->Instance->SMPR3 & ADC_SAMPLETIME_ALLCHANNELS_SMPR3BIT2) == RESET) && \ |
| AnnaBridge | 171:3a7713b1edbc | 400 | (((__HANDLE__)->Instance->SMPR2 & ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2) == RESET) && \ |
| AnnaBridge | 171:3a7713b1edbc | 401 | (((__HANDLE__)->Instance->SMPR1 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2) == RESET) && \ |
| AnnaBridge | 171:3a7713b1edbc | 402 | (((__HANDLE__)->Instance->SMPR0 & ADC_SAMPLETIME_ALLCHANNELS_SMPR0BIT2) == RESET) ) ? \ |
| AnnaBridge | 171:3a7713b1edbc | 403 | \ |
| AnnaBridge | 171:3a7713b1edbc | 404 | ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES : ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES \ |
| AnnaBridge | 171:3a7713b1edbc | 405 | ) |
| AnnaBridge | 171:3a7713b1edbc | 406 | #else |
| AnnaBridge | 171:3a7713b1edbc | 407 | #define ADC_CONVCYCLES_MAX_RANGE(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 408 | (( (((__HANDLE__)->Instance->SMPR3 & ADC_SAMPLETIME_ALLCHANNELS_SMPR3BIT2) == RESET) && \ |
| AnnaBridge | 171:3a7713b1edbc | 409 | (((__HANDLE__)->Instance->SMPR2 & ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2) == RESET) && \ |
| AnnaBridge | 171:3a7713b1edbc | 410 | (((__HANDLE__)->Instance->SMPR1 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2) == RESET) ) ? \ |
| AnnaBridge | 171:3a7713b1edbc | 411 | \ |
| AnnaBridge | 171:3a7713b1edbc | 412 | ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES : ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES \ |
| AnnaBridge | 171:3a7713b1edbc | 413 | ) |
| AnnaBridge | 171:3a7713b1edbc | 414 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 415 | |
| AnnaBridge | 171:3a7713b1edbc | 416 | /** |
| AnnaBridge | 171:3a7713b1edbc | 417 | * @brief Get the ADC clock prescaler from ADC common control register |
| AnnaBridge | 171:3a7713b1edbc | 418 | * and convert it to its decimal number setting (refer to reference manual) |
| AnnaBridge | 171:3a7713b1edbc | 419 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 420 | */ |
| AnnaBridge | 171:3a7713b1edbc | 421 | #define ADC_GET_CLOCK_PRESCALER_DECIMAL(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 422 | ((0x01) << ((ADC->CCR & ADC_CCR_ADCPRE) >> POSITION_VAL(ADC_CCR_ADCPRE))) |
| AnnaBridge | 171:3a7713b1edbc | 423 | |
| AnnaBridge | 171:3a7713b1edbc | 424 | /** |
| AnnaBridge | 171:3a7713b1edbc | 425 | * @brief Clear register SMPR0. |
| AnnaBridge | 171:3a7713b1edbc | 426 | * Register SMPR0 availability depends on device category. If register is not |
| AnnaBridge | 171:3a7713b1edbc | 427 | * available on the current device, this macro performs no action. |
| AnnaBridge | 171:3a7713b1edbc | 428 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 429 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 430 | */ |
| AnnaBridge | 171:3a7713b1edbc | 431 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 432 | #define ADC_SMPR1_CLEAR(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 433 | CLEAR_BIT((__HANDLE__)->Instance->SMPR1, (ADC_SMPR1_SMP29 | ADC_SMPR1_SMP28 | ADC_SMPR1_SMP27 | \ |
| AnnaBridge | 171:3a7713b1edbc | 434 | ADC_SMPR1_SMP26 | ADC_SMPR1_SMP25 | ADC_SMPR1_SMP24 | \ |
| AnnaBridge | 171:3a7713b1edbc | 435 | ADC_SMPR1_SMP23 | ADC_SMPR1_SMP22 | ADC_SMPR1_SMP21 | \ |
| AnnaBridge | 171:3a7713b1edbc | 436 | ADC_SMPR1_SMP20 )) |
| AnnaBridge | 171:3a7713b1edbc | 437 | |
| AnnaBridge | 171:3a7713b1edbc | 438 | #define ADC_SMPR0_CLEAR(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 439 | (CLEAR_BIT((__HANDLE__)->Instance->SMPR0, (ADC_SMPR0_SMP31 | ADC_SMPR0_SMP30))) |
| AnnaBridge | 171:3a7713b1edbc | 440 | #else |
| AnnaBridge | 171:3a7713b1edbc | 441 | #define ADC_SMPR1_CLEAR(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 442 | CLEAR_BIT((__HANDLE__)->Instance->SMPR1, (ADC_SMPR1_SMP26 | ADC_SMPR1_SMP25 | ADC_SMPR1_SMP24 | \ |
| AnnaBridge | 171:3a7713b1edbc | 443 | ADC_SMPR1_SMP23 | ADC_SMPR1_SMP22 | ADC_SMPR1_SMP21 | \ |
| AnnaBridge | 171:3a7713b1edbc | 444 | ADC_SMPR1_SMP20 )) |
| AnnaBridge | 171:3a7713b1edbc | 445 | |
| AnnaBridge | 171:3a7713b1edbc | 446 | #define ADC_SMPR0_CLEAR(__HANDLE__) __NOP() |
| AnnaBridge | 171:3a7713b1edbc | 447 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 448 | |
| AnnaBridge | 171:3a7713b1edbc | 449 | /** |
| AnnaBridge | 171:3a7713b1edbc | 450 | * @brief Clear register CR2. |
| AnnaBridge | 171:3a7713b1edbc | 451 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 452 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 453 | */ |
| AnnaBridge | 171:3a7713b1edbc | 454 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 455 | #define ADC_CR2_CLEAR(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 456 | (CLEAR_BIT((__HANDLE__)->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTEN | ADC_CR2_EXTSEL | \ |
| AnnaBridge | 171:3a7713b1edbc | 457 | ADC_CR2_JSWSTART | ADC_CR2_JEXTEN | ADC_CR2_JEXTSEL | \ |
| AnnaBridge | 171:3a7713b1edbc | 458 | ADC_CR2_ALIGN | ADC_CR2_EOCS | ADC_CR2_DDS | \ |
| AnnaBridge | 171:3a7713b1edbc | 459 | ADC_CR2_DMA | ADC_CR2_DELS | ADC_CR2_CFG | \ |
| AnnaBridge | 171:3a7713b1edbc | 460 | ADC_CR2_CONT | ADC_CR2_ADON )) \ |
| AnnaBridge | 171:3a7713b1edbc | 461 | ) |
| AnnaBridge | 171:3a7713b1edbc | 462 | #else |
| AnnaBridge | 171:3a7713b1edbc | 463 | #define ADC_CR2_CLEAR(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 464 | (CLEAR_BIT((__HANDLE__)->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTEN | ADC_CR2_EXTSEL | \ |
| AnnaBridge | 171:3a7713b1edbc | 465 | ADC_CR2_JSWSTART | ADC_CR2_JEXTEN | ADC_CR2_JEXTSEL | \ |
| AnnaBridge | 171:3a7713b1edbc | 466 | ADC_CR2_ALIGN | ADC_CR2_EOCS | ADC_CR2_DDS | \ |
| AnnaBridge | 171:3a7713b1edbc | 467 | ADC_CR2_DMA | ADC_CR2_DELS | \ |
| AnnaBridge | 171:3a7713b1edbc | 468 | ADC_CR2_CONT | ADC_CR2_ADON )) \ |
| AnnaBridge | 171:3a7713b1edbc | 469 | ) |
| AnnaBridge | 171:3a7713b1edbc | 470 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 471 | |
| AnnaBridge | 171:3a7713b1edbc | 472 | /** |
| AnnaBridge | 171:3a7713b1edbc | 473 | * @brief Set the sampling time of selected channel on register SMPR0 |
| AnnaBridge | 171:3a7713b1edbc | 474 | * Register SMPR0 availability depends on device category. If register is not |
| AnnaBridge | 171:3a7713b1edbc | 475 | * available on the current device, this macro performs no action. |
| AnnaBridge | 171:3a7713b1edbc | 476 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 477 | * @param _SAMPLETIME_: Sample time parameter. |
| AnnaBridge | 171:3a7713b1edbc | 478 | * @param __CHANNEL__: Channel number. |
| AnnaBridge | 171:3a7713b1edbc | 479 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 480 | */ |
| AnnaBridge | 171:3a7713b1edbc | 481 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 482 | #define ADC_SMPR0_CHANNEL_SET(__HANDLE__, _SAMPLETIME_, __CHANNEL__) \ |
| AnnaBridge | 171:3a7713b1edbc | 483 | MODIFY_REG((__HANDLE__)->Instance->SMPR0, \ |
| AnnaBridge | 171:3a7713b1edbc | 484 | ADC_SMPR0(ADC_SMPR0_SMP30, (__CHANNEL__)), \ |
| AnnaBridge | 171:3a7713b1edbc | 485 | ADC_SMPR0((_SAMPLETIME_), (__CHANNEL__)) ) |
| AnnaBridge | 171:3a7713b1edbc | 486 | #else |
| AnnaBridge | 171:3a7713b1edbc | 487 | #define ADC_SMPR0_CHANNEL_SET(__HANDLE__, _SAMPLETIME_, __CHANNEL__) __NOP() |
| AnnaBridge | 171:3a7713b1edbc | 488 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 489 | |
| AnnaBridge | 171:3a7713b1edbc | 490 | |
| AnnaBridge | 171:3a7713b1edbc | 491 | #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 492 | ((CHANNEL) == ADC_INJECTED_RANK_2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 493 | ((CHANNEL) == ADC_INJECTED_RANK_3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 494 | ((CHANNEL) == ADC_INJECTED_RANK_4) ) |
| AnnaBridge | 171:3a7713b1edbc | 495 | |
| AnnaBridge | 171:3a7713b1edbc | 496 | #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 497 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) || \ |
| AnnaBridge | 171:3a7713b1edbc | 498 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING) || \ |
| AnnaBridge | 171:3a7713b1edbc | 499 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING) ) |
| AnnaBridge | 171:3a7713b1edbc | 500 | |
| AnnaBridge | 171:3a7713b1edbc | 501 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 502 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 503 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 504 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 505 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 506 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 507 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 508 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T7_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 509 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T9_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 510 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T9_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 511 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T10_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 512 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 513 | ((REGTRIG) == ADC_SOFTWARE_START) ) |
| AnnaBridge | 171:3a7713b1edbc | 514 | |
| AnnaBridge | 171:3a7713b1edbc | 515 | /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification |
| AnnaBridge | 171:3a7713b1edbc | 516 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 517 | */ |
| AnnaBridge | 171:3a7713b1edbc | 518 | #define IS_ADC_INJECTED_NB_CONV(LENGTH) (((LENGTH) >= (1U)) && ((LENGTH) <= (4U))) |
| AnnaBridge | 171:3a7713b1edbc | 519 | /** |
| AnnaBridge | 171:3a7713b1edbc | 520 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 521 | */ |
| AnnaBridge | 171:3a7713b1edbc | 522 | |
| AnnaBridge | 171:3a7713b1edbc | 523 | /** |
| AnnaBridge | 171:3a7713b1edbc | 524 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 525 | */ |
| AnnaBridge | 171:3a7713b1edbc | 526 | |
| AnnaBridge | 171:3a7713b1edbc | 527 | |
| AnnaBridge | 171:3a7713b1edbc | 528 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 529 | /** @addtogroup ADCEx_Exported_Functions |
| AnnaBridge | 171:3a7713b1edbc | 530 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 531 | */ |
| AnnaBridge | 171:3a7713b1edbc | 532 | |
| AnnaBridge | 171:3a7713b1edbc | 533 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 534 | /** @addtogroup ADCEx_Exported_Functions_Group1 |
| AnnaBridge | 171:3a7713b1edbc | 535 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 536 | */ |
| AnnaBridge | 171:3a7713b1edbc | 537 | |
| AnnaBridge | 171:3a7713b1edbc | 538 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 539 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 540 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 541 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 542 | |
| AnnaBridge | 171:3a7713b1edbc | 543 | /* Non-blocking mode: Interruption */ |
| AnnaBridge | 171:3a7713b1edbc | 544 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 545 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 546 | |
| AnnaBridge | 171:3a7713b1edbc | 547 | /* ADC retrieve conversion value intended to be used with polling or interruption */ |
| AnnaBridge | 171:3a7713b1edbc | 548 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
| AnnaBridge | 171:3a7713b1edbc | 549 | |
| AnnaBridge | 171:3a7713b1edbc | 550 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ |
| AnnaBridge | 171:3a7713b1edbc | 551 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 552 | /** |
| AnnaBridge | 171:3a7713b1edbc | 553 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 554 | */ |
| AnnaBridge | 171:3a7713b1edbc | 555 | |
| AnnaBridge | 171:3a7713b1edbc | 556 | |
| AnnaBridge | 171:3a7713b1edbc | 557 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 558 | /** @addtogroup ADCEx_Exported_Functions_Group2 |
| AnnaBridge | 171:3a7713b1edbc | 559 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 560 | */ |
| AnnaBridge | 171:3a7713b1edbc | 561 | |
| AnnaBridge | 171:3a7713b1edbc | 562 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
| AnnaBridge | 171:3a7713b1edbc | 563 | /** |
| AnnaBridge | 171:3a7713b1edbc | 564 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 565 | */ |
| AnnaBridge | 171:3a7713b1edbc | 566 | |
| AnnaBridge | 171:3a7713b1edbc | 567 | |
| AnnaBridge | 171:3a7713b1edbc | 568 | /** |
| AnnaBridge | 171:3a7713b1edbc | 569 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 570 | */ |
| AnnaBridge | 171:3a7713b1edbc | 571 | |
| AnnaBridge | 171:3a7713b1edbc | 572 | |
| AnnaBridge | 171:3a7713b1edbc | 573 | /** |
| AnnaBridge | 171:3a7713b1edbc | 574 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 575 | */ |
| AnnaBridge | 171:3a7713b1edbc | 576 | |
| AnnaBridge | 171:3a7713b1edbc | 577 | /** |
| AnnaBridge | 171:3a7713b1edbc | 578 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 579 | */ |
| AnnaBridge | 171:3a7713b1edbc | 580 | |
| AnnaBridge | 171:3a7713b1edbc | 581 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 582 | } |
| AnnaBridge | 171:3a7713b1edbc | 583 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 584 | |
| AnnaBridge | 171:3a7713b1edbc | 585 | #endif /* __STM32L1xx_HAL_ADC_EX_H */ |
| AnnaBridge | 171:3a7713b1edbc | 586 | |
| AnnaBridge | 171:3a7713b1edbc | 587 | |
| AnnaBridge | 171:3a7713b1edbc | 588 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
