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TARGET_MAX32620FTHR/TOOLCHAIN_IAR/rtc_regs.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_MAX32620FTHR/TARGET_Maxim/TARGET_MAX32620C/device/rtc_regs.h@167:84c0a372a020 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /*******************************************************************************
AnnaBridge 167:84c0a372a020 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 167:84c0a372a020 3 *
AnnaBridge 167:84c0a372a020 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 167:84c0a372a020 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 167:84c0a372a020 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 167:84c0a372a020 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 167:84c0a372a020 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 167:84c0a372a020 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 167:84c0a372a020 10 *
AnnaBridge 167:84c0a372a020 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 167:84c0a372a020 12 * in all copies or substantial portions of the Software.
AnnaBridge 167:84c0a372a020 13 *
AnnaBridge 167:84c0a372a020 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 167:84c0a372a020 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 167:84c0a372a020 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 167:84c0a372a020 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 167:84c0a372a020 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 167:84c0a372a020 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 167:84c0a372a020 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 167:84c0a372a020 21 *
AnnaBridge 167:84c0a372a020 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 167:84c0a372a020 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 167:84c0a372a020 24 * Products, Inc. Branding Policy.
AnnaBridge 167:84c0a372a020 25 *
AnnaBridge 167:84c0a372a020 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 167:84c0a372a020 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 167:84c0a372a020 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 167:84c0a372a020 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 167:84c0a372a020 30 * ownership rights.
AnnaBridge 167:84c0a372a020 31 *
AnnaBridge 167:84c0a372a020 32 * $Date: 2016-05-17 09:56:17 -0500 (Tue, 17 May 2016) $
AnnaBridge 167:84c0a372a020 33 * $Revision: 22861 $
AnnaBridge 167:84c0a372a020 34 *
AnnaBridge 167:84c0a372a020 35 ******************************************************************************/
AnnaBridge 167:84c0a372a020 36
AnnaBridge 167:84c0a372a020 37 #ifndef _MXC_RTC_REGS_H_
AnnaBridge 167:84c0a372a020 38 #define _MXC_RTC_REGS_H_
AnnaBridge 167:84c0a372a020 39
AnnaBridge 167:84c0a372a020 40 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 41 extern "C" {
AnnaBridge 167:84c0a372a020 42 #endif
AnnaBridge 167:84c0a372a020 43
AnnaBridge 167:84c0a372a020 44 #include <stdint.h>
AnnaBridge 167:84c0a372a020 45
AnnaBridge 167:84c0a372a020 46 /*
AnnaBridge 167:84c0a372a020 47 If types are not defined elsewhere (CMSIS) define them here
AnnaBridge 167:84c0a372a020 48 */
AnnaBridge 167:84c0a372a020 49 #ifndef __IO
AnnaBridge 167:84c0a372a020 50 #define __IO volatile
AnnaBridge 167:84c0a372a020 51 #endif
AnnaBridge 167:84c0a372a020 52 #ifndef __I
AnnaBridge 167:84c0a372a020 53 #define __I volatile const
AnnaBridge 167:84c0a372a020 54 #endif
AnnaBridge 167:84c0a372a020 55 #ifndef __O
AnnaBridge 167:84c0a372a020 56 #define __O volatile
AnnaBridge 167:84c0a372a020 57 #endif
AnnaBridge 167:84c0a372a020 58 #ifndef __RO
AnnaBridge 167:84c0a372a020 59 #define __RO volatile const
AnnaBridge 167:84c0a372a020 60 #endif
AnnaBridge 167:84c0a372a020 61
AnnaBridge 167:84c0a372a020 62
AnnaBridge 167:84c0a372a020 63 /*
AnnaBridge 167:84c0a372a020 64 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
AnnaBridge 167:84c0a372a020 65 access to each register in module.
AnnaBridge 167:84c0a372a020 66 */
AnnaBridge 167:84c0a372a020 67
AnnaBridge 167:84c0a372a020 68 /* Offset Register Description
AnnaBridge 167:84c0a372a020 69 ============= ============================================================================ */
AnnaBridge 167:84c0a372a020 70 typedef struct {
AnnaBridge 167:84c0a372a020 71 __IO uint32_t ctrl; /* 0x0000 RTC Timer Control */
AnnaBridge 167:84c0a372a020 72 __IO uint32_t timer; /* 0x0004 RTC Timer Count Value */
AnnaBridge 167:84c0a372a020 73 __IO uint32_t comp[2]; /* 0x0008-0x000C RTC Time of Day Alarm [0..1] Compare Register */
AnnaBridge 167:84c0a372a020 74 __IO uint32_t flags; /* 0x0010 CPU Interrupt and RTC Domain Flags */
AnnaBridge 167:84c0a372a020 75 __IO uint32_t snz_val; /* 0x0014 RTC Timer Alarm Snooze Value */
AnnaBridge 167:84c0a372a020 76 __IO uint32_t inten; /* 0x0018 Interrupt Enable Controls */
AnnaBridge 167:84c0a372a020 77 __IO uint32_t prescale; /* 0x001C RTC Timer Prescale Setting */
AnnaBridge 167:84c0a372a020 78 __RO uint32_t rsv020; /* 0x0020 */
AnnaBridge 167:84c0a372a020 79 __IO uint32_t prescale_mask; /* 0x0024 RTC Timer Prescale Compare Mask */
AnnaBridge 167:84c0a372a020 80 __IO uint32_t trim_ctrl; /* 0x0028 RTC Timer Trim Controls */
AnnaBridge 167:84c0a372a020 81 __IO uint32_t trim_value; /* 0x002C RTC Timer Trim Adjustment Interval */
AnnaBridge 167:84c0a372a020 82 } mxc_rtctmr_regs_t;
AnnaBridge 167:84c0a372a020 83
AnnaBridge 167:84c0a372a020 84
AnnaBridge 167:84c0a372a020 85 /* Offset Register Description
AnnaBridge 167:84c0a372a020 86 ============= ============================================================================ */
AnnaBridge 167:84c0a372a020 87 typedef struct {
AnnaBridge 167:84c0a372a020 88 __IO uint32_t nano_cntr; /* 0x0000 Nano Oscillator Counter Read Register */
AnnaBridge 167:84c0a372a020 89 __IO uint32_t clk_ctrl; /* 0x0004 RTC Clock Control Settings */
AnnaBridge 167:84c0a372a020 90 __RO uint32_t rsv008; /* 0x0008 */
AnnaBridge 167:84c0a372a020 91 __IO uint32_t osc_ctrl; /* 0x000C RTC Oscillator Control */
AnnaBridge 167:84c0a372a020 92 } mxc_rtccfg_regs_t;
AnnaBridge 167:84c0a372a020 93
AnnaBridge 167:84c0a372a020 94
AnnaBridge 167:84c0a372a020 95 /*
AnnaBridge 167:84c0a372a020 96 Register offsets for module RTC.
AnnaBridge 167:84c0a372a020 97 */
AnnaBridge 167:84c0a372a020 98
AnnaBridge 167:84c0a372a020 99 #define MXC_R_RTCTMR_OFFS_CTRL ((uint32_t)0x00000000UL)
AnnaBridge 167:84c0a372a020 100 #define MXC_R_RTCTMR_OFFS_TIMER ((uint32_t)0x00000004UL)
AnnaBridge 167:84c0a372a020 101 #define MXC_R_RTCTMR_OFFS_COMP0 ((uint32_t)0x00000008UL)
AnnaBridge 167:84c0a372a020 102 #define MXC_R_RTCTMR_OFFS_COMP1 ((uint32_t)0x0000000CUL)
AnnaBridge 167:84c0a372a020 103 #define MXC_R_RTCTMR_OFFS_FLAGS ((uint32_t)0x00000010UL)
AnnaBridge 167:84c0a372a020 104 #define MXC_R_RTCTMR_OFFS_SNZ_VAL ((uint32_t)0x00000014UL)
AnnaBridge 167:84c0a372a020 105 #define MXC_R_RTCTMR_OFFS_INTEN ((uint32_t)0x00000018UL)
AnnaBridge 167:84c0a372a020 106 #define MXC_R_RTCTMR_OFFS_PRESCALE ((uint32_t)0x0000001CUL)
AnnaBridge 167:84c0a372a020 107 #define MXC_R_RTCTMR_OFFS_PRESCALE_MASK ((uint32_t)0x00000024UL)
AnnaBridge 167:84c0a372a020 108 #define MXC_R_RTCTMR_OFFS_TRIM_CTRL ((uint32_t)0x00000028UL)
AnnaBridge 167:84c0a372a020 109 #define MXC_R_RTCTMR_OFFS_TRIM_VALUE ((uint32_t)0x0000002CUL)
AnnaBridge 167:84c0a372a020 110 #define MXC_R_RTCCFG_OFFS_NANO_CNTR ((uint32_t)0x00000000UL)
AnnaBridge 167:84c0a372a020 111 #define MXC_R_RTCCFG_OFFS_CLK_CTRL ((uint32_t)0x00000004UL)
AnnaBridge 167:84c0a372a020 112 #define MXC_R_RTCCFG_OFFS_OSC_CTRL ((uint32_t)0x0000000CUL)
AnnaBridge 167:84c0a372a020 113
AnnaBridge 167:84c0a372a020 114
AnnaBridge 167:84c0a372a020 115 /*
AnnaBridge 167:84c0a372a020 116 Field positions and masks for module RTC.
AnnaBridge 167:84c0a372a020 117 */
AnnaBridge 167:84c0a372a020 118
AnnaBridge 167:84c0a372a020 119 #define MXC_F_RTC_CTRL_ENABLE_POS 0
AnnaBridge 167:84c0a372a020 120 #define MXC_F_RTC_CTRL_ENABLE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ENABLE_POS))
AnnaBridge 167:84c0a372a020 121 #define MXC_F_RTC_CTRL_CLEAR_POS 1
AnnaBridge 167:84c0a372a020 122 #define MXC_F_RTC_CTRL_CLEAR ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CLEAR_POS))
AnnaBridge 167:84c0a372a020 123 #define MXC_F_RTC_CTRL_PENDING_POS 2
AnnaBridge 167:84c0a372a020 124 #define MXC_F_RTC_CTRL_PENDING ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PENDING_POS))
AnnaBridge 167:84c0a372a020 125 #define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS 3
AnnaBridge 167:84c0a372a020 126 #define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS))
AnnaBridge 167:84c0a372a020 127 #define MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS 4
AnnaBridge 167:84c0a372a020 128 #define MXC_F_RTC_CTRL_AGGRESSIVE_RST ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS))
AnnaBridge 167:84c0a372a020 129 #define MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE_POS 5
AnnaBridge 167:84c0a372a020 130 #define MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE_POS))
AnnaBridge 167:84c0a372a020 131 #define MXC_F_RTC_CTRL_SNOOZE_ENABLE_POS 6
AnnaBridge 167:84c0a372a020 132 #define MXC_F_RTC_CTRL_SNOOZE_ENABLE ((uint32_t)(0x00000003UL << MXC_F_RTC_CTRL_SNOOZE_ENABLE_POS))
AnnaBridge 167:84c0a372a020 133 #define MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE_POS 16
AnnaBridge 167:84c0a372a020 134 #define MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 135 #define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS 17
AnnaBridge 167:84c0a372a020 136 #define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 137 #define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS 18
AnnaBridge 167:84c0a372a020 138 #define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 139 #define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS 19
AnnaBridge 167:84c0a372a020 140 #define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 141 #define MXC_F_RTC_CTRL_RTC_SET_ACTIVE_POS 20
AnnaBridge 167:84c0a372a020 142 #define MXC_F_RTC_CTRL_RTC_SET_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_SET_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 143 #define MXC_F_RTC_CTRL_RTC_CLR_ACTIVE_POS 21
AnnaBridge 167:84c0a372a020 144 #define MXC_F_RTC_CTRL_RTC_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_CLR_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 145 #define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS 22
AnnaBridge 167:84c0a372a020 146 #define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 147 #define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS 23
AnnaBridge 167:84c0a372a020 148 #define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 149 #define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS 24
AnnaBridge 167:84c0a372a020 150 #define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 151 #define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS 25
AnnaBridge 167:84c0a372a020 152 #define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 153 #define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS 26
AnnaBridge 167:84c0a372a020 154 #define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 155 #define MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE_POS 27
AnnaBridge 167:84c0a372a020 156 #define MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 157 #define MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE_POS 28
AnnaBridge 167:84c0a372a020 158 #define MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 159 #define MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE_POS 29
AnnaBridge 167:84c0a372a020 160 #define MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE_POS))
AnnaBridge 167:84c0a372a020 161 #define MXC_F_RTC_CTRL_ACTIVE_TRANS_0_POS 30
AnnaBridge 167:84c0a372a020 162 #define MXC_F_RTC_CTRL_ACTIVE_TRANS_0 ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ACTIVE_TRANS_0_POS))
AnnaBridge 167:84c0a372a020 163
AnnaBridge 167:84c0a372a020 164 #define MXC_F_RTC_FLAGS_COMP0_POS 0
AnnaBridge 167:84c0a372a020 165 #define MXC_F_RTC_FLAGS_COMP0 ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_POS))
AnnaBridge 167:84c0a372a020 166 #define MXC_F_RTC_FLAGS_COMP1_POS 1
AnnaBridge 167:84c0a372a020 167 #define MXC_F_RTC_FLAGS_COMP1 ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_POS))
AnnaBridge 167:84c0a372a020 168 #define MXC_F_RTC_FLAGS_PRESCALE_COMP_POS 2
AnnaBridge 167:84c0a372a020 169 #define MXC_F_RTC_FLAGS_PRESCALE_COMP ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCALE_COMP_POS))
AnnaBridge 167:84c0a372a020 170 #define MXC_F_RTC_FLAGS_OVERFLOW_POS 3
AnnaBridge 167:84c0a372a020 171 #define MXC_F_RTC_FLAGS_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_POS))
AnnaBridge 167:84c0a372a020 172 #define MXC_F_RTC_FLAGS_TRIM_POS 4
AnnaBridge 167:84c0a372a020 173 #define MXC_F_RTC_FLAGS_TRIM ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_POS))
AnnaBridge 167:84c0a372a020 174 #define MXC_F_RTC_FLAGS_SNOOZE_POS 5
AnnaBridge 167:84c0a372a020 175 #define MXC_F_RTC_FLAGS_SNOOZE ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_POS))
AnnaBridge 167:84c0a372a020 176 #define MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS 8
AnnaBridge 167:84c0a372a020 177 #define MXC_F_RTC_FLAGS_COMP0_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS))
AnnaBridge 167:84c0a372a020 178 #define MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS 9
AnnaBridge 167:84c0a372a020 179 #define MXC_F_RTC_FLAGS_COMP1_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS))
AnnaBridge 167:84c0a372a020 180 #define MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS 10
AnnaBridge 167:84c0a372a020 181 #define MXC_F_RTC_FLAGS_PRESCL_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS))
AnnaBridge 167:84c0a372a020 182 #define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS 11
AnnaBridge 167:84c0a372a020 183 #define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS))
AnnaBridge 167:84c0a372a020 184 #define MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS 12
AnnaBridge 167:84c0a372a020 185 #define MXC_F_RTC_FLAGS_TRIM_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS))
AnnaBridge 167:84c0a372a020 186 #define MXC_F_RTC_FLAGS_SNOOZE_A_POS 28
AnnaBridge 167:84c0a372a020 187 #define MXC_F_RTC_FLAGS_SNOOZE_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_A_POS))
AnnaBridge 167:84c0a372a020 188 #define MXC_F_RTC_FLAGS_SNOOZE_B_POS 29
AnnaBridge 167:84c0a372a020 189 #define MXC_F_RTC_FLAGS_SNOOZE_B ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_B_POS))
AnnaBridge 167:84c0a372a020 190 #define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS 31
AnnaBridge 167:84c0a372a020 191 #define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS))
AnnaBridge 167:84c0a372a020 192
AnnaBridge 167:84c0a372a020 193 #define MXC_F_RTC_SNZ_VAL_VALUE_POS 0
AnnaBridge 167:84c0a372a020 194 #define MXC_F_RTC_SNZ_VAL_VALUE ((uint32_t)(0x000003FFUL << MXC_F_RTC_SNZ_VAL_VALUE_POS))
AnnaBridge 167:84c0a372a020 195
AnnaBridge 167:84c0a372a020 196 #define MXC_F_RTC_INTEN_COMP0_POS 0
AnnaBridge 167:84c0a372a020 197 #define MXC_F_RTC_INTEN_COMP0 ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP0_POS))
AnnaBridge 167:84c0a372a020 198 #define MXC_F_RTC_INTEN_COMP1_POS 1
AnnaBridge 167:84c0a372a020 199 #define MXC_F_RTC_INTEN_COMP1 ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP1_POS))
AnnaBridge 167:84c0a372a020 200 #define MXC_F_RTC_INTEN_PRESCALE_COMP_POS 2
AnnaBridge 167:84c0a372a020 201 #define MXC_F_RTC_INTEN_PRESCALE_COMP ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_PRESCALE_COMP_POS))
AnnaBridge 167:84c0a372a020 202 #define MXC_F_RTC_INTEN_OVERFLOW_POS 3
AnnaBridge 167:84c0a372a020 203 #define MXC_F_RTC_INTEN_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_OVERFLOW_POS))
AnnaBridge 167:84c0a372a020 204 #define MXC_F_RTC_INTEN_TRIM_POS 4
AnnaBridge 167:84c0a372a020 205 #define MXC_F_RTC_INTEN_TRIM ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_TRIM_POS))
AnnaBridge 167:84c0a372a020 206
AnnaBridge 167:84c0a372a020 207 #define MXC_F_RTC_PRESCALE_PRESCALE_POS 0
AnnaBridge 167:84c0a372a020 208 #define MXC_F_RTC_PRESCALE_PRESCALE ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_PRESCALE_POS))
AnnaBridge 167:84c0a372a020 209
AnnaBridge 167:84c0a372a020 210 #define MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK_POS 0
AnnaBridge 167:84c0a372a020 211 #define MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK_POS))
AnnaBridge 167:84c0a372a020 212
AnnaBridge 167:84c0a372a020 213 #define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS 0
AnnaBridge 167:84c0a372a020 214 #define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS))
AnnaBridge 167:84c0a372a020 215 #define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS 1
AnnaBridge 167:84c0a372a020 216 #define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS))
AnnaBridge 167:84c0a372a020 217 #define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS 2
AnnaBridge 167:84c0a372a020 218 #define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS))
AnnaBridge 167:84c0a372a020 219
AnnaBridge 167:84c0a372a020 220 #define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS 0
AnnaBridge 167:84c0a372a020 221 #define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE ((uint32_t)(0x0003FFFFUL << MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS))
AnnaBridge 167:84c0a372a020 222 #define MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL_POS 18
AnnaBridge 167:84c0a372a020 223 #define MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL_POS))
AnnaBridge 167:84c0a372a020 224
AnnaBridge 167:84c0a372a020 225 #define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS 0
AnnaBridge 167:84c0a372a020 226 #define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER ((uint32_t)(0x0000FFFFUL << MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS))
AnnaBridge 167:84c0a372a020 227
AnnaBridge 167:84c0a372a020 228 #define MXC_F_RTC_CLK_CTRL_OSC1_EN_POS 0
AnnaBridge 167:84c0a372a020 229 #define MXC_F_RTC_CLK_CTRL_OSC1_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC1_EN_POS))
AnnaBridge 167:84c0a372a020 230 #define MXC_F_RTC_CLK_CTRL_OSC2_EN_POS 1
AnnaBridge 167:84c0a372a020 231 #define MXC_F_RTC_CLK_CTRL_OSC2_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC2_EN_POS))
AnnaBridge 167:84c0a372a020 232 #define MXC_F_RTC_CLK_CTRL_NANO_EN_POS 2
AnnaBridge 167:84c0a372a020 233 #define MXC_F_RTC_CLK_CTRL_NANO_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_NANO_EN_POS))
AnnaBridge 167:84c0a372a020 234
AnnaBridge 167:84c0a372a020 235 #define MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS 0
AnnaBridge 167:84c0a372a020 236 #define MXC_F_RTC_OSC_CTRL_OSC_BYPASS ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS))
AnnaBridge 167:84c0a372a020 237 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS 1
AnnaBridge 167:84c0a372a020 238 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS))
AnnaBridge 167:84c0a372a020 239 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS 2
AnnaBridge 167:84c0a372a020 240 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS))
AnnaBridge 167:84c0a372a020 241 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS 3
AnnaBridge 167:84c0a372a020 242 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS))
AnnaBridge 167:84c0a372a020 243 #define MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE_POS 14
AnnaBridge 167:84c0a372a020 244 #define MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE_POS))
AnnaBridge 167:84c0a372a020 245
AnnaBridge 167:84c0a372a020 246 /*
AnnaBridge 167:84c0a372a020 247 Field values
AnnaBridge 167:84c0a372a020 248 */
AnnaBridge 167:84c0a372a020 249
AnnaBridge 167:84c0a372a020 250 #define MXC_V_RTC_CTRL_SNOOZE_DISABLE ((uint32_t)(0x00000000UL))
AnnaBridge 167:84c0a372a020 251 #define MXC_V_RTC_CTRL_SNOOZE_MODE_A ((uint32_t)(0x00000001UL))
AnnaBridge 167:84c0a372a020 252 #define MXC_V_RTC_CTRL_SNOOZE_MODE_B ((uint32_t)(0x00000002UL))
AnnaBridge 167:84c0a372a020 253
AnnaBridge 167:84c0a372a020 254 #define MXC_V_RTC_PRESCALE_DIV_2_0 ((uint32_t)(0x00000000UL))
AnnaBridge 167:84c0a372a020 255 #define MXC_V_RTC_PRESCALE_DIV_2_1 ((uint32_t)(0x00000001UL))
AnnaBridge 167:84c0a372a020 256 #define MXC_V_RTC_PRESCALE_DIV_2_2 ((uint32_t)(0x00000002UL))
AnnaBridge 167:84c0a372a020 257 #define MXC_V_RTC_PRESCALE_DIV_2_3 ((uint32_t)(0x00000003UL))
AnnaBridge 167:84c0a372a020 258 #define MXC_V_RTC_PRESCALE_DIV_2_4 ((uint32_t)(0x00000004UL))
AnnaBridge 167:84c0a372a020 259 #define MXC_V_RTC_PRESCALE_DIV_2_5 ((uint32_t)(0x00000005UL))
AnnaBridge 167:84c0a372a020 260 #define MXC_V_RTC_PRESCALE_DIV_2_6 ((uint32_t)(0x00000006UL))
AnnaBridge 167:84c0a372a020 261 #define MXC_V_RTC_PRESCALE_DIV_2_7 ((uint32_t)(0x00000007UL))
AnnaBridge 167:84c0a372a020 262 #define MXC_V_RTC_PRESCALE_DIV_2_8 ((uint32_t)(0x00000008UL))
AnnaBridge 167:84c0a372a020 263 #define MXC_V_RTC_PRESCALE_DIV_2_9 ((uint32_t)(0x00000009UL))
AnnaBridge 167:84c0a372a020 264 #define MXC_V_RTC_PRESCALE_DIV_2_10 ((uint32_t)(0x0000000AUL))
AnnaBridge 167:84c0a372a020 265 #define MXC_V_RTC_PRESCALE_DIV_2_11 ((uint32_t)(0x0000000BUL))
AnnaBridge 167:84c0a372a020 266 #define MXC_V_RTC_PRESCALE_DIV_2_12 ((uint32_t)(0x0000000CUL))
AnnaBridge 167:84c0a372a020 267
AnnaBridge 167:84c0a372a020 268
AnnaBridge 167:84c0a372a020 269 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 270 }
AnnaBridge 167:84c0a372a020 271 #endif
AnnaBridge 167:84c0a372a020 272
AnnaBridge 167:84c0a372a020 273 #endif /* _MXC_RTC_REGS_H_ */
AnnaBridge 167:84c0a372a020 274