mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MAX32620FTHR/TOOLCHAIN_GCC_ARM/pmu.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_MAX32620FTHR/TARGET_Maxim/TARGET_MAX32620C/mxc/pmu.h@167:84c0a372a020 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /**
AnnaBridge 167:84c0a372a020 2 * @file
AnnaBridge 167:84c0a372a020 3 * @brief Registers, Bit Masks and Bit Positions for the PMU module.
AnnaBridge 167:84c0a372a020 4 */
AnnaBridge 167:84c0a372a020 5 /* ****************************************************************************
AnnaBridge 167:84c0a372a020 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 167:84c0a372a020 7 *
AnnaBridge 167:84c0a372a020 8 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 167:84c0a372a020 9 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 167:84c0a372a020 10 * to deal in the Software without restriction, including without limitation
AnnaBridge 167:84c0a372a020 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 167:84c0a372a020 12 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 167:84c0a372a020 13 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 167:84c0a372a020 14 *
AnnaBridge 167:84c0a372a020 15 * The above copyright notice and this permission notice shall be included
AnnaBridge 167:84c0a372a020 16 * in all copies or substantial portions of the Software.
AnnaBridge 167:84c0a372a020 17 *
AnnaBridge 167:84c0a372a020 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 167:84c0a372a020 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 167:84c0a372a020 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 167:84c0a372a020 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 167:84c0a372a020 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 167:84c0a372a020 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 167:84c0a372a020 24 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 167:84c0a372a020 25 *
AnnaBridge 167:84c0a372a020 26 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 167:84c0a372a020 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 167:84c0a372a020 28 * Products, Inc. Branding Policy.
AnnaBridge 167:84c0a372a020 29 *
AnnaBridge 167:84c0a372a020 30 * The mere transfer of this software does not imply any licenses
AnnaBridge 167:84c0a372a020 31 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 167:84c0a372a020 32 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 167:84c0a372a020 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 167:84c0a372a020 34 * ownership rights.
AnnaBridge 167:84c0a372a020 35 *
AnnaBridge 167:84c0a372a020 36 * $Date: 2016-10-10 19:24:21 -0500 (Mon, 10 Oct 2016) $
AnnaBridge 167:84c0a372a020 37 * $Revision: 24667 $
AnnaBridge 167:84c0a372a020 38 *
AnnaBridge 167:84c0a372a020 39 **************************************************************************** */
AnnaBridge 167:84c0a372a020 40
AnnaBridge 167:84c0a372a020 41 /* Define to prevent redundant inclusion */
AnnaBridge 167:84c0a372a020 42 #ifndef _PMU_H_
AnnaBridge 167:84c0a372a020 43 #define _PMU_H_
AnnaBridge 167:84c0a372a020 44
AnnaBridge 167:84c0a372a020 45 /* **** Includes **** */
AnnaBridge 167:84c0a372a020 46 #include "pmu_regs.h"
AnnaBridge 167:84c0a372a020 47
AnnaBridge 167:84c0a372a020 48 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 49 extern "C" {
AnnaBridge 167:84c0a372a020 50 #endif
AnnaBridge 167:84c0a372a020 51
AnnaBridge 167:84c0a372a020 52 /**
AnnaBridge 167:84c0a372a020 53 * @ingroup periphlibs
AnnaBridge 167:84c0a372a020 54 * @defgroup pmuGroup Peripheral Management Unit
AnnaBridge 167:84c0a372a020 55 * @brief Peripheral Management Unit (PMU) Interface.
AnnaBridge 167:84c0a372a020 56 * @{
AnnaBridge 167:84c0a372a020 57 */
AnnaBridge 167:84c0a372a020 58
AnnaBridge 167:84c0a372a020 59 /**
AnnaBridge 167:84c0a372a020 60 * Enum type for the clock scale used for the PMU timeout clock.
AnnaBridge 167:84c0a372a020 61 */
AnnaBridge 167:84c0a372a020 62 typedef enum {
AnnaBridge 167:84c0a372a020 63 PMU_PS_SEL_DISABLE = MXC_V_PMU_CFG_PS_SEL_DISABLE, /**< Timeout disabled */
AnnaBridge 167:84c0a372a020 64 PMU_PS_SEL_DIV_2_8 = MXC_V_PMU_CFG_PS_SEL_DIV_2_8, /**< Timeout clk = PMU clock / 2^8 = 256 */
AnnaBridge 167:84c0a372a020 65 PMU_PS_SEL_DIV_2_16 = MXC_V_PMU_CFG_PS_SEL_DIV_2_16, /**< Timeout clk = PMU clock / 2^16 = 65536 */
AnnaBridge 167:84c0a372a020 66 PMU_PS_SEL_DIV_2_24 = MXC_V_PMU_CFG_PS_SEL_DIV_2_24 /**< Timeout clk = PMU clock / 2^24 = 16777216 */
AnnaBridge 167:84c0a372a020 67 }pmu_ps_sel_t;
AnnaBridge 167:84c0a372a020 68
AnnaBridge 167:84c0a372a020 69 /**
AnnaBridge 167:84c0a372a020 70 * Enumeration type for the number of clk ticks for the timeout duration.
AnnaBridge 167:84c0a372a020 71 */
AnnaBridge 167:84c0a372a020 72 typedef enum {
AnnaBridge 167:84c0a372a020 73 PMU_TO_SEL_TICKS_4 = MXC_V_PMU_CFG_TO_SEL_TICKS_4, /**< timeout = 4 * Timeout clk period */
AnnaBridge 167:84c0a372a020 74 PMU_TO_SEL_TICKS_8 = MXC_V_PMU_CFG_TO_SEL_TICKS_8, /**< timeout = 8 * Timeout clk period */
AnnaBridge 167:84c0a372a020 75 PMU_TO_SEL_TICKS_16 = MXC_V_PMU_CFG_TO_SEL_TICKS_16, /**< timeout = 16 * Timeout clk period */
AnnaBridge 167:84c0a372a020 76 PMU_TO_SEL_TICKS_32 = MXC_V_PMU_CFG_TO_SEL_TICKS_32, /**< timeout = 32 * Timeout clk period */
AnnaBridge 167:84c0a372a020 77 PMU_TO_SEL_TICKS_64 = MXC_V_PMU_CFG_TO_SEL_TICKS_64, /**< timeout = 64 * Timeout clk period */
AnnaBridge 167:84c0a372a020 78 PMU_TO_SEL_TICKS_128 = MXC_V_PMU_CFG_TO_SEL_TICKS_128, /**< timeout = 128 * Timeout clk period */
AnnaBridge 167:84c0a372a020 79 PMU_TO_SEL_TICKS_256 = MXC_V_PMU_CFG_TO_SEL_TICKS_256, /**< timeout = 256 * Timeout clk period */
AnnaBridge 167:84c0a372a020 80 PMU_TO_SEL_TICKS_512 = MXC_V_PMU_CFG_TO_SEL_TICKS_512 /**< timeout = 512 * Timeout clk period */
AnnaBridge 167:84c0a372a020 81 }pmu_to_sel_t;
AnnaBridge 167:84c0a372a020 82
AnnaBridge 167:84c0a372a020 83 /*
AnnaBridge 167:84c0a372a020 84 * The macros like the one below are designed to help build static PMU programs
AnnaBridge 167:84c0a372a020 85 * as arrays of 32bit words.
AnnaBridge 167:84c0a372a020 86 */
AnnaBridge 167:84c0a372a020 87 #define PMU_IS(interrupt, stop) ((!!interrupt) << PMU_INT_POS) | ((!!stop) << PMU_STOP_POS)
AnnaBridge 167:84c0a372a020 88 /*
AnnaBridge 167:84c0a372a020 89 * Structure type to build a PMU Move Op Code.
AnnaBridge 167:84c0a372a020 90 */
AnnaBridge 167:84c0a372a020 91 typedef struct pmu_move_des_t {
AnnaBridge 167:84c0a372a020 92 uint32_t op_code : 3; /* 0x0 */
AnnaBridge 167:84c0a372a020 93 uint32_t interrupt : 1;
AnnaBridge 167:84c0a372a020 94 uint32_t stop : 1;
AnnaBridge 167:84c0a372a020 95 uint32_t read_size : 2;
AnnaBridge 167:84c0a372a020 96 uint32_t read_inc : 1;
AnnaBridge 167:84c0a372a020 97 uint32_t write_size : 2;
AnnaBridge 167:84c0a372a020 98 uint32_t write_inc : 1;
AnnaBridge 167:84c0a372a020 99 uint32_t cont : 1;
AnnaBridge 167:84c0a372a020 100 uint32_t length : 20;
AnnaBridge 167:84c0a372a020 101
AnnaBridge 167:84c0a372a020 102 uint32_t write_address;
AnnaBridge 167:84c0a372a020 103 uint32_t read_address;
AnnaBridge 167:84c0a372a020 104 } pmu_move_des_t;
AnnaBridge 167:84c0a372a020 105 #define PMU_MOVE(i, s, rs, ri, ws, wi, c, length, wa, ra) \
AnnaBridge 167:84c0a372a020 106 (PMU_MOVE_OP | PMU_IS(i,s) | ((rs & 3) << PMU_MOVE_READS_POS) | ((!!ri) << PMU_MOVE_READI_POS) | \
AnnaBridge 167:84c0a372a020 107 ((ws & 3) << PMU_MOVE_WRITES_POS) | ((!!wi) << PMU_MOVE_WRITEI_POS) | ((!!c) << PMU_MOVE_CONT_POS) | ((length & 0xFFFFF) << PMU_MOVE_LEN_POS)), wa, ra
AnnaBridge 167:84c0a372a020 108
AnnaBridge 167:84c0a372a020 109 /* new_value = value | (old_value & ~ mask) */
AnnaBridge 167:84c0a372a020 110 typedef struct pmu_write_des_t {
AnnaBridge 167:84c0a372a020 111 uint32_t op_code : 3; /* 0x1 */
AnnaBridge 167:84c0a372a020 112 uint32_t interrupt : 1;
AnnaBridge 167:84c0a372a020 113 uint32_t stop : 1;
AnnaBridge 167:84c0a372a020 114 uint32_t : 3;
AnnaBridge 167:84c0a372a020 115 uint32_t write_method : 4;
AnnaBridge 167:84c0a372a020 116 uint32_t : 20;
AnnaBridge 167:84c0a372a020 117
AnnaBridge 167:84c0a372a020 118 uint32_t write_address;
AnnaBridge 167:84c0a372a020 119 uint32_t value;
AnnaBridge 167:84c0a372a020 120 uint32_t mask;
AnnaBridge 167:84c0a372a020 121 } pmu_write_des_t;
AnnaBridge 167:84c0a372a020 122 #define PMU_WRITE(i, s, wm, a, v, m) (PMU_WRITE_OP | PMU_IS(i,s) | ((wm & 0xF) << PMU_WRITE_METHOD_POS)), a, v, m
AnnaBridge 167:84c0a372a020 123
AnnaBridge 167:84c0a372a020 124 typedef struct pmu_wait_des_t {
AnnaBridge 167:84c0a372a020 125 uint32_t op_code : 3; /* 0x2 */
AnnaBridge 167:84c0a372a020 126 uint32_t interrupt : 1;
AnnaBridge 167:84c0a372a020 127 uint32_t stop : 1;
AnnaBridge 167:84c0a372a020 128 uint32_t wait : 1;
AnnaBridge 167:84c0a372a020 129 uint32_t sel : 1;
AnnaBridge 167:84c0a372a020 130 uint32_t : 25;
AnnaBridge 167:84c0a372a020 131
AnnaBridge 167:84c0a372a020 132 uint32_t mask1;
AnnaBridge 167:84c0a372a020 133 uint32_t mask2;
AnnaBridge 167:84c0a372a020 134 uint32_t wait_count;
AnnaBridge 167:84c0a372a020 135 } pmu_wait_des_t;
AnnaBridge 167:84c0a372a020 136 #define PMU_WAIT(i, s, sel, m1, m2, cnt) (PMU_WAIT_OP | PMU_IS(i,s) | ((cnt>0)?(1<<PMU_WAIT_WAIT_POS):0) | ((!!sel) << PMU_WAIT_SEL_POS)), \
AnnaBridge 167:84c0a372a020 137 m1, m2, cnt
AnnaBridge 167:84c0a372a020 138
AnnaBridge 167:84c0a372a020 139 typedef struct pmu_jump_des_t {
AnnaBridge 167:84c0a372a020 140 uint32_t op_code : 3; /* 0x3 */
AnnaBridge 167:84c0a372a020 141 uint32_t interrupt : 1;
AnnaBridge 167:84c0a372a020 142 uint32_t stop : 1;
AnnaBridge 167:84c0a372a020 143 uint32_t : 27;
AnnaBridge 167:84c0a372a020 144
AnnaBridge 167:84c0a372a020 145 uint32_t address;
AnnaBridge 167:84c0a372a020 146 } pmu_jump_des_t;
AnnaBridge 167:84c0a372a020 147 #define PMU_JUMP(i, s, a) (PMU_JUMP_OP | PMU_IS(i,s)), a
AnnaBridge 167:84c0a372a020 148
AnnaBridge 167:84c0a372a020 149 typedef struct pmu_loop_des_t {
AnnaBridge 167:84c0a372a020 150 uint32_t op_code : 3; /* 0x4 */
AnnaBridge 167:84c0a372a020 151 uint32_t interrupt : 1;
AnnaBridge 167:84c0a372a020 152 uint32_t stop : 1;
AnnaBridge 167:84c0a372a020 153 uint32_t sel_counter : 1;
AnnaBridge 167:84c0a372a020 154 uint32_t : 26;
AnnaBridge 167:84c0a372a020 155
AnnaBridge 167:84c0a372a020 156 uint32_t address;
AnnaBridge 167:84c0a372a020 157 } pmu_loop_des_t;
AnnaBridge 167:84c0a372a020 158 #define PMU_LOOP(i, s, c, a) (PMU_LOOP_OP | PMU_IS(i,s) | ((!!c) << PMU_LOOP_SEL_COUNTER_POS)), a
AnnaBridge 167:84c0a372a020 159
AnnaBridge 167:84c0a372a020 160 typedef struct pmu_poll_des_t {
AnnaBridge 167:84c0a372a020 161 uint32_t op_code : 3; /* 0x5 */
AnnaBridge 167:84c0a372a020 162 uint32_t interrupt : 1;
AnnaBridge 167:84c0a372a020 163 uint32_t stop : 1;
AnnaBridge 167:84c0a372a020 164 uint32_t : 2;
AnnaBridge 167:84c0a372a020 165 uint32_t and : 1;
AnnaBridge 167:84c0a372a020 166 uint32_t : 24;
AnnaBridge 167:84c0a372a020 167
AnnaBridge 167:84c0a372a020 168 uint32_t poll_addr;
AnnaBridge 167:84c0a372a020 169 uint32_t data;
AnnaBridge 167:84c0a372a020 170 uint32_t mask;
AnnaBridge 167:84c0a372a020 171 uint32_t poll_interval;
AnnaBridge 167:84c0a372a020 172 } pmu_poll_des_t;
AnnaBridge 167:84c0a372a020 173 #define PMU_POLL(i, s, a, adr, d, m, per) (PMU_POLL_OP | PMU_IS(i,s) | ((!!a) << PMU_POLL_AND_POS)), adr, d, m, per
AnnaBridge 167:84c0a372a020 174
AnnaBridge 167:84c0a372a020 175 typedef struct pmu_branch_des_t {
AnnaBridge 167:84c0a372a020 176 uint32_t op_code : 3; /* 0x6 */
AnnaBridge 167:84c0a372a020 177 uint32_t interrupt : 1;
AnnaBridge 167:84c0a372a020 178 uint32_t stop : 1;
AnnaBridge 167:84c0a372a020 179 uint32_t : 2;
AnnaBridge 167:84c0a372a020 180 uint32_t and : 1;
AnnaBridge 167:84c0a372a020 181 uint32_t type : 3;
AnnaBridge 167:84c0a372a020 182 uint32_t : 21;
AnnaBridge 167:84c0a372a020 183
AnnaBridge 167:84c0a372a020 184 uint32_t poll_addr;
AnnaBridge 167:84c0a372a020 185 uint32_t data;
AnnaBridge 167:84c0a372a020 186 uint32_t mask;
AnnaBridge 167:84c0a372a020 187 uint32_t address;
AnnaBridge 167:84c0a372a020 188 } pmu_branch_des_t;
AnnaBridge 167:84c0a372a020 189 #define PMU_BRANCH(i, s, a, t, adr, d, m, badr) \
AnnaBridge 167:84c0a372a020 190 (PMU_BRANCH_OP | PMU_IS(i,s) | ((!!a) << PMU_BRANCH_AND_POS)| ((t & 7) << PMU_BRANCH_TYPE_POS)), adr, d, m, badr
AnnaBridge 167:84c0a372a020 191
AnnaBridge 167:84c0a372a020 192 typedef struct pmu_transfer_des_t {
AnnaBridge 167:84c0a372a020 193 uint32_t op_code : 3; /* 0x7 */
AnnaBridge 167:84c0a372a020 194 uint32_t interrupt : 1;
AnnaBridge 167:84c0a372a020 195 uint32_t stop : 1;
AnnaBridge 167:84c0a372a020 196 uint32_t read_size : 2;
AnnaBridge 167:84c0a372a020 197 uint32_t read_inc : 1;
AnnaBridge 167:84c0a372a020 198 uint32_t write_size : 2;
AnnaBridge 167:84c0a372a020 199 uint32_t write_inc : 1;
AnnaBridge 167:84c0a372a020 200 uint32_t : 1;
AnnaBridge 167:84c0a372a020 201 uint32_t tx_length : 20;
AnnaBridge 167:84c0a372a020 202
AnnaBridge 167:84c0a372a020 203 uint32_t write_address;
AnnaBridge 167:84c0a372a020 204 uint32_t read_address;
AnnaBridge 167:84c0a372a020 205
AnnaBridge 167:84c0a372a020 206 uint32_t int_mask : 25; /* valid int_mask is from 0 - 24 */
AnnaBridge 167:84c0a372a020 207 uint32_t : 1;
AnnaBridge 167:84c0a372a020 208 uint32_t burst_size : 6;
AnnaBridge 167:84c0a372a020 209 } pmu_transfer_des_t;
AnnaBridge 167:84c0a372a020 210 #define PMU_TRANSFER(i, s, rs, ri, ws, wi, l, wa, ra, imsk, b) \
AnnaBridge 167:84c0a372a020 211 (PMU_TRANSFER_OP | PMU_IS(i,s) | ((rs & 3) << PMU_TX_READS_POS) | ((!!ri) << PMU_TX_READI_POS) | \
AnnaBridge 167:84c0a372a020 212 ((ws & 3) << PMU_TX_WRITES_POS) | ((!!wi) << PMU_TX_WRITEI_POS) | ((l & 0xFFFFF) << PMU_TX_LEN_POS)), wa, ra, \
AnnaBridge 167:84c0a372a020 213 ((imsk) | ((b & 0x3F) << PMU_TX_BS_POS))
AnnaBridge 167:84c0a372a020 214 /**
AnnaBridge 167:84c0a372a020 215 * Callback function type for the PMU.
AnnaBridge 167:84c0a372a020 216 * @details The callback function signature is:
AnnaBridge 167:84c0a372a020 217 * @code
AnnaBridge 167:84c0a372a020 218 * void callback(int status);
AnnaBridge 167:84c0a372a020 219 * @endcode
AnnaBridge 167:84c0a372a020 220 * @p pmu_status - The callback function argument is a status bit
AnnaBridge 167:84c0a372a020 221 * indicating the status of the PMU program. The callback function
AnnaBridge 167:84c0a372a020 222 * will be called for every opcode that has the interrupt bit set.
AnnaBridge 167:84c0a372a020 223 * If NULL, the channel interrupt will not be enabled.
AnnaBridge 167:84c0a372a020 224 */
AnnaBridge 167:84c0a372a020 225 typedef void (*pmu_callback)(int pmu_status);
AnnaBridge 167:84c0a372a020 226
AnnaBridge 167:84c0a372a020 227 /**
AnnaBridge 167:84c0a372a020 228 * @brief Start a PMU program on a channel
AnnaBridge 167:84c0a372a020 229 *
AnnaBridge 167:84c0a372a020 230 * @param[in] channel The channel number to start the PMU program.
AnnaBridge 167:84c0a372a020 231 * @param[in] program_address A pointer to the first opcode of the PMU program.
AnnaBridge 167:84c0a372a020 232 * @param[in] callback A pointer to the callback function or NULL. See pmu_callback() for details.
AnnaBridge 167:84c0a372a020 233 *
AnnaBridge 167:84c0a372a020 234 * @return #E_NO_ERROR if everything is successful, error if unsuccessful.
AnnaBridge 167:84c0a372a020 235 */
AnnaBridge 167:84c0a372a020 236 int PMU_Start(unsigned int channel, const void *program_address, pmu_callback callback);
AnnaBridge 167:84c0a372a020 237
AnnaBridge 167:84c0a372a020 238 /**
AnnaBridge 167:84c0a372a020 239 * @brief Set a loop counter value on a channel
AnnaBridge 167:84c0a372a020 240 * @param channel Channel number to set the value on
AnnaBridge 167:84c0a372a020 241 * @param counter_num Counter number for the channel (0 or 1)
AnnaBridge 167:84c0a372a020 242 * @param value Loop count value
AnnaBridge 167:84c0a372a020 243 * @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
AnnaBridge 167:84c0a372a020 244 */
AnnaBridge 167:84c0a372a020 245 int PMU_SetCounter(unsigned int channel, unsigned int counter_num, uint16_t value);
AnnaBridge 167:84c0a372a020 246
AnnaBridge 167:84c0a372a020 247 /**
AnnaBridge 167:84c0a372a020 248 * @brief Stop a running channel. This will clear the enable bit on the channel
AnnaBridge 167:84c0a372a020 249 * and stop the running PMU program at the current opcode. The callback
AnnaBridge 167:84c0a372a020 250 * function is not called.
AnnaBridge 167:84c0a372a020 251 * @param channel Channel to stop
AnnaBridge 167:84c0a372a020 252 */
AnnaBridge 167:84c0a372a020 253 void PMU_Stop(unsigned int channel);
AnnaBridge 167:84c0a372a020 254
AnnaBridge 167:84c0a372a020 255 /**
AnnaBridge 167:84c0a372a020 256 * @brief Function to handle PMU interrupts. This function can be called from
AnnaBridge 167:84c0a372a020 257 * the PMU interrupt service routine, or periodically from the
AnnaBridge 167:84c0a372a020 258 * application if interrupts are not enabled.
AnnaBridge 167:84c0a372a020 259 */
AnnaBridge 167:84c0a372a020 260 void PMU_Handler(void);
AnnaBridge 167:84c0a372a020 261
AnnaBridge 167:84c0a372a020 262 /**
AnnaBridge 167:84c0a372a020 263 * @brief Set the AHB bus operation timeout on a channel
AnnaBridge 167:84c0a372a020 264 * @param channel Selected PMU channel
AnnaBridge 167:84c0a372a020 265 * @param timeoutClkScale Clk scale use for timeout clk
AnnaBridge 167:84c0a372a020 266 * @param timeoutTicks Number of ticks for timeout duration
AnnaBridge 167:84c0a372a020 267 * @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
AnnaBridge 167:84c0a372a020 268 */
AnnaBridge 167:84c0a372a020 269 int PMU_SetTimeout(unsigned int channel, pmu_ps_sel_t timeoutClkScale, pmu_to_sel_t timeoutTicks);
AnnaBridge 167:84c0a372a020 270
AnnaBridge 167:84c0a372a020 271 /**
AnnaBridge 167:84c0a372a020 272 * @brief Gets the PMU channel's flags
AnnaBridge 167:84c0a372a020 273 * @param channel Selected PMU channel
AnnaBridge 167:84c0a372a020 274 * @return 0 = flags not set, non-zero = flags
AnnaBridge 167:84c0a372a020 275 */
AnnaBridge 167:84c0a372a020 276 uint32_t PMU_GetFlags(unsigned int channel);
AnnaBridge 167:84c0a372a020 277
AnnaBridge 167:84c0a372a020 278 /**
AnnaBridge 167:84c0a372a020 279 * @brief Clear the PMU channel's flags based on the mask
AnnaBridge 167:84c0a372a020 280 * @param channel Selected PMU channel
AnnaBridge 167:84c0a372a020 281 * @param mask bits of the flags to clear
AnnaBridge 167:84c0a372a020 282 */
AnnaBridge 167:84c0a372a020 283 void PMU_ClearFlags(unsigned int channel, unsigned int mask);
AnnaBridge 167:84c0a372a020 284
AnnaBridge 167:84c0a372a020 285 /**
AnnaBridge 167:84c0a372a020 286 * @brief Determines if the PMU channel is running
AnnaBridge 167:84c0a372a020 287 * @param channel Selected PMU channel
AnnaBridge 167:84c0a372a020 288 * @return 0 - channel is off
AnnaBridge 167:84c0a372a020 289 * @return non-zero = channel is running
AnnaBridge 167:84c0a372a020 290 */
AnnaBridge 167:84c0a372a020 291 uint32_t PMU_IsActive(unsigned int channel);
AnnaBridge 167:84c0a372a020 292
AnnaBridge 167:84c0a372a020 293 /**@} end of group pmuGroup*/
AnnaBridge 167:84c0a372a020 294
AnnaBridge 167:84c0a372a020 295 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 296 }
AnnaBridge 167:84c0a372a020 297 #endif
AnnaBridge 167:84c0a372a020 298
AnnaBridge 167:84c0a372a020 299 #endif /* _PMU_H_ */