The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_MAX32620FTHR/TARGET_Maxim/TARGET_MAX32620C/mxc/pt.h@167:84c0a372a020
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /**
AnnaBridge 167:84c0a372a020 2 * @file
AnnaBridge 167:84c0a372a020 3 * @brief Pulse Train data types, definitions and function prototypes.
AnnaBridge 167:84c0a372a020 4 */
AnnaBridge 167:84c0a372a020 5
AnnaBridge 167:84c0a372a020 6 /* *****************************************************************************
AnnaBridge 167:84c0a372a020 7 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 167:84c0a372a020 8 *
AnnaBridge 167:84c0a372a020 9 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 167:84c0a372a020 10 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 167:84c0a372a020 11 * to deal in the Software without restriction, including without limitation
AnnaBridge 167:84c0a372a020 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 167:84c0a372a020 13 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 167:84c0a372a020 14 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 167:84c0a372a020 15 *
AnnaBridge 167:84c0a372a020 16 * The above copyright notice and this permission notice shall be included
AnnaBridge 167:84c0a372a020 17 * in all copies or substantial portions of the Software.
AnnaBridge 167:84c0a372a020 18 *
AnnaBridge 167:84c0a372a020 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 167:84c0a372a020 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 167:84c0a372a020 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 167:84c0a372a020 22 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 167:84c0a372a020 23 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 167:84c0a372a020 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 167:84c0a372a020 25 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 167:84c0a372a020 26 *
AnnaBridge 167:84c0a372a020 27 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 167:84c0a372a020 28 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 167:84c0a372a020 29 * Products, Inc. Branding Policy.
AnnaBridge 167:84c0a372a020 30 *
AnnaBridge 167:84c0a372a020 31 * The mere transfer of this software does not imply any licenses
AnnaBridge 167:84c0a372a020 32 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 167:84c0a372a020 33 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 167:84c0a372a020 34 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 167:84c0a372a020 35 * ownership rights.
AnnaBridge 167:84c0a372a020 36 *
AnnaBridge 167:84c0a372a020 37 * $Date: 2016-10-10 19:27:24 -0500 (Mon, 10 Oct 2016) $
AnnaBridge 167:84c0a372a020 38 * $Revision: 24669 $
AnnaBridge 167:84c0a372a020 39 *
AnnaBridge 167:84c0a372a020 40 ***************************************************************************** */
AnnaBridge 167:84c0a372a020 41
AnnaBridge 167:84c0a372a020 42 /* Define to prevent redundant inclusion */
AnnaBridge 167:84c0a372a020 43 #ifndef _PT_H_
AnnaBridge 167:84c0a372a020 44 #define _PT_H_
AnnaBridge 167:84c0a372a020 45
AnnaBridge 167:84c0a372a020 46 /* **** Includes **** */
AnnaBridge 167:84c0a372a020 47 #include "mxc_config.h"
AnnaBridge 167:84c0a372a020 48 #include "pt_regs.h"
AnnaBridge 167:84c0a372a020 49 #include "mxc_assert.h"
AnnaBridge 167:84c0a372a020 50 #include "mxc_sys.h"
AnnaBridge 167:84c0a372a020 51
AnnaBridge 167:84c0a372a020 52 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 53 extern "C" {
AnnaBridge 167:84c0a372a020 54 #endif
AnnaBridge 167:84c0a372a020 55
AnnaBridge 167:84c0a372a020 56 /**
AnnaBridge 167:84c0a372a020 57 * @ingroup periphlibs
AnnaBridge 167:84c0a372a020 58 * @defgroup pulsetrain Pulse Train Engine
AnnaBridge 167:84c0a372a020 59 * @brief This is the high level API for the pulse train engine.
AnnaBridge 167:84c0a372a020 60 * @{
AnnaBridge 167:84c0a372a020 61 */
AnnaBridge 167:84c0a372a020 62
AnnaBridge 167:84c0a372a020 63 /**
AnnaBridge 167:84c0a372a020 64 * Structure type for pulse train mode configuration.
AnnaBridge 167:84c0a372a020 65 * @note Do not use for square wave
AnnaBridge 167:84c0a372a020 66 */
AnnaBridge 167:84c0a372a020 67 typedef struct {
AnnaBridge 167:84c0a372a020 68 uint32_t bps; /**< pulse train bit rate */
AnnaBridge 167:84c0a372a020 69 uint32_t pattern; /**< Output pattern to shift out, starts at LSB */
AnnaBridge 167:84c0a372a020 70 uint8_t ptLength; /**< Number of bits in pulse train, 0 = 32bits, 1 = non valid , 2 = 2 bits, ... */
AnnaBridge 167:84c0a372a020 71 uint16_t loop; /**< Number of times to repeat the train, 0 = continuous */
AnnaBridge 167:84c0a372a020 72 uint16_t loopDelay; /**< Delay between loops specified in bits Example: loopDelay = 4, delays time = time it takes to shift out 4 bits */
AnnaBridge 167:84c0a372a020 73 } pt_pt_cfg_t;
AnnaBridge 167:84c0a372a020 74
AnnaBridge 167:84c0a372a020 75 /**
AnnaBridge 167:84c0a372a020 76 * @brief This function initializes the pulse trains to a known stopped
AnnaBridge 167:84c0a372a020 77 * state and sets the global PT clock scale.
AnnaBridge 167:84c0a372a020 78 * @param clk_scale Scale the system clock for the global PT clock.
AnnaBridge 167:84c0a372a020 79 */
AnnaBridge 167:84c0a372a020 80 void PT_Init(sys_pt_clk_scale clk_scale);
AnnaBridge 167:84c0a372a020 81
AnnaBridge 167:84c0a372a020 82 /**
AnnaBridge 167:84c0a372a020 83 * @brief Configures the pulse train in the specified mode.
AnnaBridge 167:84c0a372a020 84 * @details The parameters in the config structure must be set before calling
AnnaBridge 167:84c0a372a020 85 * this function. This function should be used for configuring pulse
AnnaBridge 167:84c0a372a020 86 * train mode only.
AnnaBridge 167:84c0a372a020 87 * @note The pulse train cannot be running when this function is called.
AnnaBridge 167:84c0a372a020 88 *
AnnaBridge 167:84c0a372a020 89 * @param pt Pulse train to operate on.
AnnaBridge 167:84c0a372a020 90 * @param cfg Pointer to pulse train configuration.
AnnaBridge 167:84c0a372a020 91 * @param sysCfg Pointer to pulse train system GPIO configuration.
AnnaBridge 167:84c0a372a020 92 *
AnnaBridge 167:84c0a372a020 93 * @return #E_NO_ERROR if everything is successful, @ref MXC_Error_Codes
AnnaBridge 167:84c0a372a020 94 * "error" if unsuccessful.
AnnaBridge 167:84c0a372a020 95 */
AnnaBridge 167:84c0a372a020 96 int PT_PTConfig(mxc_pt_regs_t *pt, pt_pt_cfg_t *cfg, const sys_cfg_pt_t *sysCfg);
AnnaBridge 167:84c0a372a020 97
AnnaBridge 167:84c0a372a020 98 /**
AnnaBridge 167:84c0a372a020 99 * @brief Configures the pulse train in the square wave mode.
AnnaBridge 167:84c0a372a020 100 * @details This function should be used for configuring square wave mode only.
AnnaBridge 167:84c0a372a020 101 * @note The pulse train cannot be running when this function is called
AnnaBridge 167:84c0a372a020 102 *
AnnaBridge 167:84c0a372a020 103 * @param pt pulse train to operate on
AnnaBridge 167:84c0a372a020 104 * @param freq square wave output frequency in Hz
AnnaBridge 167:84c0a372a020 105 * @param sysCfg pointer to pulse train system GPIO configuration
AnnaBridge 167:84c0a372a020 106 *
AnnaBridge 167:84c0a372a020 107 * @returns #E_NO_ERROR if everything is successful, \ref MXC_Error_Codes "error" if unsuccessful.
AnnaBridge 167:84c0a372a020 108 */
AnnaBridge 167:84c0a372a020 109 int PT_SqrWaveConfig(mxc_pt_regs_t *pt, uint32_t freq, const sys_cfg_pt_t *sysCfg);
AnnaBridge 167:84c0a372a020 110
AnnaBridge 167:84c0a372a020 111 /**
AnnaBridge 167:84c0a372a020 112 * @brief Starts the pulse train specified.
AnnaBridge 167:84c0a372a020 113 *
AnnaBridge 167:84c0a372a020 114 * @param pt Pulse train to operate on.
AnnaBridge 167:84c0a372a020 115 */
AnnaBridge 167:84c0a372a020 116 __STATIC_INLINE void PT_Start(mxc_pt_regs_t *pt)
AnnaBridge 167:84c0a372a020 117 {
AnnaBridge 167:84c0a372a020 118 int ptIndex = MXC_PT_GET_IDX(pt);
AnnaBridge 167:84c0a372a020 119
AnnaBridge 167:84c0a372a020 120 MXC_PTG->enable |= (1 << ptIndex);
AnnaBridge 167:84c0a372a020 121
AnnaBridge 167:84c0a372a020 122 //wait for PT to start
AnnaBridge 167:84c0a372a020 123 while( (MXC_PTG->enable & (1 << ptIndex)) == 0 );
AnnaBridge 167:84c0a372a020 124 }
AnnaBridge 167:84c0a372a020 125
AnnaBridge 167:84c0a372a020 126 /**
AnnaBridge 167:84c0a372a020 127 * @brief Start multiple pulse train modules together.
AnnaBridge 167:84c0a372a020 128 *
AnnaBridge 167:84c0a372a020 129 * @param pts Set the bits of pulse trains to start
AnnaBridge 167:84c0a372a020 130 * Bit0-\>pt0, Bit1-\>pt1... etc.
AnnaBridge 167:84c0a372a020 131 */
AnnaBridge 167:84c0a372a020 132 __STATIC_INLINE void PT_StartMulti(uint32_t pts)
AnnaBridge 167:84c0a372a020 133 {
AnnaBridge 167:84c0a372a020 134 MXC_PTG->enable |= pts;
AnnaBridge 167:84c0a372a020 135
AnnaBridge 167:84c0a372a020 136 //wait for PTs to start
AnnaBridge 167:84c0a372a020 137 while( (MXC_PTG->enable & pts) != pts );
AnnaBridge 167:84c0a372a020 138 }
AnnaBridge 167:84c0a372a020 139
AnnaBridge 167:84c0a372a020 140 /**
AnnaBridge 167:84c0a372a020 141 * @brief Stops a pulse train.
AnnaBridge 167:84c0a372a020 142 *
AnnaBridge 167:84c0a372a020 143 * @param pt Pulse train to operate on.
AnnaBridge 167:84c0a372a020 144 */
AnnaBridge 167:84c0a372a020 145 __STATIC_INLINE void PT_Stop(mxc_pt_regs_t *pt)
AnnaBridge 167:84c0a372a020 146 {
AnnaBridge 167:84c0a372a020 147 int ptIndex = MXC_PT_GET_IDX(pt);
AnnaBridge 167:84c0a372a020 148
AnnaBridge 167:84c0a372a020 149 MXC_PTG->enable &= ~(1 << ptIndex);
AnnaBridge 167:84c0a372a020 150 }
AnnaBridge 167:84c0a372a020 151
AnnaBridge 167:84c0a372a020 152 /**
AnnaBridge 167:84c0a372a020 153 * @brief Stop multiple pulse trains together
AnnaBridge 167:84c0a372a020 154 *
AnnaBridge 167:84c0a372a020 155 * @param pts Set the bits of pulse trains to stop
AnnaBridge 167:84c0a372a020 156 * Bit0-\>pt0, Bit1-\>pt1... etc.
AnnaBridge 167:84c0a372a020 157 */
AnnaBridge 167:84c0a372a020 158 __STATIC_INLINE void PT_StopMulti(uint32_t pts)
AnnaBridge 167:84c0a372a020 159 {
AnnaBridge 167:84c0a372a020 160 MXC_PTG->enable &= ~(pts);
AnnaBridge 167:84c0a372a020 161 }
AnnaBridge 167:84c0a372a020 162
AnnaBridge 167:84c0a372a020 163 /**
AnnaBridge 167:84c0a372a020 164 * @brief Determines if the pulse train is running.
AnnaBridge 167:84c0a372a020 165 *
AnnaBridge 167:84c0a372a020 166 * @param pt Pulse train to operate on.
AnnaBridge 167:84c0a372a020 167 *
AnnaBridge 167:84c0a372a020 168 * @return 0 Pulse train is off.
AnnaBridge 167:84c0a372a020 169 * @return \>0 Pulse train is on.
AnnaBridge 167:84c0a372a020 170 */
AnnaBridge 167:84c0a372a020 171 __STATIC_INLINE uint32_t PT_IsActive(mxc_pt_regs_t *pt)
AnnaBridge 167:84c0a372a020 172 {
AnnaBridge 167:84c0a372a020 173 int ptIndex = MXC_PT_GET_IDX(pt);
AnnaBridge 167:84c0a372a020 174
AnnaBridge 167:84c0a372a020 175 return (!!(MXC_PTG->enable & (1 << ptIndex)));
AnnaBridge 167:84c0a372a020 176 }
AnnaBridge 167:84c0a372a020 177
AnnaBridge 167:84c0a372a020 178 /**
AnnaBridge 167:84c0a372a020 179 * @brief Determines if the pulse trains selected are running
AnnaBridge 167:84c0a372a020 180 *
AnnaBridge 167:84c0a372a020 181 * @param pts Set the bits of pulse trains to check Bit0-\>pt0,
AnnaBridge 167:84c0a372a020 182 * Bit1-\>pt1... etc.
AnnaBridge 167:84c0a372a020 183 *
AnnaBridge 167:84c0a372a020 184 * @return 0 All pulse trains are off.
AnnaBridge 167:84c0a372a020 185 * @return \>0 At least one pulse train is on.
AnnaBridge 167:84c0a372a020 186 */
AnnaBridge 167:84c0a372a020 187 __STATIC_INLINE uint32_t PT_IsActiveMulti(uint32_t pts)
AnnaBridge 167:84c0a372a020 188 {
AnnaBridge 167:84c0a372a020 189 return (MXC_PTG->enable & pts);
AnnaBridge 167:84c0a372a020 190 }
AnnaBridge 167:84c0a372a020 191
AnnaBridge 167:84c0a372a020 192 /**
AnnaBridge 167:84c0a372a020 193 * @brief Sets the pattern of the pulse train
AnnaBridge 167:84c0a372a020 194 *
AnnaBridge 167:84c0a372a020 195 * @param pt Pointer to pulse train to operate on
AnnaBridge 167:84c0a372a020 196 * @param pattern Output pattern.
AnnaBridge 167:84c0a372a020 197 *
AnnaBridge 167:84c0a372a020 198 */
AnnaBridge 167:84c0a372a020 199 __STATIC_INLINE void PT_SetPattern(mxc_pt_regs_t *pt, uint32_t pattern)
AnnaBridge 167:84c0a372a020 200 {
AnnaBridge 167:84c0a372a020 201 pt->train = pattern;
AnnaBridge 167:84c0a372a020 202 }
AnnaBridge 167:84c0a372a020 203
AnnaBridge 167:84c0a372a020 204 /**
AnnaBridge 167:84c0a372a020 205 * @brief Enable pulse train interrupt.
AnnaBridge 167:84c0a372a020 206 *
AnnaBridge 167:84c0a372a020 207 * @param pt Pointer to pulse train to operate on.
AnnaBridge 167:84c0a372a020 208 */
AnnaBridge 167:84c0a372a020 209 __STATIC_INLINE void PT_EnableINT(mxc_pt_regs_t *pt)
AnnaBridge 167:84c0a372a020 210 {
AnnaBridge 167:84c0a372a020 211 int ptIndex = MXC_PT_GET_IDX(pt);
AnnaBridge 167:84c0a372a020 212
AnnaBridge 167:84c0a372a020 213 MXC_PTG->inten |= (1 << ptIndex);
AnnaBridge 167:84c0a372a020 214 }
AnnaBridge 167:84c0a372a020 215
AnnaBridge 167:84c0a372a020 216 /**
AnnaBridge 167:84c0a372a020 217 * @brief Enable interrupts for the pulse trains selected.
AnnaBridge 167:84c0a372a020 218 *
AnnaBridge 167:84c0a372a020 219 * @param pts Bit mask of which pulse trains to enable. Set the bit
AnnaBridge 167:84c0a372a020 220 * position of each pulse train to enable it. Bit0-\>pt0,
AnnaBridge 167:84c0a372a020 221 * Bit1-\>pt1... etc, 1 will enable the interrupt, 0 to leave
AnnaBridge 167:84c0a372a020 222 * a PT channel in its current state.
AnnaBridge 167:84c0a372a020 223 */
AnnaBridge 167:84c0a372a020 224 __STATIC_INLINE void PT_EnableINTMulti(uint32_t pts)
AnnaBridge 167:84c0a372a020 225 {
AnnaBridge 167:84c0a372a020 226 MXC_PTG->inten |= pts;
AnnaBridge 167:84c0a372a020 227 }
AnnaBridge 167:84c0a372a020 228
AnnaBridge 167:84c0a372a020 229 /**
AnnaBridge 167:84c0a372a020 230 * @brief Disable pulse train interrupt.
AnnaBridge 167:84c0a372a020 231 *
AnnaBridge 167:84c0a372a020 232 * @param pt pulse train to operate on.
AnnaBridge 167:84c0a372a020 233 */
AnnaBridge 167:84c0a372a020 234 __STATIC_INLINE void PT_DisableINT(mxc_pt_regs_t *pt)
AnnaBridge 167:84c0a372a020 235 {
AnnaBridge 167:84c0a372a020 236 int ptIndex = MXC_PT_GET_IDX(pt);
AnnaBridge 167:84c0a372a020 237
AnnaBridge 167:84c0a372a020 238 MXC_PTG->inten &= ~(1 << ptIndex);
AnnaBridge 167:84c0a372a020 239 }
AnnaBridge 167:84c0a372a020 240
AnnaBridge 167:84c0a372a020 241 /**
AnnaBridge 167:84c0a372a020 242 * @brief Disable interrupts for the pulse trains selected.
AnnaBridge 167:84c0a372a020 243 *
AnnaBridge 167:84c0a372a020 244 * @param pts Bit mask of what pulse trains to disable. Set the bit
AnnaBridge 167:84c0a372a020 245 * position of each pulse train to disable it. Bit0-\>pt0,
AnnaBridge 167:84c0a372a020 246 * Bit1-\>pt1... etc, 1 will disable the interrupt, 0 to leave
AnnaBridge 167:84c0a372a020 247 * a PT channel in its current state.
AnnaBridge 167:84c0a372a020 248 */
AnnaBridge 167:84c0a372a020 249 __STATIC_INLINE void PT_DisableINTMulti(uint32_t pts)
AnnaBridge 167:84c0a372a020 250 {
AnnaBridge 167:84c0a372a020 251 MXC_PTG->inten &= ~pts;
AnnaBridge 167:84c0a372a020 252 }
AnnaBridge 167:84c0a372a020 253 /**
AnnaBridge 167:84c0a372a020 254 * @brief Gets the pulse trains's interrupt flags.
AnnaBridge 167:84c0a372a020 255 *
AnnaBridge 167:84c0a372a020 256 * @return The Pulse Train Interrupt Flags, \ref PT_INTFL_Register Register
AnnaBridge 167:84c0a372a020 257 * for details.
AnnaBridge 167:84c0a372a020 258 */
AnnaBridge 167:84c0a372a020 259 __STATIC_INLINE uint32_t PT_GetFlags(void)
AnnaBridge 167:84c0a372a020 260 {
AnnaBridge 167:84c0a372a020 261 return MXC_PTG->intfl;
AnnaBridge 167:84c0a372a020 262 }
AnnaBridge 167:84c0a372a020 263
AnnaBridge 167:84c0a372a020 264 /**
AnnaBridge 167:84c0a372a020 265 * @brief Clears the pulse train's interrupt flag.
AnnaBridge 167:84c0a372a020 266 *
AnnaBridge 167:84c0a372a020 267 * @param mask bits to clear, see \ref PT_INTFL_Register Register for details.
AnnaBridge 167:84c0a372a020 268 */
AnnaBridge 167:84c0a372a020 269 __STATIC_INLINE void PT_ClearFlags(uint32_t mask)
AnnaBridge 167:84c0a372a020 270 {
AnnaBridge 167:84c0a372a020 271 MXC_PTG->intfl = mask;
AnnaBridge 167:84c0a372a020 272 }
AnnaBridge 167:84c0a372a020 273
AnnaBridge 167:84c0a372a020 274 /**
AnnaBridge 167:84c0a372a020 275 * @brief Setup and enables a pulse train to restart after another pulse
AnnaBridge 167:84c0a372a020 276 * train has exited its loop. Each pulse train can have up to two
AnnaBridge 167:84c0a372a020 277 * restart triggers.
AnnaBridge 167:84c0a372a020 278 *
AnnaBridge 167:84c0a372a020 279 * @param ptToRestart pulse train to restart after @c ptStop ends.
AnnaBridge 167:84c0a372a020 280 * @param ptStop pulse train that stops and triggers @p ptToRestart
AnnaBridge 167:84c0a372a020 281 * to begin.
AnnaBridge 167:84c0a372a020 282 * @param restartIndex selects which restart trigger to set (0 or 1).
AnnaBridge 167:84c0a372a020 283 */
AnnaBridge 167:84c0a372a020 284 __STATIC_INLINE void PT_SetRestart(mxc_pt_regs_t *ptToRestart, mxc_pt_regs_t *ptStop, uint8_t restartIndex)
AnnaBridge 167:84c0a372a020 285 {
AnnaBridge 167:84c0a372a020 286 int ptStopIndex = MXC_PT_GET_IDX(ptStop);
AnnaBridge 167:84c0a372a020 287
AnnaBridge 167:84c0a372a020 288 MXC_ASSERT(ptStopIndex >= 0);
AnnaBridge 167:84c0a372a020 289
AnnaBridge 167:84c0a372a020 290 if(restartIndex) {
AnnaBridge 167:84c0a372a020 291 ptToRestart->restart |= (ptStopIndex << MXC_F_PT_RESTART_PT_Y_SELECT_POS) |
AnnaBridge 167:84c0a372a020 292 MXC_F_PT_RESTART_ON_PT_Y_LOOP_EXIT;
AnnaBridge 167:84c0a372a020 293 } else {
AnnaBridge 167:84c0a372a020 294 ptToRestart->restart |= (ptStopIndex << MXC_F_PT_RESTART_PT_X_SELECT_POS) |
AnnaBridge 167:84c0a372a020 295 MXC_F_PT_RESTART_ON_PT_X_LOOP_EXIT;
AnnaBridge 167:84c0a372a020 296 }
AnnaBridge 167:84c0a372a020 297 }
AnnaBridge 167:84c0a372a020 298
AnnaBridge 167:84c0a372a020 299 /**
AnnaBridge 167:84c0a372a020 300 * @brief Disable the restart for the specified pulse train
AnnaBridge 167:84c0a372a020 301 *
AnnaBridge 167:84c0a372a020 302 * @param ptToRestart pulse train to disable the restart
AnnaBridge 167:84c0a372a020 303 * @param restartIndex selects which restart trigger to disable (0 or 1)
AnnaBridge 167:84c0a372a020 304 */
AnnaBridge 167:84c0a372a020 305 __STATIC_INLINE void PT_RestartDisable(mxc_pt_regs_t *ptToRestart, uint8_t restartIndex)
AnnaBridge 167:84c0a372a020 306 {
AnnaBridge 167:84c0a372a020 307 if(restartIndex)
AnnaBridge 167:84c0a372a020 308 ptToRestart->restart &= ~MXC_F_PT_RESTART_ON_PT_Y_LOOP_EXIT;
AnnaBridge 167:84c0a372a020 309 else
AnnaBridge 167:84c0a372a020 310 ptToRestart->restart &= ~MXC_F_PT_RESTART_ON_PT_X_LOOP_EXIT;
AnnaBridge 167:84c0a372a020 311 }
AnnaBridge 167:84c0a372a020 312
AnnaBridge 167:84c0a372a020 313 /**
AnnaBridge 167:84c0a372a020 314 * @brief Resynchronize individual pulse trains together. Resync will stop
AnnaBridge 167:84c0a372a020 315 * those resync_pts; others will be still running
AnnaBridge 167:84c0a372a020 316 *
AnnaBridge 167:84c0a372a020 317 * @param resyncPts pulse train modules that need to be re-synced by bit
AnnaBridge 167:84c0a372a020 318 * number. Bit0-\>pt0, Bit1-\>pt1... etc.
AnnaBridge 167:84c0a372a020 319 */
AnnaBridge 167:84c0a372a020 320 __STATIC_INLINE void PT_Resync(uint32_t resyncPts)
AnnaBridge 167:84c0a372a020 321 {
AnnaBridge 167:84c0a372a020 322 MXC_PTG->resync = resyncPts;
AnnaBridge 167:84c0a372a020 323 while(MXC_PTG->resync);
AnnaBridge 167:84c0a372a020 324 }
AnnaBridge 167:84c0a372a020 325 /**@} end of group pulsetrains*/
AnnaBridge 167:84c0a372a020 326
AnnaBridge 167:84c0a372a020 327 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 328 }
AnnaBridge 167:84c0a372a020 329 #endif
AnnaBridge 167:84c0a372a020 330
AnnaBridge 167:84c0a372a020 331 #endif /* _PT_H_ */