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TARGET_KL27Z/TOOLCHAIN_IAR/fsl_flexio_spi.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 171:3a7713b1edbc | 1 | /* |
AnnaBridge | 171:3a7713b1edbc | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
AnnaBridge | 171:3a7713b1edbc | 3 | * All rights reserved. |
AnnaBridge | 171:3a7713b1edbc | 4 | * |
AnnaBridge | 171:3a7713b1edbc | 5 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 6 | * are permitted provided that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 7 | * |
AnnaBridge | 171:3a7713b1edbc | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 171:3a7713b1edbc | 9 | * of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 171:3a7713b1edbc | 12 | * list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 171:3a7713b1edbc | 13 | * other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 14 | * |
AnnaBridge | 171:3a7713b1edbc | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
AnnaBridge | 171:3a7713b1edbc | 16 | * contributors may be used to endorse or promote products derived from this |
AnnaBridge | 171:3a7713b1edbc | 17 | * software without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 18 | * |
AnnaBridge | 171:3a7713b1edbc | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 171:3a7713b1edbc | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 171:3a7713b1edbc | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 171:3a7713b1edbc | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 171:3a7713b1edbc | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 171:3a7713b1edbc | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 171:3a7713b1edbc | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 171:3a7713b1edbc | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 171:3a7713b1edbc | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 29 | */ |
AnnaBridge | 171:3a7713b1edbc | 30 | |
AnnaBridge | 171:3a7713b1edbc | 31 | #ifndef _FSL_FLEXIO_SPI_H_ |
AnnaBridge | 171:3a7713b1edbc | 32 | #define _FSL_FLEXIO_SPI_H_ |
AnnaBridge | 171:3a7713b1edbc | 33 | |
AnnaBridge | 171:3a7713b1edbc | 34 | #include "fsl_common.h" |
AnnaBridge | 171:3a7713b1edbc | 35 | #include "fsl_flexio.h" |
AnnaBridge | 171:3a7713b1edbc | 36 | |
AnnaBridge | 171:3a7713b1edbc | 37 | /*! |
AnnaBridge | 171:3a7713b1edbc | 38 | * @addtogroup flexio_spi |
AnnaBridge | 171:3a7713b1edbc | 39 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 40 | */ |
AnnaBridge | 171:3a7713b1edbc | 41 | |
AnnaBridge | 171:3a7713b1edbc | 42 | /*! @file */ |
AnnaBridge | 171:3a7713b1edbc | 43 | |
AnnaBridge | 171:3a7713b1edbc | 44 | /******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 45 | * Definitions |
AnnaBridge | 171:3a7713b1edbc | 46 | ******************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 47 | |
AnnaBridge | 171:3a7713b1edbc | 48 | /*! @name Driver version */ |
AnnaBridge | 171:3a7713b1edbc | 49 | /*@{*/ |
AnnaBridge | 171:3a7713b1edbc | 50 | /*! @brief FlexIO SPI driver version 2.1.0. */ |
AnnaBridge | 171:3a7713b1edbc | 51 | #define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 0)) |
AnnaBridge | 171:3a7713b1edbc | 52 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 53 | |
AnnaBridge | 171:3a7713b1edbc | 54 | /*! @brief FlexIO SPI dummy transfer data, the data is sent while txData is NULL. */ |
AnnaBridge | 171:3a7713b1edbc | 55 | #define FLEXIO_SPI_DUMMYDATA (0xFFFFU) |
AnnaBridge | 171:3a7713b1edbc | 56 | |
AnnaBridge | 171:3a7713b1edbc | 57 | /*! @brief Error codes for the FlexIO SPI driver. */ |
AnnaBridge | 171:3a7713b1edbc | 58 | enum _flexio_spi_status |
AnnaBridge | 171:3a7713b1edbc | 59 | { |
AnnaBridge | 171:3a7713b1edbc | 60 | kStatus_FLEXIO_SPI_Busy = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 1), /*!< FlexIO SPI is busy. */ |
AnnaBridge | 171:3a7713b1edbc | 61 | kStatus_FLEXIO_SPI_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 2), /*!< SPI is idle */ |
AnnaBridge | 171:3a7713b1edbc | 62 | kStatus_FLEXIO_SPI_Error = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 3), /*!< FlexIO SPI error. */ |
AnnaBridge | 171:3a7713b1edbc | 63 | }; |
AnnaBridge | 171:3a7713b1edbc | 64 | |
AnnaBridge | 171:3a7713b1edbc | 65 | /*! @brief FlexIO SPI clock phase configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 66 | typedef enum _flexio_spi_clock_phase |
AnnaBridge | 171:3a7713b1edbc | 67 | { |
AnnaBridge | 171:3a7713b1edbc | 68 | kFLEXIO_SPI_ClockPhaseFirstEdge = 0x0U, /*!< First edge on SPSCK occurs at the middle of the first |
AnnaBridge | 171:3a7713b1edbc | 69 | * cycle of a data transfer. */ |
AnnaBridge | 171:3a7713b1edbc | 70 | kFLEXIO_SPI_ClockPhaseSecondEdge = 0x1U, /*!< First edge on SPSCK occurs at the start of the |
AnnaBridge | 171:3a7713b1edbc | 71 | * first cycle of a data transfer. */ |
AnnaBridge | 171:3a7713b1edbc | 72 | } flexio_spi_clock_phase_t; |
AnnaBridge | 171:3a7713b1edbc | 73 | |
AnnaBridge | 171:3a7713b1edbc | 74 | /*! @brief FlexIO SPI data shifter direction options. */ |
AnnaBridge | 171:3a7713b1edbc | 75 | typedef enum _flexio_spi_shift_direction |
AnnaBridge | 171:3a7713b1edbc | 76 | { |
AnnaBridge | 171:3a7713b1edbc | 77 | kFLEXIO_SPI_MsbFirst = 0, /*!< Data transfers start with most significant bit. */ |
AnnaBridge | 171:3a7713b1edbc | 78 | kFLEXIO_SPI_LsbFirst = 1, /*!< Data transfers start with least significant bit. */ |
AnnaBridge | 171:3a7713b1edbc | 79 | } flexio_spi_shift_direction_t; |
AnnaBridge | 171:3a7713b1edbc | 80 | |
AnnaBridge | 171:3a7713b1edbc | 81 | /*! @brief FlexIO SPI data length mode options. */ |
AnnaBridge | 171:3a7713b1edbc | 82 | typedef enum _flexio_spi_data_bitcount_mode |
AnnaBridge | 171:3a7713b1edbc | 83 | { |
AnnaBridge | 171:3a7713b1edbc | 84 | kFLEXIO_SPI_8BitMode = 0x08U, /*!< 8-bit data transmission mode. */ |
AnnaBridge | 171:3a7713b1edbc | 85 | kFLEXIO_SPI_16BitMode = 0x10U, /*!< 16-bit data transmission mode. */ |
AnnaBridge | 171:3a7713b1edbc | 86 | } flexio_spi_data_bitcount_mode_t; |
AnnaBridge | 171:3a7713b1edbc | 87 | |
AnnaBridge | 171:3a7713b1edbc | 88 | /*! @brief Define FlexIO SPI interrupt mask. */ |
AnnaBridge | 171:3a7713b1edbc | 89 | enum _flexio_spi_interrupt_enable |
AnnaBridge | 171:3a7713b1edbc | 90 | { |
AnnaBridge | 171:3a7713b1edbc | 91 | kFLEXIO_SPI_TxEmptyInterruptEnable = 0x1U, /*!< Transmit buffer empty interrupt enable. */ |
AnnaBridge | 171:3a7713b1edbc | 92 | kFLEXIO_SPI_RxFullInterruptEnable = 0x2U, /*!< Receive buffer full interrupt enable. */ |
AnnaBridge | 171:3a7713b1edbc | 93 | }; |
AnnaBridge | 171:3a7713b1edbc | 94 | |
AnnaBridge | 171:3a7713b1edbc | 95 | /*! @brief Define FlexIO SPI status mask. */ |
AnnaBridge | 171:3a7713b1edbc | 96 | enum _flexio_spi_status_flags |
AnnaBridge | 171:3a7713b1edbc | 97 | { |
AnnaBridge | 171:3a7713b1edbc | 98 | kFLEXIO_SPI_TxBufferEmptyFlag = 0x1U, /*!< Transmit buffer empty flag. */ |
AnnaBridge | 171:3a7713b1edbc | 99 | kFLEXIO_SPI_RxBufferFullFlag = 0x2U, /*!< Receive buffer full flag. */ |
AnnaBridge | 171:3a7713b1edbc | 100 | }; |
AnnaBridge | 171:3a7713b1edbc | 101 | |
AnnaBridge | 171:3a7713b1edbc | 102 | /*! @brief Define FlexIO SPI DMA mask. */ |
AnnaBridge | 171:3a7713b1edbc | 103 | enum _flexio_spi_dma_enable |
AnnaBridge | 171:3a7713b1edbc | 104 | { |
AnnaBridge | 171:3a7713b1edbc | 105 | kFLEXIO_SPI_TxDmaEnable = 0x1U, /*!< Tx DMA request source */ |
AnnaBridge | 171:3a7713b1edbc | 106 | kFLEXIO_SPI_RxDmaEnable = 0x2U, /*!< Rx DMA request source */ |
AnnaBridge | 171:3a7713b1edbc | 107 | kFLEXIO_SPI_DmaAllEnable = 0x3U, /*!< All DMA request source*/ |
AnnaBridge | 171:3a7713b1edbc | 108 | }; |
AnnaBridge | 171:3a7713b1edbc | 109 | |
AnnaBridge | 171:3a7713b1edbc | 110 | /*! @brief Define FlexIO SPI transfer flags. */ |
AnnaBridge | 171:3a7713b1edbc | 111 | enum _flexio_spi_transfer_flags |
AnnaBridge | 171:3a7713b1edbc | 112 | { |
AnnaBridge | 171:3a7713b1edbc | 113 | kFLEXIO_SPI_8bitMsb = 0x1U, /*!< FlexIO SPI 8-bit MSB first */ |
AnnaBridge | 171:3a7713b1edbc | 114 | kFLEXIO_SPI_8bitLsb = 0x2U, /*!< FlexIO SPI 8-bit LSB first */ |
AnnaBridge | 171:3a7713b1edbc | 115 | kFLEXIO_SPI_16bitMsb = 0x9U, /*!< FlexIO SPI 16-bit MSB first */ |
AnnaBridge | 171:3a7713b1edbc | 116 | kFLEXIO_SPI_16bitLsb = 0xaU, /*!< FlexIO SPI 16-bit LSB first */ |
AnnaBridge | 171:3a7713b1edbc | 117 | }; |
AnnaBridge | 171:3a7713b1edbc | 118 | |
AnnaBridge | 171:3a7713b1edbc | 119 | /*! @brief Define FlexIO SPI access structure typedef. */ |
AnnaBridge | 171:3a7713b1edbc | 120 | typedef struct _flexio_spi_type |
AnnaBridge | 171:3a7713b1edbc | 121 | { |
AnnaBridge | 171:3a7713b1edbc | 122 | FLEXIO_Type *flexioBase; /*!< FlexIO base pointer. */ |
AnnaBridge | 171:3a7713b1edbc | 123 | uint8_t SDOPinIndex; /*!< Pin select for data output. */ |
AnnaBridge | 171:3a7713b1edbc | 124 | uint8_t SDIPinIndex; /*!< Pin select for data input. */ |
AnnaBridge | 171:3a7713b1edbc | 125 | uint8_t SCKPinIndex; /*!< Pin select for clock. */ |
AnnaBridge | 171:3a7713b1edbc | 126 | uint8_t CSnPinIndex; /*!< Pin select for enable. */ |
AnnaBridge | 171:3a7713b1edbc | 127 | uint8_t shifterIndex[2]; /*!< Shifter index used in FlexIO SPI. */ |
AnnaBridge | 171:3a7713b1edbc | 128 | uint8_t timerIndex[2]; /*!< Timer index used in FlexIO SPI. */ |
AnnaBridge | 171:3a7713b1edbc | 129 | } FLEXIO_SPI_Type; |
AnnaBridge | 171:3a7713b1edbc | 130 | |
AnnaBridge | 171:3a7713b1edbc | 131 | /*! @brief Define FlexIO SPI master configuration structure. */ |
AnnaBridge | 171:3a7713b1edbc | 132 | typedef struct _flexio_spi_master_config |
AnnaBridge | 171:3a7713b1edbc | 133 | { |
AnnaBridge | 171:3a7713b1edbc | 134 | bool enableMaster; /*!< Enable/disable FlexIO SPI master after configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 135 | bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */ |
AnnaBridge | 171:3a7713b1edbc | 136 | bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */ |
AnnaBridge | 171:3a7713b1edbc | 137 | bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, |
AnnaBridge | 171:3a7713b1edbc | 138 | fast access requires the FlexIO clock to be at least |
AnnaBridge | 171:3a7713b1edbc | 139 | twice the frequency of the bus clock. */ |
AnnaBridge | 171:3a7713b1edbc | 140 | uint32_t baudRate_Bps; /*!< Baud rate in Bps. */ |
AnnaBridge | 171:3a7713b1edbc | 141 | flexio_spi_clock_phase_t phase; /*!< Clock phase. */ |
AnnaBridge | 171:3a7713b1edbc | 142 | flexio_spi_data_bitcount_mode_t dataMode; /*!< 8bit or 16bit mode. */ |
AnnaBridge | 171:3a7713b1edbc | 143 | } flexio_spi_master_config_t; |
AnnaBridge | 171:3a7713b1edbc | 144 | |
AnnaBridge | 171:3a7713b1edbc | 145 | /*! @brief Define FlexIO SPI slave configuration structure. */ |
AnnaBridge | 171:3a7713b1edbc | 146 | typedef struct _flexio_spi_slave_config |
AnnaBridge | 171:3a7713b1edbc | 147 | { |
AnnaBridge | 171:3a7713b1edbc | 148 | bool enableSlave; /*!< Enable/disable FlexIO SPI slave after configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 149 | bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */ |
AnnaBridge | 171:3a7713b1edbc | 150 | bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */ |
AnnaBridge | 171:3a7713b1edbc | 151 | bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, |
AnnaBridge | 171:3a7713b1edbc | 152 | fast access requires the FlexIO clock to be at least |
AnnaBridge | 171:3a7713b1edbc | 153 | twice the frequency of the bus clock. */ |
AnnaBridge | 171:3a7713b1edbc | 154 | flexio_spi_clock_phase_t phase; /*!< Clock phase. */ |
AnnaBridge | 171:3a7713b1edbc | 155 | flexio_spi_data_bitcount_mode_t dataMode; /*!< 8bit or 16bit mode. */ |
AnnaBridge | 171:3a7713b1edbc | 156 | } flexio_spi_slave_config_t; |
AnnaBridge | 171:3a7713b1edbc | 157 | |
AnnaBridge | 171:3a7713b1edbc | 158 | /*! @brief Define FlexIO SPI transfer structure. */ |
AnnaBridge | 171:3a7713b1edbc | 159 | typedef struct _flexio_spi_transfer |
AnnaBridge | 171:3a7713b1edbc | 160 | { |
AnnaBridge | 171:3a7713b1edbc | 161 | uint8_t *txData; /*!< Send buffer. */ |
AnnaBridge | 171:3a7713b1edbc | 162 | uint8_t *rxData; /*!< Receive buffer. */ |
AnnaBridge | 171:3a7713b1edbc | 163 | size_t dataSize; /*!< Transfer bytes. */ |
AnnaBridge | 171:3a7713b1edbc | 164 | uint8_t flags; /*!< FlexIO SPI control flag, MSB first or LSB first. */ |
AnnaBridge | 171:3a7713b1edbc | 165 | } flexio_spi_transfer_t; |
AnnaBridge | 171:3a7713b1edbc | 166 | |
AnnaBridge | 171:3a7713b1edbc | 167 | /*! @brief typedef for flexio_spi_master_handle_t in advance. */ |
AnnaBridge | 171:3a7713b1edbc | 168 | typedef struct _flexio_spi_master_handle flexio_spi_master_handle_t; |
AnnaBridge | 171:3a7713b1edbc | 169 | |
AnnaBridge | 171:3a7713b1edbc | 170 | /*! @brief Slave handle is the same with master handle. */ |
AnnaBridge | 171:3a7713b1edbc | 171 | typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t; |
AnnaBridge | 171:3a7713b1edbc | 172 | |
AnnaBridge | 171:3a7713b1edbc | 173 | /*! @brief FlexIO SPI master callback for finished transmit */ |
AnnaBridge | 171:3a7713b1edbc | 174 | typedef void (*flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 175 | flexio_spi_master_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 176 | status_t status, |
AnnaBridge | 171:3a7713b1edbc | 177 | void *userData); |
AnnaBridge | 171:3a7713b1edbc | 178 | |
AnnaBridge | 171:3a7713b1edbc | 179 | /*! @brief FlexIO SPI slave callback for finished transmit */ |
AnnaBridge | 171:3a7713b1edbc | 180 | typedef void (*flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 181 | flexio_spi_slave_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 182 | status_t status, |
AnnaBridge | 171:3a7713b1edbc | 183 | void *userData); |
AnnaBridge | 171:3a7713b1edbc | 184 | |
AnnaBridge | 171:3a7713b1edbc | 185 | /*! @brief Define FlexIO SPI handle structure. */ |
AnnaBridge | 171:3a7713b1edbc | 186 | struct _flexio_spi_master_handle |
AnnaBridge | 171:3a7713b1edbc | 187 | { |
AnnaBridge | 171:3a7713b1edbc | 188 | uint8_t *txData; /*!< Transfer buffer. */ |
AnnaBridge | 171:3a7713b1edbc | 189 | uint8_t *rxData; /*!< Receive buffer. */ |
AnnaBridge | 171:3a7713b1edbc | 190 | size_t transferSize; /*!< Total bytes to be transferred. */ |
AnnaBridge | 171:3a7713b1edbc | 191 | volatile size_t txRemainingBytes; /*!< Send data remaining in bytes. */ |
AnnaBridge | 171:3a7713b1edbc | 192 | volatile size_t rxRemainingBytes; /*!< Receive data remaining in bytes. */ |
AnnaBridge | 171:3a7713b1edbc | 193 | volatile uint32_t state; /*!< FlexIO SPI internal state. */ |
AnnaBridge | 171:3a7713b1edbc | 194 | uint8_t bytePerFrame; /*!< SPI mode, 2bytes or 1byte in a frame */ |
AnnaBridge | 171:3a7713b1edbc | 195 | flexio_spi_shift_direction_t direction; /*!< Shift direction. */ |
AnnaBridge | 171:3a7713b1edbc | 196 | flexio_spi_master_transfer_callback_t callback; /*!< FlexIO SPI callback. */ |
AnnaBridge | 171:3a7713b1edbc | 197 | void *userData; /*!< Callback parameter. */ |
AnnaBridge | 171:3a7713b1edbc | 198 | }; |
AnnaBridge | 171:3a7713b1edbc | 199 | |
AnnaBridge | 171:3a7713b1edbc | 200 | /******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 201 | * API |
AnnaBridge | 171:3a7713b1edbc | 202 | ******************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 203 | |
AnnaBridge | 171:3a7713b1edbc | 204 | #if defined(__cplusplus) |
AnnaBridge | 171:3a7713b1edbc | 205 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 206 | #endif /*_cplusplus*/ |
AnnaBridge | 171:3a7713b1edbc | 207 | |
AnnaBridge | 171:3a7713b1edbc | 208 | /*! |
AnnaBridge | 171:3a7713b1edbc | 209 | * @name FlexIO SPI Configuration |
AnnaBridge | 171:3a7713b1edbc | 210 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 211 | */ |
AnnaBridge | 171:3a7713b1edbc | 212 | |
AnnaBridge | 171:3a7713b1edbc | 213 | /*! |
AnnaBridge | 171:3a7713b1edbc | 214 | * @brief Ungates the FlexIO clock, resets the FlexIO module and configures the FlexIO SPI master hardware, |
AnnaBridge | 171:3a7713b1edbc | 215 | * and configures the FlexIO SPI with FlexIO SPI master configuration. The |
AnnaBridge | 171:3a7713b1edbc | 216 | * configuration structure can be filled by the user, or be set with default values |
AnnaBridge | 171:3a7713b1edbc | 217 | * by the FLEXIO_SPI_MasterGetDefaultConfig(). |
AnnaBridge | 171:3a7713b1edbc | 218 | * |
AnnaBridge | 171:3a7713b1edbc | 219 | * @note FlexIO SPI master only support CPOL = 0, which means clock inactive low. |
AnnaBridge | 171:3a7713b1edbc | 220 | * |
AnnaBridge | 171:3a7713b1edbc | 221 | * Example |
AnnaBridge | 171:3a7713b1edbc | 222 | @code |
AnnaBridge | 171:3a7713b1edbc | 223 | FLEXIO_SPI_Type spiDev = { |
AnnaBridge | 171:3a7713b1edbc | 224 | .flexioBase = FLEXIO, |
AnnaBridge | 171:3a7713b1edbc | 225 | .SDOPinIndex = 0, |
AnnaBridge | 171:3a7713b1edbc | 226 | .SDIPinIndex = 1, |
AnnaBridge | 171:3a7713b1edbc | 227 | .SCKPinIndex = 2, |
AnnaBridge | 171:3a7713b1edbc | 228 | .CSnPinIndex = 3, |
AnnaBridge | 171:3a7713b1edbc | 229 | .shifterIndex = {0,1}, |
AnnaBridge | 171:3a7713b1edbc | 230 | .timerIndex = {0,1} |
AnnaBridge | 171:3a7713b1edbc | 231 | }; |
AnnaBridge | 171:3a7713b1edbc | 232 | flexio_spi_master_config_t config = { |
AnnaBridge | 171:3a7713b1edbc | 233 | .enableMaster = true, |
AnnaBridge | 171:3a7713b1edbc | 234 | .enableInDoze = false, |
AnnaBridge | 171:3a7713b1edbc | 235 | .enableInDebug = true, |
AnnaBridge | 171:3a7713b1edbc | 236 | .enableFastAccess = false, |
AnnaBridge | 171:3a7713b1edbc | 237 | .baudRate_Bps = 500000, |
AnnaBridge | 171:3a7713b1edbc | 238 | .phase = kFLEXIO_SPI_ClockPhaseFirstEdge, |
AnnaBridge | 171:3a7713b1edbc | 239 | .direction = kFLEXIO_SPI_MsbFirst, |
AnnaBridge | 171:3a7713b1edbc | 240 | .dataMode = kFLEXIO_SPI_8BitMode |
AnnaBridge | 171:3a7713b1edbc | 241 | }; |
AnnaBridge | 171:3a7713b1edbc | 242 | FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz); |
AnnaBridge | 171:3a7713b1edbc | 243 | @endcode |
AnnaBridge | 171:3a7713b1edbc | 244 | * |
AnnaBridge | 171:3a7713b1edbc | 245 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 246 | * @param masterConfig Pointer to the flexio_spi_master_config_t structure. |
AnnaBridge | 171:3a7713b1edbc | 247 | * @param srcClock_Hz FlexIO source clock in Hz. |
AnnaBridge | 171:3a7713b1edbc | 248 | */ |
AnnaBridge | 171:3a7713b1edbc | 249 | void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz); |
AnnaBridge | 171:3a7713b1edbc | 250 | |
AnnaBridge | 171:3a7713b1edbc | 251 | /*! |
AnnaBridge | 171:3a7713b1edbc | 252 | * @brief Gates the FlexIO clock. |
AnnaBridge | 171:3a7713b1edbc | 253 | * |
AnnaBridge | 171:3a7713b1edbc | 254 | * @param base Pointer to the FLEXIO_SPI_Type. |
AnnaBridge | 171:3a7713b1edbc | 255 | */ |
AnnaBridge | 171:3a7713b1edbc | 256 | void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base); |
AnnaBridge | 171:3a7713b1edbc | 257 | |
AnnaBridge | 171:3a7713b1edbc | 258 | /*! |
AnnaBridge | 171:3a7713b1edbc | 259 | * @brief Gets the default configuration to configure the FlexIO SPI master. The configuration |
AnnaBridge | 171:3a7713b1edbc | 260 | * can be used directly by calling the FLEXIO_SPI_MasterConfigure(). |
AnnaBridge | 171:3a7713b1edbc | 261 | * Example: |
AnnaBridge | 171:3a7713b1edbc | 262 | @code |
AnnaBridge | 171:3a7713b1edbc | 263 | flexio_spi_master_config_t masterConfig; |
AnnaBridge | 171:3a7713b1edbc | 264 | FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig); |
AnnaBridge | 171:3a7713b1edbc | 265 | @endcode |
AnnaBridge | 171:3a7713b1edbc | 266 | * @param masterConfig Pointer to the flexio_spi_master_config_t structure. |
AnnaBridge | 171:3a7713b1edbc | 267 | */ |
AnnaBridge | 171:3a7713b1edbc | 268 | void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig); |
AnnaBridge | 171:3a7713b1edbc | 269 | |
AnnaBridge | 171:3a7713b1edbc | 270 | /*! |
AnnaBridge | 171:3a7713b1edbc | 271 | * @brief Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware |
AnnaBridge | 171:3a7713b1edbc | 272 | * configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration. The |
AnnaBridge | 171:3a7713b1edbc | 273 | * configuration structure can be filled by the user, or be set with default values |
AnnaBridge | 171:3a7713b1edbc | 274 | * by the FLEXIO_SPI_SlaveGetDefaultConfig(). |
AnnaBridge | 171:3a7713b1edbc | 275 | * |
AnnaBridge | 171:3a7713b1edbc | 276 | * @note Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored. |
AnnaBridge | 171:3a7713b1edbc | 277 | * FlexIO SPI slave only support CPOL = 0, which means clock inactive low. |
AnnaBridge | 171:3a7713b1edbc | 278 | * Example |
AnnaBridge | 171:3a7713b1edbc | 279 | @code |
AnnaBridge | 171:3a7713b1edbc | 280 | FLEXIO_SPI_Type spiDev = { |
AnnaBridge | 171:3a7713b1edbc | 281 | .flexioBase = FLEXIO, |
AnnaBridge | 171:3a7713b1edbc | 282 | .SDOPinIndex = 0, |
AnnaBridge | 171:3a7713b1edbc | 283 | .SDIPinIndex = 1, |
AnnaBridge | 171:3a7713b1edbc | 284 | .SCKPinIndex = 2, |
AnnaBridge | 171:3a7713b1edbc | 285 | .CSnPinIndex = 3, |
AnnaBridge | 171:3a7713b1edbc | 286 | .shifterIndex = {0,1}, |
AnnaBridge | 171:3a7713b1edbc | 287 | .timerIndex = {0} |
AnnaBridge | 171:3a7713b1edbc | 288 | }; |
AnnaBridge | 171:3a7713b1edbc | 289 | flexio_spi_slave_config_t config = { |
AnnaBridge | 171:3a7713b1edbc | 290 | .enableSlave = true, |
AnnaBridge | 171:3a7713b1edbc | 291 | .enableInDoze = false, |
AnnaBridge | 171:3a7713b1edbc | 292 | .enableInDebug = true, |
AnnaBridge | 171:3a7713b1edbc | 293 | .enableFastAccess = false, |
AnnaBridge | 171:3a7713b1edbc | 294 | .phase = kFLEXIO_SPI_ClockPhaseFirstEdge, |
AnnaBridge | 171:3a7713b1edbc | 295 | .direction = kFLEXIO_SPI_MsbFirst, |
AnnaBridge | 171:3a7713b1edbc | 296 | .dataMode = kFLEXIO_SPI_8BitMode |
AnnaBridge | 171:3a7713b1edbc | 297 | }; |
AnnaBridge | 171:3a7713b1edbc | 298 | FLEXIO_SPI_SlaveInit(&spiDev, &config); |
AnnaBridge | 171:3a7713b1edbc | 299 | @endcode |
AnnaBridge | 171:3a7713b1edbc | 300 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 301 | * @param slaveConfig Pointer to the flexio_spi_slave_config_t structure. |
AnnaBridge | 171:3a7713b1edbc | 302 | */ |
AnnaBridge | 171:3a7713b1edbc | 303 | void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig); |
AnnaBridge | 171:3a7713b1edbc | 304 | |
AnnaBridge | 171:3a7713b1edbc | 305 | /*! |
AnnaBridge | 171:3a7713b1edbc | 306 | * @brief Gates the FlexIO clock. |
AnnaBridge | 171:3a7713b1edbc | 307 | * |
AnnaBridge | 171:3a7713b1edbc | 308 | * @param base Pointer to the FLEXIO_SPI_Type. |
AnnaBridge | 171:3a7713b1edbc | 309 | */ |
AnnaBridge | 171:3a7713b1edbc | 310 | void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base); |
AnnaBridge | 171:3a7713b1edbc | 311 | |
AnnaBridge | 171:3a7713b1edbc | 312 | /*! |
AnnaBridge | 171:3a7713b1edbc | 313 | * @brief Gets the default configuration to configure the FlexIO SPI slave. The configuration |
AnnaBridge | 171:3a7713b1edbc | 314 | * can be used directly for calling the FLEXIO_SPI_SlaveConfigure(). |
AnnaBridge | 171:3a7713b1edbc | 315 | * Example: |
AnnaBridge | 171:3a7713b1edbc | 316 | @code |
AnnaBridge | 171:3a7713b1edbc | 317 | flexio_spi_slave_config_t slaveConfig; |
AnnaBridge | 171:3a7713b1edbc | 318 | FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig); |
AnnaBridge | 171:3a7713b1edbc | 319 | @endcode |
AnnaBridge | 171:3a7713b1edbc | 320 | * @param slaveConfig Pointer to the flexio_spi_slave_config_t structure. |
AnnaBridge | 171:3a7713b1edbc | 321 | */ |
AnnaBridge | 171:3a7713b1edbc | 322 | void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig); |
AnnaBridge | 171:3a7713b1edbc | 323 | |
AnnaBridge | 171:3a7713b1edbc | 324 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 325 | |
AnnaBridge | 171:3a7713b1edbc | 326 | /*! |
AnnaBridge | 171:3a7713b1edbc | 327 | * @name Status |
AnnaBridge | 171:3a7713b1edbc | 328 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 329 | */ |
AnnaBridge | 171:3a7713b1edbc | 330 | |
AnnaBridge | 171:3a7713b1edbc | 331 | /*! |
AnnaBridge | 171:3a7713b1edbc | 332 | * @brief Gets FlexIO SPI status flags. |
AnnaBridge | 171:3a7713b1edbc | 333 | * |
AnnaBridge | 171:3a7713b1edbc | 334 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 335 | * @return status flag; Use the status flag to AND the following flag mask and get the status. |
AnnaBridge | 171:3a7713b1edbc | 336 | * @arg kFLEXIO_SPI_TxEmptyFlag |
AnnaBridge | 171:3a7713b1edbc | 337 | * @arg kFLEXIO_SPI_RxEmptyFlag |
AnnaBridge | 171:3a7713b1edbc | 338 | */ |
AnnaBridge | 171:3a7713b1edbc | 339 | |
AnnaBridge | 171:3a7713b1edbc | 340 | uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base); |
AnnaBridge | 171:3a7713b1edbc | 341 | |
AnnaBridge | 171:3a7713b1edbc | 342 | /*! |
AnnaBridge | 171:3a7713b1edbc | 343 | * @brief Clears FlexIO SPI status flags. |
AnnaBridge | 171:3a7713b1edbc | 344 | * |
AnnaBridge | 171:3a7713b1edbc | 345 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 346 | * @param mask status flag |
AnnaBridge | 171:3a7713b1edbc | 347 | * The parameter can be any combination of the following values: |
AnnaBridge | 171:3a7713b1edbc | 348 | * @arg kFLEXIO_SPI_TxEmptyFlag |
AnnaBridge | 171:3a7713b1edbc | 349 | * @arg kFLEXIO_SPI_RxEmptyFlag |
AnnaBridge | 171:3a7713b1edbc | 350 | */ |
AnnaBridge | 171:3a7713b1edbc | 351 | |
AnnaBridge | 171:3a7713b1edbc | 352 | void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask); |
AnnaBridge | 171:3a7713b1edbc | 353 | |
AnnaBridge | 171:3a7713b1edbc | 354 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 355 | |
AnnaBridge | 171:3a7713b1edbc | 356 | /*! |
AnnaBridge | 171:3a7713b1edbc | 357 | * @name Interrupts |
AnnaBridge | 171:3a7713b1edbc | 358 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 359 | */ |
AnnaBridge | 171:3a7713b1edbc | 360 | |
AnnaBridge | 171:3a7713b1edbc | 361 | /*! |
AnnaBridge | 171:3a7713b1edbc | 362 | * @brief Enables the FlexIO SPI interrupt. |
AnnaBridge | 171:3a7713b1edbc | 363 | * |
AnnaBridge | 171:3a7713b1edbc | 364 | * This function enables the FlexIO SPI interrupt. |
AnnaBridge | 171:3a7713b1edbc | 365 | * |
AnnaBridge | 171:3a7713b1edbc | 366 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 367 | * @param mask interrupt source. The parameter can be any combination of the following values: |
AnnaBridge | 171:3a7713b1edbc | 368 | * @arg kFLEXIO_SPI_RxFullInterruptEnable |
AnnaBridge | 171:3a7713b1edbc | 369 | * @arg kFLEXIO_SPI_TxEmptyInterruptEnable |
AnnaBridge | 171:3a7713b1edbc | 370 | */ |
AnnaBridge | 171:3a7713b1edbc | 371 | void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask); |
AnnaBridge | 171:3a7713b1edbc | 372 | |
AnnaBridge | 171:3a7713b1edbc | 373 | /*! |
AnnaBridge | 171:3a7713b1edbc | 374 | * @brief Disables the FlexIO SPI interrupt. |
AnnaBridge | 171:3a7713b1edbc | 375 | * |
AnnaBridge | 171:3a7713b1edbc | 376 | * This function disables the FlexIO SPI interrupt. |
AnnaBridge | 171:3a7713b1edbc | 377 | * |
AnnaBridge | 171:3a7713b1edbc | 378 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 379 | * @param mask interrupt source The parameter can be any combination of the following values: |
AnnaBridge | 171:3a7713b1edbc | 380 | * @arg kFLEXIO_SPI_RxFullInterruptEnable |
AnnaBridge | 171:3a7713b1edbc | 381 | * @arg kFLEXIO_SPI_TxEmptyInterruptEnable |
AnnaBridge | 171:3a7713b1edbc | 382 | */ |
AnnaBridge | 171:3a7713b1edbc | 383 | void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask); |
AnnaBridge | 171:3a7713b1edbc | 384 | |
AnnaBridge | 171:3a7713b1edbc | 385 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 386 | |
AnnaBridge | 171:3a7713b1edbc | 387 | /*! |
AnnaBridge | 171:3a7713b1edbc | 388 | * @name DMA Control |
AnnaBridge | 171:3a7713b1edbc | 389 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 390 | */ |
AnnaBridge | 171:3a7713b1edbc | 391 | |
AnnaBridge | 171:3a7713b1edbc | 392 | /*! |
AnnaBridge | 171:3a7713b1edbc | 393 | * @brief Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA, |
AnnaBridge | 171:3a7713b1edbc | 394 | * which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn't trigger the DMA request. |
AnnaBridge | 171:3a7713b1edbc | 395 | * |
AnnaBridge | 171:3a7713b1edbc | 396 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 397 | * @param mask SPI DMA source. |
AnnaBridge | 171:3a7713b1edbc | 398 | * @param enable True means enable DMA, false means disable DMA. |
AnnaBridge | 171:3a7713b1edbc | 399 | */ |
AnnaBridge | 171:3a7713b1edbc | 400 | void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable); |
AnnaBridge | 171:3a7713b1edbc | 401 | |
AnnaBridge | 171:3a7713b1edbc | 402 | /*! |
AnnaBridge | 171:3a7713b1edbc | 403 | * @brief Gets the FlexIO SPI transmit data register address for MSB first transfer. |
AnnaBridge | 171:3a7713b1edbc | 404 | * |
AnnaBridge | 171:3a7713b1edbc | 405 | * This function returns the SPI data register address, which is mainly used by DMA/eDMA. |
AnnaBridge | 171:3a7713b1edbc | 406 | * |
AnnaBridge | 171:3a7713b1edbc | 407 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 408 | * @param direction Shift direction of MSB first or LSB first. |
AnnaBridge | 171:3a7713b1edbc | 409 | * @return FlexIO SPI transmit data register address. |
AnnaBridge | 171:3a7713b1edbc | 410 | */ |
AnnaBridge | 171:3a7713b1edbc | 411 | static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 412 | flexio_spi_shift_direction_t direction) |
AnnaBridge | 171:3a7713b1edbc | 413 | { |
AnnaBridge | 171:3a7713b1edbc | 414 | if (direction == kFLEXIO_SPI_MsbFirst) |
AnnaBridge | 171:3a7713b1edbc | 415 | { |
AnnaBridge | 171:3a7713b1edbc | 416 | return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped, |
AnnaBridge | 171:3a7713b1edbc | 417 | base->shifterIndex[0]) + |
AnnaBridge | 171:3a7713b1edbc | 418 | 3U; |
AnnaBridge | 171:3a7713b1edbc | 419 | } |
AnnaBridge | 171:3a7713b1edbc | 420 | else |
AnnaBridge | 171:3a7713b1edbc | 421 | { |
AnnaBridge | 171:3a7713b1edbc | 422 | return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[0]); |
AnnaBridge | 171:3a7713b1edbc | 423 | } |
AnnaBridge | 171:3a7713b1edbc | 424 | } |
AnnaBridge | 171:3a7713b1edbc | 425 | |
AnnaBridge | 171:3a7713b1edbc | 426 | /*! |
AnnaBridge | 171:3a7713b1edbc | 427 | * @brief Gets the FlexIO SPI receive data register address for the MSB first transfer. |
AnnaBridge | 171:3a7713b1edbc | 428 | * |
AnnaBridge | 171:3a7713b1edbc | 429 | * This function returns the SPI data register address, which is mainly used by DMA/eDMA. |
AnnaBridge | 171:3a7713b1edbc | 430 | * |
AnnaBridge | 171:3a7713b1edbc | 431 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 432 | * @param direction Shift direction of MSB first or LSB first. |
AnnaBridge | 171:3a7713b1edbc | 433 | * @return FlexIO SPI receive data register address. |
AnnaBridge | 171:3a7713b1edbc | 434 | */ |
AnnaBridge | 171:3a7713b1edbc | 435 | static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 436 | flexio_spi_shift_direction_t direction) |
AnnaBridge | 171:3a7713b1edbc | 437 | { |
AnnaBridge | 171:3a7713b1edbc | 438 | if (direction == kFLEXIO_SPI_MsbFirst) |
AnnaBridge | 171:3a7713b1edbc | 439 | { |
AnnaBridge | 171:3a7713b1edbc | 440 | return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped, base->shifterIndex[1]); |
AnnaBridge | 171:3a7713b1edbc | 441 | } |
AnnaBridge | 171:3a7713b1edbc | 442 | else |
AnnaBridge | 171:3a7713b1edbc | 443 | { |
AnnaBridge | 171:3a7713b1edbc | 444 | return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferByteSwapped, |
AnnaBridge | 171:3a7713b1edbc | 445 | base->shifterIndex[1]); |
AnnaBridge | 171:3a7713b1edbc | 446 | } |
AnnaBridge | 171:3a7713b1edbc | 447 | } |
AnnaBridge | 171:3a7713b1edbc | 448 | |
AnnaBridge | 171:3a7713b1edbc | 449 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 450 | |
AnnaBridge | 171:3a7713b1edbc | 451 | /*! |
AnnaBridge | 171:3a7713b1edbc | 452 | * @name Bus Operations |
AnnaBridge | 171:3a7713b1edbc | 453 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 454 | */ |
AnnaBridge | 171:3a7713b1edbc | 455 | |
AnnaBridge | 171:3a7713b1edbc | 456 | /*! |
AnnaBridge | 171:3a7713b1edbc | 457 | * @brief Enables/disables the FlexIO SPI module operation. |
AnnaBridge | 171:3a7713b1edbc | 458 | * |
AnnaBridge | 171:3a7713b1edbc | 459 | * @param base Pointer to the FLEXIO_SPI_Type. |
AnnaBridge | 171:3a7713b1edbc | 460 | * @param enable True to enable, false to disable. |
AnnaBridge | 171:3a7713b1edbc | 461 | */ |
AnnaBridge | 171:3a7713b1edbc | 462 | static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable) |
AnnaBridge | 171:3a7713b1edbc | 463 | { |
AnnaBridge | 171:3a7713b1edbc | 464 | if (enable) |
AnnaBridge | 171:3a7713b1edbc | 465 | { |
AnnaBridge | 171:3a7713b1edbc | 466 | base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK; |
AnnaBridge | 171:3a7713b1edbc | 467 | } |
AnnaBridge | 171:3a7713b1edbc | 468 | else |
AnnaBridge | 171:3a7713b1edbc | 469 | { |
AnnaBridge | 171:3a7713b1edbc | 470 | base->flexioBase->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK; |
AnnaBridge | 171:3a7713b1edbc | 471 | } |
AnnaBridge | 171:3a7713b1edbc | 472 | } |
AnnaBridge | 171:3a7713b1edbc | 473 | |
AnnaBridge | 171:3a7713b1edbc | 474 | /*! |
AnnaBridge | 171:3a7713b1edbc | 475 | * @brief Sets baud rate for the FlexIO SPI transfer, which is only used for the master. |
AnnaBridge | 171:3a7713b1edbc | 476 | * |
AnnaBridge | 171:3a7713b1edbc | 477 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 478 | * @param baudRate_Bps Baud Rate needed in Hz. |
AnnaBridge | 171:3a7713b1edbc | 479 | * @param srcClockHz SPI source clock frequency in Hz. |
AnnaBridge | 171:3a7713b1edbc | 480 | */ |
AnnaBridge | 171:3a7713b1edbc | 481 | void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz); |
AnnaBridge | 171:3a7713b1edbc | 482 | |
AnnaBridge | 171:3a7713b1edbc | 483 | /*! |
AnnaBridge | 171:3a7713b1edbc | 484 | * @brief Writes one byte of data, which is sent using the MSB method. |
AnnaBridge | 171:3a7713b1edbc | 485 | * |
AnnaBridge | 171:3a7713b1edbc | 486 | * @note This is a non-blocking API, which returns directly after the data is put into the |
AnnaBridge | 171:3a7713b1edbc | 487 | * data register but the data transfer is not finished on the bus. Ensure that |
AnnaBridge | 171:3a7713b1edbc | 488 | * the TxEmptyFlag is asserted before calling this API. |
AnnaBridge | 171:3a7713b1edbc | 489 | * |
AnnaBridge | 171:3a7713b1edbc | 490 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 491 | * @param direction Shift direction of MSB first or LSB first. |
AnnaBridge | 171:3a7713b1edbc | 492 | * @param data 8 bit/16 bit data. |
AnnaBridge | 171:3a7713b1edbc | 493 | */ |
AnnaBridge | 171:3a7713b1edbc | 494 | static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint16_t data) |
AnnaBridge | 171:3a7713b1edbc | 495 | { |
AnnaBridge | 171:3a7713b1edbc | 496 | if (direction == kFLEXIO_SPI_MsbFirst) |
AnnaBridge | 171:3a7713b1edbc | 497 | { |
AnnaBridge | 171:3a7713b1edbc | 498 | base->flexioBase->SHIFTBUFBBS[base->shifterIndex[0]] = data; |
AnnaBridge | 171:3a7713b1edbc | 499 | } |
AnnaBridge | 171:3a7713b1edbc | 500 | else |
AnnaBridge | 171:3a7713b1edbc | 501 | { |
AnnaBridge | 171:3a7713b1edbc | 502 | base->flexioBase->SHIFTBUF[base->shifterIndex[0]] = data; |
AnnaBridge | 171:3a7713b1edbc | 503 | } |
AnnaBridge | 171:3a7713b1edbc | 504 | } |
AnnaBridge | 171:3a7713b1edbc | 505 | |
AnnaBridge | 171:3a7713b1edbc | 506 | /*! |
AnnaBridge | 171:3a7713b1edbc | 507 | * @brief Reads 8 bit/16 bit data. |
AnnaBridge | 171:3a7713b1edbc | 508 | * |
AnnaBridge | 171:3a7713b1edbc | 509 | * @note This is a non-blocking API, which returns directly after the data is read from the |
AnnaBridge | 171:3a7713b1edbc | 510 | * data register. Ensure that the RxFullFlag is asserted before calling this API. |
AnnaBridge | 171:3a7713b1edbc | 511 | * |
AnnaBridge | 171:3a7713b1edbc | 512 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 513 | * @param direction Shift direction of MSB first or LSB first. |
AnnaBridge | 171:3a7713b1edbc | 514 | * @return 8 bit/16 bit data received. |
AnnaBridge | 171:3a7713b1edbc | 515 | */ |
AnnaBridge | 171:3a7713b1edbc | 516 | static inline uint16_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction) |
AnnaBridge | 171:3a7713b1edbc | 517 | { |
AnnaBridge | 171:3a7713b1edbc | 518 | if (direction == kFLEXIO_SPI_MsbFirst) |
AnnaBridge | 171:3a7713b1edbc | 519 | { |
AnnaBridge | 171:3a7713b1edbc | 520 | return base->flexioBase->SHIFTBUFBIS[base->shifterIndex[1]]; |
AnnaBridge | 171:3a7713b1edbc | 521 | } |
AnnaBridge | 171:3a7713b1edbc | 522 | else |
AnnaBridge | 171:3a7713b1edbc | 523 | { |
AnnaBridge | 171:3a7713b1edbc | 524 | return base->flexioBase->SHIFTBUFBYS[base->shifterIndex[1]]; |
AnnaBridge | 171:3a7713b1edbc | 525 | } |
AnnaBridge | 171:3a7713b1edbc | 526 | } |
AnnaBridge | 171:3a7713b1edbc | 527 | |
AnnaBridge | 171:3a7713b1edbc | 528 | /*! |
AnnaBridge | 171:3a7713b1edbc | 529 | * @brief Sends a buffer of data bytes. |
AnnaBridge | 171:3a7713b1edbc | 530 | * |
AnnaBridge | 171:3a7713b1edbc | 531 | * @note This function blocks using the polling method until all bytes have been sent. |
AnnaBridge | 171:3a7713b1edbc | 532 | * |
AnnaBridge | 171:3a7713b1edbc | 533 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 534 | * @param direction Shift direction of MSB first or LSB first. |
AnnaBridge | 171:3a7713b1edbc | 535 | * @param buffer The data bytes to send. |
AnnaBridge | 171:3a7713b1edbc | 536 | * @param size The number of data bytes to send. |
AnnaBridge | 171:3a7713b1edbc | 537 | */ |
AnnaBridge | 171:3a7713b1edbc | 538 | void FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 539 | flexio_spi_shift_direction_t direction, |
AnnaBridge | 171:3a7713b1edbc | 540 | const uint8_t *buffer, |
AnnaBridge | 171:3a7713b1edbc | 541 | size_t size); |
AnnaBridge | 171:3a7713b1edbc | 542 | |
AnnaBridge | 171:3a7713b1edbc | 543 | /*! |
AnnaBridge | 171:3a7713b1edbc | 544 | * @brief Receives a buffer of bytes. |
AnnaBridge | 171:3a7713b1edbc | 545 | * |
AnnaBridge | 171:3a7713b1edbc | 546 | * @note This function blocks using the polling method until all bytes have been received. |
AnnaBridge | 171:3a7713b1edbc | 547 | * |
AnnaBridge | 171:3a7713b1edbc | 548 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 549 | * @param direction Shift direction of MSB first or LSB first. |
AnnaBridge | 171:3a7713b1edbc | 550 | * @param buffer The buffer to store the received bytes. |
AnnaBridge | 171:3a7713b1edbc | 551 | * @param size The number of data bytes to be received. |
AnnaBridge | 171:3a7713b1edbc | 552 | * @param direction Shift direction of MSB first or LSB first. |
AnnaBridge | 171:3a7713b1edbc | 553 | */ |
AnnaBridge | 171:3a7713b1edbc | 554 | void FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 555 | flexio_spi_shift_direction_t direction, |
AnnaBridge | 171:3a7713b1edbc | 556 | uint8_t *buffer, |
AnnaBridge | 171:3a7713b1edbc | 557 | size_t size); |
AnnaBridge | 171:3a7713b1edbc | 558 | |
AnnaBridge | 171:3a7713b1edbc | 559 | /*! |
AnnaBridge | 171:3a7713b1edbc | 560 | * @brief Receives a buffer of bytes. |
AnnaBridge | 171:3a7713b1edbc | 561 | * |
AnnaBridge | 171:3a7713b1edbc | 562 | * @note This function blocks via polling until all bytes have been received. |
AnnaBridge | 171:3a7713b1edbc | 563 | * |
AnnaBridge | 171:3a7713b1edbc | 564 | * @param base pointer to FLEXIO_SPI_Type structure |
AnnaBridge | 171:3a7713b1edbc | 565 | * @param xfer FlexIO SPI transfer structure, see #flexio_spi_transfer_t. |
AnnaBridge | 171:3a7713b1edbc | 566 | */ |
AnnaBridge | 171:3a7713b1edbc | 567 | void FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer); |
AnnaBridge | 171:3a7713b1edbc | 568 | |
AnnaBridge | 171:3a7713b1edbc | 569 | /*Transactional APIs*/ |
AnnaBridge | 171:3a7713b1edbc | 570 | |
AnnaBridge | 171:3a7713b1edbc | 571 | /*! |
AnnaBridge | 171:3a7713b1edbc | 572 | * @name Transactional |
AnnaBridge | 171:3a7713b1edbc | 573 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 574 | */ |
AnnaBridge | 171:3a7713b1edbc | 575 | |
AnnaBridge | 171:3a7713b1edbc | 576 | /*! |
AnnaBridge | 171:3a7713b1edbc | 577 | * @brief Initializes the FlexIO SPI Master handle, which is used in transactional functions. |
AnnaBridge | 171:3a7713b1edbc | 578 | * |
AnnaBridge | 171:3a7713b1edbc | 579 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 580 | * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 581 | * @param callback The callback function. |
AnnaBridge | 171:3a7713b1edbc | 582 | * @param userData The parameter of the callback function. |
AnnaBridge | 171:3a7713b1edbc | 583 | * @retval kStatus_Success Successfully create the handle. |
AnnaBridge | 171:3a7713b1edbc | 584 | * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range. |
AnnaBridge | 171:3a7713b1edbc | 585 | */ |
AnnaBridge | 171:3a7713b1edbc | 586 | status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 587 | flexio_spi_master_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 588 | flexio_spi_master_transfer_callback_t callback, |
AnnaBridge | 171:3a7713b1edbc | 589 | void *userData); |
AnnaBridge | 171:3a7713b1edbc | 590 | |
AnnaBridge | 171:3a7713b1edbc | 591 | /*! |
AnnaBridge | 171:3a7713b1edbc | 592 | * @brief Master transfer data using IRQ. |
AnnaBridge | 171:3a7713b1edbc | 593 | * |
AnnaBridge | 171:3a7713b1edbc | 594 | * This function sends data using IRQ. This is a non-blocking function, which returns |
AnnaBridge | 171:3a7713b1edbc | 595 | * right away. When all data is sent out/received, the callback function is called. |
AnnaBridge | 171:3a7713b1edbc | 596 | * |
AnnaBridge | 171:3a7713b1edbc | 597 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 598 | * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 599 | * @param xfer FlexIO SPI transfer structure. See #flexio_spi_transfer_t. |
AnnaBridge | 171:3a7713b1edbc | 600 | * @retval kStatus_Success Successfully start a transfer. |
AnnaBridge | 171:3a7713b1edbc | 601 | * @retval kStatus_InvalidArgument Input argument is invalid. |
AnnaBridge | 171:3a7713b1edbc | 602 | * @retval kStatus_FLEXIO_SPI_Busy SPI is not idle, is running another transfer. |
AnnaBridge | 171:3a7713b1edbc | 603 | */ |
AnnaBridge | 171:3a7713b1edbc | 604 | status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 605 | flexio_spi_master_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 606 | flexio_spi_transfer_t *xfer); |
AnnaBridge | 171:3a7713b1edbc | 607 | |
AnnaBridge | 171:3a7713b1edbc | 608 | /*! |
AnnaBridge | 171:3a7713b1edbc | 609 | * @brief Aborts the master data transfer, which used IRQ. |
AnnaBridge | 171:3a7713b1edbc | 610 | * |
AnnaBridge | 171:3a7713b1edbc | 611 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 612 | * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 613 | */ |
AnnaBridge | 171:3a7713b1edbc | 614 | void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle); |
AnnaBridge | 171:3a7713b1edbc | 615 | |
AnnaBridge | 171:3a7713b1edbc | 616 | /*! |
AnnaBridge | 171:3a7713b1edbc | 617 | * @brief Gets the data transfer status which used IRQ. |
AnnaBridge | 171:3a7713b1edbc | 618 | * |
AnnaBridge | 171:3a7713b1edbc | 619 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 620 | * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 621 | * @param count Number of bytes transferred so far by the non-blocking transaction. |
AnnaBridge | 171:3a7713b1edbc | 622 | * @retval kStatus_InvalidArgument count is Invalid. |
AnnaBridge | 171:3a7713b1edbc | 623 | * @retval kStatus_Success Successfully return the count. |
AnnaBridge | 171:3a7713b1edbc | 624 | */ |
AnnaBridge | 171:3a7713b1edbc | 625 | status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count); |
AnnaBridge | 171:3a7713b1edbc | 626 | |
AnnaBridge | 171:3a7713b1edbc | 627 | /*! |
AnnaBridge | 171:3a7713b1edbc | 628 | * @brief FlexIO SPI master IRQ handler function. |
AnnaBridge | 171:3a7713b1edbc | 629 | * |
AnnaBridge | 171:3a7713b1edbc | 630 | * @param spiType Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 631 | * @param spiHandle Pointer to the flexio_spi_master_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 632 | */ |
AnnaBridge | 171:3a7713b1edbc | 633 | void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle); |
AnnaBridge | 171:3a7713b1edbc | 634 | |
AnnaBridge | 171:3a7713b1edbc | 635 | /*! |
AnnaBridge | 171:3a7713b1edbc | 636 | * @brief Initializes the FlexIO SPI Slave handle, which is used in transactional functions. |
AnnaBridge | 171:3a7713b1edbc | 637 | * |
AnnaBridge | 171:3a7713b1edbc | 638 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 639 | * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 640 | * @param callback The callback function. |
AnnaBridge | 171:3a7713b1edbc | 641 | * @param userData The parameter of the callback function. |
AnnaBridge | 171:3a7713b1edbc | 642 | * @retval kStatus_Success Successfully create the handle. |
AnnaBridge | 171:3a7713b1edbc | 643 | * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range. |
AnnaBridge | 171:3a7713b1edbc | 644 | */ |
AnnaBridge | 171:3a7713b1edbc | 645 | status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 646 | flexio_spi_slave_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 647 | flexio_spi_slave_transfer_callback_t callback, |
AnnaBridge | 171:3a7713b1edbc | 648 | void *userData); |
AnnaBridge | 171:3a7713b1edbc | 649 | |
AnnaBridge | 171:3a7713b1edbc | 650 | /*! |
AnnaBridge | 171:3a7713b1edbc | 651 | * @brief Slave transfer data using IRQ. |
AnnaBridge | 171:3a7713b1edbc | 652 | * |
AnnaBridge | 171:3a7713b1edbc | 653 | * This function sends data using IRQ. This is a non-blocking function, which returns |
AnnaBridge | 171:3a7713b1edbc | 654 | * right away. When all data is sent out/received, the callback function is called. |
AnnaBridge | 171:3a7713b1edbc | 655 | * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 656 | * |
AnnaBridge | 171:3a7713b1edbc | 657 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 658 | * @param xfer FlexIO SPI transfer structure. See #flexio_spi_transfer_t. |
AnnaBridge | 171:3a7713b1edbc | 659 | * @retval kStatus_Success Successfully start a transfer. |
AnnaBridge | 171:3a7713b1edbc | 660 | * @retval kStatus_InvalidArgument Input argument is invalid. |
AnnaBridge | 171:3a7713b1edbc | 661 | * @retval kStatus_FLEXIO_SPI_Busy SPI is not idle; it is running another transfer. |
AnnaBridge | 171:3a7713b1edbc | 662 | */ |
AnnaBridge | 171:3a7713b1edbc | 663 | status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 664 | flexio_spi_slave_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 665 | flexio_spi_transfer_t *xfer); |
AnnaBridge | 171:3a7713b1edbc | 666 | |
AnnaBridge | 171:3a7713b1edbc | 667 | /*! |
AnnaBridge | 171:3a7713b1edbc | 668 | * @brief Aborts the slave data transfer which used IRQ, share same API with master. |
AnnaBridge | 171:3a7713b1edbc | 669 | * |
AnnaBridge | 171:3a7713b1edbc | 670 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 671 | * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 672 | */ |
AnnaBridge | 171:3a7713b1edbc | 673 | static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle) |
AnnaBridge | 171:3a7713b1edbc | 674 | { |
AnnaBridge | 171:3a7713b1edbc | 675 | FLEXIO_SPI_MasterTransferAbort(base, handle); |
AnnaBridge | 171:3a7713b1edbc | 676 | } |
AnnaBridge | 171:3a7713b1edbc | 677 | /*! |
AnnaBridge | 171:3a7713b1edbc | 678 | * @brief Gets the data transfer status which used IRQ, share same API with master. |
AnnaBridge | 171:3a7713b1edbc | 679 | * |
AnnaBridge | 171:3a7713b1edbc | 680 | * @param base Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 681 | * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 682 | * @param count Number of bytes transferred so far by the non-blocking transaction. |
AnnaBridge | 171:3a7713b1edbc | 683 | * @retval kStatus_InvalidArgument count is Invalid. |
AnnaBridge | 171:3a7713b1edbc | 684 | * @retval kStatus_Success Successfully return the count. |
AnnaBridge | 171:3a7713b1edbc | 685 | */ |
AnnaBridge | 171:3a7713b1edbc | 686 | static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 687 | flexio_spi_slave_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 688 | size_t *count) |
AnnaBridge | 171:3a7713b1edbc | 689 | { |
AnnaBridge | 171:3a7713b1edbc | 690 | return FLEXIO_SPI_MasterTransferGetCount(base, handle, count); |
AnnaBridge | 171:3a7713b1edbc | 691 | } |
AnnaBridge | 171:3a7713b1edbc | 692 | |
AnnaBridge | 171:3a7713b1edbc | 693 | /*! |
AnnaBridge | 171:3a7713b1edbc | 694 | * @brief FlexIO SPI slave IRQ handler function. |
AnnaBridge | 171:3a7713b1edbc | 695 | * |
AnnaBridge | 171:3a7713b1edbc | 696 | * @param spiType Pointer to the FLEXIO_SPI_Type structure. |
AnnaBridge | 171:3a7713b1edbc | 697 | * @param spiHandle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state. |
AnnaBridge | 171:3a7713b1edbc | 698 | */ |
AnnaBridge | 171:3a7713b1edbc | 699 | void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle); |
AnnaBridge | 171:3a7713b1edbc | 700 | |
AnnaBridge | 171:3a7713b1edbc | 701 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 702 | |
AnnaBridge | 171:3a7713b1edbc | 703 | #if defined(__cplusplus) |
AnnaBridge | 171:3a7713b1edbc | 704 | } |
AnnaBridge | 171:3a7713b1edbc | 705 | #endif /*_cplusplus*/ |
AnnaBridge | 171:3a7713b1edbc | 706 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 707 | |
AnnaBridge | 171:3a7713b1edbc | 708 | #endif /*_FSL_FLEXIO_SPI_H_*/ |