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TARGET_FF_LPC546XX/TOOLCHAIN_GCC_ARM/fsl_usart.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 171:3a7713b1edbc | 1 | /* |
AnnaBridge | 171:3a7713b1edbc | 2 | * The Clear BSD License |
AnnaBridge | 171:3a7713b1edbc | 3 | * Copyright (c) 2016, Freescale Semiconductor, Inc. |
AnnaBridge | 171:3a7713b1edbc | 4 | * Copyright 2016-2017 NXP |
AnnaBridge | 171:3a7713b1edbc | 5 | * All rights reserved. |
AnnaBridge | 171:3a7713b1edbc | 6 | * |
AnnaBridge | 171:3a7713b1edbc | 7 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 8 | * are permitted (subject to the limitations in the disclaimer below) provided |
AnnaBridge | 171:3a7713b1edbc | 9 | * that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 171:3a7713b1edbc | 12 | * of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 171:3a7713b1edbc | 15 | * list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 171:3a7713b1edbc | 16 | * other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 17 | * |
AnnaBridge | 171:3a7713b1edbc | 18 | * o Neither the name of the copyright holder nor the names of its |
AnnaBridge | 171:3a7713b1edbc | 19 | * contributors may be used to endorse or promote products derived from this |
AnnaBridge | 171:3a7713b1edbc | 20 | * software without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. |
AnnaBridge | 171:3a7713b1edbc | 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 171:3a7713b1edbc | 24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 171:3a7713b1edbc | 25 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 171:3a7713b1edbc | 27 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 171:3a7713b1edbc | 28 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 171:3a7713b1edbc | 29 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 171:3a7713b1edbc | 30 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 171:3a7713b1edbc | 31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 171:3a7713b1edbc | 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 33 | */ |
AnnaBridge | 171:3a7713b1edbc | 34 | #ifndef _FSL_USART_H_ |
AnnaBridge | 171:3a7713b1edbc | 35 | #define _FSL_USART_H_ |
AnnaBridge | 171:3a7713b1edbc | 36 | |
AnnaBridge | 171:3a7713b1edbc | 37 | #include "fsl_common.h" |
AnnaBridge | 171:3a7713b1edbc | 38 | |
AnnaBridge | 171:3a7713b1edbc | 39 | /*! |
AnnaBridge | 171:3a7713b1edbc | 40 | * @addtogroup usart_driver |
AnnaBridge | 171:3a7713b1edbc | 41 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 42 | */ |
AnnaBridge | 171:3a7713b1edbc | 43 | |
AnnaBridge | 171:3a7713b1edbc | 44 | /******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 45 | * Definitions |
AnnaBridge | 171:3a7713b1edbc | 46 | ******************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 47 | |
AnnaBridge | 171:3a7713b1edbc | 48 | /*! @name Driver version */ |
AnnaBridge | 171:3a7713b1edbc | 49 | /*@{*/ |
AnnaBridge | 171:3a7713b1edbc | 50 | /*! @brief USART driver version 2.0.0. */ |
AnnaBridge | 171:3a7713b1edbc | 51 | #define FSL_USART_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) |
AnnaBridge | 171:3a7713b1edbc | 52 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 53 | |
AnnaBridge | 171:3a7713b1edbc | 54 | #define USART_FIFOTRIG_TXLVL_GET(base) (((base)->FIFOTRIG & USART_FIFOTRIG_TXLVL_MASK) >> USART_FIFOTRIG_TXLVL_SHIFT) |
AnnaBridge | 171:3a7713b1edbc | 55 | #define USART_FIFOTRIG_RXLVL_GET(base) (((base)->FIFOTRIG & USART_FIFOTRIG_RXLVL_MASK) >> USART_FIFOTRIG_RXLVL_SHIFT) |
AnnaBridge | 171:3a7713b1edbc | 56 | |
AnnaBridge | 171:3a7713b1edbc | 57 | /*! @brief Error codes for the USART driver. */ |
AnnaBridge | 171:3a7713b1edbc | 58 | enum _usart_status |
AnnaBridge | 171:3a7713b1edbc | 59 | { |
AnnaBridge | 171:3a7713b1edbc | 60 | kStatus_USART_TxBusy = MAKE_STATUS(kStatusGroup_LPC_USART, 0), /*!< Transmitter is busy. */ |
AnnaBridge | 171:3a7713b1edbc | 61 | kStatus_USART_RxBusy = MAKE_STATUS(kStatusGroup_LPC_USART, 1), /*!< Receiver is busy. */ |
AnnaBridge | 171:3a7713b1edbc | 62 | kStatus_USART_TxIdle = MAKE_STATUS(kStatusGroup_LPC_USART, 2), /*!< USART transmitter is idle. */ |
AnnaBridge | 171:3a7713b1edbc | 63 | kStatus_USART_RxIdle = MAKE_STATUS(kStatusGroup_LPC_USART, 3), /*!< USART receiver is idle. */ |
AnnaBridge | 171:3a7713b1edbc | 64 | kStatus_USART_TxError = MAKE_STATUS(kStatusGroup_LPC_USART, 7), /*!< Error happens on txFIFO. */ |
AnnaBridge | 171:3a7713b1edbc | 65 | kStatus_USART_RxError = MAKE_STATUS(kStatusGroup_LPC_USART, 9), /*!< Error happens on rxFIFO. */ |
AnnaBridge | 171:3a7713b1edbc | 66 | kStatus_USART_RxRingBufferOverrun = MAKE_STATUS(kStatusGroup_LPC_USART, 8), /*!< Error happens on rx ring buffer */ |
AnnaBridge | 171:3a7713b1edbc | 67 | kStatus_USART_NoiseError = MAKE_STATUS(kStatusGroup_LPC_USART, 10), /*!< USART noise error. */ |
AnnaBridge | 171:3a7713b1edbc | 68 | kStatus_USART_FramingError = MAKE_STATUS(kStatusGroup_LPC_USART, 11), /*!< USART framing error. */ |
AnnaBridge | 171:3a7713b1edbc | 69 | kStatus_USART_ParityError = MAKE_STATUS(kStatusGroup_LPC_USART, 12), /*!< USART parity error. */ |
AnnaBridge | 171:3a7713b1edbc | 70 | kStatus_USART_BaudrateNotSupport = |
AnnaBridge | 171:3a7713b1edbc | 71 | MAKE_STATUS(kStatusGroup_LPC_USART, 13), /*!< Baudrate is not support in current clock source */ |
AnnaBridge | 171:3a7713b1edbc | 72 | }; |
AnnaBridge | 171:3a7713b1edbc | 73 | |
AnnaBridge | 171:3a7713b1edbc | 74 | /*! @brief USART parity mode. */ |
AnnaBridge | 171:3a7713b1edbc | 75 | typedef enum _usart_parity_mode |
AnnaBridge | 171:3a7713b1edbc | 76 | { |
AnnaBridge | 171:3a7713b1edbc | 77 | kUSART_ParityDisabled = 0x0U, /*!< Parity disabled */ |
AnnaBridge | 171:3a7713b1edbc | 78 | kUSART_ParityEven = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */ |
AnnaBridge | 171:3a7713b1edbc | 79 | kUSART_ParityOdd = 0x3U, /*!< Parity enabled, type odd, bit setting: PE|PT = 11 */ |
AnnaBridge | 171:3a7713b1edbc | 80 | } usart_parity_mode_t; |
AnnaBridge | 171:3a7713b1edbc | 81 | |
AnnaBridge | 171:3a7713b1edbc | 82 | /*! @brief USART stop bit count. */ |
AnnaBridge | 171:3a7713b1edbc | 83 | typedef enum _usart_stop_bit_count |
AnnaBridge | 171:3a7713b1edbc | 84 | { |
AnnaBridge | 171:3a7713b1edbc | 85 | kUSART_OneStopBit = 0U, /*!< One stop bit */ |
AnnaBridge | 171:3a7713b1edbc | 86 | kUSART_TwoStopBit = 1U, /*!< Two stop bits */ |
AnnaBridge | 171:3a7713b1edbc | 87 | } usart_stop_bit_count_t; |
AnnaBridge | 171:3a7713b1edbc | 88 | |
AnnaBridge | 171:3a7713b1edbc | 89 | /*! @brief USART data size. */ |
AnnaBridge | 171:3a7713b1edbc | 90 | typedef enum _usart_data_len |
AnnaBridge | 171:3a7713b1edbc | 91 | { |
AnnaBridge | 171:3a7713b1edbc | 92 | kUSART_7BitsPerChar = 0U, /*!< Seven bit mode */ |
AnnaBridge | 171:3a7713b1edbc | 93 | kUSART_8BitsPerChar = 1U, /*!< Eight bit mode */ |
AnnaBridge | 171:3a7713b1edbc | 94 | } usart_data_len_t; |
AnnaBridge | 171:3a7713b1edbc | 95 | |
AnnaBridge | 171:3a7713b1edbc | 96 | /*! @brief txFIFO watermark values */ |
AnnaBridge | 171:3a7713b1edbc | 97 | typedef enum _usart_txfifo_watermark |
AnnaBridge | 171:3a7713b1edbc | 98 | { |
AnnaBridge | 171:3a7713b1edbc | 99 | kUSART_TxFifo0 = 0, /*!< USART tx watermark is empty */ |
AnnaBridge | 171:3a7713b1edbc | 100 | kUSART_TxFifo1 = 1, /*!< USART tx watermark at 1 item */ |
AnnaBridge | 171:3a7713b1edbc | 101 | kUSART_TxFifo2 = 2, /*!< USART tx watermark at 2 items */ |
AnnaBridge | 171:3a7713b1edbc | 102 | kUSART_TxFifo3 = 3, /*!< USART tx watermark at 3 items */ |
AnnaBridge | 171:3a7713b1edbc | 103 | kUSART_TxFifo4 = 4, /*!< USART tx watermark at 4 items */ |
AnnaBridge | 171:3a7713b1edbc | 104 | kUSART_TxFifo5 = 5, /*!< USART tx watermark at 5 items */ |
AnnaBridge | 171:3a7713b1edbc | 105 | kUSART_TxFifo6 = 6, /*!< USART tx watermark at 6 items */ |
AnnaBridge | 171:3a7713b1edbc | 106 | kUSART_TxFifo7 = 7, /*!< USART tx watermark at 7 items */ |
AnnaBridge | 171:3a7713b1edbc | 107 | } usart_txfifo_watermark_t; |
AnnaBridge | 171:3a7713b1edbc | 108 | |
AnnaBridge | 171:3a7713b1edbc | 109 | /*! @brief rxFIFO watermark values */ |
AnnaBridge | 171:3a7713b1edbc | 110 | typedef enum _usart_rxfifo_watermark |
AnnaBridge | 171:3a7713b1edbc | 111 | { |
AnnaBridge | 171:3a7713b1edbc | 112 | kUSART_RxFifo1 = 0, /*!< USART rx watermark at 1 item */ |
AnnaBridge | 171:3a7713b1edbc | 113 | kUSART_RxFifo2 = 1, /*!< USART rx watermark at 2 items */ |
AnnaBridge | 171:3a7713b1edbc | 114 | kUSART_RxFifo3 = 2, /*!< USART rx watermark at 3 items */ |
AnnaBridge | 171:3a7713b1edbc | 115 | kUSART_RxFifo4 = 3, /*!< USART rx watermark at 4 items */ |
AnnaBridge | 171:3a7713b1edbc | 116 | kUSART_RxFifo5 = 4, /*!< USART rx watermark at 5 items */ |
AnnaBridge | 171:3a7713b1edbc | 117 | kUSART_RxFifo6 = 5, /*!< USART rx watermark at 6 items */ |
AnnaBridge | 171:3a7713b1edbc | 118 | kUSART_RxFifo7 = 6, /*!< USART rx watermark at 7 items */ |
AnnaBridge | 171:3a7713b1edbc | 119 | kUSART_RxFifo8 = 7, /*!< USART rx watermark at 8 items */ |
AnnaBridge | 171:3a7713b1edbc | 120 | } usart_rxfifo_watermark_t; |
AnnaBridge | 171:3a7713b1edbc | 121 | |
AnnaBridge | 171:3a7713b1edbc | 122 | /*! |
AnnaBridge | 171:3a7713b1edbc | 123 | * @brief USART interrupt configuration structure, default settings all disabled. |
AnnaBridge | 171:3a7713b1edbc | 124 | */ |
AnnaBridge | 171:3a7713b1edbc | 125 | enum _usart_interrupt_enable |
AnnaBridge | 171:3a7713b1edbc | 126 | { |
AnnaBridge | 171:3a7713b1edbc | 127 | kUSART_TxErrorInterruptEnable = (USART_FIFOINTENSET_TXERR_MASK), |
AnnaBridge | 171:3a7713b1edbc | 128 | kUSART_RxErrorInterruptEnable = (USART_FIFOINTENSET_RXERR_MASK), |
AnnaBridge | 171:3a7713b1edbc | 129 | kUSART_TxLevelInterruptEnable = (USART_FIFOINTENSET_TXLVL_MASK), |
AnnaBridge | 171:3a7713b1edbc | 130 | kUSART_RxLevelInterruptEnable = (USART_FIFOINTENSET_RXLVL_MASK), |
AnnaBridge | 171:3a7713b1edbc | 131 | }; |
AnnaBridge | 171:3a7713b1edbc | 132 | |
AnnaBridge | 171:3a7713b1edbc | 133 | /*! |
AnnaBridge | 171:3a7713b1edbc | 134 | * @brief USART status flags. |
AnnaBridge | 171:3a7713b1edbc | 135 | * |
AnnaBridge | 171:3a7713b1edbc | 136 | * This provides constants for the USART status flags for use in the USART functions. |
AnnaBridge | 171:3a7713b1edbc | 137 | */ |
AnnaBridge | 171:3a7713b1edbc | 138 | enum _usart_flags |
AnnaBridge | 171:3a7713b1edbc | 139 | { |
AnnaBridge | 171:3a7713b1edbc | 140 | kUSART_TxError = (USART_FIFOSTAT_TXERR_MASK), /*!< TEERR bit, sets if TX buffer is error */ |
AnnaBridge | 171:3a7713b1edbc | 141 | kUSART_RxError = (USART_FIFOSTAT_RXERR_MASK), /*!< RXERR bit, sets if RX buffer is error */ |
AnnaBridge | 171:3a7713b1edbc | 142 | kUSART_TxFifoEmptyFlag = (USART_FIFOSTAT_TXEMPTY_MASK), /*!< TXEMPTY bit, sets if TX buffer is empty */ |
AnnaBridge | 171:3a7713b1edbc | 143 | kUSART_TxFifoNotFullFlag = (USART_FIFOSTAT_TXNOTFULL_MASK), /*!< TXNOTFULL bit, sets if TX buffer is not full */ |
AnnaBridge | 171:3a7713b1edbc | 144 | kUSART_RxFifoNotEmptyFlag = (USART_FIFOSTAT_RXNOTEMPTY_MASK), /*!< RXNOEMPTY bit, sets if RX buffer is not empty */ |
AnnaBridge | 171:3a7713b1edbc | 145 | kUSART_RxFifoFullFlag = (USART_FIFOSTAT_RXFULL_MASK), /*!< RXFULL bit, sets if RX buffer is full */ |
AnnaBridge | 171:3a7713b1edbc | 146 | }; |
AnnaBridge | 171:3a7713b1edbc | 147 | |
AnnaBridge | 171:3a7713b1edbc | 148 | /*! @brief USART configuration structure. */ |
AnnaBridge | 171:3a7713b1edbc | 149 | typedef struct _usart_config |
AnnaBridge | 171:3a7713b1edbc | 150 | { |
AnnaBridge | 171:3a7713b1edbc | 151 | uint32_t baudRate_Bps; /*!< USART baud rate */ |
AnnaBridge | 171:3a7713b1edbc | 152 | usart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */ |
AnnaBridge | 171:3a7713b1edbc | 153 | usart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */ |
AnnaBridge | 171:3a7713b1edbc | 154 | usart_data_len_t bitCountPerChar; /*!< Data length - 7 bit, 8 bit */ |
AnnaBridge | 171:3a7713b1edbc | 155 | bool loopback; /*!< Enable peripheral loopback */ |
AnnaBridge | 171:3a7713b1edbc | 156 | bool enableRx; /*!< Enable RX */ |
AnnaBridge | 171:3a7713b1edbc | 157 | bool enableTx; /*!< Enable TX */ |
AnnaBridge | 171:3a7713b1edbc | 158 | usart_txfifo_watermark_t txWatermark; /*!< txFIFO watermark */ |
AnnaBridge | 171:3a7713b1edbc | 159 | usart_rxfifo_watermark_t rxWatermark; /*!< rxFIFO watermark */ |
AnnaBridge | 171:3a7713b1edbc | 160 | } usart_config_t; |
AnnaBridge | 171:3a7713b1edbc | 161 | |
AnnaBridge | 171:3a7713b1edbc | 162 | /*! @brief USART transfer structure. */ |
AnnaBridge | 171:3a7713b1edbc | 163 | typedef struct _usart_transfer |
AnnaBridge | 171:3a7713b1edbc | 164 | { |
AnnaBridge | 171:3a7713b1edbc | 165 | uint8_t *data; /*!< The buffer of data to be transfer.*/ |
AnnaBridge | 171:3a7713b1edbc | 166 | size_t dataSize; /*!< The byte count to be transfer. */ |
AnnaBridge | 171:3a7713b1edbc | 167 | } usart_transfer_t; |
AnnaBridge | 171:3a7713b1edbc | 168 | |
AnnaBridge | 171:3a7713b1edbc | 169 | /* Forward declaration of the handle typedef. */ |
AnnaBridge | 171:3a7713b1edbc | 170 | typedef struct _usart_handle usart_handle_t; |
AnnaBridge | 171:3a7713b1edbc | 171 | |
AnnaBridge | 171:3a7713b1edbc | 172 | /*! @brief USART transfer callback function. */ |
AnnaBridge | 171:3a7713b1edbc | 173 | typedef void (*usart_transfer_callback_t)(USART_Type *base, usart_handle_t *handle, status_t status, void *userData); |
AnnaBridge | 171:3a7713b1edbc | 174 | |
AnnaBridge | 171:3a7713b1edbc | 175 | /*! @brief USART handle structure. */ |
AnnaBridge | 171:3a7713b1edbc | 176 | struct _usart_handle |
AnnaBridge | 171:3a7713b1edbc | 177 | { |
AnnaBridge | 171:3a7713b1edbc | 178 | uint8_t *volatile txData; /*!< Address of remaining data to send. */ |
AnnaBridge | 171:3a7713b1edbc | 179 | volatile size_t txDataSize; /*!< Size of the remaining data to send. */ |
AnnaBridge | 171:3a7713b1edbc | 180 | size_t txDataSizeAll; /*!< Size of the data to send out. */ |
AnnaBridge | 171:3a7713b1edbc | 181 | uint8_t *volatile rxData; /*!< Address of remaining data to receive. */ |
AnnaBridge | 171:3a7713b1edbc | 182 | volatile size_t rxDataSize; /*!< Size of the remaining data to receive. */ |
AnnaBridge | 171:3a7713b1edbc | 183 | size_t rxDataSizeAll; /*!< Size of the data to receive. */ |
AnnaBridge | 171:3a7713b1edbc | 184 | |
AnnaBridge | 171:3a7713b1edbc | 185 | uint8_t *rxRingBuffer; /*!< Start address of the receiver ring buffer. */ |
AnnaBridge | 171:3a7713b1edbc | 186 | size_t rxRingBufferSize; /*!< Size of the ring buffer. */ |
AnnaBridge | 171:3a7713b1edbc | 187 | volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */ |
AnnaBridge | 171:3a7713b1edbc | 188 | volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */ |
AnnaBridge | 171:3a7713b1edbc | 189 | |
AnnaBridge | 171:3a7713b1edbc | 190 | usart_transfer_callback_t callback; /*!< Callback function. */ |
AnnaBridge | 171:3a7713b1edbc | 191 | void *userData; /*!< USART callback function parameter.*/ |
AnnaBridge | 171:3a7713b1edbc | 192 | |
AnnaBridge | 171:3a7713b1edbc | 193 | volatile uint8_t txState; /*!< TX transfer state. */ |
AnnaBridge | 171:3a7713b1edbc | 194 | volatile uint8_t rxState; /*!< RX transfer state */ |
AnnaBridge | 171:3a7713b1edbc | 195 | |
AnnaBridge | 171:3a7713b1edbc | 196 | usart_txfifo_watermark_t txWatermark; /*!< txFIFO watermark */ |
AnnaBridge | 171:3a7713b1edbc | 197 | usart_rxfifo_watermark_t rxWatermark; /*!< rxFIFO watermark */ |
AnnaBridge | 171:3a7713b1edbc | 198 | }; |
AnnaBridge | 171:3a7713b1edbc | 199 | |
AnnaBridge | 171:3a7713b1edbc | 200 | /******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 201 | * API |
AnnaBridge | 171:3a7713b1edbc | 202 | ******************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 203 | |
AnnaBridge | 171:3a7713b1edbc | 204 | #if defined(__cplusplus) |
AnnaBridge | 171:3a7713b1edbc | 205 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 206 | #endif /* _cplusplus */ |
AnnaBridge | 171:3a7713b1edbc | 207 | |
AnnaBridge | 171:3a7713b1edbc | 208 | /*! @brief Returns instance number for USART peripheral base address. */ |
AnnaBridge | 171:3a7713b1edbc | 209 | uint32_t USART_GetInstance(USART_Type *base); |
AnnaBridge | 171:3a7713b1edbc | 210 | |
AnnaBridge | 171:3a7713b1edbc | 211 | /*! |
AnnaBridge | 171:3a7713b1edbc | 212 | * @name Initialization and deinitialization |
AnnaBridge | 171:3a7713b1edbc | 213 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 214 | */ |
AnnaBridge | 171:3a7713b1edbc | 215 | |
AnnaBridge | 171:3a7713b1edbc | 216 | /*! |
AnnaBridge | 171:3a7713b1edbc | 217 | * @brief Initializes a USART instance with user configuration structure and peripheral clock. |
AnnaBridge | 171:3a7713b1edbc | 218 | * |
AnnaBridge | 171:3a7713b1edbc | 219 | * This function configures the USART module with the user-defined settings. The user can configure the configuration |
AnnaBridge | 171:3a7713b1edbc | 220 | * structure and also get the default configuration by using the USART_GetDefaultConfig() function. |
AnnaBridge | 171:3a7713b1edbc | 221 | * Example below shows how to use this API to configure USART. |
AnnaBridge | 171:3a7713b1edbc | 222 | * @code |
AnnaBridge | 171:3a7713b1edbc | 223 | * usart_config_t usartConfig; |
AnnaBridge | 171:3a7713b1edbc | 224 | * usartConfig.baudRate_Bps = 115200U; |
AnnaBridge | 171:3a7713b1edbc | 225 | * usartConfig.parityMode = kUSART_ParityDisabled; |
AnnaBridge | 171:3a7713b1edbc | 226 | * usartConfig.stopBitCount = kUSART_OneStopBit; |
AnnaBridge | 171:3a7713b1edbc | 227 | * USART_Init(USART1, &usartConfig, 20000000U); |
AnnaBridge | 171:3a7713b1edbc | 228 | * @endcode |
AnnaBridge | 171:3a7713b1edbc | 229 | * |
AnnaBridge | 171:3a7713b1edbc | 230 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 231 | * @param config Pointer to user-defined configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 232 | * @param srcClock_Hz USART clock source frequency in HZ. |
AnnaBridge | 171:3a7713b1edbc | 233 | * @retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source. |
AnnaBridge | 171:3a7713b1edbc | 234 | * @retval kStatus_InvalidArgument USART base address is not valid |
AnnaBridge | 171:3a7713b1edbc | 235 | * @retval kStatus_Success Status USART initialize succeed |
AnnaBridge | 171:3a7713b1edbc | 236 | */ |
AnnaBridge | 171:3a7713b1edbc | 237 | status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz); |
AnnaBridge | 171:3a7713b1edbc | 238 | |
AnnaBridge | 171:3a7713b1edbc | 239 | /*! |
AnnaBridge | 171:3a7713b1edbc | 240 | * @brief Deinitializes a USART instance. |
AnnaBridge | 171:3a7713b1edbc | 241 | * |
AnnaBridge | 171:3a7713b1edbc | 242 | * This function waits for TX complete, disables TX and RX, and disables the USART clock. |
AnnaBridge | 171:3a7713b1edbc | 243 | * |
AnnaBridge | 171:3a7713b1edbc | 244 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 245 | */ |
AnnaBridge | 171:3a7713b1edbc | 246 | void USART_Deinit(USART_Type *base); |
AnnaBridge | 171:3a7713b1edbc | 247 | |
AnnaBridge | 171:3a7713b1edbc | 248 | /*! |
AnnaBridge | 171:3a7713b1edbc | 249 | * @brief Gets the default configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 250 | * |
AnnaBridge | 171:3a7713b1edbc | 251 | * This function initializes the USART configuration structure to a default value. The default |
AnnaBridge | 171:3a7713b1edbc | 252 | * values are: |
AnnaBridge | 171:3a7713b1edbc | 253 | * usartConfig->baudRate_Bps = 115200U; |
AnnaBridge | 171:3a7713b1edbc | 254 | * usartConfig->parityMode = kUSART_ParityDisabled; |
AnnaBridge | 171:3a7713b1edbc | 255 | * usartConfig->stopBitCount = kUSART_OneStopBit; |
AnnaBridge | 171:3a7713b1edbc | 256 | * usartConfig->bitCountPerChar = kUSART_8BitsPerChar; |
AnnaBridge | 171:3a7713b1edbc | 257 | * usartConfig->loopback = false; |
AnnaBridge | 171:3a7713b1edbc | 258 | * usartConfig->enableTx = false; |
AnnaBridge | 171:3a7713b1edbc | 259 | * usartConfig->enableRx = false; |
AnnaBridge | 171:3a7713b1edbc | 260 | * |
AnnaBridge | 171:3a7713b1edbc | 261 | * @param config Pointer to configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 262 | */ |
AnnaBridge | 171:3a7713b1edbc | 263 | void USART_GetDefaultConfig(usart_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 264 | |
AnnaBridge | 171:3a7713b1edbc | 265 | /*! |
AnnaBridge | 171:3a7713b1edbc | 266 | * @brief Sets the USART instance baud rate. |
AnnaBridge | 171:3a7713b1edbc | 267 | * |
AnnaBridge | 171:3a7713b1edbc | 268 | * This function configures the USART module baud rate. This function is used to update |
AnnaBridge | 171:3a7713b1edbc | 269 | * the USART module baud rate after the USART module is initialized by the USART_Init. |
AnnaBridge | 171:3a7713b1edbc | 270 | * @code |
AnnaBridge | 171:3a7713b1edbc | 271 | * USART_SetBaudRate(USART1, 115200U, 20000000U); |
AnnaBridge | 171:3a7713b1edbc | 272 | * @endcode |
AnnaBridge | 171:3a7713b1edbc | 273 | * |
AnnaBridge | 171:3a7713b1edbc | 274 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 275 | * @param baudrate_Bps USART baudrate to be set. |
AnnaBridge | 171:3a7713b1edbc | 276 | * @param srcClock_Hz USART clock source freqency in HZ. |
AnnaBridge | 171:3a7713b1edbc | 277 | * @retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source. |
AnnaBridge | 171:3a7713b1edbc | 278 | * @retval kStatus_Success Set baudrate succeed. |
AnnaBridge | 171:3a7713b1edbc | 279 | * @retval kStatus_InvalidArgument One or more arguments are invalid. |
AnnaBridge | 171:3a7713b1edbc | 280 | */ |
AnnaBridge | 171:3a7713b1edbc | 281 | status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz); |
AnnaBridge | 171:3a7713b1edbc | 282 | |
AnnaBridge | 171:3a7713b1edbc | 283 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 284 | |
AnnaBridge | 171:3a7713b1edbc | 285 | /*! |
AnnaBridge | 171:3a7713b1edbc | 286 | * @name Status |
AnnaBridge | 171:3a7713b1edbc | 287 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 288 | */ |
AnnaBridge | 171:3a7713b1edbc | 289 | |
AnnaBridge | 171:3a7713b1edbc | 290 | /*! |
AnnaBridge | 171:3a7713b1edbc | 291 | * @brief Get USART status flags. |
AnnaBridge | 171:3a7713b1edbc | 292 | * |
AnnaBridge | 171:3a7713b1edbc | 293 | * This function get all USART status flags, the flags are returned as the logical |
AnnaBridge | 171:3a7713b1edbc | 294 | * OR value of the enumerators @ref _usart_flags. To check a specific status, |
AnnaBridge | 171:3a7713b1edbc | 295 | * compare the return value with enumerators in @ref _usart_flags. |
AnnaBridge | 171:3a7713b1edbc | 296 | * For example, to check whether the TX is empty: |
AnnaBridge | 171:3a7713b1edbc | 297 | * @code |
AnnaBridge | 171:3a7713b1edbc | 298 | * if (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(USART1)) |
AnnaBridge | 171:3a7713b1edbc | 299 | * { |
AnnaBridge | 171:3a7713b1edbc | 300 | * ... |
AnnaBridge | 171:3a7713b1edbc | 301 | * } |
AnnaBridge | 171:3a7713b1edbc | 302 | * @endcode |
AnnaBridge | 171:3a7713b1edbc | 303 | * |
AnnaBridge | 171:3a7713b1edbc | 304 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 305 | * @return USART status flags which are ORed by the enumerators in the _usart_flags. |
AnnaBridge | 171:3a7713b1edbc | 306 | */ |
AnnaBridge | 171:3a7713b1edbc | 307 | static inline uint32_t USART_GetStatusFlags(USART_Type *base) |
AnnaBridge | 171:3a7713b1edbc | 308 | { |
AnnaBridge | 171:3a7713b1edbc | 309 | return base->FIFOSTAT; |
AnnaBridge | 171:3a7713b1edbc | 310 | } |
AnnaBridge | 171:3a7713b1edbc | 311 | |
AnnaBridge | 171:3a7713b1edbc | 312 | /*! |
AnnaBridge | 171:3a7713b1edbc | 313 | * @brief Clear USART status flags. |
AnnaBridge | 171:3a7713b1edbc | 314 | * |
AnnaBridge | 171:3a7713b1edbc | 315 | * This function clear supported USART status flags |
AnnaBridge | 171:3a7713b1edbc | 316 | * Flags that can be cleared or set are: |
AnnaBridge | 171:3a7713b1edbc | 317 | * kUSART_TxError |
AnnaBridge | 171:3a7713b1edbc | 318 | * kUSART_RxError |
AnnaBridge | 171:3a7713b1edbc | 319 | * For example: |
AnnaBridge | 171:3a7713b1edbc | 320 | * @code |
AnnaBridge | 171:3a7713b1edbc | 321 | * USART_ClearStatusFlags(USART1, kUSART_TxError | kUSART_RxError) |
AnnaBridge | 171:3a7713b1edbc | 322 | * @endcode |
AnnaBridge | 171:3a7713b1edbc | 323 | * |
AnnaBridge | 171:3a7713b1edbc | 324 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 325 | * @param mask status flags to be cleared. |
AnnaBridge | 171:3a7713b1edbc | 326 | */ |
AnnaBridge | 171:3a7713b1edbc | 327 | static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask) |
AnnaBridge | 171:3a7713b1edbc | 328 | { |
AnnaBridge | 171:3a7713b1edbc | 329 | /* Only TXERR, RXERR fields support write. Remaining fields should be set to zero */ |
AnnaBridge | 171:3a7713b1edbc | 330 | base->FIFOSTAT = mask & (USART_FIFOSTAT_TXERR_MASK | USART_FIFOSTAT_RXERR_MASK); |
AnnaBridge | 171:3a7713b1edbc | 331 | } |
AnnaBridge | 171:3a7713b1edbc | 332 | |
AnnaBridge | 171:3a7713b1edbc | 333 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 334 | |
AnnaBridge | 171:3a7713b1edbc | 335 | /*! |
AnnaBridge | 171:3a7713b1edbc | 336 | * @name Interrupts |
AnnaBridge | 171:3a7713b1edbc | 337 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 338 | */ |
AnnaBridge | 171:3a7713b1edbc | 339 | |
AnnaBridge | 171:3a7713b1edbc | 340 | /*! |
AnnaBridge | 171:3a7713b1edbc | 341 | * @brief Enables USART interrupts according to the provided mask. |
AnnaBridge | 171:3a7713b1edbc | 342 | * |
AnnaBridge | 171:3a7713b1edbc | 343 | * This function enables the USART interrupts according to the provided mask. The mask |
AnnaBridge | 171:3a7713b1edbc | 344 | * is a logical OR of enumeration members. See @ref _usart_interrupt_enable. |
AnnaBridge | 171:3a7713b1edbc | 345 | * For example, to enable TX empty interrupt and RX full interrupt: |
AnnaBridge | 171:3a7713b1edbc | 346 | * @code |
AnnaBridge | 171:3a7713b1edbc | 347 | * USART_EnableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable); |
AnnaBridge | 171:3a7713b1edbc | 348 | * @endcode |
AnnaBridge | 171:3a7713b1edbc | 349 | * |
AnnaBridge | 171:3a7713b1edbc | 350 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 351 | * @param mask The interrupts to enable. Logical OR of @ref _usart_interrupt_enable. |
AnnaBridge | 171:3a7713b1edbc | 352 | */ |
AnnaBridge | 171:3a7713b1edbc | 353 | static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask) |
AnnaBridge | 171:3a7713b1edbc | 354 | { |
AnnaBridge | 171:3a7713b1edbc | 355 | base->FIFOINTENSET = mask & 0xF; |
AnnaBridge | 171:3a7713b1edbc | 356 | } |
AnnaBridge | 171:3a7713b1edbc | 357 | |
AnnaBridge | 171:3a7713b1edbc | 358 | /*! |
AnnaBridge | 171:3a7713b1edbc | 359 | * @brief Disables USART interrupts according to a provided mask. |
AnnaBridge | 171:3a7713b1edbc | 360 | * |
AnnaBridge | 171:3a7713b1edbc | 361 | * This function disables the USART interrupts according to a provided mask. The mask |
AnnaBridge | 171:3a7713b1edbc | 362 | * is a logical OR of enumeration members. See @ref _usart_interrupt_enable. |
AnnaBridge | 171:3a7713b1edbc | 363 | * This example shows how to disable the TX empty interrupt and RX full interrupt: |
AnnaBridge | 171:3a7713b1edbc | 364 | * @code |
AnnaBridge | 171:3a7713b1edbc | 365 | * USART_DisableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable); |
AnnaBridge | 171:3a7713b1edbc | 366 | * @endcode |
AnnaBridge | 171:3a7713b1edbc | 367 | * |
AnnaBridge | 171:3a7713b1edbc | 368 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 369 | * @param mask The interrupts to disable. Logical OR of @ref _usart_interrupt_enable. |
AnnaBridge | 171:3a7713b1edbc | 370 | */ |
AnnaBridge | 171:3a7713b1edbc | 371 | static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask) |
AnnaBridge | 171:3a7713b1edbc | 372 | { |
AnnaBridge | 171:3a7713b1edbc | 373 | base->FIFOINTENCLR = mask & 0xF; |
AnnaBridge | 171:3a7713b1edbc | 374 | } |
AnnaBridge | 171:3a7713b1edbc | 375 | |
AnnaBridge | 171:3a7713b1edbc | 376 | /*! |
AnnaBridge | 171:3a7713b1edbc | 377 | * @brief Returns enabled USART interrupts. |
AnnaBridge | 171:3a7713b1edbc | 378 | * |
AnnaBridge | 171:3a7713b1edbc | 379 | * This function returns the enabled USART interrupts. |
AnnaBridge | 171:3a7713b1edbc | 380 | * |
AnnaBridge | 171:3a7713b1edbc | 381 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 382 | */ |
AnnaBridge | 171:3a7713b1edbc | 383 | static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base) |
AnnaBridge | 171:3a7713b1edbc | 384 | { |
AnnaBridge | 171:3a7713b1edbc | 385 | return base->FIFOINTENSET; |
AnnaBridge | 171:3a7713b1edbc | 386 | } |
AnnaBridge | 171:3a7713b1edbc | 387 | |
AnnaBridge | 171:3a7713b1edbc | 388 | /*! |
AnnaBridge | 171:3a7713b1edbc | 389 | * @brief Enable DMA for Tx |
AnnaBridge | 171:3a7713b1edbc | 390 | */ |
AnnaBridge | 171:3a7713b1edbc | 391 | static inline void USART_EnableTxDMA(USART_Type *base, bool enable) |
AnnaBridge | 171:3a7713b1edbc | 392 | { |
AnnaBridge | 171:3a7713b1edbc | 393 | if (enable) |
AnnaBridge | 171:3a7713b1edbc | 394 | { |
AnnaBridge | 171:3a7713b1edbc | 395 | base->FIFOCFG |= USART_FIFOCFG_DMATX_MASK; |
AnnaBridge | 171:3a7713b1edbc | 396 | } |
AnnaBridge | 171:3a7713b1edbc | 397 | else |
AnnaBridge | 171:3a7713b1edbc | 398 | { |
AnnaBridge | 171:3a7713b1edbc | 399 | base->FIFOCFG &= ~(USART_FIFOCFG_DMATX_MASK); |
AnnaBridge | 171:3a7713b1edbc | 400 | } |
AnnaBridge | 171:3a7713b1edbc | 401 | } |
AnnaBridge | 171:3a7713b1edbc | 402 | |
AnnaBridge | 171:3a7713b1edbc | 403 | /*! |
AnnaBridge | 171:3a7713b1edbc | 404 | * @brief Enable DMA for Rx |
AnnaBridge | 171:3a7713b1edbc | 405 | */ |
AnnaBridge | 171:3a7713b1edbc | 406 | static inline void USART_EnableRxDMA(USART_Type *base, bool enable) |
AnnaBridge | 171:3a7713b1edbc | 407 | { |
AnnaBridge | 171:3a7713b1edbc | 408 | if (enable) |
AnnaBridge | 171:3a7713b1edbc | 409 | { |
AnnaBridge | 171:3a7713b1edbc | 410 | base->FIFOCFG |= USART_FIFOCFG_DMARX_MASK; |
AnnaBridge | 171:3a7713b1edbc | 411 | } |
AnnaBridge | 171:3a7713b1edbc | 412 | else |
AnnaBridge | 171:3a7713b1edbc | 413 | { |
AnnaBridge | 171:3a7713b1edbc | 414 | base->FIFOCFG &= ~(USART_FIFOCFG_DMARX_MASK); |
AnnaBridge | 171:3a7713b1edbc | 415 | } |
AnnaBridge | 171:3a7713b1edbc | 416 | } |
AnnaBridge | 171:3a7713b1edbc | 417 | |
AnnaBridge | 171:3a7713b1edbc | 418 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 419 | |
AnnaBridge | 171:3a7713b1edbc | 420 | /*! |
AnnaBridge | 171:3a7713b1edbc | 421 | * @name Bus Operations |
AnnaBridge | 171:3a7713b1edbc | 422 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 423 | */ |
AnnaBridge | 171:3a7713b1edbc | 424 | |
AnnaBridge | 171:3a7713b1edbc | 425 | /*! |
AnnaBridge | 171:3a7713b1edbc | 426 | * @brief Writes to the FIFOWR register. |
AnnaBridge | 171:3a7713b1edbc | 427 | * |
AnnaBridge | 171:3a7713b1edbc | 428 | * This function writes data to the txFIFO directly. The upper layer must ensure |
AnnaBridge | 171:3a7713b1edbc | 429 | * that txFIFO has space for data to write before calling this function. |
AnnaBridge | 171:3a7713b1edbc | 430 | * |
AnnaBridge | 171:3a7713b1edbc | 431 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 432 | * @param data The byte to write. |
AnnaBridge | 171:3a7713b1edbc | 433 | */ |
AnnaBridge | 171:3a7713b1edbc | 434 | static inline void USART_WriteByte(USART_Type *base, uint8_t data) |
AnnaBridge | 171:3a7713b1edbc | 435 | { |
AnnaBridge | 171:3a7713b1edbc | 436 | base->FIFOWR = data; |
AnnaBridge | 171:3a7713b1edbc | 437 | } |
AnnaBridge | 171:3a7713b1edbc | 438 | |
AnnaBridge | 171:3a7713b1edbc | 439 | /*! |
AnnaBridge | 171:3a7713b1edbc | 440 | * @brief Reads the FIFORD register directly. |
AnnaBridge | 171:3a7713b1edbc | 441 | * |
AnnaBridge | 171:3a7713b1edbc | 442 | * This function reads data from the rxFIFO directly. The upper layer must |
AnnaBridge | 171:3a7713b1edbc | 443 | * ensure that the rxFIFO is not empty before calling this function. |
AnnaBridge | 171:3a7713b1edbc | 444 | * |
AnnaBridge | 171:3a7713b1edbc | 445 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 446 | * @return The byte read from USART data register. |
AnnaBridge | 171:3a7713b1edbc | 447 | */ |
AnnaBridge | 171:3a7713b1edbc | 448 | static inline uint8_t USART_ReadByte(USART_Type *base) |
AnnaBridge | 171:3a7713b1edbc | 449 | { |
AnnaBridge | 171:3a7713b1edbc | 450 | return base->FIFORD; |
AnnaBridge | 171:3a7713b1edbc | 451 | } |
AnnaBridge | 171:3a7713b1edbc | 452 | |
AnnaBridge | 171:3a7713b1edbc | 453 | /*! |
AnnaBridge | 171:3a7713b1edbc | 454 | * @brief Writes to the TX register using a blocking method. |
AnnaBridge | 171:3a7713b1edbc | 455 | * |
AnnaBridge | 171:3a7713b1edbc | 456 | * This function polls the TX register, waits for the TX register to be empty or for the TX FIFO |
AnnaBridge | 171:3a7713b1edbc | 457 | * to have room and writes data to the TX buffer. |
AnnaBridge | 171:3a7713b1edbc | 458 | * |
AnnaBridge | 171:3a7713b1edbc | 459 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 460 | * @param data Start address of the data to write. |
AnnaBridge | 171:3a7713b1edbc | 461 | * @param length Size of the data to write. |
AnnaBridge | 171:3a7713b1edbc | 462 | */ |
AnnaBridge | 171:3a7713b1edbc | 463 | void USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length); |
AnnaBridge | 171:3a7713b1edbc | 464 | |
AnnaBridge | 171:3a7713b1edbc | 465 | /*! |
AnnaBridge | 171:3a7713b1edbc | 466 | * @brief Read RX data register using a blocking method. |
AnnaBridge | 171:3a7713b1edbc | 467 | * |
AnnaBridge | 171:3a7713b1edbc | 468 | * This function polls the RX register, waits for the RX register to be full or for RX FIFO to |
AnnaBridge | 171:3a7713b1edbc | 469 | * have data and read data from the TX register. |
AnnaBridge | 171:3a7713b1edbc | 470 | * |
AnnaBridge | 171:3a7713b1edbc | 471 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 472 | * @param data Start address of the buffer to store the received data. |
AnnaBridge | 171:3a7713b1edbc | 473 | * @param length Size of the buffer. |
AnnaBridge | 171:3a7713b1edbc | 474 | * @retval kStatus_USART_FramingError Receiver overrun happened while receiving data. |
AnnaBridge | 171:3a7713b1edbc | 475 | * @retval kStatus_USART_ParityError Noise error happened while receiving data. |
AnnaBridge | 171:3a7713b1edbc | 476 | * @retval kStatus_USART_NoiseError Framing error happened while receiving data. |
AnnaBridge | 171:3a7713b1edbc | 477 | * @retval kStatus_USART_RxError Overflow or underflow rxFIFO happened. |
AnnaBridge | 171:3a7713b1edbc | 478 | * @retval kStatus_Success Successfully received all data. |
AnnaBridge | 171:3a7713b1edbc | 479 | */ |
AnnaBridge | 171:3a7713b1edbc | 480 | status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length); |
AnnaBridge | 171:3a7713b1edbc | 481 | |
AnnaBridge | 171:3a7713b1edbc | 482 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 483 | |
AnnaBridge | 171:3a7713b1edbc | 484 | /*! |
AnnaBridge | 171:3a7713b1edbc | 485 | * @name Transactional |
AnnaBridge | 171:3a7713b1edbc | 486 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 487 | */ |
AnnaBridge | 171:3a7713b1edbc | 488 | |
AnnaBridge | 171:3a7713b1edbc | 489 | /*! |
AnnaBridge | 171:3a7713b1edbc | 490 | * @brief Initializes the USART handle. |
AnnaBridge | 171:3a7713b1edbc | 491 | * |
AnnaBridge | 171:3a7713b1edbc | 492 | * This function initializes the USART handle which can be used for other USART |
AnnaBridge | 171:3a7713b1edbc | 493 | * transactional APIs. Usually, for a specified USART instance, |
AnnaBridge | 171:3a7713b1edbc | 494 | * call this API once to get the initialized handle. |
AnnaBridge | 171:3a7713b1edbc | 495 | * |
AnnaBridge | 171:3a7713b1edbc | 496 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 497 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 498 | * @param callback The callback function. |
AnnaBridge | 171:3a7713b1edbc | 499 | * @param userData The parameter of the callback function. |
AnnaBridge | 171:3a7713b1edbc | 500 | */ |
AnnaBridge | 171:3a7713b1edbc | 501 | status_t USART_TransferCreateHandle(USART_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 502 | usart_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 503 | usart_transfer_callback_t callback, |
AnnaBridge | 171:3a7713b1edbc | 504 | void *userData); |
AnnaBridge | 171:3a7713b1edbc | 505 | |
AnnaBridge | 171:3a7713b1edbc | 506 | /*! |
AnnaBridge | 171:3a7713b1edbc | 507 | * @brief Transmits a buffer of data using the interrupt method. |
AnnaBridge | 171:3a7713b1edbc | 508 | * |
AnnaBridge | 171:3a7713b1edbc | 509 | * This function sends data using an interrupt method. This is a non-blocking function, which |
AnnaBridge | 171:3a7713b1edbc | 510 | * returns directly without waiting for all data to be written to the TX register. When |
AnnaBridge | 171:3a7713b1edbc | 511 | * all data is written to the TX register in the IRQ handler, the USART driver calls the callback |
AnnaBridge | 171:3a7713b1edbc | 512 | * function and passes the @ref kStatus_USART_TxIdle as status parameter. |
AnnaBridge | 171:3a7713b1edbc | 513 | * |
AnnaBridge | 171:3a7713b1edbc | 514 | * @note The kStatus_USART_TxIdle is passed to the upper layer when all data is written |
AnnaBridge | 171:3a7713b1edbc | 515 | * to the TX register. However it does not ensure that all data are sent out. Before disabling the TX, |
AnnaBridge | 171:3a7713b1edbc | 516 | * check the kUSART_TransmissionCompleteFlag to ensure that the TX is finished. |
AnnaBridge | 171:3a7713b1edbc | 517 | * |
AnnaBridge | 171:3a7713b1edbc | 518 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 519 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 520 | * @param xfer USART transfer structure. See #usart_transfer_t. |
AnnaBridge | 171:3a7713b1edbc | 521 | * @retval kStatus_Success Successfully start the data transmission. |
AnnaBridge | 171:3a7713b1edbc | 522 | * @retval kStatus_USART_TxBusy Previous transmission still not finished, data not all written to TX register yet. |
AnnaBridge | 171:3a7713b1edbc | 523 | * @retval kStatus_InvalidArgument Invalid argument. |
AnnaBridge | 171:3a7713b1edbc | 524 | */ |
AnnaBridge | 171:3a7713b1edbc | 525 | status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer); |
AnnaBridge | 171:3a7713b1edbc | 526 | |
AnnaBridge | 171:3a7713b1edbc | 527 | /*! |
AnnaBridge | 171:3a7713b1edbc | 528 | * @brief Sets up the RX ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 529 | * |
AnnaBridge | 171:3a7713b1edbc | 530 | * This function sets up the RX ring buffer to a specific USART handle. |
AnnaBridge | 171:3a7713b1edbc | 531 | * |
AnnaBridge | 171:3a7713b1edbc | 532 | * When the RX ring buffer is used, data received are stored into the ring buffer even when the |
AnnaBridge | 171:3a7713b1edbc | 533 | * user doesn't call the USART_TransferReceiveNonBlocking() API. If there is already data received |
AnnaBridge | 171:3a7713b1edbc | 534 | * in the ring buffer, the user can get the received data from the ring buffer directly. |
AnnaBridge | 171:3a7713b1edbc | 535 | * |
AnnaBridge | 171:3a7713b1edbc | 536 | * @note When using the RX ring buffer, one byte is reserved for internal use. In other |
AnnaBridge | 171:3a7713b1edbc | 537 | * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data. |
AnnaBridge | 171:3a7713b1edbc | 538 | * |
AnnaBridge | 171:3a7713b1edbc | 539 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 540 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 541 | * @param ringBuffer Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 542 | * @param ringBufferSize size of the ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 543 | */ |
AnnaBridge | 171:3a7713b1edbc | 544 | void USART_TransferStartRingBuffer(USART_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 545 | usart_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 546 | uint8_t *ringBuffer, |
AnnaBridge | 171:3a7713b1edbc | 547 | size_t ringBufferSize); |
AnnaBridge | 171:3a7713b1edbc | 548 | |
AnnaBridge | 171:3a7713b1edbc | 549 | /*! |
AnnaBridge | 171:3a7713b1edbc | 550 | * @brief Aborts the background transfer and uninstalls the ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 551 | * |
AnnaBridge | 171:3a7713b1edbc | 552 | * This function aborts the background transfer and uninstalls the ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 553 | * |
AnnaBridge | 171:3a7713b1edbc | 554 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 555 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 556 | */ |
AnnaBridge | 171:3a7713b1edbc | 557 | void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle); |
AnnaBridge | 171:3a7713b1edbc | 558 | |
AnnaBridge | 171:3a7713b1edbc | 559 | /*! |
AnnaBridge | 171:3a7713b1edbc | 560 | * @brief Get the length of received data in RX ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 561 | * |
AnnaBridge | 171:3a7713b1edbc | 562 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 563 | * @return Length of received data in RX ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 564 | */ |
AnnaBridge | 171:3a7713b1edbc | 565 | size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle); |
AnnaBridge | 171:3a7713b1edbc | 566 | |
AnnaBridge | 171:3a7713b1edbc | 567 | /*! |
AnnaBridge | 171:3a7713b1edbc | 568 | * @brief Aborts the interrupt-driven data transmit. |
AnnaBridge | 171:3a7713b1edbc | 569 | * |
AnnaBridge | 171:3a7713b1edbc | 570 | * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out |
AnnaBridge | 171:3a7713b1edbc | 571 | * how many bytes are still not sent out. |
AnnaBridge | 171:3a7713b1edbc | 572 | * |
AnnaBridge | 171:3a7713b1edbc | 573 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 574 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 575 | */ |
AnnaBridge | 171:3a7713b1edbc | 576 | void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle); |
AnnaBridge | 171:3a7713b1edbc | 577 | |
AnnaBridge | 171:3a7713b1edbc | 578 | /*! |
AnnaBridge | 171:3a7713b1edbc | 579 | * @brief Get the number of bytes that have been written to USART TX register. |
AnnaBridge | 171:3a7713b1edbc | 580 | * |
AnnaBridge | 171:3a7713b1edbc | 581 | * This function gets the number of bytes that have been written to USART TX |
AnnaBridge | 171:3a7713b1edbc | 582 | * register by interrupt method. |
AnnaBridge | 171:3a7713b1edbc | 583 | * |
AnnaBridge | 171:3a7713b1edbc | 584 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 585 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 586 | * @param count Send bytes count. |
AnnaBridge | 171:3a7713b1edbc | 587 | * @retval kStatus_NoTransferInProgress No send in progress. |
AnnaBridge | 171:3a7713b1edbc | 588 | * @retval kStatus_InvalidArgument Parameter is invalid. |
AnnaBridge | 171:3a7713b1edbc | 589 | * @retval kStatus_Success Get successfully through the parameter \p count; |
AnnaBridge | 171:3a7713b1edbc | 590 | */ |
AnnaBridge | 171:3a7713b1edbc | 591 | status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count); |
AnnaBridge | 171:3a7713b1edbc | 592 | |
AnnaBridge | 171:3a7713b1edbc | 593 | /*! |
AnnaBridge | 171:3a7713b1edbc | 594 | * @brief Receives a buffer of data using an interrupt method. |
AnnaBridge | 171:3a7713b1edbc | 595 | * |
AnnaBridge | 171:3a7713b1edbc | 596 | * This function receives data using an interrupt method. This is a non-blocking function, which |
AnnaBridge | 171:3a7713b1edbc | 597 | * returns without waiting for all data to be received. |
AnnaBridge | 171:3a7713b1edbc | 598 | * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and |
AnnaBridge | 171:3a7713b1edbc | 599 | * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 600 | * After copying, if the data in the ring buffer is not enough to read, the receive |
AnnaBridge | 171:3a7713b1edbc | 601 | * request is saved by the USART driver. When the new data arrives, the receive request |
AnnaBridge | 171:3a7713b1edbc | 602 | * is serviced first. When all data is received, the USART driver notifies the upper layer |
AnnaBridge | 171:3a7713b1edbc | 603 | * through a callback function and passes the status parameter @ref kStatus_USART_RxIdle. |
AnnaBridge | 171:3a7713b1edbc | 604 | * For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer. |
AnnaBridge | 171:3a7713b1edbc | 605 | * The 5 bytes are copied to the xfer->data and this function returns with the |
AnnaBridge | 171:3a7713b1edbc | 606 | * parameter @p receivedBytes set to 5. For the left 5 bytes, newly arrived data is |
AnnaBridge | 171:3a7713b1edbc | 607 | * saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer. |
AnnaBridge | 171:3a7713b1edbc | 608 | * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt |
AnnaBridge | 171:3a7713b1edbc | 609 | * to receive data to the xfer->data. When all data is received, the upper layer is notified. |
AnnaBridge | 171:3a7713b1edbc | 610 | * |
AnnaBridge | 171:3a7713b1edbc | 611 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 612 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 613 | * @param xfer USART transfer structure, see #usart_transfer_t. |
AnnaBridge | 171:3a7713b1edbc | 614 | * @param receivedBytes Bytes received from the ring buffer directly. |
AnnaBridge | 171:3a7713b1edbc | 615 | * @retval kStatus_Success Successfully queue the transfer into transmit queue. |
AnnaBridge | 171:3a7713b1edbc | 616 | * @retval kStatus_USART_RxBusy Previous receive request is not finished. |
AnnaBridge | 171:3a7713b1edbc | 617 | * @retval kStatus_InvalidArgument Invalid argument. |
AnnaBridge | 171:3a7713b1edbc | 618 | */ |
AnnaBridge | 171:3a7713b1edbc | 619 | status_t USART_TransferReceiveNonBlocking(USART_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 620 | usart_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 621 | usart_transfer_t *xfer, |
AnnaBridge | 171:3a7713b1edbc | 622 | size_t *receivedBytes); |
AnnaBridge | 171:3a7713b1edbc | 623 | |
AnnaBridge | 171:3a7713b1edbc | 624 | /*! |
AnnaBridge | 171:3a7713b1edbc | 625 | * @brief Aborts the interrupt-driven data receiving. |
AnnaBridge | 171:3a7713b1edbc | 626 | * |
AnnaBridge | 171:3a7713b1edbc | 627 | * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out |
AnnaBridge | 171:3a7713b1edbc | 628 | * how many bytes not received yet. |
AnnaBridge | 171:3a7713b1edbc | 629 | * |
AnnaBridge | 171:3a7713b1edbc | 630 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 631 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 632 | */ |
AnnaBridge | 171:3a7713b1edbc | 633 | void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle); |
AnnaBridge | 171:3a7713b1edbc | 634 | |
AnnaBridge | 171:3a7713b1edbc | 635 | /*! |
AnnaBridge | 171:3a7713b1edbc | 636 | * @brief Get the number of bytes that have been received. |
AnnaBridge | 171:3a7713b1edbc | 637 | * |
AnnaBridge | 171:3a7713b1edbc | 638 | * This function gets the number of bytes that have been received. |
AnnaBridge | 171:3a7713b1edbc | 639 | * |
AnnaBridge | 171:3a7713b1edbc | 640 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 641 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 642 | * @param count Receive bytes count. |
AnnaBridge | 171:3a7713b1edbc | 643 | * @retval kStatus_NoTransferInProgress No receive in progress. |
AnnaBridge | 171:3a7713b1edbc | 644 | * @retval kStatus_InvalidArgument Parameter is invalid. |
AnnaBridge | 171:3a7713b1edbc | 645 | * @retval kStatus_Success Get successfully through the parameter \p count; |
AnnaBridge | 171:3a7713b1edbc | 646 | */ |
AnnaBridge | 171:3a7713b1edbc | 647 | status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count); |
AnnaBridge | 171:3a7713b1edbc | 648 | |
AnnaBridge | 171:3a7713b1edbc | 649 | /*! |
AnnaBridge | 171:3a7713b1edbc | 650 | * @brief USART IRQ handle function. |
AnnaBridge | 171:3a7713b1edbc | 651 | * |
AnnaBridge | 171:3a7713b1edbc | 652 | * This function handles the USART transmit and receive IRQ request. |
AnnaBridge | 171:3a7713b1edbc | 653 | * |
AnnaBridge | 171:3a7713b1edbc | 654 | * @param base USART peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 655 | * @param handle USART handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 656 | */ |
AnnaBridge | 171:3a7713b1edbc | 657 | void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle); |
AnnaBridge | 171:3a7713b1edbc | 658 | |
AnnaBridge | 171:3a7713b1edbc | 659 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 660 | |
AnnaBridge | 171:3a7713b1edbc | 661 | #if defined(__cplusplus) |
AnnaBridge | 171:3a7713b1edbc | 662 | } |
AnnaBridge | 171:3a7713b1edbc | 663 | #endif |
AnnaBridge | 171:3a7713b1edbc | 664 | |
AnnaBridge | 171:3a7713b1edbc | 665 | /*! @}*/ |
AnnaBridge | 171:3a7713b1edbc | 666 | |
AnnaBridge | 171:3a7713b1edbc | 667 | #endif /* _FSL_USART_H_ */ |