mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_FF_LPC546XX/TOOLCHAIN_GCC_ARM/fsl_power.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * The Clear BSD License
AnnaBridge 171:3a7713b1edbc 3 * Copyright (c) 2016, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 4 * Copyright (c) 2016, NXP
AnnaBridge 171:3a7713b1edbc 5 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 6 *
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 9 * are permitted (subject to the limitations in the disclaimer below) provided
AnnaBridge 171:3a7713b1edbc 10 * that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 11 *
AnnaBridge 171:3a7713b1edbc 12 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 13 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 16 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 17 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * o Neither the name of copyright holder nor the names of its
AnnaBridge 171:3a7713b1edbc 20 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 21 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 22 *
AnnaBridge 171:3a7713b1edbc 23 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
AnnaBridge 171:3a7713b1edbc 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 31 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35 #ifndef _FSL_POWER_H_
AnnaBridge 171:3a7713b1edbc 36 #define _FSL_POWER_H_
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 41 * Definitions
AnnaBridge 171:3a7713b1edbc 42 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 45 /*@{*/
AnnaBridge 171:3a7713b1edbc 46 /*! @brief power driver version 2.0.0. */
AnnaBridge 171:3a7713b1edbc 47 #define FSL_POWER_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
AnnaBridge 171:3a7713b1edbc 48 /*@}*/
AnnaBridge 171:3a7713b1edbc 49
AnnaBridge 171:3a7713b1edbc 50 #define MAKE_PD_BITS(reg, slot) ((reg << 8) | slot)
AnnaBridge 171:3a7713b1edbc 51 #define PDRCFG0 0x0U
AnnaBridge 171:3a7713b1edbc 52 #define PDRCFG1 0x1U
AnnaBridge 171:3a7713b1edbc 53
AnnaBridge 171:3a7713b1edbc 54 typedef enum pd_bits
AnnaBridge 171:3a7713b1edbc 55 {
AnnaBridge 171:3a7713b1edbc 56 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
AnnaBridge 171:3a7713b1edbc 57 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
AnnaBridge 171:3a7713b1edbc 58 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
AnnaBridge 171:3a7713b1edbc 59 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
AnnaBridge 171:3a7713b1edbc 60 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
AnnaBridge 171:3a7713b1edbc 61 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
AnnaBridge 171:3a7713b1edbc 62 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
AnnaBridge 171:3a7713b1edbc 63 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
AnnaBridge 171:3a7713b1edbc 64 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
AnnaBridge 171:3a7713b1edbc 65 kPDRUNCFG_PD_RAM2 = MAKE_PD_BITS(PDRCFG0, 15U),
AnnaBridge 171:3a7713b1edbc 66 kPDRUNCFG_PD_RAM3 = MAKE_PD_BITS(PDRCFG0, 16U),
AnnaBridge 171:3a7713b1edbc 67 kPDRUNCFG_PD_ROM = MAKE_PD_BITS(PDRCFG0, 17U),
AnnaBridge 171:3a7713b1edbc 68 kPDRUNCFG_PD_VDDA = MAKE_PD_BITS(PDRCFG0, 19U),
AnnaBridge 171:3a7713b1edbc 69 kPDRUNCFG_PD_WDT_OSC = MAKE_PD_BITS(PDRCFG0, 20U),
AnnaBridge 171:3a7713b1edbc 70 kPDRUNCFG_PD_USB0_PHY = MAKE_PD_BITS(PDRCFG0, 21U),
AnnaBridge 171:3a7713b1edbc 71 kPDRUNCFG_PD_SYS_PLL0 = MAKE_PD_BITS(PDRCFG0, 22U),
AnnaBridge 171:3a7713b1edbc 72 kPDRUNCFG_PD_VREFP = MAKE_PD_BITS(PDRCFG0, 23U),
AnnaBridge 171:3a7713b1edbc 73 kPDRUNCFG_PD_FLASH_BG = MAKE_PD_BITS(PDRCFG0, 25U),
AnnaBridge 171:3a7713b1edbc 74 kPDRUNCFG_PD_VD3 = MAKE_PD_BITS(PDRCFG0, 26U),
AnnaBridge 171:3a7713b1edbc 75 kPDRUNCFG_PD_VD4 = MAKE_PD_BITS(PDRCFG0, 27U),
AnnaBridge 171:3a7713b1edbc 76 kPDRUNCFG_PD_VD5 = MAKE_PD_BITS(PDRCFG0, 28U),
AnnaBridge 171:3a7713b1edbc 77 kPDRUNCFG_PD_VD6 = MAKE_PD_BITS(PDRCFG0, 29U),
AnnaBridge 171:3a7713b1edbc 78 kPDRUNCFG_REQ_DELAY = MAKE_PD_BITS(PDRCFG0, 30U),
AnnaBridge 171:3a7713b1edbc 79 kPDRUNCFG_FORCE_RBB = MAKE_PD_BITS(PDRCFG0, 31U),
AnnaBridge 171:3a7713b1edbc 80
AnnaBridge 171:3a7713b1edbc 81 kPDRUNCFG_PD_USB1_PHY = MAKE_PD_BITS(PDRCFG1, 0U),
AnnaBridge 171:3a7713b1edbc 82 kPDRUNCFG_PD_USB_PLL = MAKE_PD_BITS(PDRCFG1, 1U),
AnnaBridge 171:3a7713b1edbc 83 kPDRUNCFG_PD_AUDIO_PLL = MAKE_PD_BITS(PDRCFG1, 2U),
AnnaBridge 171:3a7713b1edbc 84 kPDRUNCFG_PD_SYS_OSC = MAKE_PD_BITS(PDRCFG1, 3U),
AnnaBridge 171:3a7713b1edbc 85 kPDRUNCFG_PD_EEPROM = MAKE_PD_BITS(PDRCFG1, 5U),
AnnaBridge 171:3a7713b1edbc 86 kPDRUNCFG_PD_rng = MAKE_PD_BITS(PDRCFG1, 6U),
AnnaBridge 171:3a7713b1edbc 87
AnnaBridge 171:3a7713b1edbc 88 kPDRUNCFG_ForceUnsigned = 0x80000000U,
AnnaBridge 171:3a7713b1edbc 89 } pd_bit_t;
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 /* Power mode configuration API parameter */
AnnaBridge 171:3a7713b1edbc 92 typedef enum _power_mode_config
AnnaBridge 171:3a7713b1edbc 93 {
AnnaBridge 171:3a7713b1edbc 94 kPmu_Sleep = 0U,
AnnaBridge 171:3a7713b1edbc 95 kPmu_Deep_Sleep = 1U,
AnnaBridge 171:3a7713b1edbc 96 kPmu_Deep_PowerDown = 2U,
AnnaBridge 171:3a7713b1edbc 97 } power_mode_cfg_t;
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 100 * API
AnnaBridge 171:3a7713b1edbc 101 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 104 extern "C" {
AnnaBridge 171:3a7713b1edbc 105 #endif
AnnaBridge 171:3a7713b1edbc 106
AnnaBridge 171:3a7713b1edbc 107 /*!
AnnaBridge 171:3a7713b1edbc 108 * @name Power Configuration
AnnaBridge 171:3a7713b1edbc 109 * @{
AnnaBridge 171:3a7713b1edbc 110 */
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 /*!
AnnaBridge 171:3a7713b1edbc 113 * @brief API to enable PDRUNCFG bit in the Syscon. Note that enabling the bit powers down the peripheral
AnnaBridge 171:3a7713b1edbc 114 *
AnnaBridge 171:3a7713b1edbc 115 * @param en peripheral for which to enable the PDRUNCFG bit
AnnaBridge 171:3a7713b1edbc 116 * @return none
AnnaBridge 171:3a7713b1edbc 117 */
AnnaBridge 171:3a7713b1edbc 118 static inline void POWER_EnablePD(pd_bit_t en)
AnnaBridge 171:3a7713b1edbc 119 {
AnnaBridge 171:3a7713b1edbc 120 /* PDRUNCFGSET */
AnnaBridge 171:3a7713b1edbc 121 SYSCON->PDRUNCFGSET[(en >> 8UL)] = (1UL << (en & 0xffU));
AnnaBridge 171:3a7713b1edbc 122 }
AnnaBridge 171:3a7713b1edbc 123
AnnaBridge 171:3a7713b1edbc 124 /*!
AnnaBridge 171:3a7713b1edbc 125 * @brief API to disable PDRUNCFG bit in the Syscon. Note that disabling the bit powers up the peripheral
AnnaBridge 171:3a7713b1edbc 126 *
AnnaBridge 171:3a7713b1edbc 127 * @param en peripheral for which to disable the PDRUNCFG bit
AnnaBridge 171:3a7713b1edbc 128 * @return none
AnnaBridge 171:3a7713b1edbc 129 */
AnnaBridge 171:3a7713b1edbc 130 static inline void POWER_DisablePD(pd_bit_t en)
AnnaBridge 171:3a7713b1edbc 131 {
AnnaBridge 171:3a7713b1edbc 132 /* PDRUNCFGCLR */
AnnaBridge 171:3a7713b1edbc 133 SYSCON->PDRUNCFGCLR[(en >> 8UL)] = (1UL << (en & 0xffU));
AnnaBridge 171:3a7713b1edbc 134 }
AnnaBridge 171:3a7713b1edbc 135
AnnaBridge 171:3a7713b1edbc 136 /*!
AnnaBridge 171:3a7713b1edbc 137 * @brief API to enable deep sleep bit in the ARM Core.
AnnaBridge 171:3a7713b1edbc 138 *
AnnaBridge 171:3a7713b1edbc 139 * @param none
AnnaBridge 171:3a7713b1edbc 140 * @return none
AnnaBridge 171:3a7713b1edbc 141 */
AnnaBridge 171:3a7713b1edbc 142 static inline void POWER_EnableDeepSleep(void)
AnnaBridge 171:3a7713b1edbc 143 {
AnnaBridge 171:3a7713b1edbc 144 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
AnnaBridge 171:3a7713b1edbc 145 }
AnnaBridge 171:3a7713b1edbc 146
AnnaBridge 171:3a7713b1edbc 147 /*!
AnnaBridge 171:3a7713b1edbc 148 * @brief API to disable deep sleep bit in the ARM Core.
AnnaBridge 171:3a7713b1edbc 149 *
AnnaBridge 171:3a7713b1edbc 150 * @param none
AnnaBridge 171:3a7713b1edbc 151 * @return none
AnnaBridge 171:3a7713b1edbc 152 */
AnnaBridge 171:3a7713b1edbc 153 static inline void POWER_DisableDeepSleep(void)
AnnaBridge 171:3a7713b1edbc 154 {
AnnaBridge 171:3a7713b1edbc 155 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
AnnaBridge 171:3a7713b1edbc 156 }
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 /*!
AnnaBridge 171:3a7713b1edbc 159 * @brief API to power down flash controller.
AnnaBridge 171:3a7713b1edbc 160 *
AnnaBridge 171:3a7713b1edbc 161 * @param none
AnnaBridge 171:3a7713b1edbc 162 * @return none
AnnaBridge 171:3a7713b1edbc 163 */
AnnaBridge 171:3a7713b1edbc 164 static inline void POWER_PowerDownFlash(void)
AnnaBridge 171:3a7713b1edbc 165 {
AnnaBridge 171:3a7713b1edbc 166 /* TURN OFF clock ip_2113 (only needed for FLASH programming, will be turned on by ROM API) */
AnnaBridge 171:3a7713b1edbc 167 CLOCK_DisableClock(kCLOCK_Flash);
AnnaBridge 171:3a7713b1edbc 168
AnnaBridge 171:3a7713b1edbc 169 /* TURN OFF clock ip_2113 (only needed for FLASH programming, will be turned on by ROM API) */
AnnaBridge 171:3a7713b1edbc 170 CLOCK_DisableClock(kCLOCK_Fmc);
AnnaBridge 171:3a7713b1edbc 171 }
AnnaBridge 171:3a7713b1edbc 172
AnnaBridge 171:3a7713b1edbc 173 /*!
AnnaBridge 171:3a7713b1edbc 174 * @brief API to power up flash controller.
AnnaBridge 171:3a7713b1edbc 175 *
AnnaBridge 171:3a7713b1edbc 176 * @param none
AnnaBridge 171:3a7713b1edbc 177 * @return none
AnnaBridge 171:3a7713b1edbc 178 */
AnnaBridge 171:3a7713b1edbc 179 static inline void POWER_PowerUpFlash(void)
AnnaBridge 171:3a7713b1edbc 180 {
AnnaBridge 171:3a7713b1edbc 181 /* TURN OFF clock ip_2113 (only needed for FLASH programming, will be turned on by ROM API) */
AnnaBridge 171:3a7713b1edbc 182 CLOCK_EnableClock(kCLOCK_Fmc);
AnnaBridge 171:3a7713b1edbc 183 }
AnnaBridge 171:3a7713b1edbc 184
AnnaBridge 171:3a7713b1edbc 185 /*!
AnnaBridge 171:3a7713b1edbc 186 * @brief Power Library API to power the PLLs.
AnnaBridge 171:3a7713b1edbc 187 *
AnnaBridge 171:3a7713b1edbc 188 * @param none
AnnaBridge 171:3a7713b1edbc 189 * @return none
AnnaBridge 171:3a7713b1edbc 190 */
AnnaBridge 171:3a7713b1edbc 191 void POWER_SetPLL(void);
AnnaBridge 171:3a7713b1edbc 192
AnnaBridge 171:3a7713b1edbc 193 /*!
AnnaBridge 171:3a7713b1edbc 194 * @brief Power Library API to power the USB PHY.
AnnaBridge 171:3a7713b1edbc 195 *
AnnaBridge 171:3a7713b1edbc 196 * @param none
AnnaBridge 171:3a7713b1edbc 197 * @return none
AnnaBridge 171:3a7713b1edbc 198 */
AnnaBridge 171:3a7713b1edbc 199 void POWER_SetUsbPhy(void);
AnnaBridge 171:3a7713b1edbc 200
AnnaBridge 171:3a7713b1edbc 201 /*!
AnnaBridge 171:3a7713b1edbc 202 * @brief Power Library API to enter different power mode.
AnnaBridge 171:3a7713b1edbc 203 *
AnnaBridge 171:3a7713b1edbc 204 * @param exclude_from_pd Bit mask of the PDRUNCFG0(low 32bits) and PDRUNCFG1(high 32bits) that needs to be powered on during power mode selected.
AnnaBridge 171:3a7713b1edbc 205 * @return none
AnnaBridge 171:3a7713b1edbc 206 */
AnnaBridge 171:3a7713b1edbc 207 void POWER_EnterPowerMode(power_mode_cfg_t mode, uint64_t exclude_from_pd);
AnnaBridge 171:3a7713b1edbc 208
AnnaBridge 171:3a7713b1edbc 209 /*!
AnnaBridge 171:3a7713b1edbc 210 * @brief Power Library API to enter sleep mode.
AnnaBridge 171:3a7713b1edbc 211 *
AnnaBridge 171:3a7713b1edbc 212 * @return none
AnnaBridge 171:3a7713b1edbc 213 */
AnnaBridge 171:3a7713b1edbc 214 void POWER_EnterSleep(void);
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 /*!
AnnaBridge 171:3a7713b1edbc 217 * @brief Power Library API to enter deep sleep mode.
AnnaBridge 171:3a7713b1edbc 218 *
AnnaBridge 171:3a7713b1edbc 219 * @param exclude_from_pd Bit mask of the PDRUNCFG0(low 32bits) and PDRUNCFG1(high 32bits) bits that needs to be powered on during deep sleep
AnnaBridge 171:3a7713b1edbc 220 * @return none
AnnaBridge 171:3a7713b1edbc 221 */
AnnaBridge 171:3a7713b1edbc 222 void POWER_EnterDeepSleep(uint64_t exclude_from_pd);
AnnaBridge 171:3a7713b1edbc 223
AnnaBridge 171:3a7713b1edbc 224 /*!
AnnaBridge 171:3a7713b1edbc 225 * @brief Power Library API to enter deep power down mode.
AnnaBridge 171:3a7713b1edbc 226 *
AnnaBridge 171:3a7713b1edbc 227 * @param exclude_from_pd Bit mask of the PDRUNCFG0(low 32bits) and PDRUNCFG1(high 32bits) that needs to be powered on during deep power
AnnaBridge 171:3a7713b1edbc 228 * down mode, but this is has no effect as the voltages are cut off.
AnnaBridge 171:3a7713b1edbc 229
AnnaBridge 171:3a7713b1edbc 230 * @return none
AnnaBridge 171:3a7713b1edbc 231 */
AnnaBridge 171:3a7713b1edbc 232 void POWER_EnterDeepPowerDown(uint64_t exclude_from_pd);
AnnaBridge 171:3a7713b1edbc 233
AnnaBridge 171:3a7713b1edbc 234 /*!
AnnaBridge 171:3a7713b1edbc 235 * @brief Power Library API to choose normal regulation and set the voltage for the desired operating frequency.
AnnaBridge 171:3a7713b1edbc 236 *
AnnaBridge 171:3a7713b1edbc 237 * @param freq - The desired frequency at which the part would like to operate,
AnnaBridge 171:3a7713b1edbc 238 * note that the voltage and flash wait states should be set before changing frequency
AnnaBridge 171:3a7713b1edbc 239 * @return none
AnnaBridge 171:3a7713b1edbc 240 */
AnnaBridge 171:3a7713b1edbc 241 void POWER_SetVoltageForFreq(uint32_t freq);
AnnaBridge 171:3a7713b1edbc 242
AnnaBridge 171:3a7713b1edbc 243 /*!
AnnaBridge 171:3a7713b1edbc 244 * @brief Power Library API to return the library version.
AnnaBridge 171:3a7713b1edbc 245 *
AnnaBridge 171:3a7713b1edbc 246 * @param none
AnnaBridge 171:3a7713b1edbc 247 * @return version number of the power library
AnnaBridge 171:3a7713b1edbc 248 */
AnnaBridge 171:3a7713b1edbc 249 uint32_t POWER_GetLibVersion(void);
AnnaBridge 171:3a7713b1edbc 250
AnnaBridge 171:3a7713b1edbc 251 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 252 }
AnnaBridge 171:3a7713b1edbc 253 #endif
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 #endif /* _FSL_POWER_H_ */