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TARGET_FF_LPC546XX/TOOLCHAIN_ARM_STD/fsl_dmic.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * The Clear BSD License
AnnaBridge 171:3a7713b1edbc 3 * Copyright (c) 2016, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 4 * Copyright 2016-2017 NXP
AnnaBridge 171:3a7713b1edbc 5 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 6 *
AnnaBridge 171:3a7713b1edbc 7 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 8 * are permitted (subject to the limitations in the disclaimer below) provided
AnnaBridge 171:3a7713b1edbc 9 * that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 12 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 15 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 16 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 17 *
AnnaBridge 171:3a7713b1edbc 18 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 171:3a7713b1edbc 19 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 20 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
AnnaBridge 171:3a7713b1edbc 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 30 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 33 */
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 #ifndef _FSL_DMIC_H_
AnnaBridge 171:3a7713b1edbc 36 #define _FSL_DMIC_H_
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /*!
AnnaBridge 171:3a7713b1edbc 41 * @addtogroup dmic_driver
AnnaBridge 171:3a7713b1edbc 42 * @{
AnnaBridge 171:3a7713b1edbc 43 */
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 /*! @file*/
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 48 * Definitions
AnnaBridge 171:3a7713b1edbc 49 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /*!
AnnaBridge 171:3a7713b1edbc 52 * @name DMIC version
AnnaBridge 171:3a7713b1edbc 53 * @{
AnnaBridge 171:3a7713b1edbc 54 */
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 /*! @brief DMIC driver version 2.0.0. */
AnnaBridge 171:3a7713b1edbc 57 #define FSL_DMIC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
AnnaBridge 171:3a7713b1edbc 58 /*@}*/
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /*! @brief DMIC different operation modes. */
AnnaBridge 171:3a7713b1edbc 61 typedef enum _operation_mode
AnnaBridge 171:3a7713b1edbc 62 {
AnnaBridge 171:3a7713b1edbc 63 kDMIC_OperationModePoll = 0U, /*!< Polling mode */
AnnaBridge 171:3a7713b1edbc 64 kDMIC_OperationModeInterrupt = 1U, /*!< Interrupt mode */
AnnaBridge 171:3a7713b1edbc 65 kDMIC_OperationModeDma = 2U, /*!< DMA mode */
AnnaBridge 171:3a7713b1edbc 66 } operation_mode_t;
AnnaBridge 171:3a7713b1edbc 67
AnnaBridge 171:3a7713b1edbc 68 /*! @brief DMIC left/right values. */
AnnaBridge 171:3a7713b1edbc 69 typedef enum _stereo_side
AnnaBridge 171:3a7713b1edbc 70 {
AnnaBridge 171:3a7713b1edbc 71 kDMIC_Left = 0U, /*!< Left Stereo channel */
AnnaBridge 171:3a7713b1edbc 72 kDMIC_Right = 1U, /*!< Right Stereo channel */
AnnaBridge 171:3a7713b1edbc 73 } stereo_side_t;
AnnaBridge 171:3a7713b1edbc 74
AnnaBridge 171:3a7713b1edbc 75 /*! @brief DMIC Clock pre-divider values. */
AnnaBridge 171:3a7713b1edbc 76 typedef enum
AnnaBridge 171:3a7713b1edbc 77 {
AnnaBridge 171:3a7713b1edbc 78 kDMIC_PdmDiv1 = 0U, /*!< DMIC pre-divider set in divide by 1 */
AnnaBridge 171:3a7713b1edbc 79 kDMIC_PdmDiv2 = 1U, /*!< DMIC pre-divider set in divide by 2 */
AnnaBridge 171:3a7713b1edbc 80 kDMIC_PdmDiv3 = 2U, /*!< DMIC pre-divider set in divide by 3 */
AnnaBridge 171:3a7713b1edbc 81 kDMIC_PdmDiv4 = 3U, /*!< DMIC pre-divider set in divide by 4 */
AnnaBridge 171:3a7713b1edbc 82 kDMIC_PdmDiv6 = 4U, /*!< DMIC pre-divider set in divide by 6 */
AnnaBridge 171:3a7713b1edbc 83 kDMIC_PdmDiv8 = 5U, /*!< DMIC pre-divider set in divide by 8 */
AnnaBridge 171:3a7713b1edbc 84 kDMIC_PdmDiv12 = 6U, /*!< DMIC pre-divider set in divide by 12 */
AnnaBridge 171:3a7713b1edbc 85 kDMIC_PdmDiv16 = 7U, /*!< DMIC pre-divider set in divide by 16*/
AnnaBridge 171:3a7713b1edbc 86 kDMIC_PdmDiv24 = 8U, /*!< DMIC pre-divider set in divide by 24*/
AnnaBridge 171:3a7713b1edbc 87 kDMIC_PdmDiv32 = 9U, /*!< DMIC pre-divider set in divide by 32 */
AnnaBridge 171:3a7713b1edbc 88 kDMIC_PdmDiv48 = 10U, /*!< DMIC pre-divider set in divide by 48 */
AnnaBridge 171:3a7713b1edbc 89 kDMIC_PdmDiv64 = 11U, /*!< DMIC pre-divider set in divide by 64*/
AnnaBridge 171:3a7713b1edbc 90 kDMIC_PdmDiv96 = 12U, /*!< DMIC pre-divider set in divide by 96*/
AnnaBridge 171:3a7713b1edbc 91 kDMIC_PdmDiv128 = 13U, /*!< DMIC pre-divider set in divide by 128 */
AnnaBridge 171:3a7713b1edbc 92 } pdm_div_t;
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94 /*! @brief Pre-emphasis Filter coefficient value for 2FS and 4FS modes. */
AnnaBridge 171:3a7713b1edbc 95 typedef enum _compensation
AnnaBridge 171:3a7713b1edbc 96 {
AnnaBridge 171:3a7713b1edbc 97 kDMIC_CompValueZero = 0U, /*!< Compensation 0 */
AnnaBridge 171:3a7713b1edbc 98 kDMIC_CompValueNegativePoint16 = 1U, /*!< Compensation -0.16 */
AnnaBridge 171:3a7713b1edbc 99 kDMIC_CompValueNegativePoint15 = 2U, /*!< Compensation -0.15 */
AnnaBridge 171:3a7713b1edbc 100 kDMIC_CompValueNegativePoint13 = 3U, /*!< Compensation -0.13 */
AnnaBridge 171:3a7713b1edbc 101 } compensation_t;
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 /*! @brief DMIC DC filter control values. */
AnnaBridge 171:3a7713b1edbc 104 typedef enum _dc_removal
AnnaBridge 171:3a7713b1edbc 105 {
AnnaBridge 171:3a7713b1edbc 106 kDMIC_DcNoRemove = 0U, /*!< Flat response no filter */
AnnaBridge 171:3a7713b1edbc 107 kDMIC_DcCut155 = 1U, /*!< Cut off Frequency is 155 Hz */
AnnaBridge 171:3a7713b1edbc 108 kDMIC_DcCut78 = 2U, /*!< Cut off Frequency is 78 Hz */
AnnaBridge 171:3a7713b1edbc 109 kDMIC_DcCut39 = 3U, /*!< Cut off Frequency is 39 Hz */
AnnaBridge 171:3a7713b1edbc 110 } dc_removal_t;
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 /*! @brief DMIC IO configiration. */
AnnaBridge 171:3a7713b1edbc 113 typedef enum _dmic_io
AnnaBridge 171:3a7713b1edbc 114 {
AnnaBridge 171:3a7713b1edbc 115 kDMIC_PdmDual = 0U, /*!< Two separate pairs of PDM wires */
AnnaBridge 171:3a7713b1edbc 116 kDMIC_PdmStereo = 4U, /*!< Stereo Mic */
AnnaBridge 171:3a7713b1edbc 117 kDMIC_PdmBypass = 3U, /*!< Clk Bypass clocks both channels */
AnnaBridge 171:3a7713b1edbc 118 kDMIC_PdmBypassClk0 = 1U, /*!< Clk Bypass clocks only channel0 */
AnnaBridge 171:3a7713b1edbc 119 kDMIC_PdmBypassClk1 = 2U, /*!< Clk Bypas clocks only channel1 */
AnnaBridge 171:3a7713b1edbc 120 } dmic_io_t;
AnnaBridge 171:3a7713b1edbc 121
AnnaBridge 171:3a7713b1edbc 122 /*! @brief DMIC Channel number. */
AnnaBridge 171:3a7713b1edbc 123 typedef enum _dmic_channel
AnnaBridge 171:3a7713b1edbc 124 {
AnnaBridge 171:3a7713b1edbc 125 kDMIC_Channel0 = 0U, /*!< DMIC channel 0 */
AnnaBridge 171:3a7713b1edbc 126 kDMIC_Channel1 = 1U, /*!< DMIC channel 1 */
AnnaBridge 171:3a7713b1edbc 127 } dmic_channel_t;
AnnaBridge 171:3a7713b1edbc 128
AnnaBridge 171:3a7713b1edbc 129 /*! @brief DMIC and decimator sample rates. */
AnnaBridge 171:3a7713b1edbc 130 typedef enum _dmic_phy_sample_rate
AnnaBridge 171:3a7713b1edbc 131 {
AnnaBridge 171:3a7713b1edbc 132 kDMIC_PhyFullSpeed = 0U, /*!< Decimator gets one sample per each chosen clock edge of PDM interface */
AnnaBridge 171:3a7713b1edbc 133 kDMIC_PhyHalfSpeed = 1U, /*!< PDM clock to Microphone is halved, decimator receives each sample twice */
AnnaBridge 171:3a7713b1edbc 134 } dmic_phy_sample_rate_t;
AnnaBridge 171:3a7713b1edbc 135
AnnaBridge 171:3a7713b1edbc 136 /*! @brief DMIC transfer status.*/
AnnaBridge 171:3a7713b1edbc 137 enum _dmic_status
AnnaBridge 171:3a7713b1edbc 138 {
AnnaBridge 171:3a7713b1edbc 139 kStatus_DMIC_Busy = MAKE_STATUS(kStatusGroup_DMIC, 0), /*!< DMIC is busy */
AnnaBridge 171:3a7713b1edbc 140 kStatus_DMIC_Idle = MAKE_STATUS(kStatusGroup_DMIC, 1), /*!< DMIC is idle */
AnnaBridge 171:3a7713b1edbc 141 kStatus_DMIC_OverRunError = MAKE_STATUS(kStatusGroup_DMIC, 2), /*!< DMIC over run Error */
AnnaBridge 171:3a7713b1edbc 142 kStatus_DMIC_UnderRunError = MAKE_STATUS(kStatusGroup_DMIC, 3), /*!< DMIC under run Error */
AnnaBridge 171:3a7713b1edbc 143 };
AnnaBridge 171:3a7713b1edbc 144
AnnaBridge 171:3a7713b1edbc 145 /*! @brief DMIC Channel configuration structure. */
AnnaBridge 171:3a7713b1edbc 146 typedef struct _dmic_channel_config
AnnaBridge 171:3a7713b1edbc 147 {
AnnaBridge 171:3a7713b1edbc 148 pdm_div_t divhfclk; /*!< DMIC Clock pre-divider values */
AnnaBridge 171:3a7713b1edbc 149 uint32_t osr; /*!< oversampling rate(CIC decimation rate) for PCM */
AnnaBridge 171:3a7713b1edbc 150 int32_t gainshft; /*!< 4FS PCM data gain control */
AnnaBridge 171:3a7713b1edbc 151 compensation_t preac2coef; /*!< Pre-emphasis Filter coefficient value for 2FS */
AnnaBridge 171:3a7713b1edbc 152 compensation_t preac4coef; /*!< Pre-emphasis Filter coefficient value for 4FS */
AnnaBridge 171:3a7713b1edbc 153 dc_removal_t dc_cut_level; /*!< DMIC DC filter control values. */
AnnaBridge 171:3a7713b1edbc 154 uint32_t post_dc_gain_reduce; /*!< Fine gain adjustment in the form of a number of bits to downshift */
AnnaBridge 171:3a7713b1edbc 155 dmic_phy_sample_rate_t sample_rate; /*!< DMIC and decimator sample rates */
AnnaBridge 171:3a7713b1edbc 156 bool saturate16bit; /*!< Selects 16-bit saturation. 0 means results roll over if out range and do not saturate.
AnnaBridge 171:3a7713b1edbc 157 1 means if the result overflows, it saturates at 0xFFFF for positive overflow and
AnnaBridge 171:3a7713b1edbc 158 0x8000 for negative overflow.*/
AnnaBridge 171:3a7713b1edbc 159 } dmic_channel_config_t;
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 /*! @brief DMIC Callback function. */
AnnaBridge 171:3a7713b1edbc 162 typedef void (*dmic_callback_t)(void);
AnnaBridge 171:3a7713b1edbc 163
AnnaBridge 171:3a7713b1edbc 164 /*! @brief HWVAD Callback function. */
AnnaBridge 171:3a7713b1edbc 165 typedef void (*dmic_hwvad_callback_t)(void);
AnnaBridge 171:3a7713b1edbc 166
AnnaBridge 171:3a7713b1edbc 167 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 168 * Definitions
AnnaBridge 171:3a7713b1edbc 169 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 170
AnnaBridge 171:3a7713b1edbc 171 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 172 * API
AnnaBridge 171:3a7713b1edbc 173 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 174 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 175 extern "C" {
AnnaBridge 171:3a7713b1edbc 176 #endif
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 /*!
AnnaBridge 171:3a7713b1edbc 179 * @brief Get the DMIC instance from peripheral base address.
AnnaBridge 171:3a7713b1edbc 180 *
AnnaBridge 171:3a7713b1edbc 181 * @param base DMIC peripheral base address.
AnnaBridge 171:3a7713b1edbc 182 * @return DMIC instance.
AnnaBridge 171:3a7713b1edbc 183 */
AnnaBridge 171:3a7713b1edbc 184 uint32_t DMIC_GetInstance(DMIC_Type *base);
AnnaBridge 171:3a7713b1edbc 185
AnnaBridge 171:3a7713b1edbc 186 /*!
AnnaBridge 171:3a7713b1edbc 187 * @brief Turns DMIC Clock on
AnnaBridge 171:3a7713b1edbc 188 * @param base : DMIC base
AnnaBridge 171:3a7713b1edbc 189 * @return Nothing
AnnaBridge 171:3a7713b1edbc 190 */
AnnaBridge 171:3a7713b1edbc 191 void DMIC_Init(DMIC_Type *base);
AnnaBridge 171:3a7713b1edbc 192
AnnaBridge 171:3a7713b1edbc 193 /*!
AnnaBridge 171:3a7713b1edbc 194 * @brief Turns DMIC Clock off
AnnaBridge 171:3a7713b1edbc 195 * @param base : DMIC base
AnnaBridge 171:3a7713b1edbc 196 * @return Nothing
AnnaBridge 171:3a7713b1edbc 197 */
AnnaBridge 171:3a7713b1edbc 198 void DMIC_DeInit(DMIC_Type *base);
AnnaBridge 171:3a7713b1edbc 199
AnnaBridge 171:3a7713b1edbc 200 /*!
AnnaBridge 171:3a7713b1edbc 201 * @brief Configure DMIC io
AnnaBridge 171:3a7713b1edbc 202 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 203 * @param config : DMIC io configuration
AnnaBridge 171:3a7713b1edbc 204 * @return Nothing
AnnaBridge 171:3a7713b1edbc 205 */
AnnaBridge 171:3a7713b1edbc 206 void DMIC_ConfigIO(DMIC_Type *base, dmic_io_t config);
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 /*!
AnnaBridge 171:3a7713b1edbc 209 * @brief Set DMIC operating mode
AnnaBridge 171:3a7713b1edbc 210 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 211 * @param mode : DMIC mode
AnnaBridge 171:3a7713b1edbc 212 * @return Nothing
AnnaBridge 171:3a7713b1edbc 213 */
AnnaBridge 171:3a7713b1edbc 214 void DMIC_SetOperationMode(DMIC_Type *base, operation_mode_t mode);
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 /*!
AnnaBridge 171:3a7713b1edbc 217 * @brief Configure DMIC channel
AnnaBridge 171:3a7713b1edbc 218 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 219 * @param channel : DMIC channel
AnnaBridge 171:3a7713b1edbc 220 * @param side : stereo_side_t, choice of left or right
AnnaBridge 171:3a7713b1edbc 221 * @param channel_config : Channel configuration
AnnaBridge 171:3a7713b1edbc 222 * @return Nothing
AnnaBridge 171:3a7713b1edbc 223 */
AnnaBridge 171:3a7713b1edbc 224 void DMIC_ConfigChannel(DMIC_Type *base,
AnnaBridge 171:3a7713b1edbc 225 dmic_channel_t channel,
AnnaBridge 171:3a7713b1edbc 226 stereo_side_t side,
AnnaBridge 171:3a7713b1edbc 227 dmic_channel_config_t *channel_config);
AnnaBridge 171:3a7713b1edbc 228
AnnaBridge 171:3a7713b1edbc 229 /*!
AnnaBridge 171:3a7713b1edbc 230 * @brief Configure Clock scaling
AnnaBridge 171:3a7713b1edbc 231 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 232 * @param use2fs : clock scaling
AnnaBridge 171:3a7713b1edbc 233 * @return Nothing
AnnaBridge 171:3a7713b1edbc 234 */
AnnaBridge 171:3a7713b1edbc 235 void DMIC_Use2fs(DMIC_Type *base, bool use2fs);
AnnaBridge 171:3a7713b1edbc 236
AnnaBridge 171:3a7713b1edbc 237 /*!
AnnaBridge 171:3a7713b1edbc 238 * @brief Enable a particualr channel
AnnaBridge 171:3a7713b1edbc 239 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 240 * @param channelmask : Channel selection
AnnaBridge 171:3a7713b1edbc 241 * @return Nothing
AnnaBridge 171:3a7713b1edbc 242 */
AnnaBridge 171:3a7713b1edbc 243 void DMIC_EnableChannnel(DMIC_Type *base, uint32_t channelmask);
AnnaBridge 171:3a7713b1edbc 244
AnnaBridge 171:3a7713b1edbc 245 /*!
AnnaBridge 171:3a7713b1edbc 246 * @brief Configure fifo settings for DMIC channel
AnnaBridge 171:3a7713b1edbc 247 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 248 * @param channel : DMIC channel
AnnaBridge 171:3a7713b1edbc 249 * @param trig_level : FIFO trigger level
AnnaBridge 171:3a7713b1edbc 250 * @param enable : FIFO level
AnnaBridge 171:3a7713b1edbc 251 * @param resetn : FIFO reset
AnnaBridge 171:3a7713b1edbc 252 * @return Nothing
AnnaBridge 171:3a7713b1edbc 253 */
AnnaBridge 171:3a7713b1edbc 254 void DMIC_FifoChannel(DMIC_Type *base, uint32_t channel, uint32_t trig_level, uint32_t enable, uint32_t resetn);
AnnaBridge 171:3a7713b1edbc 255
AnnaBridge 171:3a7713b1edbc 256 /*!
AnnaBridge 171:3a7713b1edbc 257 * @brief Get FIFO status
AnnaBridge 171:3a7713b1edbc 258 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 259 * @param channel : DMIC channel
AnnaBridge 171:3a7713b1edbc 260 * @return FIFO status
AnnaBridge 171:3a7713b1edbc 261 */
AnnaBridge 171:3a7713b1edbc 262 static inline uint32_t DMIC_FifoGetStatus(DMIC_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 263 {
AnnaBridge 171:3a7713b1edbc 264 return base->CHANNEL[channel].FIFO_STATUS;
AnnaBridge 171:3a7713b1edbc 265 }
AnnaBridge 171:3a7713b1edbc 266
AnnaBridge 171:3a7713b1edbc 267 /*!
AnnaBridge 171:3a7713b1edbc 268 * @brief Clear FIFO status
AnnaBridge 171:3a7713b1edbc 269 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 270 * @param channel : DMIC channel
AnnaBridge 171:3a7713b1edbc 271 * @param mask : Bits to be cleared
AnnaBridge 171:3a7713b1edbc 272 * @return FIFO status
AnnaBridge 171:3a7713b1edbc 273 */
AnnaBridge 171:3a7713b1edbc 274 static inline void DMIC_FifoClearStatus(DMIC_Type *base, uint32_t channel, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 275 {
AnnaBridge 171:3a7713b1edbc 276 base->CHANNEL[channel].FIFO_STATUS = mask;
AnnaBridge 171:3a7713b1edbc 277 }
AnnaBridge 171:3a7713b1edbc 278
AnnaBridge 171:3a7713b1edbc 279 /*!
AnnaBridge 171:3a7713b1edbc 280 * @brief Get FIFO data
AnnaBridge 171:3a7713b1edbc 281 * @param base : The base address of DMIC interface
AnnaBridge 171:3a7713b1edbc 282 * @param channel : DMIC channel
AnnaBridge 171:3a7713b1edbc 283 * @return FIFO data
AnnaBridge 171:3a7713b1edbc 284 */
AnnaBridge 171:3a7713b1edbc 285 static inline uint32_t DMIC_FifoGetData(DMIC_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 286 {
AnnaBridge 171:3a7713b1edbc 287 return base->CHANNEL[channel].FIFO_DATA;
AnnaBridge 171:3a7713b1edbc 288 }
AnnaBridge 171:3a7713b1edbc 289
AnnaBridge 171:3a7713b1edbc 290 /*!
AnnaBridge 171:3a7713b1edbc 291 * @brief Enable callback.
AnnaBridge 171:3a7713b1edbc 292
AnnaBridge 171:3a7713b1edbc 293 * This function enables the interrupt for the selected DMIC peripheral.
AnnaBridge 171:3a7713b1edbc 294 * The callback function is not enabled until this function is called.
AnnaBridge 171:3a7713b1edbc 295 *
AnnaBridge 171:3a7713b1edbc 296 * @param base Base address of the DMIC peripheral.
AnnaBridge 171:3a7713b1edbc 297 * @param cb callback Pointer to store callback function.
AnnaBridge 171:3a7713b1edbc 298 * @retval None.
AnnaBridge 171:3a7713b1edbc 299 */
AnnaBridge 171:3a7713b1edbc 300 void DMIC_EnableIntCallback(DMIC_Type *base, dmic_callback_t cb);
AnnaBridge 171:3a7713b1edbc 301
AnnaBridge 171:3a7713b1edbc 302 /*!
AnnaBridge 171:3a7713b1edbc 303 * @brief Disable callback.
AnnaBridge 171:3a7713b1edbc 304
AnnaBridge 171:3a7713b1edbc 305 * This function disables the interrupt for the selected DMIC peripheral.
AnnaBridge 171:3a7713b1edbc 306 *
AnnaBridge 171:3a7713b1edbc 307 * @param base Base address of the DMIC peripheral.
AnnaBridge 171:3a7713b1edbc 308 * @param cb callback Pointer to store callback function..
AnnaBridge 171:3a7713b1edbc 309 * @retval None.
AnnaBridge 171:3a7713b1edbc 310 */
AnnaBridge 171:3a7713b1edbc 311 void DMIC_DisableIntCallback(DMIC_Type *base, dmic_callback_t cb);
AnnaBridge 171:3a7713b1edbc 312
AnnaBridge 171:3a7713b1edbc 313 /**
AnnaBridge 171:3a7713b1edbc 314 * @}
AnnaBridge 171:3a7713b1edbc 315 */
AnnaBridge 171:3a7713b1edbc 316
AnnaBridge 171:3a7713b1edbc 317 /*!
AnnaBridge 171:3a7713b1edbc 318 * @name hwvad
AnnaBridge 171:3a7713b1edbc 319 * @{
AnnaBridge 171:3a7713b1edbc 320 */
AnnaBridge 171:3a7713b1edbc 321
AnnaBridge 171:3a7713b1edbc 322 /*!
AnnaBridge 171:3a7713b1edbc 323 * @brief Sets the gain value for the noise estimator.
AnnaBridge 171:3a7713b1edbc 324 *
AnnaBridge 171:3a7713b1edbc 325 * @param base DMIC base pointer
AnnaBridge 171:3a7713b1edbc 326 * @param value gain value for the noise estimator.
AnnaBridge 171:3a7713b1edbc 327 * @retval None.
AnnaBridge 171:3a7713b1edbc 328 */
AnnaBridge 171:3a7713b1edbc 329 static inline void DMIC_SetGainNoiseEstHwvad(DMIC_Type *base, uint32_t value)
AnnaBridge 171:3a7713b1edbc 330 {
AnnaBridge 171:3a7713b1edbc 331 assert(NULL != base);
AnnaBridge 171:3a7713b1edbc 332 base->HWVADTHGN = value & 0xFu;
AnnaBridge 171:3a7713b1edbc 333 }
AnnaBridge 171:3a7713b1edbc 334
AnnaBridge 171:3a7713b1edbc 335 /*!
AnnaBridge 171:3a7713b1edbc 336 * @brief Sets the gain value for the signal estimator.
AnnaBridge 171:3a7713b1edbc 337 *
AnnaBridge 171:3a7713b1edbc 338 * @param base DMIC base pointer
AnnaBridge 171:3a7713b1edbc 339 * @param value gain value for the signal estimator.
AnnaBridge 171:3a7713b1edbc 340 * @retval None.
AnnaBridge 171:3a7713b1edbc 341 */
AnnaBridge 171:3a7713b1edbc 342 static inline void DMIC_SetGainSignalEstHwvad(DMIC_Type *base, uint32_t value)
AnnaBridge 171:3a7713b1edbc 343 {
AnnaBridge 171:3a7713b1edbc 344 assert(NULL != base);
AnnaBridge 171:3a7713b1edbc 345 base->HWVADTHGS = value & 0xFu;
AnnaBridge 171:3a7713b1edbc 346 }
AnnaBridge 171:3a7713b1edbc 347
AnnaBridge 171:3a7713b1edbc 348 /*!
AnnaBridge 171:3a7713b1edbc 349 * @brief Sets the hwvad filter cutoff frequency parameter.
AnnaBridge 171:3a7713b1edbc 350 *
AnnaBridge 171:3a7713b1edbc 351 * @param base DMIC base pointer
AnnaBridge 171:3a7713b1edbc 352 * @param value cut off frequency value.
AnnaBridge 171:3a7713b1edbc 353 * @retval None.
AnnaBridge 171:3a7713b1edbc 354 */
AnnaBridge 171:3a7713b1edbc 355 static inline void DMIC_SetFilterCtrlHwvad(DMIC_Type *base, uint32_t value)
AnnaBridge 171:3a7713b1edbc 356 {
AnnaBridge 171:3a7713b1edbc 357 assert(NULL != base);
AnnaBridge 171:3a7713b1edbc 358 base->HWVADHPFS = value & 0x3u;
AnnaBridge 171:3a7713b1edbc 359 }
AnnaBridge 171:3a7713b1edbc 360
AnnaBridge 171:3a7713b1edbc 361 /*!
AnnaBridge 171:3a7713b1edbc 362 * @brief Sets the input gain of hwvad.
AnnaBridge 171:3a7713b1edbc 363 *
AnnaBridge 171:3a7713b1edbc 364 * @param base DMIC base pointer
AnnaBridge 171:3a7713b1edbc 365 * @param value input gain value for hwvad.
AnnaBridge 171:3a7713b1edbc 366 * @retval None.
AnnaBridge 171:3a7713b1edbc 367 */
AnnaBridge 171:3a7713b1edbc 368 static inline void DMIC_SetInputGainHwvad(DMIC_Type *base, uint32_t value)
AnnaBridge 171:3a7713b1edbc 369 {
AnnaBridge 171:3a7713b1edbc 370 assert(NULL != base);
AnnaBridge 171:3a7713b1edbc 371 base->HWVADGAIN = value & 0xFu;
AnnaBridge 171:3a7713b1edbc 372 }
AnnaBridge 171:3a7713b1edbc 373
AnnaBridge 171:3a7713b1edbc 374 /*!
AnnaBridge 171:3a7713b1edbc 375 * @brief Clears hwvad internal interrupt flag.
AnnaBridge 171:3a7713b1edbc 376 *
AnnaBridge 171:3a7713b1edbc 377 * @param base DMIC base pointer
AnnaBridge 171:3a7713b1edbc 378 * @param st10 bit value.
AnnaBridge 171:3a7713b1edbc 379 * @retval None.
AnnaBridge 171:3a7713b1edbc 380 */
AnnaBridge 171:3a7713b1edbc 381 static inline void DMIC_CtrlClrIntrHwvad(DMIC_Type *base, bool st10)
AnnaBridge 171:3a7713b1edbc 382 {
AnnaBridge 171:3a7713b1edbc 383 assert(NULL != base);
AnnaBridge 171:3a7713b1edbc 384 base->HWVADST10 = (st10) ? 0x1 : 0x0;
AnnaBridge 171:3a7713b1edbc 385 }
AnnaBridge 171:3a7713b1edbc 386
AnnaBridge 171:3a7713b1edbc 387 /*!
AnnaBridge 171:3a7713b1edbc 388 * @brief Resets hwvad filters.
AnnaBridge 171:3a7713b1edbc 389 *
AnnaBridge 171:3a7713b1edbc 390 * @param base DMIC base pointer
AnnaBridge 171:3a7713b1edbc 391 * @param rstt Reset bit value.
AnnaBridge 171:3a7713b1edbc 392 * @retval None.
AnnaBridge 171:3a7713b1edbc 393 */
AnnaBridge 171:3a7713b1edbc 394 static inline void DMIC_FilterResetHwvad(DMIC_Type *base, bool rstt)
AnnaBridge 171:3a7713b1edbc 395 {
AnnaBridge 171:3a7713b1edbc 396 assert(NULL != base);
AnnaBridge 171:3a7713b1edbc 397 base->HWVADRSTT = (rstt) ? 0x1 : 0x0;
AnnaBridge 171:3a7713b1edbc 398 }
AnnaBridge 171:3a7713b1edbc 399
AnnaBridge 171:3a7713b1edbc 400 /*!
AnnaBridge 171:3a7713b1edbc 401 * @brief Gets the value from output of the filter z7.
AnnaBridge 171:3a7713b1edbc 402 *
AnnaBridge 171:3a7713b1edbc 403 * @param base DMIC base pointer
AnnaBridge 171:3a7713b1edbc 404 * @retval output of filter z7.
AnnaBridge 171:3a7713b1edbc 405 */
AnnaBridge 171:3a7713b1edbc 406 static inline uint16_t DMIC_GetNoiseEnvlpEst(DMIC_Type *base)
AnnaBridge 171:3a7713b1edbc 407 {
AnnaBridge 171:3a7713b1edbc 408 assert(NULL != base);
AnnaBridge 171:3a7713b1edbc 409 return (base->HWVADLOWZ & 0xFFFFu);
AnnaBridge 171:3a7713b1edbc 410 }
AnnaBridge 171:3a7713b1edbc 411
AnnaBridge 171:3a7713b1edbc 412 /*!
AnnaBridge 171:3a7713b1edbc 413 * @brief Enable hwvad callback.
AnnaBridge 171:3a7713b1edbc 414
AnnaBridge 171:3a7713b1edbc 415 * This function enables the hwvad interrupt for the selected DMIC peripheral.
AnnaBridge 171:3a7713b1edbc 416 * The callback function is not enabled until this function is called.
AnnaBridge 171:3a7713b1edbc 417 *
AnnaBridge 171:3a7713b1edbc 418 * @param base Base address of the DMIC peripheral.
AnnaBridge 171:3a7713b1edbc 419 * @param vadcb callback Pointer to store callback function.
AnnaBridge 171:3a7713b1edbc 420 * @retval None.
AnnaBridge 171:3a7713b1edbc 421 */
AnnaBridge 171:3a7713b1edbc 422 void DMIC_HwvadEnableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb);
AnnaBridge 171:3a7713b1edbc 423
AnnaBridge 171:3a7713b1edbc 424 /*!
AnnaBridge 171:3a7713b1edbc 425 * @brief Disable callback.
AnnaBridge 171:3a7713b1edbc 426
AnnaBridge 171:3a7713b1edbc 427 * This function disables the hwvad interrupt for the selected DMIC peripheral.
AnnaBridge 171:3a7713b1edbc 428 *
AnnaBridge 171:3a7713b1edbc 429 * @param base Base address of the DMIC peripheral.
AnnaBridge 171:3a7713b1edbc 430 * @param vadcb callback Pointer to store callback function..
AnnaBridge 171:3a7713b1edbc 431 * @retval None.
AnnaBridge 171:3a7713b1edbc 432 */
AnnaBridge 171:3a7713b1edbc 433 void DMIC_HwvadDisableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb);
AnnaBridge 171:3a7713b1edbc 434
AnnaBridge 171:3a7713b1edbc 435 /*! @} */
AnnaBridge 171:3a7713b1edbc 436
AnnaBridge 171:3a7713b1edbc 437 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 438 }
AnnaBridge 171:3a7713b1edbc 439 #endif
AnnaBridge 171:3a7713b1edbc 440
AnnaBridge 171:3a7713b1edbc 441 /*! @}*/
AnnaBridge 171:3a7713b1edbc 442
AnnaBridge 171:3a7713b1edbc 443 #endif /* __FSL_DMIC_H */