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TARGET_EFM32HG_STK3400/TOOLCHAIN_ARM_MICRO/efm32hg_mtb.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 2 * @file efm32hg_mtb.h
AnnaBridge 171:3a7713b1edbc 3 * @brief EFM32HG_MTB register and bit field definitions
AnnaBridge 171:3a7713b1edbc 4 * @version 5.1.2
AnnaBridge 171:3a7713b1edbc 5 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 6 * @section License
AnnaBridge 171:3a7713b1edbc 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 171:3a7713b1edbc 8 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 171:3a7713b1edbc 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 171:3a7713b1edbc 12 * freely, subject to the following restrictions:
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 171:3a7713b1edbc 15 * claim that you wrote the original software.@n
AnnaBridge 171:3a7713b1edbc 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 171:3a7713b1edbc 17 * misrepresented as being the original software.@n
AnnaBridge 171:3a7713b1edbc 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 171:3a7713b1edbc 19 *
AnnaBridge 171:3a7713b1edbc 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
AnnaBridge 171:3a7713b1edbc 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
AnnaBridge 171:3a7713b1edbc 22 * providing the Software "AS IS", with no express or implied warranties of any
AnnaBridge 171:3a7713b1edbc 23 * kind, including, but not limited to, any implied warranties of
AnnaBridge 171:3a7713b1edbc 24 * merchantability or fitness for any particular purpose or warranties against
AnnaBridge 171:3a7713b1edbc 25 * infringement of any proprietary rights of a third party.
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
AnnaBridge 171:3a7713b1edbc 28 * incidental, or special damages, or any other relief, or for any claim by
AnnaBridge 171:3a7713b1edbc 29 * any third party, arising from your use of this Software.
AnnaBridge 171:3a7713b1edbc 30 *
AnnaBridge 171:3a7713b1edbc 31 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 32 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 33 * @addtogroup Parts
AnnaBridge 171:3a7713b1edbc 34 * @{
AnnaBridge 171:3a7713b1edbc 35 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 36 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 37 * @defgroup EFM32HG_MTB
AnnaBridge 171:3a7713b1edbc 38 * @{
AnnaBridge 171:3a7713b1edbc 39 * @brief EFM32HG_MTB Register Declaration
AnnaBridge 171:3a7713b1edbc 40 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 41 typedef struct
AnnaBridge 171:3a7713b1edbc 42 {
AnnaBridge 171:3a7713b1edbc 43 __IOM uint32_t POSITION; /**< MTB Trace Position Register. */
AnnaBridge 171:3a7713b1edbc 44 __IOM uint32_t MASTER; /**< MTB Trace Control Register */
AnnaBridge 171:3a7713b1edbc 45 __IOM uint32_t FLOW; /**< MTB Trace Flow Register */
AnnaBridge 171:3a7713b1edbc 46 __IOM uint32_t BASE; /**< MTB Trace Base Register */
AnnaBridge 171:3a7713b1edbc 47 } MTB_TypeDef; /** @} */
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 50 * @defgroup EFM32HG_MTB_BitFields
AnnaBridge 171:3a7713b1edbc 51 * @{
AnnaBridge 171:3a7713b1edbc 52 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 53
AnnaBridge 171:3a7713b1edbc 54 /* Bit fields for MTB POSITION */
AnnaBridge 171:3a7713b1edbc 55 #define _MTB_POSITION_RESETVALUE 0x00000000UL /**< Default value for MTB_POSITION */
AnnaBridge 171:3a7713b1edbc 56 #define _MTB_POSITION_MASK 0xFFFFFFFCUL /**< Mask for MTB_POSITION */
AnnaBridge 171:3a7713b1edbc 57 #define MTB_POSITION_WRAP (0x1UL << 2) /**< Trace wrap bit. */
AnnaBridge 171:3a7713b1edbc 58 #define _MTB_POSITION_WRAP_SHIFT 2 /**< Shift value for MTB_WRAP */
AnnaBridge 171:3a7713b1edbc 59 #define _MTB_POSITION_WRAP_MASK 0x4UL /**< Bit mask for MTB_WRAP */
AnnaBridge 171:3a7713b1edbc 60 #define _MTB_POSITION_WRAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_POSITION */
AnnaBridge 171:3a7713b1edbc 61 #define MTB_POSITION_WRAP_DEFAULT (_MTB_POSITION_WRAP_DEFAULT << 2) /**< Shifted mode DEFAULT for MTB_POSITION */
AnnaBridge 171:3a7713b1edbc 62 #define _MTB_POSITION_POINTER_SHIFT 3 /**< Shift value for MTB_POINTER */
AnnaBridge 171:3a7713b1edbc 63 #define _MTB_POSITION_POINTER_MASK 0xFFFFFFF8UL /**< Bit mask for MTB_POINTER */
AnnaBridge 171:3a7713b1edbc 64 #define _MTB_POSITION_POINTER_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_POSITION */
AnnaBridge 171:3a7713b1edbc 65 #define MTB_POSITION_POINTER_DEFAULT (_MTB_POSITION_POINTER_DEFAULT << 3) /**< Shifted mode DEFAULT for MTB_POSITION */
AnnaBridge 171:3a7713b1edbc 66
AnnaBridge 171:3a7713b1edbc 67 /* Bit fields for MTB MASTER */
AnnaBridge 171:3a7713b1edbc 68 #define _MTB_MASTER_RESETVALUE 0x00000000UL /**< Default value for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 69 #define _MTB_MASTER_MASK 0x8000027FUL /**< Mask for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 70 #define _MTB_MASTER_MASK_SHIFT 0 /**< Shift value for MTB_MASK */
AnnaBridge 171:3a7713b1edbc 71 #define _MTB_MASTER_MASK_MASK 0x1FUL /**< Bit mask for MTB_MASK */
AnnaBridge 171:3a7713b1edbc 72 #define _MTB_MASTER_MASK_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 73 #define MTB_MASTER_MASK_DEFAULT (_MTB_MASTER_MASK_DEFAULT << 0) /**< Shifted mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 74 #define MTB_MASTER_TSTARTEN (0x1UL << 5) /**< Trace start input enable. */
AnnaBridge 171:3a7713b1edbc 75 #define _MTB_MASTER_TSTARTEN_SHIFT 5 /**< Shift value for MTB_TSTARTEN */
AnnaBridge 171:3a7713b1edbc 76 #define _MTB_MASTER_TSTARTEN_MASK 0x20UL /**< Bit mask for MTB_TSTARTEN */
AnnaBridge 171:3a7713b1edbc 77 #define _MTB_MASTER_TSTARTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 78 #define MTB_MASTER_TSTARTEN_DEFAULT (_MTB_MASTER_TSTARTEN_DEFAULT << 5) /**< Shifted mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 79 #define MTB_MASTER_TSTOPEN (0x1UL << 6) /**< Trace stop input enable. */
AnnaBridge 171:3a7713b1edbc 80 #define _MTB_MASTER_TSTOPEN_SHIFT 6 /**< Shift value for MTB_TSTOPEN */
AnnaBridge 171:3a7713b1edbc 81 #define _MTB_MASTER_TSTOPEN_MASK 0x40UL /**< Bit mask for MTB_TSTOPEN */
AnnaBridge 171:3a7713b1edbc 82 #define _MTB_MASTER_TSTOPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 83 #define MTB_MASTER_TSTOPEN_DEFAULT (_MTB_MASTER_TSTOPEN_DEFAULT << 6) /**< Shifted mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 84 #define MTB_MASTER_HALTREQ (0x1UL << 9) /**< Halt request bit. */
AnnaBridge 171:3a7713b1edbc 85 #define _MTB_MASTER_HALTREQ_SHIFT 9 /**< Shift value for MTB_HALTREQ */
AnnaBridge 171:3a7713b1edbc 86 #define _MTB_MASTER_HALTREQ_MASK 0x200UL /**< Bit mask for MTB_HALTREQ */
AnnaBridge 171:3a7713b1edbc 87 #define _MTB_MASTER_HALTREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 88 #define MTB_MASTER_HALTREQ_DEFAULT (_MTB_MASTER_HALTREQ_DEFAULT << 9) /**< Shifted mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 89 #define MTB_MASTER_EN (0x1UL << 31) /**< Main trace enable bit. */
AnnaBridge 171:3a7713b1edbc 90 #define _MTB_MASTER_EN_SHIFT 31 /**< Shift value for MTB_EN */
AnnaBridge 171:3a7713b1edbc 91 #define _MTB_MASTER_EN_MASK 0x80000000UL /**< Bit mask for MTB_EN */
AnnaBridge 171:3a7713b1edbc 92 #define _MTB_MASTER_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 93 #define MTB_MASTER_EN_DEFAULT (_MTB_MASTER_EN_DEFAULT << 31) /**< Shifted mode DEFAULT for MTB_MASTER */
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 /* Bit fields for MTB FLOW */
AnnaBridge 171:3a7713b1edbc 96 #define _MTB_FLOW_RESETVALUE 0x00000000UL /**< Default value for MTB_FLOW */
AnnaBridge 171:3a7713b1edbc 97 #define _MTB_FLOW_MASK 0xFFFFFFFBUL /**< Mask for MTB_FLOW */
AnnaBridge 171:3a7713b1edbc 98 #define MTB_FLOW_AUTOSTOP (0x1UL << 0) /**< AUTOSTOP enable. */
AnnaBridge 171:3a7713b1edbc 99 #define _MTB_FLOW_AUTOSTOP_SHIFT 0 /**< Shift value for MTB_AUTOSTOP */
AnnaBridge 171:3a7713b1edbc 100 #define _MTB_FLOW_AUTOSTOP_MASK 0x1UL /**< Bit mask for MTB_AUTOSTOP */
AnnaBridge 171:3a7713b1edbc 101 #define _MTB_FLOW_AUTOSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_FLOW */
AnnaBridge 171:3a7713b1edbc 102 #define MTB_FLOW_AUTOSTOP_DEFAULT (_MTB_FLOW_AUTOSTOP_DEFAULT << 0) /**< Shifted mode DEFAULT for MTB_FLOW */
AnnaBridge 171:3a7713b1edbc 103 #define MTB_FLOW_AUTOHALT (0x1UL << 1) /**< AUTOHALT enable. */
AnnaBridge 171:3a7713b1edbc 104 #define _MTB_FLOW_AUTOHALT_SHIFT 1 /**< Shift value for MTB_AUTOHALT */
AnnaBridge 171:3a7713b1edbc 105 #define _MTB_FLOW_AUTOHALT_MASK 0x2UL /**< Bit mask for MTB_AUTOHALT */
AnnaBridge 171:3a7713b1edbc 106 #define _MTB_FLOW_AUTOHALT_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_FLOW */
AnnaBridge 171:3a7713b1edbc 107 #define MTB_FLOW_AUTOHALT_DEFAULT (_MTB_FLOW_AUTOHALT_DEFAULT << 1) /**< Shifted mode DEFAULT for MTB_FLOW */
AnnaBridge 171:3a7713b1edbc 108 #define _MTB_FLOW_WATERMARK_SHIFT 3 /**< Shift value for MTB_WATERMARK */
AnnaBridge 171:3a7713b1edbc 109 #define _MTB_FLOW_WATERMARK_MASK 0xFFFFFFF8UL /**< Bit mask for MTB_WATERMARK */
AnnaBridge 171:3a7713b1edbc 110 #define _MTB_FLOW_WATERMARK_DEFAULT 0x00000000UL /**< Mode DEFAULT for MTB_FLOW */
AnnaBridge 171:3a7713b1edbc 111 #define MTB_FLOW_WATERMARK_DEFAULT (_MTB_FLOW_WATERMARK_DEFAULT << 3) /**< Shifted mode DEFAULT for MTB_FLOW */
AnnaBridge 171:3a7713b1edbc 112
AnnaBridge 171:3a7713b1edbc 113 /* Bit fields for MTB BASE */
AnnaBridge 171:3a7713b1edbc 114 #define _MTB_BASE_RESETVALUE 0x20000000UL /**< Default value for MTB_BASE */
AnnaBridge 171:3a7713b1edbc 115 #define _MTB_BASE_MASK 0xFFFFFFFFUL /**< Mask for MTB_BASE */
AnnaBridge 171:3a7713b1edbc 116 #define _MTB_BASE_BASE_SHIFT 0 /**< Shift value for MTB_BASE */
AnnaBridge 171:3a7713b1edbc 117 #define _MTB_BASE_BASE_MASK 0xFFFFFFFFUL /**< Bit mask for MTB_BASE */
AnnaBridge 171:3a7713b1edbc 118 #define _MTB_BASE_BASE_DEFAULT 0x20000000UL /**< Mode DEFAULT for MTB_BASE */
AnnaBridge 171:3a7713b1edbc 119 #define MTB_BASE_BASE_DEFAULT (_MTB_BASE_BASE_DEFAULT << 0) /**< Shifted mode DEFAULT for MTB_BASE */
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 /** @} End of group EFM32HG_MTB */
AnnaBridge 171:3a7713b1edbc 122 /** @} End of group Parts */
AnnaBridge 171:3a7713b1edbc 123