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hal/gpio_irq_api.h@138:093f2bd7b9eb, 2017-03-14 (annotated)
- Committer:
- <>
- Date:
- Tue Mar 14 16:20:51 2017 +0000
- Revision:
- 138:093f2bd7b9eb
- Parent:
- 128:9bcdf88f62b0
- Child:
- 172:65be27845400
Release 138 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716
3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741
3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780
3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831
3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836
3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840
3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844
3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850
3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860
3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880
3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795
3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828
3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842
3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843
3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879
3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902
3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 128:9bcdf88f62b0 | 1 | |
<> | 128:9bcdf88f62b0 | 2 | /** \addtogroup hal */ |
<> | 128:9bcdf88f62b0 | 3 | /** @{*/ |
<> | 128:9bcdf88f62b0 | 4 | /* mbed Microcontroller Library |
<> | 128:9bcdf88f62b0 | 5 | * Copyright (c) 2006-2013 ARM Limited |
<> | 128:9bcdf88f62b0 | 6 | * |
<> | 128:9bcdf88f62b0 | 7 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 128:9bcdf88f62b0 | 8 | * you may not use this file except in compliance with the License. |
<> | 128:9bcdf88f62b0 | 9 | * You may obtain a copy of the License at |
<> | 128:9bcdf88f62b0 | 10 | * |
<> | 128:9bcdf88f62b0 | 11 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 128:9bcdf88f62b0 | 12 | * |
<> | 128:9bcdf88f62b0 | 13 | * Unless required by applicable law or agreed to in writing, software |
<> | 128:9bcdf88f62b0 | 14 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 128:9bcdf88f62b0 | 15 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 128:9bcdf88f62b0 | 16 | * See the License for the specific language governing permissions and |
<> | 128:9bcdf88f62b0 | 17 | * limitations under the License. |
<> | 128:9bcdf88f62b0 | 18 | */ |
<> | 128:9bcdf88f62b0 | 19 | #ifndef MBED_GPIO_IRQ_API_H |
<> | 128:9bcdf88f62b0 | 20 | #define MBED_GPIO_IRQ_API_H |
<> | 128:9bcdf88f62b0 | 21 | |
<> | 128:9bcdf88f62b0 | 22 | #include "device.h" |
<> | 128:9bcdf88f62b0 | 23 | |
<> | 128:9bcdf88f62b0 | 24 | #if DEVICE_INTERRUPTIN |
<> | 128:9bcdf88f62b0 | 25 | |
<> | 128:9bcdf88f62b0 | 26 | #ifdef __cplusplus |
<> | 128:9bcdf88f62b0 | 27 | extern "C" { |
<> | 128:9bcdf88f62b0 | 28 | #endif |
<> | 128:9bcdf88f62b0 | 29 | |
<> | 128:9bcdf88f62b0 | 30 | /** GPIO IRQ events |
<> | 128:9bcdf88f62b0 | 31 | */ |
<> | 128:9bcdf88f62b0 | 32 | typedef enum { |
<> | 128:9bcdf88f62b0 | 33 | IRQ_NONE, |
<> | 128:9bcdf88f62b0 | 34 | IRQ_RISE, |
<> | 128:9bcdf88f62b0 | 35 | IRQ_FALL |
<> | 128:9bcdf88f62b0 | 36 | } gpio_irq_event; |
<> | 128:9bcdf88f62b0 | 37 | |
<> | 128:9bcdf88f62b0 | 38 | /** GPIO IRQ HAL structure. gpio_irq_s is declared in the target's HAL |
<> | 128:9bcdf88f62b0 | 39 | */ |
<> | 128:9bcdf88f62b0 | 40 | typedef struct gpio_irq_s gpio_irq_t; |
<> | 128:9bcdf88f62b0 | 41 | |
<> | 128:9bcdf88f62b0 | 42 | typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event); |
<> | 128:9bcdf88f62b0 | 43 | |
<> | 128:9bcdf88f62b0 | 44 | /** |
<> | 128:9bcdf88f62b0 | 45 | * \defgroup hal_gpioirq GPIO IRQ HAL functions |
<> | 128:9bcdf88f62b0 | 46 | * @{ |
<> | 128:9bcdf88f62b0 | 47 | */ |
<> | 128:9bcdf88f62b0 | 48 | |
<> | 128:9bcdf88f62b0 | 49 | /** Initialize the GPIO IRQ pin |
<> | 128:9bcdf88f62b0 | 50 | * |
<> | 128:9bcdf88f62b0 | 51 | * @param obj The GPIO object to initialize |
<> | 128:9bcdf88f62b0 | 52 | * @param pin The GPIO pin name |
<> | 128:9bcdf88f62b0 | 53 | * @param handler The handler to be attached to GPIO IRQ |
<> | 128:9bcdf88f62b0 | 54 | * @param id The object ID (id != 0, 0 is reserved) |
<> | 128:9bcdf88f62b0 | 55 | * @return -1 if pin is NC, 0 otherwise |
<> | 128:9bcdf88f62b0 | 56 | */ |
<> | 128:9bcdf88f62b0 | 57 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id); |
<> | 128:9bcdf88f62b0 | 58 | |
<> | 128:9bcdf88f62b0 | 59 | /** Release the GPIO IRQ PIN |
<> | 128:9bcdf88f62b0 | 60 | * |
<> | 128:9bcdf88f62b0 | 61 | * @param obj The gpio object |
<> | 128:9bcdf88f62b0 | 62 | */ |
<> | 128:9bcdf88f62b0 | 63 | void gpio_irq_free(gpio_irq_t *obj); |
<> | 128:9bcdf88f62b0 | 64 | |
<> | 128:9bcdf88f62b0 | 65 | /** Enable/disable pin IRQ event |
<> | 128:9bcdf88f62b0 | 66 | * |
<> | 128:9bcdf88f62b0 | 67 | * @param obj The GPIO object |
<> | 128:9bcdf88f62b0 | 68 | * @param event The GPIO IRQ event |
<> | 128:9bcdf88f62b0 | 69 | * @param enable The enable flag |
<> | 128:9bcdf88f62b0 | 70 | */ |
<> | 128:9bcdf88f62b0 | 71 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable); |
<> | 128:9bcdf88f62b0 | 72 | |
<> | 128:9bcdf88f62b0 | 73 | /** Enable GPIO IRQ |
<> | 128:9bcdf88f62b0 | 74 | * |
<> | 128:9bcdf88f62b0 | 75 | * This is target dependent, as it might enable the entire port or just a pin |
<> | 128:9bcdf88f62b0 | 76 | * @param obj The GPIO object |
<> | 128:9bcdf88f62b0 | 77 | */ |
<> | 128:9bcdf88f62b0 | 78 | void gpio_irq_enable(gpio_irq_t *obj); |
<> | 128:9bcdf88f62b0 | 79 | |
<> | 128:9bcdf88f62b0 | 80 | /** Disable GPIO IRQ |
<> | 128:9bcdf88f62b0 | 81 | * |
<> | 128:9bcdf88f62b0 | 82 | * This is target dependent, as it might disable the entire port or just a pin |
<> | 128:9bcdf88f62b0 | 83 | * @param obj The GPIO object |
<> | 128:9bcdf88f62b0 | 84 | */ |
<> | 128:9bcdf88f62b0 | 85 | void gpio_irq_disable(gpio_irq_t *obj); |
<> | 128:9bcdf88f62b0 | 86 | |
<> | 128:9bcdf88f62b0 | 87 | /**@}*/ |
<> | 128:9bcdf88f62b0 | 88 | |
<> | 128:9bcdf88f62b0 | 89 | #ifdef __cplusplus |
<> | 128:9bcdf88f62b0 | 90 | } |
<> | 128:9bcdf88f62b0 | 91 | #endif |
<> | 128:9bcdf88f62b0 | 92 | |
<> | 128:9bcdf88f62b0 | 93 | #endif |
<> | 128:9bcdf88f62b0 | 94 | |
<> | 128:9bcdf88f62b0 | 95 | #endif |
<> | 128:9bcdf88f62b0 | 96 | |
<> | 128:9bcdf88f62b0 | 97 | /** @}*/ |