mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F756ZG/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
135:176b8275d35d
Child:
139:856d2700e60b
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32f7xx_hal_sdram.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.1.2
<> 135:176b8275d35d 6 * @date 23-September-2016
Kojto 122:f9eeca106725 7 * @brief Header file of SDRAM HAL module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32F7xx_HAL_SDRAM_H
Kojto 122:f9eeca106725 40 #define __STM32F7xx_HAL_SDRAM_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
Kojto 122:f9eeca106725 46 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 47 #include "stm32f7xx_ll_fmc.h"
Kojto 122:f9eeca106725 48
Kojto 122:f9eeca106725 49 /** @addtogroup STM32F7xx_HAL_Driver
Kojto 122:f9eeca106725 50 * @{
Kojto 122:f9eeca106725 51 */
Kojto 122:f9eeca106725 52
Kojto 122:f9eeca106725 53 /** @addtogroup SDRAM
Kojto 122:f9eeca106725 54 * @{
Kojto 122:f9eeca106725 55 */
Kojto 122:f9eeca106725 56
Kojto 122:f9eeca106725 57 /* Exported typedef ----------------------------------------------------------*/
Kojto 122:f9eeca106725 58
Kojto 122:f9eeca106725 59 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
Kojto 122:f9eeca106725 60 * @{
Kojto 122:f9eeca106725 61 */
Kojto 122:f9eeca106725 62
Kojto 122:f9eeca106725 63 /**
Kojto 122:f9eeca106725 64 * @brief HAL SDRAM State structure definition
Kojto 122:f9eeca106725 65 */
Kojto 122:f9eeca106725 66 typedef enum
Kojto 122:f9eeca106725 67 {
Kojto 122:f9eeca106725 68 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */
Kojto 122:f9eeca106725 69 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */
Kojto 122:f9eeca106725 70 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */
Kojto 122:f9eeca106725 71 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */
Kojto 122:f9eeca106725 72 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */
Kojto 122:f9eeca106725 73 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */
Kojto 122:f9eeca106725 74
Kojto 122:f9eeca106725 75 }HAL_SDRAM_StateTypeDef;
Kojto 122:f9eeca106725 76
Kojto 122:f9eeca106725 77 /**
Kojto 122:f9eeca106725 78 * @brief SDRAM handle Structure definition
Kojto 122:f9eeca106725 79 */
Kojto 122:f9eeca106725 80 typedef struct
Kojto 122:f9eeca106725 81 {
Kojto 122:f9eeca106725 82 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
Kojto 122:f9eeca106725 83
Kojto 122:f9eeca106725 84 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
Kojto 122:f9eeca106725 85
Kojto 122:f9eeca106725 86 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
Kojto 122:f9eeca106725 87
Kojto 122:f9eeca106725 88 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
Kojto 122:f9eeca106725 89
Kojto 122:f9eeca106725 90 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Kojto 122:f9eeca106725 91
Kojto 122:f9eeca106725 92 }SDRAM_HandleTypeDef;
Kojto 122:f9eeca106725 93 /**
Kojto 122:f9eeca106725 94 * @}
Kojto 122:f9eeca106725 95 */
Kojto 122:f9eeca106725 96
Kojto 122:f9eeca106725 97 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 98 /* Exported macro ------------------------------------------------------------*/
Kojto 122:f9eeca106725 99
Kojto 122:f9eeca106725 100 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
Kojto 122:f9eeca106725 101 * @{
Kojto 122:f9eeca106725 102 */
Kojto 122:f9eeca106725 103
Kojto 122:f9eeca106725 104 /** @brief Reset SDRAM handle state
Kojto 122:f9eeca106725 105 * @param __HANDLE__: specifies the SDRAM handle.
Kojto 122:f9eeca106725 106 * @retval None
Kojto 122:f9eeca106725 107 */
Kojto 122:f9eeca106725 108 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
Kojto 122:f9eeca106725 109
Kojto 122:f9eeca106725 110 /**
Kojto 122:f9eeca106725 111 * @}
Kojto 122:f9eeca106725 112 */
Kojto 122:f9eeca106725 113
Kojto 122:f9eeca106725 114 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 115
Kojto 122:f9eeca106725 116 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
Kojto 122:f9eeca106725 117 * @{
Kojto 122:f9eeca106725 118 */
Kojto 122:f9eeca106725 119
Kojto 122:f9eeca106725 120 /** @addtogroup SDRAM_Exported_Functions_Group1
Kojto 122:f9eeca106725 121 * @{
Kojto 122:f9eeca106725 122 */
Kojto 122:f9eeca106725 123
Kojto 122:f9eeca106725 124 /* Initialization/de-initialization functions *********************************/
Kojto 122:f9eeca106725 125 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
Kojto 122:f9eeca106725 126 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 127 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 128 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 129
Kojto 122:f9eeca106725 130 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 131 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 132 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 133 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 134
Kojto 122:f9eeca106725 135 /**
Kojto 122:f9eeca106725 136 * @}
Kojto 122:f9eeca106725 137 */
Kojto 122:f9eeca106725 138
Kojto 122:f9eeca106725 139 /** @addtogroup SDRAM_Exported_Functions_Group2
Kojto 122:f9eeca106725 140 * @{
Kojto 122:f9eeca106725 141 */
Kojto 122:f9eeca106725 142 /* I/O operation functions ****************************************************/
Kojto 122:f9eeca106725 143 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Kojto 122:f9eeca106725 144 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Kojto 122:f9eeca106725 145 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Kojto 122:f9eeca106725 146 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Kojto 122:f9eeca106725 147 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 122:f9eeca106725 148 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 122:f9eeca106725 149
Kojto 122:f9eeca106725 150 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 122:f9eeca106725 151 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 122:f9eeca106725 152
Kojto 122:f9eeca106725 153 /**
Kojto 122:f9eeca106725 154 * @}
Kojto 122:f9eeca106725 155 */
Kojto 122:f9eeca106725 156
Kojto 122:f9eeca106725 157 /** @addtogroup SDRAM_Exported_Functions_Group3
Kojto 122:f9eeca106725 158 * @{
Kojto 122:f9eeca106725 159 */
Kojto 122:f9eeca106725 160 /* SDRAM Control functions *****************************************************/
Kojto 122:f9eeca106725 161 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 162 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 163 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
Kojto 122:f9eeca106725 164 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
Kojto 122:f9eeca106725 165 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
Kojto 122:f9eeca106725 166 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 167
Kojto 122:f9eeca106725 168 /**
Kojto 122:f9eeca106725 169 * @}
Kojto 122:f9eeca106725 170 */
Kojto 122:f9eeca106725 171
Kojto 122:f9eeca106725 172 /** @addtogroup SDRAM_Exported_Functions_Group4
Kojto 122:f9eeca106725 173 * @{
Kojto 122:f9eeca106725 174 */
Kojto 122:f9eeca106725 175 /* SDRAM State functions ********************************************************/
Kojto 122:f9eeca106725 176 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
Kojto 122:f9eeca106725 177 /**
Kojto 122:f9eeca106725 178 * @}
Kojto 122:f9eeca106725 179 */
Kojto 122:f9eeca106725 180
Kojto 122:f9eeca106725 181 /**
Kojto 122:f9eeca106725 182 * @}
Kojto 122:f9eeca106725 183 */
Kojto 122:f9eeca106725 184
Kojto 122:f9eeca106725 185 /**
Kojto 122:f9eeca106725 186 * @}
Kojto 122:f9eeca106725 187 */
Kojto 122:f9eeca106725 188
Kojto 122:f9eeca106725 189 /**
Kojto 122:f9eeca106725 190 * @}
Kojto 122:f9eeca106725 191 */
Kojto 122:f9eeca106725 192
Kojto 122:f9eeca106725 193 #ifdef __cplusplus
Kojto 122:f9eeca106725 194 }
Kojto 122:f9eeca106725 195 #endif
Kojto 122:f9eeca106725 196
Kojto 122:f9eeca106725 197 #endif /* __STM32F7xx_HAL_SDRAM_H */
Kojto 122:f9eeca106725 198
Kojto 122:f9eeca106725 199 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/