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TARGET_NUCLEO_F756ZG/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.h@138:093f2bd7b9eb, 2017-03-14 (annotated)
- Committer:
- <>
- Date:
- Tue Mar 14 16:20:51 2017 +0000
- Revision:
- 138:093f2bd7b9eb
- Parent:
- 135:176b8275d35d
- Child:
- 139:856d2700e60b
Release 138 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716
3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741
3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780
3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831
3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836
3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840
3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844
3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850
3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860
3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880
3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795
3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828
3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842
3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843
3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879
3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902
3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 122:f9eeca106725 | 1 | /** |
Kojto | 122:f9eeca106725 | 2 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 3 | * @file stm32f7xx_hal_pwr_ex.h |
Kojto | 122:f9eeca106725 | 4 | * @author MCD Application Team |
<> | 135:176b8275d35d | 5 | * @version V1.1.2 |
<> | 135:176b8275d35d | 6 | * @date 23-September-2016 |
Kojto | 122:f9eeca106725 | 7 | * @brief Header file of PWR HAL Extension module. |
Kojto | 122:f9eeca106725 | 8 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 9 | * @attention |
Kojto | 122:f9eeca106725 | 10 | * |
Kojto | 122:f9eeca106725 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
Kojto | 122:f9eeca106725 | 12 | * |
Kojto | 122:f9eeca106725 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
Kojto | 122:f9eeca106725 | 14 | * are permitted provided that the following conditions are met: |
Kojto | 122:f9eeca106725 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
Kojto | 122:f9eeca106725 | 16 | * this list of conditions and the following disclaimer. |
Kojto | 122:f9eeca106725 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Kojto | 122:f9eeca106725 | 18 | * this list of conditions and the following disclaimer in the documentation |
Kojto | 122:f9eeca106725 | 19 | * and/or other materials provided with the distribution. |
Kojto | 122:f9eeca106725 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Kojto | 122:f9eeca106725 | 21 | * may be used to endorse or promote products derived from this software |
Kojto | 122:f9eeca106725 | 22 | * without specific prior written permission. |
Kojto | 122:f9eeca106725 | 23 | * |
Kojto | 122:f9eeca106725 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Kojto | 122:f9eeca106725 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Kojto | 122:f9eeca106725 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 122:f9eeca106725 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Kojto | 122:f9eeca106725 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Kojto | 122:f9eeca106725 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Kojto | 122:f9eeca106725 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Kojto | 122:f9eeca106725 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Kojto | 122:f9eeca106725 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Kojto | 122:f9eeca106725 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 122:f9eeca106725 | 34 | * |
Kojto | 122:f9eeca106725 | 35 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 36 | */ |
Kojto | 122:f9eeca106725 | 37 | |
Kojto | 122:f9eeca106725 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
Kojto | 122:f9eeca106725 | 39 | #ifndef __STM32F7xx_HAL_PWR_EX_H |
Kojto | 122:f9eeca106725 | 40 | #define __STM32F7xx_HAL_PWR_EX_H |
Kojto | 122:f9eeca106725 | 41 | |
Kojto | 122:f9eeca106725 | 42 | #ifdef __cplusplus |
Kojto | 122:f9eeca106725 | 43 | extern "C" { |
Kojto | 122:f9eeca106725 | 44 | #endif |
Kojto | 122:f9eeca106725 | 45 | |
Kojto | 122:f9eeca106725 | 46 | /* Includes ------------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 47 | #include "stm32f7xx_hal_def.h" |
Kojto | 122:f9eeca106725 | 48 | |
Kojto | 122:f9eeca106725 | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
Kojto | 122:f9eeca106725 | 50 | * @{ |
Kojto | 122:f9eeca106725 | 51 | */ |
Kojto | 122:f9eeca106725 | 52 | |
Kojto | 122:f9eeca106725 | 53 | /** @addtogroup PWREx |
Kojto | 122:f9eeca106725 | 54 | * @{ |
Kojto | 122:f9eeca106725 | 55 | */ |
Kojto | 122:f9eeca106725 | 56 | |
Kojto | 122:f9eeca106725 | 57 | /* Exported types ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 58 | /* Exported constants --------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 59 | /** @defgroup PWREx_Exported_Constants PWREx Exported Constants |
Kojto | 122:f9eeca106725 | 60 | * @{ |
Kojto | 122:f9eeca106725 | 61 | */ |
Kojto | 122:f9eeca106725 | 62 | /** @defgroup PWREx_WakeUp_Pins PWREx Wake Up Pins |
Kojto | 122:f9eeca106725 | 63 | * @{ |
Kojto | 122:f9eeca106725 | 64 | */ |
Kojto | 122:f9eeca106725 | 65 | #define PWR_WAKEUP_PIN1 PWR_CSR2_EWUP1 |
Kojto | 122:f9eeca106725 | 66 | #define PWR_WAKEUP_PIN2 PWR_CSR2_EWUP2 |
Kojto | 122:f9eeca106725 | 67 | #define PWR_WAKEUP_PIN3 PWR_CSR2_EWUP3 |
Kojto | 122:f9eeca106725 | 68 | #define PWR_WAKEUP_PIN4 PWR_CSR2_EWUP4 |
Kojto | 122:f9eeca106725 | 69 | #define PWR_WAKEUP_PIN5 PWR_CSR2_EWUP5 |
Kojto | 122:f9eeca106725 | 70 | #define PWR_WAKEUP_PIN6 PWR_CSR2_EWUP6 |
Kojto | 122:f9eeca106725 | 71 | #define PWR_WAKEUP_PIN1_HIGH PWR_CSR2_EWUP1 |
Kojto | 122:f9eeca106725 | 72 | #define PWR_WAKEUP_PIN2_HIGH PWR_CSR2_EWUP2 |
Kojto | 122:f9eeca106725 | 73 | #define PWR_WAKEUP_PIN3_HIGH PWR_CSR2_EWUP3 |
Kojto | 122:f9eeca106725 | 74 | #define PWR_WAKEUP_PIN4_HIGH PWR_CSR2_EWUP4 |
Kojto | 122:f9eeca106725 | 75 | #define PWR_WAKEUP_PIN5_HIGH PWR_CSR2_EWUP5 |
Kojto | 122:f9eeca106725 | 76 | #define PWR_WAKEUP_PIN6_HIGH PWR_CSR2_EWUP6 |
Kojto | 122:f9eeca106725 | 77 | #define PWR_WAKEUP_PIN1_LOW (uint32_t)((PWR_CR2_WUPP1<<6) | PWR_CSR2_EWUP1) |
Kojto | 122:f9eeca106725 | 78 | #define PWR_WAKEUP_PIN2_LOW (uint32_t)((PWR_CR2_WUPP2<<6) | PWR_CSR2_EWUP2) |
Kojto | 122:f9eeca106725 | 79 | #define PWR_WAKEUP_PIN3_LOW (uint32_t)((PWR_CR2_WUPP3<<6) | PWR_CSR2_EWUP3) |
Kojto | 122:f9eeca106725 | 80 | #define PWR_WAKEUP_PIN4_LOW (uint32_t)((PWR_CR2_WUPP4<<6) | PWR_CSR2_EWUP4) |
Kojto | 122:f9eeca106725 | 81 | #define PWR_WAKEUP_PIN5_LOW (uint32_t)((PWR_CR2_WUPP5<<6) | PWR_CSR2_EWUP5) |
Kojto | 122:f9eeca106725 | 82 | #define PWR_WAKEUP_PIN6_LOW (uint32_t)((PWR_CR2_WUPP6<<6) | PWR_CSR2_EWUP6) |
Kojto | 122:f9eeca106725 | 83 | |
Kojto | 122:f9eeca106725 | 84 | /** |
Kojto | 122:f9eeca106725 | 85 | * @} |
Kojto | 122:f9eeca106725 | 86 | */ |
Kojto | 122:f9eeca106725 | 87 | |
Kojto | 122:f9eeca106725 | 88 | /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode |
Kojto | 122:f9eeca106725 | 89 | * @{ |
Kojto | 122:f9eeca106725 | 90 | */ |
Kojto | 122:f9eeca106725 | 91 | #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR1_MRUDS |
Kojto | 122:f9eeca106725 | 92 | #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR1_LPDS | PWR_CR1_LPUDS)) |
Kojto | 122:f9eeca106725 | 93 | /** |
Kojto | 122:f9eeca106725 | 94 | * @} |
Kojto | 122:f9eeca106725 | 95 | */ |
Kojto | 122:f9eeca106725 | 96 | |
Kojto | 122:f9eeca106725 | 97 | /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag |
Kojto | 122:f9eeca106725 | 98 | * @{ |
Kojto | 122:f9eeca106725 | 99 | */ |
Kojto | 122:f9eeca106725 | 100 | #define PWR_FLAG_ODRDY PWR_CSR1_ODRDY |
Kojto | 122:f9eeca106725 | 101 | #define PWR_FLAG_ODSWRDY PWR_CSR1_ODSWRDY |
Kojto | 122:f9eeca106725 | 102 | #define PWR_FLAG_UDRDY PWR_CSR1_UDRDY |
Kojto | 122:f9eeca106725 | 103 | /** |
Kojto | 122:f9eeca106725 | 104 | * @} |
Kojto | 122:f9eeca106725 | 105 | */ |
Kojto | 122:f9eeca106725 | 106 | |
Kojto | 122:f9eeca106725 | 107 | /** @defgroup PWREx_Wakeup_Pins_Flag PWREx Wake Up Pin Flags |
Kojto | 122:f9eeca106725 | 108 | * @{ |
Kojto | 122:f9eeca106725 | 109 | */ |
Kojto | 122:f9eeca106725 | 110 | #define PWR_WAKEUP_PIN_FLAG1 PWR_CSR2_WUPF1 |
Kojto | 122:f9eeca106725 | 111 | #define PWR_WAKEUP_PIN_FLAG2 PWR_CSR2_WUPF2 |
Kojto | 122:f9eeca106725 | 112 | #define PWR_WAKEUP_PIN_FLAG3 PWR_CSR2_WUPF3 |
Kojto | 122:f9eeca106725 | 113 | #define PWR_WAKEUP_PIN_FLAG4 PWR_CSR2_WUPF4 |
Kojto | 122:f9eeca106725 | 114 | #define PWR_WAKEUP_PIN_FLAG5 PWR_CSR2_WUPF5 |
Kojto | 122:f9eeca106725 | 115 | #define PWR_WAKEUP_PIN_FLAG6 PWR_CSR2_WUPF6 |
Kojto | 122:f9eeca106725 | 116 | /** |
Kojto | 122:f9eeca106725 | 117 | * @} |
Kojto | 122:f9eeca106725 | 118 | */ |
Kojto | 122:f9eeca106725 | 119 | |
Kojto | 122:f9eeca106725 | 120 | /** |
Kojto | 122:f9eeca106725 | 121 | * @} |
Kojto | 122:f9eeca106725 | 122 | */ |
Kojto | 122:f9eeca106725 | 123 | |
Kojto | 122:f9eeca106725 | 124 | /* Exported macro ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 125 | /** @defgroup PWREx_Exported_Macro PWREx Exported Macro |
Kojto | 122:f9eeca106725 | 126 | * @{ |
Kojto | 122:f9eeca106725 | 127 | */ |
Kojto | 122:f9eeca106725 | 128 | /** @brief Macros to enable or disable the Over drive mode. |
Kojto | 122:f9eeca106725 | 129 | */ |
Kojto | 122:f9eeca106725 | 130 | #define __HAL_PWR_OVERDRIVE_ENABLE() (PWR->CR1 |= (uint32_t)PWR_CR1_ODEN) |
Kojto | 122:f9eeca106725 | 131 | #define __HAL_PWR_OVERDRIVE_DISABLE() (PWR->CR1 &= (uint32_t)(~PWR_CR1_ODEN)) |
Kojto | 122:f9eeca106725 | 132 | |
Kojto | 122:f9eeca106725 | 133 | /** @brief Macros to enable or disable the Over drive switching. |
Kojto | 122:f9eeca106725 | 134 | */ |
Kojto | 122:f9eeca106725 | 135 | #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (PWR->CR1 |= (uint32_t)PWR_CR1_ODSWEN) |
Kojto | 122:f9eeca106725 | 136 | #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (PWR->CR1 &= (uint32_t)(~PWR_CR1_ODSWEN)) |
Kojto | 122:f9eeca106725 | 137 | |
Kojto | 122:f9eeca106725 | 138 | /** @brief Macros to enable or disable the Under drive mode. |
Kojto | 122:f9eeca106725 | 139 | * @note This mode is enabled only with STOP low power mode. |
Kojto | 122:f9eeca106725 | 140 | * In this mode, the 1.2V domain is preserved in reduced leakage mode. This |
Kojto | 122:f9eeca106725 | 141 | * mode is only available when the main regulator or the low power regulator |
Kojto | 122:f9eeca106725 | 142 | * is in low voltage mode. |
Kojto | 122:f9eeca106725 | 143 | * @note If the Under-drive mode was enabled, it is automatically disabled after |
Kojto | 122:f9eeca106725 | 144 | * exiting Stop mode. |
Kojto | 122:f9eeca106725 | 145 | * When the voltage regulator operates in Under-drive mode, an additional |
Kojto | 122:f9eeca106725 | 146 | * startup delay is induced when waking up from Stop mode. |
Kojto | 122:f9eeca106725 | 147 | */ |
Kojto | 122:f9eeca106725 | 148 | #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR1 |= (uint32_t)PWR_CR1_UDEN) |
Kojto | 122:f9eeca106725 | 149 | #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR1 &= (uint32_t)(~PWR_CR1_UDEN)) |
Kojto | 122:f9eeca106725 | 150 | |
Kojto | 122:f9eeca106725 | 151 | /** @brief Check PWR flag is set or not. |
Kojto | 122:f9eeca106725 | 152 | * @param __FLAG__: specifies the flag to check. |
Kojto | 122:f9eeca106725 | 153 | * This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 154 | * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode |
Kojto | 122:f9eeca106725 | 155 | * is ready |
Kojto | 122:f9eeca106725 | 156 | * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode |
Kojto | 122:f9eeca106725 | 157 | * switching is ready |
Kojto | 122:f9eeca106725 | 158 | * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode |
Kojto | 122:f9eeca106725 | 159 | * is enabled in Stop mode |
Kojto | 122:f9eeca106725 | 160 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
Kojto | 122:f9eeca106725 | 161 | */ |
Kojto | 122:f9eeca106725 | 162 | #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__)) |
Kojto | 122:f9eeca106725 | 163 | |
Kojto | 122:f9eeca106725 | 164 | /** @brief Clear the Under-Drive Ready flag. |
Kojto | 122:f9eeca106725 | 165 | */ |
Kojto | 122:f9eeca106725 | 166 | #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR1 |= PWR_FLAG_UDRDY) |
Kojto | 122:f9eeca106725 | 167 | |
Kojto | 122:f9eeca106725 | 168 | /** @brief Check Wake Up flag is set or not. |
Kojto | 122:f9eeca106725 | 169 | * @param __WUFLAG__: specifies the Wake Up flag to check. |
Kojto | 122:f9eeca106725 | 170 | * This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 171 | * @arg PWR_WAKEUP_PIN_FLAG1: Wakeup Pin Flag for PA0 |
Kojto | 122:f9eeca106725 | 172 | * @arg PWR_WAKEUP_PIN_FLAG2: Wakeup Pin Flag for PA2 |
Kojto | 122:f9eeca106725 | 173 | * @arg PWR_WAKEUP_PIN_FLAG3: Wakeup Pin Flag for PC1 |
Kojto | 122:f9eeca106725 | 174 | * @arg PWR_WAKEUP_PIN_FLAG4: Wakeup Pin Flag for PC13 |
Kojto | 122:f9eeca106725 | 175 | * @arg PWR_WAKEUP_PIN_FLAG5: Wakeup Pin Flag for PI8 |
Kojto | 122:f9eeca106725 | 176 | * @arg PWR_WAKEUP_PIN_FLAG6: Wakeup Pin Flag for PI11 |
Kojto | 122:f9eeca106725 | 177 | */ |
Kojto | 122:f9eeca106725 | 178 | #define __HAL_PWR_GET_WAKEUP_FLAG(__WUFLAG__) (PWR->CSR2 & (__WUFLAG__)) |
Kojto | 122:f9eeca106725 | 179 | |
Kojto | 122:f9eeca106725 | 180 | /** @brief Clear the WakeUp pins flags. |
Kojto | 122:f9eeca106725 | 181 | * @param __WUFLAG__: specifies the Wake Up pin flag to clear. |
Kojto | 122:f9eeca106725 | 182 | * This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 183 | * @arg PWR_WAKEUP_PIN_FLAG1: Wakeup Pin Flag for PA0 |
Kojto | 122:f9eeca106725 | 184 | * @arg PWR_WAKEUP_PIN_FLAG2: Wakeup Pin Flag for PA2 |
Kojto | 122:f9eeca106725 | 185 | * @arg PWR_WAKEUP_PIN_FLAG3: Wakeup Pin Flag for PC1 |
Kojto | 122:f9eeca106725 | 186 | * @arg PWR_WAKEUP_PIN_FLAG4: Wakeup Pin Flag for PC13 |
Kojto | 122:f9eeca106725 | 187 | * @arg PWR_WAKEUP_PIN_FLAG5: Wakeup Pin Flag for PI8 |
Kojto | 122:f9eeca106725 | 188 | * @arg PWR_WAKEUP_PIN_FLAG6: Wakeup Pin Flag for PI11 |
Kojto | 122:f9eeca106725 | 189 | */ |
Kojto | 122:f9eeca106725 | 190 | #define __HAL_PWR_CLEAR_WAKEUP_FLAG(__WUFLAG__) (PWR->CR2 |= (__WUFLAG__)) |
Kojto | 122:f9eeca106725 | 191 | /** |
Kojto | 122:f9eeca106725 | 192 | * @} |
Kojto | 122:f9eeca106725 | 193 | */ |
Kojto | 122:f9eeca106725 | 194 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 195 | /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions |
Kojto | 122:f9eeca106725 | 196 | * @{ |
Kojto | 122:f9eeca106725 | 197 | */ |
Kojto | 122:f9eeca106725 | 198 | |
Kojto | 122:f9eeca106725 | 199 | /** @addtogroup PWREx_Exported_Functions_Group1 |
Kojto | 122:f9eeca106725 | 200 | * @{ |
Kojto | 122:f9eeca106725 | 201 | */ |
Kojto | 122:f9eeca106725 | 202 | uint32_t HAL_PWREx_GetVoltageRange(void); |
Kojto | 122:f9eeca106725 | 203 | HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling); |
Kojto | 122:f9eeca106725 | 204 | |
Kojto | 122:f9eeca106725 | 205 | void HAL_PWREx_EnableFlashPowerDown(void); |
Kojto | 122:f9eeca106725 | 206 | void HAL_PWREx_DisableFlashPowerDown(void); |
Kojto | 122:f9eeca106725 | 207 | HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void); |
Kojto | 122:f9eeca106725 | 208 | HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void); |
Kojto | 122:f9eeca106725 | 209 | |
Kojto | 122:f9eeca106725 | 210 | void HAL_PWREx_EnableMainRegulatorLowVoltage(void); |
Kojto | 122:f9eeca106725 | 211 | void HAL_PWREx_DisableMainRegulatorLowVoltage(void); |
Kojto | 122:f9eeca106725 | 212 | void HAL_PWREx_EnableLowRegulatorLowVoltage(void); |
Kojto | 122:f9eeca106725 | 213 | void HAL_PWREx_DisableLowRegulatorLowVoltage(void); |
Kojto | 122:f9eeca106725 | 214 | |
Kojto | 122:f9eeca106725 | 215 | HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void); |
Kojto | 122:f9eeca106725 | 216 | HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void); |
Kojto | 122:f9eeca106725 | 217 | HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
Kojto | 122:f9eeca106725 | 218 | |
Kojto | 122:f9eeca106725 | 219 | /** |
Kojto | 122:f9eeca106725 | 220 | * @} |
Kojto | 122:f9eeca106725 | 221 | */ |
Kojto | 122:f9eeca106725 | 222 | |
Kojto | 122:f9eeca106725 | 223 | /** |
Kojto | 122:f9eeca106725 | 224 | * @} |
Kojto | 122:f9eeca106725 | 225 | */ |
Kojto | 122:f9eeca106725 | 226 | /* Private types -------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 227 | /* Private variables ---------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 228 | /* Private constants ---------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 229 | /* Private macros ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 230 | /** @defgroup PWREx_Private_Macros PWREx Private Macros |
Kojto | 122:f9eeca106725 | 231 | * @{ |
Kojto | 122:f9eeca106725 | 232 | */ |
Kojto | 122:f9eeca106725 | 233 | |
Kojto | 122:f9eeca106725 | 234 | /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters |
Kojto | 122:f9eeca106725 | 235 | * @{ |
Kojto | 122:f9eeca106725 | 236 | */ |
Kojto | 122:f9eeca106725 | 237 | #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \ |
Kojto | 122:f9eeca106725 | 238 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON)) |
Kojto | 122:f9eeca106725 | 239 | #define IS_PWR_WAKEUP_PIN(__PIN__) (((__PIN__) == PWR_WAKEUP_PIN1) || \ |
Kojto | 122:f9eeca106725 | 240 | ((__PIN__) == PWR_WAKEUP_PIN2) || \ |
Kojto | 122:f9eeca106725 | 241 | ((__PIN__) == PWR_WAKEUP_PIN3) || \ |
Kojto | 122:f9eeca106725 | 242 | ((__PIN__) == PWR_WAKEUP_PIN4) || \ |
Kojto | 122:f9eeca106725 | 243 | ((__PIN__) == PWR_WAKEUP_PIN5) || \ |
Kojto | 122:f9eeca106725 | 244 | ((__PIN__) == PWR_WAKEUP_PIN6) || \ |
Kojto | 122:f9eeca106725 | 245 | ((__PIN__) == PWR_WAKEUP_PIN1_HIGH) || \ |
Kojto | 122:f9eeca106725 | 246 | ((__PIN__) == PWR_WAKEUP_PIN2_HIGH) || \ |
Kojto | 122:f9eeca106725 | 247 | ((__PIN__) == PWR_WAKEUP_PIN3_HIGH) || \ |
Kojto | 122:f9eeca106725 | 248 | ((__PIN__) == PWR_WAKEUP_PIN4_HIGH) || \ |
Kojto | 122:f9eeca106725 | 249 | ((__PIN__) == PWR_WAKEUP_PIN5_HIGH) || \ |
Kojto | 122:f9eeca106725 | 250 | ((__PIN__) == PWR_WAKEUP_PIN6_HIGH) || \ |
Kojto | 122:f9eeca106725 | 251 | ((__PIN__) == PWR_WAKEUP_PIN1_LOW) || \ |
Kojto | 122:f9eeca106725 | 252 | ((__PIN__) == PWR_WAKEUP_PIN2_LOW) || \ |
Kojto | 122:f9eeca106725 | 253 | ((__PIN__) == PWR_WAKEUP_PIN3_LOW) || \ |
Kojto | 122:f9eeca106725 | 254 | ((__PIN__) == PWR_WAKEUP_PIN4_LOW) || \ |
Kojto | 122:f9eeca106725 | 255 | ((__PIN__) == PWR_WAKEUP_PIN5_LOW) || \ |
Kojto | 122:f9eeca106725 | 256 | ((__PIN__) == PWR_WAKEUP_PIN6_LOW)) |
Kojto | 122:f9eeca106725 | 257 | /** |
Kojto | 122:f9eeca106725 | 258 | * @} |
Kojto | 122:f9eeca106725 | 259 | */ |
Kojto | 122:f9eeca106725 | 260 | |
Kojto | 122:f9eeca106725 | 261 | /** |
Kojto | 122:f9eeca106725 | 262 | * @} |
Kojto | 122:f9eeca106725 | 263 | */ |
Kojto | 122:f9eeca106725 | 264 | |
Kojto | 122:f9eeca106725 | 265 | /** |
Kojto | 122:f9eeca106725 | 266 | * @} |
Kojto | 122:f9eeca106725 | 267 | */ |
Kojto | 122:f9eeca106725 | 268 | |
Kojto | 122:f9eeca106725 | 269 | /** |
Kojto | 122:f9eeca106725 | 270 | * @} |
Kojto | 122:f9eeca106725 | 271 | */ |
Kojto | 122:f9eeca106725 | 272 | |
Kojto | 122:f9eeca106725 | 273 | #ifdef __cplusplus |
Kojto | 122:f9eeca106725 | 274 | } |
Kojto | 122:f9eeca106725 | 275 | #endif |
Kojto | 122:f9eeca106725 | 276 | |
Kojto | 122:f9eeca106725 | 277 | |
Kojto | 122:f9eeca106725 | 278 | #endif /* __STM32F7xx_HAL_PWR_EX_H */ |
Kojto | 122:f9eeca106725 | 279 | |
Kojto | 122:f9eeca106725 | 280 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |