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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F756ZG/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
135:176b8275d35d
Child:
139:856d2700e60b
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 126:abea610beb85 1 /**
AnnaBridge 126:abea610beb85 2 ******************************************************************************
AnnaBridge 126:abea610beb85 3 * @file stm32f7xx_hal_nand.h
AnnaBridge 126:abea610beb85 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.1.2
<> 135:176b8275d35d 6 * @date 23-September-2016
AnnaBridge 126:abea610beb85 7 * @brief Header file of NAND HAL module.
AnnaBridge 126:abea610beb85 8 ******************************************************************************
AnnaBridge 126:abea610beb85 9 * @attention
AnnaBridge 126:abea610beb85 10 *
AnnaBridge 126:abea610beb85 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 126:abea610beb85 12 *
AnnaBridge 126:abea610beb85 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 126:abea610beb85 14 * are permitted provided that the following conditions are met:
AnnaBridge 126:abea610beb85 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 126:abea610beb85 16 * this list of conditions and the following disclaimer.
AnnaBridge 126:abea610beb85 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 126:abea610beb85 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 126:abea610beb85 19 * and/or other materials provided with the distribution.
AnnaBridge 126:abea610beb85 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 126:abea610beb85 21 * may be used to endorse or promote products derived from this software
AnnaBridge 126:abea610beb85 22 * without specific prior written permission.
AnnaBridge 126:abea610beb85 23 *
AnnaBridge 126:abea610beb85 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 126:abea610beb85 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 126:abea610beb85 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 126:abea610beb85 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 126:abea610beb85 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 126:abea610beb85 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 126:abea610beb85 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 126:abea610beb85 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 126:abea610beb85 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 126:abea610beb85 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 126:abea610beb85 34 *
AnnaBridge 126:abea610beb85 35 ******************************************************************************
AnnaBridge 126:abea610beb85 36 */
AnnaBridge 126:abea610beb85 37
AnnaBridge 126:abea610beb85 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 126:abea610beb85 39 #ifndef __STM32F7xx_HAL_NAND_H
AnnaBridge 126:abea610beb85 40 #define __STM32F7xx_HAL_NAND_H
AnnaBridge 126:abea610beb85 41
AnnaBridge 126:abea610beb85 42 #ifdef __cplusplus
AnnaBridge 126:abea610beb85 43 extern "C" {
AnnaBridge 126:abea610beb85 44 #endif
AnnaBridge 126:abea610beb85 45
AnnaBridge 126:abea610beb85 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 47 #include "stm32f7xx_ll_fmc.h"
AnnaBridge 126:abea610beb85 48
AnnaBridge 126:abea610beb85 49 /** @addtogroup STM32F7xx_HAL_Driver
AnnaBridge 126:abea610beb85 50 * @{
AnnaBridge 126:abea610beb85 51 */
AnnaBridge 126:abea610beb85 52
AnnaBridge 126:abea610beb85 53 /** @addtogroup NAND
AnnaBridge 126:abea610beb85 54 * @{
AnnaBridge 126:abea610beb85 55 */
AnnaBridge 126:abea610beb85 56
AnnaBridge 126:abea610beb85 57 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 126:abea610beb85 58 /* Exported types ------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 59 /** @defgroup NAND_Exported_Types NAND Exported Types
AnnaBridge 126:abea610beb85 60 * @{
AnnaBridge 126:abea610beb85 61 */
AnnaBridge 126:abea610beb85 62
AnnaBridge 126:abea610beb85 63 /**
AnnaBridge 126:abea610beb85 64 * @brief HAL NAND State structures definition
AnnaBridge 126:abea610beb85 65 */
AnnaBridge 126:abea610beb85 66 typedef enum
AnnaBridge 126:abea610beb85 67 {
AnnaBridge 126:abea610beb85 68 HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */
AnnaBridge 126:abea610beb85 69 HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
AnnaBridge 126:abea610beb85 70 HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
AnnaBridge 126:abea610beb85 71 HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */
AnnaBridge 126:abea610beb85 72 }HAL_NAND_StateTypeDef;
AnnaBridge 126:abea610beb85 73
AnnaBridge 126:abea610beb85 74 /**
AnnaBridge 126:abea610beb85 75 * @brief NAND Memory electronic signature Structure definition
AnnaBridge 126:abea610beb85 76 */
AnnaBridge 126:abea610beb85 77 typedef struct
AnnaBridge 126:abea610beb85 78 {
AnnaBridge 126:abea610beb85 79 /*<! NAND memory electronic signature maker and device IDs */
AnnaBridge 126:abea610beb85 80
AnnaBridge 126:abea610beb85 81 uint8_t Maker_Id;
AnnaBridge 126:abea610beb85 82
AnnaBridge 126:abea610beb85 83 uint8_t Device_Id;
AnnaBridge 126:abea610beb85 84
AnnaBridge 126:abea610beb85 85 uint8_t Third_Id;
AnnaBridge 126:abea610beb85 86
AnnaBridge 126:abea610beb85 87 uint8_t Fourth_Id;
AnnaBridge 126:abea610beb85 88 }NAND_IDTypeDef;
AnnaBridge 126:abea610beb85 89
AnnaBridge 126:abea610beb85 90 /**
AnnaBridge 126:abea610beb85 91 * @brief NAND Memory address Structure definition
AnnaBridge 126:abea610beb85 92 */
AnnaBridge 126:abea610beb85 93 typedef struct
AnnaBridge 126:abea610beb85 94 {
AnnaBridge 126:abea610beb85 95 uint16_t Page; /*!< NAND memory Page address */
AnnaBridge 126:abea610beb85 96
AnnaBridge 126:abea610beb85 97 uint16_t Zone; /*!< NAND memory Zone address */
AnnaBridge 126:abea610beb85 98
AnnaBridge 126:abea610beb85 99 uint16_t Block; /*!< NAND memory Block address */
AnnaBridge 126:abea610beb85 100
AnnaBridge 126:abea610beb85 101 }NAND_AddressTypeDef;
AnnaBridge 126:abea610beb85 102
AnnaBridge 126:abea610beb85 103 /**
AnnaBridge 126:abea610beb85 104 * @brief NAND Memory info Structure definition
AnnaBridge 126:abea610beb85 105 */
AnnaBridge 126:abea610beb85 106 typedef struct
AnnaBridge 126:abea610beb85 107 {
AnnaBridge 126:abea610beb85 108 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
AnnaBridge 126:abea610beb85 109
AnnaBridge 126:abea610beb85 110 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
AnnaBridge 126:abea610beb85 111
AnnaBridge 126:abea610beb85 112 uint32_t BlockSize; /*!< NAND memory block size number of pages */
AnnaBridge 126:abea610beb85 113
AnnaBridge 126:abea610beb85 114 uint32_t BlockNbr; /*!< NAND memory number of blocks */
AnnaBridge 126:abea610beb85 115
AnnaBridge 126:abea610beb85 116 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
AnnaBridge 126:abea610beb85 117 }NAND_InfoTypeDef;
AnnaBridge 126:abea610beb85 118
AnnaBridge 126:abea610beb85 119 /**
AnnaBridge 126:abea610beb85 120 * @brief NAND handle Structure definition
AnnaBridge 126:abea610beb85 121 */
AnnaBridge 126:abea610beb85 122 typedef struct
AnnaBridge 126:abea610beb85 123 {
AnnaBridge 126:abea610beb85 124 FMC_NAND_TypeDef *Instance; /*!< Register base address */
AnnaBridge 126:abea610beb85 125
AnnaBridge 126:abea610beb85 126 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
AnnaBridge 126:abea610beb85 127
AnnaBridge 126:abea610beb85 128 HAL_LockTypeDef Lock; /*!< NAND locking object */
AnnaBridge 126:abea610beb85 129
AnnaBridge 126:abea610beb85 130 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
AnnaBridge 126:abea610beb85 131
AnnaBridge 126:abea610beb85 132 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
AnnaBridge 126:abea610beb85 133 }NAND_HandleTypeDef;
AnnaBridge 126:abea610beb85 134 /**
AnnaBridge 126:abea610beb85 135 * @}
AnnaBridge 126:abea610beb85 136 */
AnnaBridge 126:abea610beb85 137
AnnaBridge 126:abea610beb85 138 /* Exported constants --------------------------------------------------------*/
AnnaBridge 126:abea610beb85 139 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 140 /** @defgroup NAND_Exported_Macros NAND Exported Macros
AnnaBridge 126:abea610beb85 141 * @{
AnnaBridge 126:abea610beb85 142 */
AnnaBridge 126:abea610beb85 143
AnnaBridge 126:abea610beb85 144 /** @brief Reset NAND handle state
AnnaBridge 126:abea610beb85 145 * @param __HANDLE__: specifies the NAND handle.
AnnaBridge 126:abea610beb85 146 * @retval None
AnnaBridge 126:abea610beb85 147 */
AnnaBridge 126:abea610beb85 148 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
AnnaBridge 126:abea610beb85 149
AnnaBridge 126:abea610beb85 150 /**
AnnaBridge 126:abea610beb85 151 * @}
AnnaBridge 126:abea610beb85 152 */
AnnaBridge 126:abea610beb85 153
AnnaBridge 126:abea610beb85 154 /* Exported functions --------------------------------------------------------*/
AnnaBridge 126:abea610beb85 155 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
AnnaBridge 126:abea610beb85 156 * @{
AnnaBridge 126:abea610beb85 157 */
AnnaBridge 126:abea610beb85 158
AnnaBridge 126:abea610beb85 159 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 126:abea610beb85 160 * @{
AnnaBridge 126:abea610beb85 161 */
AnnaBridge 126:abea610beb85 162
AnnaBridge 126:abea610beb85 163 /* Initialization/de-initialization functions ********************************/
AnnaBridge 126:abea610beb85 164 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
AnnaBridge 126:abea610beb85 165 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 166 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 167 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 168 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 169 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 170
AnnaBridge 126:abea610beb85 171 /**
AnnaBridge 126:abea610beb85 172 * @}
AnnaBridge 126:abea610beb85 173 */
AnnaBridge 126:abea610beb85 174
AnnaBridge 126:abea610beb85 175 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
AnnaBridge 126:abea610beb85 176 * @{
AnnaBridge 126:abea610beb85 177 */
AnnaBridge 126:abea610beb85 178
AnnaBridge 126:abea610beb85 179 /* IO operation functions ****************************************************/
AnnaBridge 126:abea610beb85 180 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
AnnaBridge 126:abea610beb85 181 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 182
AnnaBridge 126:abea610beb85 183 HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 126:abea610beb85 184 HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 126:abea610beb85 185 HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 126:abea610beb85 186 HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 126:abea610beb85 187 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 126:abea610beb85 188 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 126:abea610beb85 189 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 126:abea610beb85 190 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 126:abea610beb85 191 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 126:abea610beb85 192 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 193 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 126:abea610beb85 194
AnnaBridge 126:abea610beb85 195 /**
AnnaBridge 126:abea610beb85 196 * @}
AnnaBridge 126:abea610beb85 197 */
AnnaBridge 126:abea610beb85 198
AnnaBridge 126:abea610beb85 199 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 126:abea610beb85 200 * @{
AnnaBridge 126:abea610beb85 201 */
AnnaBridge 126:abea610beb85 202
AnnaBridge 126:abea610beb85 203 /* NAND Control functions ****************************************************/
AnnaBridge 126:abea610beb85 204 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 205 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 206 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
AnnaBridge 126:abea610beb85 207
AnnaBridge 126:abea610beb85 208 /**
AnnaBridge 126:abea610beb85 209 * @}
AnnaBridge 126:abea610beb85 210 */
AnnaBridge 126:abea610beb85 211
AnnaBridge 126:abea610beb85 212 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 126:abea610beb85 213 * @{
AnnaBridge 126:abea610beb85 214 */
AnnaBridge 126:abea610beb85 215 /* NAND State functions *******************************************************/
AnnaBridge 126:abea610beb85 216 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 217 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 218 /**
AnnaBridge 126:abea610beb85 219 * @}
AnnaBridge 126:abea610beb85 220 */
AnnaBridge 126:abea610beb85 221
AnnaBridge 126:abea610beb85 222 /**
AnnaBridge 126:abea610beb85 223 * @}
AnnaBridge 126:abea610beb85 224 */
AnnaBridge 126:abea610beb85 225 /* Private types -------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 226 /* Private variables ---------------------------------------------------------*/
AnnaBridge 126:abea610beb85 227 /* Private constants ---------------------------------------------------------*/
AnnaBridge 126:abea610beb85 228 /** @defgroup NAND_Private_Constants NAND Private Constants
AnnaBridge 126:abea610beb85 229 * @{
AnnaBridge 126:abea610beb85 230 */
AnnaBridge 126:abea610beb85 231 #define NAND_DEVICE ((uint32_t)0x80000000U)
AnnaBridge 126:abea610beb85 232 #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U)
AnnaBridge 126:abea610beb85 233
AnnaBridge 126:abea610beb85 234 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
AnnaBridge 126:abea610beb85 235 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
AnnaBridge 126:abea610beb85 236
AnnaBridge 126:abea610beb85 237 #define NAND_CMD_AREA_A ((uint8_t)0x00U)
AnnaBridge 126:abea610beb85 238 #define NAND_CMD_AREA_B ((uint8_t)0x01U)
AnnaBridge 126:abea610beb85 239 #define NAND_CMD_AREA_C ((uint8_t)0x50U)
AnnaBridge 126:abea610beb85 240 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U)
AnnaBridge 126:abea610beb85 241
AnnaBridge 126:abea610beb85 242 #define NAND_CMD_WRITE0 ((uint8_t)0x80U)
AnnaBridge 126:abea610beb85 243 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U)
AnnaBridge 126:abea610beb85 244 #define NAND_CMD_ERASE0 ((uint8_t)0x60U)
AnnaBridge 126:abea610beb85 245 #define NAND_CMD_ERASE1 ((uint8_t)0xD0U)
AnnaBridge 126:abea610beb85 246 #define NAND_CMD_READID ((uint8_t)0x90U)
AnnaBridge 126:abea610beb85 247 #define NAND_CMD_STATUS ((uint8_t)0x70U)
AnnaBridge 126:abea610beb85 248 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU)
AnnaBridge 126:abea610beb85 249 #define NAND_CMD_RESET ((uint8_t)0xFFU)
AnnaBridge 126:abea610beb85 250
AnnaBridge 126:abea610beb85 251 /* NAND memory status */
AnnaBridge 126:abea610beb85 252 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100U)
AnnaBridge 126:abea610beb85 253 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200U)
AnnaBridge 126:abea610beb85 254 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U)
AnnaBridge 126:abea610beb85 255 #define NAND_BUSY ((uint32_t)0x00000000U)
AnnaBridge 126:abea610beb85 256 #define NAND_ERROR ((uint32_t)0x00000001U)
AnnaBridge 126:abea610beb85 257 #define NAND_READY ((uint32_t)0x00000040U)
AnnaBridge 126:abea610beb85 258 /**
AnnaBridge 126:abea610beb85 259 * @}
AnnaBridge 126:abea610beb85 260 */
AnnaBridge 126:abea610beb85 261
AnnaBridge 126:abea610beb85 262 /* Private macros ------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 263 /** @defgroup NAND_Private_Macros NAND Private Macros
AnnaBridge 126:abea610beb85 264 * @{
AnnaBridge 126:abea610beb85 265 */
AnnaBridge 126:abea610beb85 266
AnnaBridge 126:abea610beb85 267 /**
AnnaBridge 126:abea610beb85 268 * @brief NAND memory address computation.
AnnaBridge 126:abea610beb85 269 * @param __ADDRESS__: NAND memory address.
AnnaBridge 126:abea610beb85 270 * @param __HANDLE__ : NAND handle.
AnnaBridge 126:abea610beb85 271 * @retval NAND Raw address value
AnnaBridge 126:abea610beb85 272 */
AnnaBridge 126:abea610beb85 273 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
AnnaBridge 126:abea610beb85 274 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize)))
AnnaBridge 126:abea610beb85 275
AnnaBridge 126:abea610beb85 276 /**
AnnaBridge 126:abea610beb85 277 * @brief NAND memory address cycling.
AnnaBridge 126:abea610beb85 278 * @param __ADDRESS__: NAND memory address.
AnnaBridge 126:abea610beb85 279 * @retval NAND address cycling value.
AnnaBridge 126:abea610beb85 280 */
AnnaBridge 126:abea610beb85 281 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
AnnaBridge 126:abea610beb85 282 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
AnnaBridge 126:abea610beb85 283 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
AnnaBridge 126:abea610beb85 284 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
AnnaBridge 126:abea610beb85 285 /**
AnnaBridge 126:abea610beb85 286 * @}
AnnaBridge 126:abea610beb85 287 */
AnnaBridge 126:abea610beb85 288
AnnaBridge 126:abea610beb85 289 /**
AnnaBridge 126:abea610beb85 290 * @}
AnnaBridge 126:abea610beb85 291 */
AnnaBridge 126:abea610beb85 292 /**
AnnaBridge 126:abea610beb85 293 * @}
AnnaBridge 126:abea610beb85 294 */
AnnaBridge 126:abea610beb85 295
AnnaBridge 126:abea610beb85 296 /**
AnnaBridge 126:abea610beb85 297 * @}
AnnaBridge 126:abea610beb85 298 */
AnnaBridge 126:abea610beb85 299
AnnaBridge 126:abea610beb85 300 #ifdef __cplusplus
AnnaBridge 126:abea610beb85 301 }
AnnaBridge 126:abea610beb85 302 #endif
AnnaBridge 126:abea610beb85 303
AnnaBridge 126:abea610beb85 304 #endif /* __STM32F7xx_HAL_NAND_H */
AnnaBridge 126:abea610beb85 305
AnnaBridge 126:abea610beb85 306 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/