Official mbed Real Time Operating System based on the RTX implementation of the CMSIS-RTOS API open standard.
Dependents: denki-yohou_b TestY201 Network-RTOS NTPClient_HelloWorld ... more
Deprecated
This is the mbed 2 rtos library. mbed OS 5 integrates the mbed library with mbed-rtos. With this, we have provided thread safety for all mbed APIs. If you'd like to learn about using mbed OS 5, please see the docs.
rtx/TARGET_CORTEX_M/rt_HAL_CM.h@125:5713cbbdb706, 2017-07-04 (annotated)
- Committer:
- Kojto
- Date:
- Tue Jul 04 13:32:20 2017 +0100
- Revision:
- 125:5713cbbdb706
- Parent:
- 123:58563e6cba1e
replace mbed_rtx by mbed_rtx4
Not causing a conflict with mbed_rtx that is for newer rtos
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
c1728p9 | 123:58563e6cba1e | 1 | |
c1728p9 | 123:58563e6cba1e | 2 | /** \addtogroup rtos */ |
c1728p9 | 123:58563e6cba1e | 3 | /** @{*/ |
mbed_official | 49:77c8e4604045 | 4 | /*---------------------------------------------------------------------------- |
mbed_official | 112:53ace74b190c | 5 | * CMSIS-RTOS - RTX |
mbed_official | 49:77c8e4604045 | 6 | *---------------------------------------------------------------------------- |
mbed_official | 49:77c8e4604045 | 7 | * Name: RT_HAL_CM.H |
mbed_official | 49:77c8e4604045 | 8 | * Purpose: Hardware Abstraction Layer for Cortex-M definitions |
mbed_official | 112:53ace74b190c | 9 | * Rev.: V4.79 |
mbed_official | 49:77c8e4604045 | 10 | *---------------------------------------------------------------------------- |
mbed_official | 49:77c8e4604045 | 11 | * |
mbed_official | 112:53ace74b190c | 12 | * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH |
mbed_official | 49:77c8e4604045 | 13 | * All rights reserved. |
mbed_official | 49:77c8e4604045 | 14 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 49:77c8e4604045 | 15 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 49:77c8e4604045 | 16 | * - Redistributions of source code must retain the above copyright |
mbed_official | 49:77c8e4604045 | 17 | * notice, this list of conditions and the following disclaimer. |
mbed_official | 49:77c8e4604045 | 18 | * - Redistributions in binary form must reproduce the above copyright |
mbed_official | 49:77c8e4604045 | 19 | * notice, this list of conditions and the following disclaimer in the |
mbed_official | 49:77c8e4604045 | 20 | * documentation and/or other materials provided with the distribution. |
mbed_official | 49:77c8e4604045 | 21 | * - Neither the name of ARM nor the names of its contributors may be used |
mbed_official | 49:77c8e4604045 | 22 | * to endorse or promote products derived from this software without |
mbed_official | 49:77c8e4604045 | 23 | * specific prior written permission. |
mbed_official | 49:77c8e4604045 | 24 | * |
mbed_official | 49:77c8e4604045 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 49:77c8e4604045 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 49:77c8e4604045 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
mbed_official | 49:77c8e4604045 | 28 | * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
mbed_official | 49:77c8e4604045 | 29 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
mbed_official | 49:77c8e4604045 | 30 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
mbed_official | 49:77c8e4604045 | 31 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
mbed_official | 49:77c8e4604045 | 32 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
mbed_official | 49:77c8e4604045 | 33 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
mbed_official | 49:77c8e4604045 | 34 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 49:77c8e4604045 | 35 | * POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 49:77c8e4604045 | 36 | *---------------------------------------------------------------------------*/ |
mbed_official | 49:77c8e4604045 | 37 | |
mbed_official | 49:77c8e4604045 | 38 | /* Definitions */ |
mbed_official | 112:53ace74b190c | 39 | #define INITIAL_xPSR 0x01000000U |
mbed_official | 112:53ace74b190c | 40 | #define DEMCR_TRCENA 0x01000000U |
mbed_official | 112:53ace74b190c | 41 | #define ITM_ITMENA 0x00000001U |
mbed_official | 112:53ace74b190c | 42 | #define MAGIC_WORD 0xE25A2EA5U |
mbed_official | 112:53ace74b190c | 43 | #define MAGIC_PATTERN 0xCCCCCCCCU |
mbed_official | 49:77c8e4604045 | 44 | |
mbed_official | 49:77c8e4604045 | 45 | #if defined (__CC_ARM) /* ARM Compiler */ |
mbed_official | 49:77c8e4604045 | 46 | |
mbed_official | 112:53ace74b190c | 47 | #if ((defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) && !defined(NO_EXCLUSIVE_ACCESS)) |
mbed_official | 49:77c8e4604045 | 48 | #define __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 49 | #else |
mbed_official | 49:77c8e4604045 | 50 | #undef __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 51 | #endif |
mbed_official | 49:77c8e4604045 | 52 | |
Kojto | 119:19af2d39a542 | 53 | /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */ |
Kojto | 119:19af2d39a542 | 54 | #ifdef __USE_EXCLUSIVE_ACCESS |
Kojto | 119:19af2d39a542 | 55 | #pragma diag_suppress 3731 |
Kojto | 119:19af2d39a542 | 56 | #endif |
Kojto | 119:19af2d39a542 | 57 | |
mbed_official | 112:53ace74b190c | 58 | #ifndef __CMSIS_GENERIC |
c1728p9 | 123:58563e6cba1e | 59 | |
c1728p9 | 123:58563e6cba1e | 60 | __attribute__((always_inline)) static inline U32 __get_PRIMASK(void) |
c1728p9 | 123:58563e6cba1e | 61 | { |
c1728p9 | 123:58563e6cba1e | 62 | register U32 primask __asm("primask"); |
c1728p9 | 123:58563e6cba1e | 63 | return primask; |
c1728p9 | 123:58563e6cba1e | 64 | } |
c1728p9 | 123:58563e6cba1e | 65 | |
mbed_official | 112:53ace74b190c | 66 | #define __DMB() do {\ |
mbed_official | 112:53ace74b190c | 67 | __schedule_barrier();\ |
mbed_official | 112:53ace74b190c | 68 | __dmb(0xF);\ |
mbed_official | 112:53ace74b190c | 69 | __schedule_barrier();\ |
mbed_official | 112:53ace74b190c | 70 | } while (0) |
c1728p9 | 123:58563e6cba1e | 71 | |
mbed_official | 112:53ace74b190c | 72 | #endif |
mbed_official | 112:53ace74b190c | 73 | |
mbed_official | 49:77c8e4604045 | 74 | #elif defined (__GNUC__) /* GNU Compiler */ |
mbed_official | 49:77c8e4604045 | 75 | |
mbed_official | 49:77c8e4604045 | 76 | #undef __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 77 | |
mbed_official | 49:77c8e4604045 | 78 | #if defined (__CORTEX_M0) || defined (__CORTEX_M0PLUS) |
mbed_official | 112:53ace74b190c | 79 | #define __TARGET_ARCH_6S_M |
mbed_official | 49:77c8e4604045 | 80 | #endif |
mbed_official | 49:77c8e4604045 | 81 | |
mbed_official | 49:77c8e4604045 | 82 | #if defined (__VFP_FP__) && !defined(__SOFTFP__) |
mbed_official | 112:53ace74b190c | 83 | #define __TARGET_FPU_VFP |
mbed_official | 49:77c8e4604045 | 84 | #endif |
mbed_official | 49:77c8e4604045 | 85 | |
mbed_official | 49:77c8e4604045 | 86 | #define __inline inline |
mbed_official | 49:77c8e4604045 | 87 | #define __weak __attribute__((weak)) |
mbed_official | 49:77c8e4604045 | 88 | |
mbed_official | 49:77c8e4604045 | 89 | #ifndef __CMSIS_GENERIC |
mbed_official | 49:77c8e4604045 | 90 | |
c1728p9 | 123:58563e6cba1e | 91 | __attribute__((always_inline)) static inline U32 __get_PRIMASK(void) |
c1728p9 | 123:58563e6cba1e | 92 | { |
c1728p9 | 123:58563e6cba1e | 93 | U32 result; |
c1728p9 | 123:58563e6cba1e | 94 | |
c1728p9 | 123:58563e6cba1e | 95 | __asm volatile ("mrs %0, primask" : "=r" (result)); |
c1728p9 | 123:58563e6cba1e | 96 | return result; |
c1728p9 | 123:58563e6cba1e | 97 | } |
c1728p9 | 123:58563e6cba1e | 98 | |
mbed_official | 49:77c8e4604045 | 99 | __attribute__((always_inline)) static inline void __enable_irq(void) |
mbed_official | 49:77c8e4604045 | 100 | { |
mbed_official | 49:77c8e4604045 | 101 | __asm volatile ("cpsie i"); |
mbed_official | 49:77c8e4604045 | 102 | } |
mbed_official | 49:77c8e4604045 | 103 | |
mbed_official | 49:77c8e4604045 | 104 | __attribute__((always_inline)) static inline U32 __disable_irq(void) |
mbed_official | 49:77c8e4604045 | 105 | { |
mbed_official | 49:77c8e4604045 | 106 | U32 result; |
mbed_official | 49:77c8e4604045 | 107 | |
mbed_official | 49:77c8e4604045 | 108 | __asm volatile ("mrs %0, primask" : "=r" (result)); |
mbed_official | 49:77c8e4604045 | 109 | __asm volatile ("cpsid i"); |
mbed_official | 49:77c8e4604045 | 110 | return(result & 1); |
mbed_official | 49:77c8e4604045 | 111 | } |
mbed_official | 49:77c8e4604045 | 112 | |
mbed_official | 112:53ace74b190c | 113 | __attribute__((always_inline)) static inline void __DMB(void) |
mbed_official | 112:53ace74b190c | 114 | { |
mbed_official | 112:53ace74b190c | 115 | __asm volatile ("dmb 0xF":::"memory"); |
mbed_official | 112:53ace74b190c | 116 | } |
mbed_official | 112:53ace74b190c | 117 | |
mbed_official | 49:77c8e4604045 | 118 | #endif |
mbed_official | 49:77c8e4604045 | 119 | |
mbed_official | 49:77c8e4604045 | 120 | __attribute__(( always_inline)) static inline U8 __clz(U32 value) |
mbed_official | 49:77c8e4604045 | 121 | { |
mbed_official | 49:77c8e4604045 | 122 | U8 result; |
c1728p9 | 123:58563e6cba1e | 123 | |
mbed_official | 49:77c8e4604045 | 124 | __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value)); |
mbed_official | 49:77c8e4604045 | 125 | return(result); |
mbed_official | 49:77c8e4604045 | 126 | } |
mbed_official | 49:77c8e4604045 | 127 | |
mbed_official | 49:77c8e4604045 | 128 | #elif defined (__ICCARM__) /* IAR Compiler */ |
mbed_official | 49:77c8e4604045 | 129 | |
mbed_official | 49:77c8e4604045 | 130 | #undef __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 131 | |
mbed_official | 49:77c8e4604045 | 132 | #if (__CORE__ == __ARM6M__) |
mbed_official | 49:77c8e4604045 | 133 | #define __TARGET_ARCH_6S_M 1 |
mbed_official | 49:77c8e4604045 | 134 | #endif |
mbed_official | 49:77c8e4604045 | 135 | |
mbed_official | 49:77c8e4604045 | 136 | #if defined __ARMVFP__ |
mbed_official | 49:77c8e4604045 | 137 | #define __TARGET_FPU_VFP 1 |
mbed_official | 49:77c8e4604045 | 138 | #endif |
mbed_official | 49:77c8e4604045 | 139 | |
mbed_official | 49:77c8e4604045 | 140 | #define __inline inline |
mbed_official | 49:77c8e4604045 | 141 | |
mbed_official | 49:77c8e4604045 | 142 | #ifndef __CMSIS_GENERIC |
mbed_official | 49:77c8e4604045 | 143 | |
c1728p9 | 123:58563e6cba1e | 144 | static inline U32 __get_PRIMASK(void) |
c1728p9 | 123:58563e6cba1e | 145 | { |
c1728p9 | 123:58563e6cba1e | 146 | U32 result; |
c1728p9 | 123:58563e6cba1e | 147 | |
c1728p9 | 123:58563e6cba1e | 148 | __asm volatile ("mrs %0, primask" : "=r" (result)); |
c1728p9 | 123:58563e6cba1e | 149 | return result; |
c1728p9 | 123:58563e6cba1e | 150 | } |
c1728p9 | 123:58563e6cba1e | 151 | |
mbed_official | 49:77c8e4604045 | 152 | static inline void __enable_irq(void) |
mbed_official | 49:77c8e4604045 | 153 | { |
mbed_official | 49:77c8e4604045 | 154 | __asm volatile ("cpsie i"); |
mbed_official | 49:77c8e4604045 | 155 | } |
mbed_official | 49:77c8e4604045 | 156 | |
mbed_official | 49:77c8e4604045 | 157 | static inline U32 __disable_irq(void) |
mbed_official | 49:77c8e4604045 | 158 | { |
mbed_official | 49:77c8e4604045 | 159 | U32 result; |
mbed_official | 112:53ace74b190c | 160 | |
mbed_official | 49:77c8e4604045 | 161 | __asm volatile ("mrs %0, primask" : "=r" (result)); |
mbed_official | 49:77c8e4604045 | 162 | __asm volatile ("cpsid i"); |
mbed_official | 49:77c8e4604045 | 163 | return(result & 1); |
mbed_official | 49:77c8e4604045 | 164 | } |
mbed_official | 49:77c8e4604045 | 165 | |
mbed_official | 49:77c8e4604045 | 166 | #endif |
mbed_official | 49:77c8e4604045 | 167 | |
mbed_official | 49:77c8e4604045 | 168 | static inline U8 __clz(U32 value) |
mbed_official | 49:77c8e4604045 | 169 | { |
mbed_official | 49:77c8e4604045 | 170 | U8 result; |
mbed_official | 112:53ace74b190c | 171 | |
mbed_official | 49:77c8e4604045 | 172 | __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value)); |
mbed_official | 49:77c8e4604045 | 173 | return(result); |
mbed_official | 49:77c8e4604045 | 174 | } |
mbed_official | 49:77c8e4604045 | 175 | |
mbed_official | 49:77c8e4604045 | 176 | #endif |
mbed_official | 49:77c8e4604045 | 177 | |
mbed_official | 49:77c8e4604045 | 178 | /* NVIC registers */ |
mbed_official | 112:53ace74b190c | 179 | #define NVIC_ST_CTRL (*((volatile U32 *)0xE000E010U)) |
mbed_official | 112:53ace74b190c | 180 | #define NVIC_ST_RELOAD (*((volatile U32 *)0xE000E014U)) |
mbed_official | 112:53ace74b190c | 181 | #define NVIC_ST_CURRENT (*((volatile U32 *)0xE000E018U)) |
mbed_official | 112:53ace74b190c | 182 | #define NVIC_ISER ((volatile U32 *)0xE000E100U) |
mbed_official | 112:53ace74b190c | 183 | #define NVIC_ICER ((volatile U32 *)0xE000E180U) |
mbed_official | 112:53ace74b190c | 184 | #if defined(__TARGET_ARCH_6S_M) |
mbed_official | 112:53ace74b190c | 185 | #define NVIC_IP ((volatile U32 *)0xE000E400U) |
mbed_official | 49:77c8e4604045 | 186 | #else |
mbed_official | 112:53ace74b190c | 187 | #define NVIC_IP ((volatile U8 *)0xE000E400U) |
mbed_official | 49:77c8e4604045 | 188 | #endif |
mbed_official | 112:53ace74b190c | 189 | #define NVIC_INT_CTRL (*((volatile U32 *)0xE000ED04U)) |
mbed_official | 112:53ace74b190c | 190 | #define NVIC_AIR_CTRL (*((volatile U32 *)0xE000ED0CU)) |
mbed_official | 112:53ace74b190c | 191 | #define NVIC_SYS_PRI2 (*((volatile U32 *)0xE000ED1CU)) |
mbed_official | 112:53ace74b190c | 192 | #define NVIC_SYS_PRI3 (*((volatile U32 *)0xE000ED20U)) |
mbed_official | 49:77c8e4604045 | 193 | |
mbed_official | 112:53ace74b190c | 194 | #define OS_PEND_IRQ() NVIC_INT_CTRL = (1UL<<28) |
mbed_official | 112:53ace74b190c | 195 | #define OS_PENDING ((NVIC_INT_CTRL >> 26) & 5U) |
mbed_official | 112:53ace74b190c | 196 | #define OS_UNPEND(fl) NVIC_INT_CTRL = (U32)(fl = (U8)OS_PENDING) << 25 |
mbed_official | 112:53ace74b190c | 197 | #define OS_PEND(fl,p) NVIC_INT_CTRL = (U32)(fl | (U8)(p<<2)) << 26 |
mbed_official | 112:53ace74b190c | 198 | #define OS_LOCK() NVIC_ST_CTRL = 0x0005U |
mbed_official | 112:53ace74b190c | 199 | #define OS_UNLOCK() NVIC_ST_CTRL = 0x0007U |
mbed_official | 49:77c8e4604045 | 200 | |
mbed_official | 112:53ace74b190c | 201 | #define OS_X_PENDING ((NVIC_INT_CTRL >> 28) & 1U) |
mbed_official | 112:53ace74b190c | 202 | #define OS_X_UNPEND(fl) NVIC_INT_CTRL = (U32)(fl = (U8)OS_X_PENDING) << 27 |
mbed_official | 112:53ace74b190c | 203 | #define OS_X_PEND(fl,p) NVIC_INT_CTRL = (U32)(fl | p) << 28 |
mbed_official | 112:53ace74b190c | 204 | #if defined(__TARGET_ARCH_6S_M) |
mbed_official | 112:53ace74b190c | 205 | #define OS_X_INIT(n) NVIC_IP[n>>2] |= (U32)0xFFU << ((n & 0x03U) << 3); \ |
mbed_official | 112:53ace74b190c | 206 | NVIC_ISER[n>>5] = (U32)1U << (n & 0x1FU) |
mbed_official | 49:77c8e4604045 | 207 | #else |
mbed_official | 112:53ace74b190c | 208 | #define OS_X_INIT(n) NVIC_IP[n] = 0xFFU; \ |
mbed_official | 112:53ace74b190c | 209 | NVIC_ISER[n>>5] = (U32)1U << (n & 0x1FU) |
mbed_official | 49:77c8e4604045 | 210 | #endif |
mbed_official | 112:53ace74b190c | 211 | #define OS_X_LOCK(n) NVIC_ICER[n>>5] = (U32)1U << (n & 0x1FU) |
mbed_official | 112:53ace74b190c | 212 | #define OS_X_UNLOCK(n) NVIC_ISER[n>>5] = (U32)1U << (n & 0x1FU) |
mbed_official | 49:77c8e4604045 | 213 | |
mbed_official | 49:77c8e4604045 | 214 | /* Core Debug registers */ |
mbed_official | 112:53ace74b190c | 215 | #define DEMCR (*((volatile U32 *)0xE000EDFCU)) |
mbed_official | 49:77c8e4604045 | 216 | |
mbed_official | 49:77c8e4604045 | 217 | /* ITM registers */ |
mbed_official | 112:53ace74b190c | 218 | #define ITM_CONTROL (*((volatile U32 *)0xE0000E80U)) |
mbed_official | 112:53ace74b190c | 219 | #define ITM_ENABLE (*((volatile U32 *)0xE0000E00U)) |
mbed_official | 112:53ace74b190c | 220 | #define ITM_PORT30_U32 (*((volatile U32 *)0xE0000078U)) |
mbed_official | 112:53ace74b190c | 221 | #define ITM_PORT31_U32 (*((volatile U32 *)0xE000007CU)) |
mbed_official | 112:53ace74b190c | 222 | #define ITM_PORT31_U16 (*((volatile U16 *)0xE000007CU)) |
mbed_official | 112:53ace74b190c | 223 | #define ITM_PORT31_U8 (*((volatile U8 *)0xE000007CU)) |
mbed_official | 49:77c8e4604045 | 224 | |
mbed_official | 49:77c8e4604045 | 225 | /* Variables */ |
mbed_official | 49:77c8e4604045 | 226 | extern BIT dbg_msg; |
mbed_official | 49:77c8e4604045 | 227 | |
mbed_official | 49:77c8e4604045 | 228 | /* Functions */ |
mbed_official | 49:77c8e4604045 | 229 | #ifdef __USE_EXCLUSIVE_ACCESS |
mbed_official | 112:53ace74b190c | 230 | #define rt_inc(p) while(__strex((__ldrex(p)+1U),p)) |
mbed_official | 112:53ace74b190c | 231 | #define rt_dec(p) while(__strex((__ldrex(p)-1U),p)) |
mbed_official | 49:77c8e4604045 | 232 | #else |
c1728p9 | 123:58563e6cba1e | 233 | #define rt_inc(p) do {\ |
c1728p9 | 123:58563e6cba1e | 234 | U32 primask = __get_PRIMASK();\ |
c1728p9 | 123:58563e6cba1e | 235 | __disable_irq();\ |
c1728p9 | 123:58563e6cba1e | 236 | (*p)++;\ |
c1728p9 | 123:58563e6cba1e | 237 | if (!primask) {\ |
c1728p9 | 123:58563e6cba1e | 238 | __enable_irq();\ |
c1728p9 | 123:58563e6cba1e | 239 | }\ |
c1728p9 | 123:58563e6cba1e | 240 | } while (0) |
c1728p9 | 123:58563e6cba1e | 241 | #define rt_dec(p) do {\ |
c1728p9 | 123:58563e6cba1e | 242 | U32 primask = __get_PRIMASK();\ |
c1728p9 | 123:58563e6cba1e | 243 | __disable_irq();\ |
c1728p9 | 123:58563e6cba1e | 244 | (*p)--;\ |
c1728p9 | 123:58563e6cba1e | 245 | if (!primask) {\ |
c1728p9 | 123:58563e6cba1e | 246 | __enable_irq();\ |
c1728p9 | 123:58563e6cba1e | 247 | }\ |
c1728p9 | 123:58563e6cba1e | 248 | } while (0) |
mbed_official | 49:77c8e4604045 | 249 | #endif |
mbed_official | 49:77c8e4604045 | 250 | |
mbed_official | 49:77c8e4604045 | 251 | __inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) { |
mbed_official | 49:77c8e4604045 | 252 | U32 cnt,c2; |
mbed_official | 49:77c8e4604045 | 253 | #ifdef __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 254 | do { |
mbed_official | 49:77c8e4604045 | 255 | if ((cnt = __ldrex(count)) == size) { |
mbed_official | 49:77c8e4604045 | 256 | __clrex(); |
mbed_official | 49:77c8e4604045 | 257 | return (cnt); } |
mbed_official | 112:53ace74b190c | 258 | } while (__strex(cnt+1U, count)); |
mbed_official | 49:77c8e4604045 | 259 | do { |
mbed_official | 112:53ace74b190c | 260 | c2 = (cnt = __ldrex(first)) + 1U; |
mbed_official | 112:53ace74b190c | 261 | if (c2 == size) { c2 = 0U; } |
mbed_official | 49:77c8e4604045 | 262 | } while (__strex(c2, first)); |
mbed_official | 49:77c8e4604045 | 263 | #else |
c1728p9 | 123:58563e6cba1e | 264 | U32 primask = __get_PRIMASK(); |
mbed_official | 49:77c8e4604045 | 265 | __disable_irq(); |
mbed_official | 49:77c8e4604045 | 266 | if ((cnt = *count) < size) { |
mbed_official | 112:53ace74b190c | 267 | *count = (U8)(cnt+1U); |
mbed_official | 112:53ace74b190c | 268 | c2 = (cnt = *first) + 1U; |
mbed_official | 112:53ace74b190c | 269 | if (c2 == size) { c2 = 0U; } |
mbed_official | 112:53ace74b190c | 270 | *first = (U8)c2; |
mbed_official | 49:77c8e4604045 | 271 | } |
c1728p9 | 123:58563e6cba1e | 272 | if (!primask) { |
c1728p9 | 123:58563e6cba1e | 273 | __enable_irq (); |
c1728p9 | 123:58563e6cba1e | 274 | } |
mbed_official | 49:77c8e4604045 | 275 | #endif |
mbed_official | 49:77c8e4604045 | 276 | return (cnt); |
mbed_official | 49:77c8e4604045 | 277 | } |
mbed_official | 49:77c8e4604045 | 278 | |
mbed_official | 49:77c8e4604045 | 279 | __inline static void rt_systick_init (void) { |
mbed_official | 49:77c8e4604045 | 280 | NVIC_ST_RELOAD = os_trv; |
mbed_official | 112:53ace74b190c | 281 | NVIC_ST_CURRENT = 0U; |
mbed_official | 112:53ace74b190c | 282 | NVIC_ST_CTRL = 0x0007U; |
mbed_official | 112:53ace74b190c | 283 | NVIC_SYS_PRI3 |= 0xFF000000U; |
mbed_official | 112:53ace74b190c | 284 | } |
mbed_official | 112:53ace74b190c | 285 | |
mbed_official | 112:53ace74b190c | 286 | __inline static U32 rt_systick_val (void) { |
mbed_official | 112:53ace74b190c | 287 | return (os_trv - NVIC_ST_CURRENT); |
mbed_official | 112:53ace74b190c | 288 | } |
mbed_official | 112:53ace74b190c | 289 | |
mbed_official | 112:53ace74b190c | 290 | __inline static U32 rt_systick_ovf (void) { |
mbed_official | 112:53ace74b190c | 291 | return ((NVIC_INT_CTRL >> 26) & 1U); |
mbed_official | 49:77c8e4604045 | 292 | } |
mbed_official | 49:77c8e4604045 | 293 | |
mbed_official | 49:77c8e4604045 | 294 | __inline static void rt_svc_init (void) { |
mbed_official | 112:53ace74b190c | 295 | #if !defined(__TARGET_ARCH_6S_M) |
mbed_official | 112:53ace74b190c | 296 | U32 sh,prigroup; |
mbed_official | 49:77c8e4604045 | 297 | #endif |
mbed_official | 112:53ace74b190c | 298 | NVIC_SYS_PRI3 |= 0x00FF0000U; |
mbed_official | 112:53ace74b190c | 299 | #if defined(__TARGET_ARCH_6S_M) |
mbed_official | 112:53ace74b190c | 300 | NVIC_SYS_PRI2 |= (NVIC_SYS_PRI3<<(8+1)) & 0xFC000000U; |
mbed_official | 49:77c8e4604045 | 301 | #else |
mbed_official | 112:53ace74b190c | 302 | sh = 8U - __clz(~((NVIC_SYS_PRI3 << 8) & 0xFF000000U)); |
mbed_official | 112:53ace74b190c | 303 | prigroup = ((NVIC_AIR_CTRL >> 8) & 0x07U); |
mbed_official | 49:77c8e4604045 | 304 | if (prigroup >= sh) { |
mbed_official | 112:53ace74b190c | 305 | sh = prigroup + 1U; |
mbed_official | 49:77c8e4604045 | 306 | } |
Kojto | 118:6635230e06ba | 307 | |
Kojto | 118:6635230e06ba | 308 | /* Only change the SVCall priority if uVisor is not present. */ |
Kojto | 118:6635230e06ba | 309 | #if !(defined(FEATURE_UVISOR) && defined(TARGET_UVISOR_SUPPORTED)) |
mbed_official | 112:53ace74b190c | 310 | NVIC_SYS_PRI2 = ((0xFEFFFFFFU << sh) & 0xFF000000U) | (NVIC_SYS_PRI2 & 0x00FFFFFFU); |
Kojto | 118:6635230e06ba | 311 | #endif /* !(defined(FEATURE_UVISOR) && defined(TARGET_UVISOR_SUPPORTED)) */ |
mbed_official | 49:77c8e4604045 | 312 | #endif |
mbed_official | 49:77c8e4604045 | 313 | } |
mbed_official | 49:77c8e4604045 | 314 | |
mbed_official | 49:77c8e4604045 | 315 | extern void rt_set_PSP (U32 stack); |
mbed_official | 49:77c8e4604045 | 316 | extern U32 rt_get_PSP (void); |
mbed_official | 49:77c8e4604045 | 317 | extern void os_set_env (void); |
mbed_official | 49:77c8e4604045 | 318 | extern void *_alloc_box (void *box_mem); |
mbed_official | 112:53ace74b190c | 319 | extern U32 _free_box (void *box_mem, void *box); |
mbed_official | 49:77c8e4604045 | 320 | |
mbed_official | 49:77c8e4604045 | 321 | extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body); |
mbed_official | 49:77c8e4604045 | 322 | extern void rt_ret_val (P_TCB p_TCB, U32 v0); |
mbed_official | 49:77c8e4604045 | 323 | extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1); |
mbed_official | 49:77c8e4604045 | 324 | |
mbed_official | 49:77c8e4604045 | 325 | extern void dbg_init (void); |
mbed_official | 49:77c8e4604045 | 326 | extern void dbg_task_notify (P_TCB p_tcb, BOOL create); |
mbed_official | 49:77c8e4604045 | 327 | extern void dbg_task_switch (U32 task_id); |
mbed_official | 49:77c8e4604045 | 328 | |
mbed_official | 49:77c8e4604045 | 329 | #ifdef DBG_MSG |
mbed_official | 49:77c8e4604045 | 330 | #define DBG_INIT() dbg_init() |
mbed_official | 49:77c8e4604045 | 331 | #define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create) |
mbed_official | 112:53ace74b190c | 332 | #define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new_tsk!=os_tsk.run)) \ |
mbed_official | 112:53ace74b190c | 333 | dbg_task_switch(task_id) |
mbed_official | 49:77c8e4604045 | 334 | #else |
mbed_official | 49:77c8e4604045 | 335 | #define DBG_INIT() |
mbed_official | 49:77c8e4604045 | 336 | #define DBG_TASK_NOTIFY(p_tcb,create) |
mbed_official | 49:77c8e4604045 | 337 | #define DBG_TASK_SWITCH(task_id) |
mbed_official | 49:77c8e4604045 | 338 | #endif |
mbed_official | 49:77c8e4604045 | 339 | |
mbed_official | 49:77c8e4604045 | 340 | /*---------------------------------------------------------------------------- |
mbed_official | 49:77c8e4604045 | 341 | * end of file |
mbed_official | 49:77c8e4604045 | 342 | *---------------------------------------------------------------------------*/ |
c1728p9 | 123:58563e6cba1e | 343 | |
c1728p9 | 123:58563e6cba1e | 344 | /** @}*/ |