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targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_i2c.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
186:707f6e361f3e 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /**
<> 157:ff67d9f36b67 2 ******************************************************************************
<> 157:ff67d9f36b67 3 * @file stm32f3xx_ll_i2c.c
<> 157:ff67d9f36b67 4 * @author MCD Application Team
<> 157:ff67d9f36b67 5 * @brief I2C LL module driver.
<> 157:ff67d9f36b67 6 ******************************************************************************
<> 157:ff67d9f36b67 7 * @attention
<> 157:ff67d9f36b67 8 *
<> 157:ff67d9f36b67 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 157:ff67d9f36b67 10 *
<> 157:ff67d9f36b67 11 * Redistribution and use in source and binary forms, with or without modification,
<> 157:ff67d9f36b67 12 * are permitted provided that the following conditions are met:
<> 157:ff67d9f36b67 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 157:ff67d9f36b67 14 * this list of conditions and the following disclaimer.
<> 157:ff67d9f36b67 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 157:ff67d9f36b67 16 * this list of conditions and the following disclaimer in the documentation
<> 157:ff67d9f36b67 17 * and/or other materials provided with the distribution.
<> 157:ff67d9f36b67 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 157:ff67d9f36b67 19 * may be used to endorse or promote products derived from this software
<> 157:ff67d9f36b67 20 * without specific prior written permission.
<> 157:ff67d9f36b67 21 *
<> 157:ff67d9f36b67 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 157:ff67d9f36b67 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 157:ff67d9f36b67 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 157:ff67d9f36b67 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 157:ff67d9f36b67 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 157:ff67d9f36b67 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 157:ff67d9f36b67 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 157:ff67d9f36b67 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 157:ff67d9f36b67 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 157:ff67d9f36b67 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 157:ff67d9f36b67 32 *
<> 157:ff67d9f36b67 33 ******************************************************************************
<> 157:ff67d9f36b67 34 */
<> 157:ff67d9f36b67 35 #if defined(USE_FULL_LL_DRIVER)
<> 157:ff67d9f36b67 36
<> 157:ff67d9f36b67 37 /* Includes ------------------------------------------------------------------*/
<> 157:ff67d9f36b67 38 #include "stm32f3xx_ll_i2c.h"
<> 157:ff67d9f36b67 39 #include "stm32f3xx_ll_bus.h"
<> 157:ff67d9f36b67 40 #ifdef USE_FULL_ASSERT
<> 157:ff67d9f36b67 41 #include "stm32_assert.h"
<> 157:ff67d9f36b67 42 #else
<> 157:ff67d9f36b67 43 #define assert_param(expr) ((void)0U)
<> 157:ff67d9f36b67 44 #endif
<> 157:ff67d9f36b67 45
<> 157:ff67d9f36b67 46 /** @addtogroup STM32F3xx_LL_Driver
<> 157:ff67d9f36b67 47 * @{
<> 157:ff67d9f36b67 48 */
<> 157:ff67d9f36b67 49
<> 157:ff67d9f36b67 50 #if defined (I2C1) || defined (I2C2) || defined (I2C3)
<> 157:ff67d9f36b67 51
<> 157:ff67d9f36b67 52 /** @defgroup I2C_LL I2C
<> 157:ff67d9f36b67 53 * @{
<> 157:ff67d9f36b67 54 */
<> 157:ff67d9f36b67 55
<> 157:ff67d9f36b67 56 /* Private types -------------------------------------------------------------*/
<> 157:ff67d9f36b67 57 /* Private variables ---------------------------------------------------------*/
<> 157:ff67d9f36b67 58 /* Private constants ---------------------------------------------------------*/
<> 157:ff67d9f36b67 59 /* Private macros ------------------------------------------------------------*/
<> 157:ff67d9f36b67 60 /** @addtogroup I2C_LL_Private_Macros
<> 157:ff67d9f36b67 61 * @{
<> 157:ff67d9f36b67 62 */
<> 157:ff67d9f36b67 63
<> 157:ff67d9f36b67 64 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
<> 157:ff67d9f36b67 65 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
<> 157:ff67d9f36b67 66 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
<> 157:ff67d9f36b67 67 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
<> 157:ff67d9f36b67 68
<> 157:ff67d9f36b67 69 #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
<> 157:ff67d9f36b67 70 ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
<> 157:ff67d9f36b67 71
<> 157:ff67d9f36b67 72 #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU)
<> 157:ff67d9f36b67 73
Anna Bridge 186:707f6e361f3e 74 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
<> 157:ff67d9f36b67 75
<> 157:ff67d9f36b67 76 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
<> 157:ff67d9f36b67 77 ((__VALUE__) == LL_I2C_NACK))
<> 157:ff67d9f36b67 78
<> 157:ff67d9f36b67 79 #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
<> 157:ff67d9f36b67 80 ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
<> 157:ff67d9f36b67 81 /**
<> 157:ff67d9f36b67 82 * @}
<> 157:ff67d9f36b67 83 */
<> 157:ff67d9f36b67 84
<> 157:ff67d9f36b67 85 /* Private function prototypes -----------------------------------------------*/
<> 157:ff67d9f36b67 86
<> 157:ff67d9f36b67 87 /* Exported functions --------------------------------------------------------*/
<> 157:ff67d9f36b67 88 /** @addtogroup I2C_LL_Exported_Functions
<> 157:ff67d9f36b67 89 * @{
<> 157:ff67d9f36b67 90 */
<> 157:ff67d9f36b67 91
<> 157:ff67d9f36b67 92 /** @addtogroup I2C_LL_EF_Init
<> 157:ff67d9f36b67 93 * @{
<> 157:ff67d9f36b67 94 */
<> 157:ff67d9f36b67 95
<> 157:ff67d9f36b67 96 /**
<> 157:ff67d9f36b67 97 * @brief De-initialize the I2C registers to their default reset values.
<> 157:ff67d9f36b67 98 * @param I2Cx I2C Instance.
<> 157:ff67d9f36b67 99 * @retval An ErrorStatus enumeration value:
<> 157:ff67d9f36b67 100 * - SUCCESS: I2C registers are de-initialized
<> 157:ff67d9f36b67 101 * - ERROR: I2C registers are not de-initialized
<> 157:ff67d9f36b67 102 */
<> 157:ff67d9f36b67 103 uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
<> 157:ff67d9f36b67 104 {
<> 157:ff67d9f36b67 105 ErrorStatus status = SUCCESS;
<> 157:ff67d9f36b67 106
<> 157:ff67d9f36b67 107 /* Check the I2C Instance I2Cx */
<> 157:ff67d9f36b67 108 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
<> 157:ff67d9f36b67 109
<> 157:ff67d9f36b67 110 if (I2Cx == I2C1)
<> 157:ff67d9f36b67 111 {
<> 157:ff67d9f36b67 112 /* Force reset of I2C clock */
<> 157:ff67d9f36b67 113 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
<> 157:ff67d9f36b67 114
<> 157:ff67d9f36b67 115 /* Release reset of I2C clock */
<> 157:ff67d9f36b67 116 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
<> 157:ff67d9f36b67 117 }
<> 157:ff67d9f36b67 118 #if defined(I2C2)
<> 157:ff67d9f36b67 119 else if (I2Cx == I2C2)
<> 157:ff67d9f36b67 120 {
<> 157:ff67d9f36b67 121 /* Force reset of I2C clock */
<> 157:ff67d9f36b67 122 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
<> 157:ff67d9f36b67 123
<> 157:ff67d9f36b67 124 /* Release reset of I2C clock */
<> 157:ff67d9f36b67 125 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
<> 157:ff67d9f36b67 126
<> 157:ff67d9f36b67 127 }
<> 157:ff67d9f36b67 128 #endif
<> 157:ff67d9f36b67 129 #if defined(I2C3)
<> 157:ff67d9f36b67 130 else if (I2Cx == I2C3)
<> 157:ff67d9f36b67 131 {
<> 157:ff67d9f36b67 132 /* Force reset of I2C clock */
<> 157:ff67d9f36b67 133 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3);
<> 157:ff67d9f36b67 134
<> 157:ff67d9f36b67 135 /* Release reset of I2C clock */
<> 157:ff67d9f36b67 136 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
<> 157:ff67d9f36b67 137 }
<> 157:ff67d9f36b67 138 #endif
<> 157:ff67d9f36b67 139 else
<> 157:ff67d9f36b67 140 {
<> 157:ff67d9f36b67 141 status = ERROR;
<> 157:ff67d9f36b67 142 }
<> 157:ff67d9f36b67 143
<> 157:ff67d9f36b67 144 return status;
<> 157:ff67d9f36b67 145 }
<> 157:ff67d9f36b67 146
<> 157:ff67d9f36b67 147 /**
<> 157:ff67d9f36b67 148 * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
<> 157:ff67d9f36b67 149 * @param I2Cx I2C Instance.
<> 157:ff67d9f36b67 150 * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
<> 157:ff67d9f36b67 151 * @retval An ErrorStatus enumeration value:
<> 157:ff67d9f36b67 152 * - SUCCESS: I2C registers are initialized
<> 157:ff67d9f36b67 153 * - ERROR: Not applicable
<> 157:ff67d9f36b67 154 */
<> 157:ff67d9f36b67 155 uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
<> 157:ff67d9f36b67 156 {
<> 157:ff67d9f36b67 157 /* Check the I2C Instance I2Cx */
<> 157:ff67d9f36b67 158 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
<> 157:ff67d9f36b67 159
<> 157:ff67d9f36b67 160 /* Check the I2C parameters from I2C_InitStruct */
<> 157:ff67d9f36b67 161 assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
<> 157:ff67d9f36b67 162 assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
<> 157:ff67d9f36b67 163 assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
<> 157:ff67d9f36b67 164 assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
<> 157:ff67d9f36b67 165 assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
<> 157:ff67d9f36b67 166 assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
<> 157:ff67d9f36b67 167
<> 157:ff67d9f36b67 168 /* Disable the selected I2Cx Peripheral */
<> 157:ff67d9f36b67 169 LL_I2C_Disable(I2Cx);
<> 157:ff67d9f36b67 170
<> 157:ff67d9f36b67 171 /*---------------------------- I2Cx CR1 Configuration ------------------------
<> 157:ff67d9f36b67 172 * Configure the analog and digital noise filters with parameters :
<> 157:ff67d9f36b67 173 * - AnalogFilter: I2C_CR1_ANFOFF bit
<> 157:ff67d9f36b67 174 * - DigitalFilter: I2C_CR1_DNF[3:0] bits
<> 157:ff67d9f36b67 175 */
<> 157:ff67d9f36b67 176 LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
<> 157:ff67d9f36b67 177
<> 157:ff67d9f36b67 178 /*---------------------------- I2Cx TIMINGR Configuration --------------------
<> 157:ff67d9f36b67 179 * Configure the SDA setup, hold time and the SCL high, low period with parameter :
<> 157:ff67d9f36b67 180 * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
<> 157:ff67d9f36b67 181 * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
<> 157:ff67d9f36b67 182 */
<> 157:ff67d9f36b67 183 LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
<> 157:ff67d9f36b67 184
<> 157:ff67d9f36b67 185 /* Enable the selected I2Cx Peripheral */
<> 157:ff67d9f36b67 186 LL_I2C_Enable(I2Cx);
<> 157:ff67d9f36b67 187
<> 157:ff67d9f36b67 188 /*---------------------------- I2Cx OAR1 Configuration -----------------------
<> 157:ff67d9f36b67 189 * Disable, Configure and Enable I2Cx device own address 1 with parameters :
<> 157:ff67d9f36b67 190 * - OwnAddress1: I2C_OAR1_OA1[9:0] bits
<> 157:ff67d9f36b67 191 * - OwnAddrSize: I2C_OAR1_OA1MODE bit
<> 157:ff67d9f36b67 192 */
<> 157:ff67d9f36b67 193 LL_I2C_DisableOwnAddress1(I2Cx);
<> 157:ff67d9f36b67 194 LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
Anna Bridge 186:707f6e361f3e 195
Anna Bridge 186:707f6e361f3e 196 /* OwnAdress1 == 0 is reserved for General Call address */
Anna Bridge 186:707f6e361f3e 197 if (I2C_InitStruct->OwnAddress1 != 0U)
Anna Bridge 186:707f6e361f3e 198 {
Anna Bridge 186:707f6e361f3e 199 LL_I2C_EnableOwnAddress1(I2Cx);
Anna Bridge 186:707f6e361f3e 200 }
<> 157:ff67d9f36b67 201
<> 157:ff67d9f36b67 202 /*---------------------------- I2Cx MODE Configuration -----------------------
<> 157:ff67d9f36b67 203 * Configure I2Cx peripheral mode with parameter :
<> 157:ff67d9f36b67 204 * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
<> 157:ff67d9f36b67 205 */
<> 157:ff67d9f36b67 206 LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
<> 157:ff67d9f36b67 207
<> 157:ff67d9f36b67 208 /*---------------------------- I2Cx CR2 Configuration ------------------------
<> 157:ff67d9f36b67 209 * Configure the ACKnowledge or Non ACKnowledge condition
<> 157:ff67d9f36b67 210 * after the address receive match code or next received byte with parameter :
<> 157:ff67d9f36b67 211 * - TypeAcknowledge: I2C_CR2_NACK bit
<> 157:ff67d9f36b67 212 */
<> 157:ff67d9f36b67 213 LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
<> 157:ff67d9f36b67 214
<> 157:ff67d9f36b67 215 return SUCCESS;
<> 157:ff67d9f36b67 216 }
<> 157:ff67d9f36b67 217
<> 157:ff67d9f36b67 218 /**
<> 157:ff67d9f36b67 219 * @brief Set each @ref LL_I2C_InitTypeDef field to default value.
<> 157:ff67d9f36b67 220 * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
<> 157:ff67d9f36b67 221 * @retval None
<> 157:ff67d9f36b67 222 */
<> 157:ff67d9f36b67 223 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
<> 157:ff67d9f36b67 224 {
<> 157:ff67d9f36b67 225 /* Set I2C_InitStruct fields to default values */
<> 157:ff67d9f36b67 226 I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
<> 157:ff67d9f36b67 227 I2C_InitStruct->Timing = 0U;
<> 157:ff67d9f36b67 228 I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
<> 157:ff67d9f36b67 229 I2C_InitStruct->DigitalFilter = 0U;
<> 157:ff67d9f36b67 230 I2C_InitStruct->OwnAddress1 = 0U;
<> 157:ff67d9f36b67 231 I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
<> 157:ff67d9f36b67 232 I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
<> 157:ff67d9f36b67 233 }
<> 157:ff67d9f36b67 234
<> 157:ff67d9f36b67 235 /**
<> 157:ff67d9f36b67 236 * @}
<> 157:ff67d9f36b67 237 */
<> 157:ff67d9f36b67 238
<> 157:ff67d9f36b67 239 /**
<> 157:ff67d9f36b67 240 * @}
<> 157:ff67d9f36b67 241 */
<> 157:ff67d9f36b67 242
<> 157:ff67d9f36b67 243 /**
<> 157:ff67d9f36b67 244 * @}
<> 157:ff67d9f36b67 245 */
<> 157:ff67d9f36b67 246
<> 157:ff67d9f36b67 247 #endif /* I2C1 || I2C2 || I2C3 */
<> 157:ff67d9f36b67 248
<> 157:ff67d9f36b67 249 /**
<> 157:ff67d9f36b67 250 * @}
<> 157:ff67d9f36b67 251 */
<> 157:ff67d9f36b67 252
<> 157:ff67d9f36b67 253 #endif /* USE_FULL_LL_DRIVER */
<> 157:ff67d9f36b67 254
<> 157:ff67d9f36b67 255 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/