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cmsis/BUILD/mbed/TARGET_NUCLEO_F439ZI/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_adc.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32f4xx_hal_adc.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file containing functions prototypes of ADC HAL library.
AnnaBridge 189:f392fc9709a3 6 ******************************************************************************
AnnaBridge 189:f392fc9709a3 7 * @attention
AnnaBridge 189:f392fc9709a3 8 *
AnnaBridge 189:f392fc9709a3 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 189:f392fc9709a3 10 *
AnnaBridge 189:f392fc9709a3 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 12 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 189:f392fc9709a3 14 * this list of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 189:f392fc9709a3 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 189:f392fc9709a3 17 * and/or other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 189:f392fc9709a3 19 * may be used to endorse or promote products derived from this software
AnnaBridge 189:f392fc9709a3 20 * without specific prior written permission.
AnnaBridge 189:f392fc9709a3 21 *
AnnaBridge 189:f392fc9709a3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 189:f392fc9709a3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 189:f392fc9709a3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 189:f392fc9709a3 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 189:f392fc9709a3 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 189:f392fc9709a3 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 189:f392fc9709a3 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 189:f392fc9709a3 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 189:f392fc9709a3 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 32 *
AnnaBridge 189:f392fc9709a3 33 ******************************************************************************
AnnaBridge 189:f392fc9709a3 34 */
AnnaBridge 189:f392fc9709a3 35
AnnaBridge 189:f392fc9709a3 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 37 #ifndef __STM32F4xx_ADC_H
AnnaBridge 189:f392fc9709a3 38 #define __STM32F4xx_ADC_H
AnnaBridge 189:f392fc9709a3 39
AnnaBridge 189:f392fc9709a3 40 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 41 extern "C" {
AnnaBridge 189:f392fc9709a3 42 #endif
AnnaBridge 189:f392fc9709a3 43
AnnaBridge 189:f392fc9709a3 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 45 #include "stm32f4xx_hal_def.h"
AnnaBridge 189:f392fc9709a3 46
AnnaBridge 189:f392fc9709a3 47 /* Include low level driver */
AnnaBridge 189:f392fc9709a3 48 #include "stm32f4xx_ll_adc.h"
AnnaBridge 189:f392fc9709a3 49
AnnaBridge 189:f392fc9709a3 50 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 189:f392fc9709a3 51 * @{
AnnaBridge 189:f392fc9709a3 52 */
AnnaBridge 189:f392fc9709a3 53
AnnaBridge 189:f392fc9709a3 54 /** @addtogroup ADC
AnnaBridge 189:f392fc9709a3 55 * @{
AnnaBridge 189:f392fc9709a3 56 */
AnnaBridge 189:f392fc9709a3 57
AnnaBridge 189:f392fc9709a3 58 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 59 /** @defgroup ADC_Exported_Types ADC Exported Types
AnnaBridge 189:f392fc9709a3 60 * @{
AnnaBridge 189:f392fc9709a3 61 */
AnnaBridge 189:f392fc9709a3 62
AnnaBridge 189:f392fc9709a3 63 /**
AnnaBridge 189:f392fc9709a3 64 * @brief Structure definition of ADC and regular group initialization
AnnaBridge 189:f392fc9709a3 65 * @note Parameters of this structure are shared within 2 scopes:
AnnaBridge 189:f392fc9709a3 66 * - Scope entire ADC (affects regular and injected groups): ClockPrescaler, Resolution, ScanConvMode, DataAlign, ScanConvMode, EOCSelection, LowPowerAutoWait, LowPowerAutoPowerOff, ChannelsBank.
AnnaBridge 189:f392fc9709a3 67 * - Scope regular group: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode, NbrOfDiscConversion, ExternalTrigConvEdge, ExternalTrigConv.
AnnaBridge 189:f392fc9709a3 68 * @note The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state.
AnnaBridge 189:f392fc9709a3 69 * ADC state can be either:
AnnaBridge 189:f392fc9709a3 70 * - For all parameters: ADC disabled
AnnaBridge 189:f392fc9709a3 71 * - For all parameters except 'Resolution', 'ScanConvMode', 'DiscontinuousConvMode', 'NbrOfDiscConversion' : ADC enabled without conversion on going on regular group.
AnnaBridge 189:f392fc9709a3 72 * - For parameters 'ExternalTrigConv' and 'ExternalTrigConvEdge': ADC enabled, even with conversion on going.
AnnaBridge 189:f392fc9709a3 73 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
AnnaBridge 189:f392fc9709a3 74 * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
AnnaBridge 189:f392fc9709a3 75 */
AnnaBridge 189:f392fc9709a3 76 typedef struct
AnnaBridge 189:f392fc9709a3 77 {
AnnaBridge 189:f392fc9709a3 78 uint32_t ClockPrescaler; /*!< Select ADC clock prescaler. The clock is common for
AnnaBridge 189:f392fc9709a3 79 all the ADCs.
AnnaBridge 189:f392fc9709a3 80 This parameter can be a value of @ref ADC_ClockPrescaler */
AnnaBridge 189:f392fc9709a3 81 uint32_t Resolution; /*!< Configures the ADC resolution.
AnnaBridge 189:f392fc9709a3 82 This parameter can be a value of @ref ADC_Resolution */
AnnaBridge 189:f392fc9709a3 83 uint32_t DataAlign; /*!< Specifies ADC data alignment to right (MSB on register bit 11 and LSB on register bit 0) (default setting)
AnnaBridge 189:f392fc9709a3 84 or to left (if regular group: MSB on register bit 15 and LSB on register bit 4, if injected group (MSB kept as signed value due to potential negative value after offset application): MSB on register bit 14 and LSB on register bit 3).
AnnaBridge 189:f392fc9709a3 85 This parameter can be a value of @ref ADC_Data_align */
AnnaBridge 189:f392fc9709a3 86 uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
AnnaBridge 189:f392fc9709a3 87 This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
AnnaBridge 189:f392fc9709a3 88 If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1).
AnnaBridge 189:f392fc9709a3 89 Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1).
AnnaBridge 189:f392fc9709a3 90 If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
AnnaBridge 189:f392fc9709a3 91 Scan direction is upward: from rank1 to rank 'n'.
AnnaBridge 189:f392fc9709a3 92 This parameter can be set to ENABLE or DISABLE */
AnnaBridge 189:f392fc9709a3 93 uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
AnnaBridge 189:f392fc9709a3 94 This parameter can be a value of @ref ADC_EOCSelection.
AnnaBridge 189:f392fc9709a3 95 Note: For injected group, end of conversion (flag&IT) is raised only at the end of the sequence.
AnnaBridge 189:f392fc9709a3 96 Therefore, if end of conversion is set to end of each conversion, injected group should not be used with interruption (HAL_ADCEx_InjectedStart_IT)
AnnaBridge 189:f392fc9709a3 97 or polling (HAL_ADCEx_InjectedStart and HAL_ADCEx_InjectedPollForConversion). By the way, polling is still possible since driver will use an estimated timing for end of injected conversion.
AnnaBridge 189:f392fc9709a3 98 Note: If overrun feature is intended to be used, use ADC in mode 'interruption' (function HAL_ADC_Start_IT() ) with parameter EOCSelection set to end of each conversion or in mode 'transfer by DMA' (function HAL_ADC_Start_DMA()).
AnnaBridge 189:f392fc9709a3 99 If overrun feature is intended to be bypassed, use ADC in mode 'polling' or 'interruption' with parameter EOCSelection must be set to end of sequence */
AnnaBridge 189:f392fc9709a3 100 uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
AnnaBridge 189:f392fc9709a3 101 after the selected trigger occurred (software start or external trigger).
AnnaBridge 189:f392fc9709a3 102 This parameter can be set to ENABLE or DISABLE. */
AnnaBridge 189:f392fc9709a3 103 uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
AnnaBridge 189:f392fc9709a3 104 To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
AnnaBridge 189:f392fc9709a3 105 This parameter must be a number between Min_Data = 1 and Max_Data = 16. */
AnnaBridge 189:f392fc9709a3 106 uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
AnnaBridge 189:f392fc9709a3 107 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
AnnaBridge 189:f392fc9709a3 108 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
AnnaBridge 189:f392fc9709a3 109 This parameter can be set to ENABLE or DISABLE. */
AnnaBridge 189:f392fc9709a3 110 uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
AnnaBridge 189:f392fc9709a3 111 If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
AnnaBridge 189:f392fc9709a3 112 This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
AnnaBridge 189:f392fc9709a3 113 uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
AnnaBridge 189:f392fc9709a3 114 If set to ADC_SOFTWARE_START, external triggers are disabled.
AnnaBridge 189:f392fc9709a3 115 If set to external trigger source, triggering is on event rising edge by default.
AnnaBridge 189:f392fc9709a3 116 This parameter can be a value of @ref ADC_External_trigger_Source_Regular */
AnnaBridge 189:f392fc9709a3 117 uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
AnnaBridge 189:f392fc9709a3 118 If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
AnnaBridge 189:f392fc9709a3 119 This parameter can be a value of @ref ADC_External_trigger_edge_Regular */
AnnaBridge 189:f392fc9709a3 120 uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
AnnaBridge 189:f392fc9709a3 121 or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
AnnaBridge 189:f392fc9709a3 122 Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
AnnaBridge 189:f392fc9709a3 123 Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion).
AnnaBridge 189:f392fc9709a3 124 This parameter can be set to ENABLE or DISABLE. */
AnnaBridge 189:f392fc9709a3 125 }ADC_InitTypeDef;
AnnaBridge 189:f392fc9709a3 126
AnnaBridge 189:f392fc9709a3 127
AnnaBridge 189:f392fc9709a3 128
AnnaBridge 189:f392fc9709a3 129 /**
AnnaBridge 189:f392fc9709a3 130 * @brief Structure definition of ADC channel for regular group
AnnaBridge 189:f392fc9709a3 131 * @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state.
AnnaBridge 189:f392fc9709a3 132 * ADC can be either disabled or enabled without conversion on going on regular group.
AnnaBridge 189:f392fc9709a3 133 */
AnnaBridge 189:f392fc9709a3 134 typedef struct
AnnaBridge 189:f392fc9709a3 135 {
AnnaBridge 189:f392fc9709a3 136 uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group.
AnnaBridge 189:f392fc9709a3 137 This parameter can be a value of @ref ADC_channels */
AnnaBridge 189:f392fc9709a3 138 uint32_t Rank; /*!< Specifies the rank in the regular group sequencer.
AnnaBridge 189:f392fc9709a3 139 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */
AnnaBridge 189:f392fc9709a3 140 uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel.
AnnaBridge 189:f392fc9709a3 141 Unit: ADC clock cycles
AnnaBridge 189:f392fc9709a3 142 Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
AnnaBridge 189:f392fc9709a3 143 This parameter can be a value of @ref ADC_sampling_times
AnnaBridge 189:f392fc9709a3 144 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
AnnaBridge 189:f392fc9709a3 145 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
AnnaBridge 189:f392fc9709a3 146 Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
AnnaBridge 189:f392fc9709a3 147 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
AnnaBridge 189:f392fc9709a3 148 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
AnnaBridge 189:f392fc9709a3 149 uint32_t Offset; /*!< Reserved for future use, can be set to 0 */
AnnaBridge 189:f392fc9709a3 150 }ADC_ChannelConfTypeDef;
AnnaBridge 189:f392fc9709a3 151
AnnaBridge 189:f392fc9709a3 152 /**
AnnaBridge 189:f392fc9709a3 153 * @brief ADC Configuration multi-mode structure definition
AnnaBridge 189:f392fc9709a3 154 */
AnnaBridge 189:f392fc9709a3 155 typedef struct
AnnaBridge 189:f392fc9709a3 156 {
AnnaBridge 189:f392fc9709a3 157 uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode.
AnnaBridge 189:f392fc9709a3 158 This parameter can be a value of @ref ADC_analog_watchdog_selection */
AnnaBridge 189:f392fc9709a3 159 uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
AnnaBridge 189:f392fc9709a3 160 This parameter must be a 12-bit value. */
AnnaBridge 189:f392fc9709a3 161 uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
AnnaBridge 189:f392fc9709a3 162 This parameter must be a 12-bit value. */
AnnaBridge 189:f392fc9709a3 163 uint32_t Channel; /*!< Configures ADC channel for the analog watchdog.
AnnaBridge 189:f392fc9709a3 164 This parameter has an effect only if watchdog mode is configured on single channel
AnnaBridge 189:f392fc9709a3 165 This parameter can be a value of @ref ADC_channels */
AnnaBridge 189:f392fc9709a3 166 uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured
AnnaBridge 189:f392fc9709a3 167 is interrupt mode or in polling mode.
AnnaBridge 189:f392fc9709a3 168 This parameter can be set to ENABLE or DISABLE */
AnnaBridge 189:f392fc9709a3 169 uint32_t WatchdogNumber; /*!< Reserved for future use, can be set to 0 */
AnnaBridge 189:f392fc9709a3 170 }ADC_AnalogWDGConfTypeDef;
AnnaBridge 189:f392fc9709a3 171
AnnaBridge 189:f392fc9709a3 172 /**
AnnaBridge 189:f392fc9709a3 173 * @brief HAL ADC state machine: ADC states definition (bitfields)
AnnaBridge 189:f392fc9709a3 174 */
AnnaBridge 189:f392fc9709a3 175 /* States of ADC global scope */
AnnaBridge 189:f392fc9709a3 176 #define HAL_ADC_STATE_RESET 0x00000000U /*!< ADC not yet initialized or disabled */
AnnaBridge 189:f392fc9709a3 177 #define HAL_ADC_STATE_READY 0x00000001U /*!< ADC peripheral ready for use */
AnnaBridge 189:f392fc9709a3 178 #define HAL_ADC_STATE_BUSY_INTERNAL 0x00000002U /*!< ADC is busy to internal process (initialization, calibration) */
AnnaBridge 189:f392fc9709a3 179 #define HAL_ADC_STATE_TIMEOUT 0x00000004U /*!< TimeOut occurrence */
AnnaBridge 189:f392fc9709a3 180
AnnaBridge 189:f392fc9709a3 181 /* States of ADC errors */
AnnaBridge 189:f392fc9709a3 182 #define HAL_ADC_STATE_ERROR_INTERNAL 0x00000010U /*!< Internal error occurrence */
AnnaBridge 189:f392fc9709a3 183 #define HAL_ADC_STATE_ERROR_CONFIG 0x00000020U /*!< Configuration error occurrence */
AnnaBridge 189:f392fc9709a3 184 #define HAL_ADC_STATE_ERROR_DMA 0x00000040U /*!< DMA error occurrence */
AnnaBridge 189:f392fc9709a3 185
AnnaBridge 189:f392fc9709a3 186 /* States of ADC group regular */
AnnaBridge 189:f392fc9709a3 187 #define HAL_ADC_STATE_REG_BUSY 0x00000100U /*!< A conversion on group regular is ongoing or can occur (either by continuous mode,
AnnaBridge 189:f392fc9709a3 188 external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
AnnaBridge 189:f392fc9709a3 189 #define HAL_ADC_STATE_REG_EOC 0x00000200U /*!< Conversion data available on group regular */
AnnaBridge 189:f392fc9709a3 190 #define HAL_ADC_STATE_REG_OVR 0x00000400U /*!< Overrun occurrence */
AnnaBridge 189:f392fc9709a3 191
AnnaBridge 189:f392fc9709a3 192 /* States of ADC group injected */
AnnaBridge 189:f392fc9709a3 193 #define HAL_ADC_STATE_INJ_BUSY 0x00001000U /*!< A conversion on group injected is ongoing or can occur (either by auto-injection mode,
AnnaBridge 189:f392fc9709a3 194 external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
AnnaBridge 189:f392fc9709a3 195 #define HAL_ADC_STATE_INJ_EOC 0x00002000U /*!< Conversion data available on group injected */
AnnaBridge 189:f392fc9709a3 196
AnnaBridge 189:f392fc9709a3 197 /* States of ADC analog watchdogs */
AnnaBridge 189:f392fc9709a3 198 #define HAL_ADC_STATE_AWD1 0x00010000U /*!< Out-of-window occurrence of analog watchdog 1 */
AnnaBridge 189:f392fc9709a3 199 #define HAL_ADC_STATE_AWD2 0x00020000U /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 2 */
AnnaBridge 189:f392fc9709a3 200 #define HAL_ADC_STATE_AWD3 0x00040000U /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 3 */
AnnaBridge 189:f392fc9709a3 201
AnnaBridge 189:f392fc9709a3 202 /* States of ADC multi-mode */
AnnaBridge 189:f392fc9709a3 203 #define HAL_ADC_STATE_MULTIMODE_SLAVE 0x00100000U /*!< Not available on STM32F4 device: ADC in multimode slave state, controlled by another ADC master ( */
AnnaBridge 189:f392fc9709a3 204
AnnaBridge 189:f392fc9709a3 205
AnnaBridge 189:f392fc9709a3 206 /**
AnnaBridge 189:f392fc9709a3 207 * @brief ADC handle Structure definition
AnnaBridge 189:f392fc9709a3 208 */
AnnaBridge 189:f392fc9709a3 209 typedef struct
AnnaBridge 189:f392fc9709a3 210 {
AnnaBridge 189:f392fc9709a3 211 ADC_TypeDef *Instance; /*!< Register base address */
AnnaBridge 189:f392fc9709a3 212
AnnaBridge 189:f392fc9709a3 213 ADC_InitTypeDef Init; /*!< ADC required parameters */
AnnaBridge 189:f392fc9709a3 214
AnnaBridge 189:f392fc9709a3 215 __IO uint32_t NbrOfCurrentConversionRank; /*!< ADC number of current conversion rank */
AnnaBridge 189:f392fc9709a3 216
AnnaBridge 189:f392fc9709a3 217 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
AnnaBridge 189:f392fc9709a3 218
AnnaBridge 189:f392fc9709a3 219 HAL_LockTypeDef Lock; /*!< ADC locking object */
AnnaBridge 189:f392fc9709a3 220
AnnaBridge 189:f392fc9709a3 221 __IO uint32_t State; /*!< ADC communication state */
AnnaBridge 189:f392fc9709a3 222
AnnaBridge 189:f392fc9709a3 223 __IO uint32_t ErrorCode; /*!< ADC Error code */
AnnaBridge 189:f392fc9709a3 224 }ADC_HandleTypeDef;
AnnaBridge 189:f392fc9709a3 225 /**
AnnaBridge 189:f392fc9709a3 226 * @}
AnnaBridge 189:f392fc9709a3 227 */
AnnaBridge 189:f392fc9709a3 228
AnnaBridge 189:f392fc9709a3 229 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 230 /** @defgroup ADC_Exported_Constants ADC Exported Constants
AnnaBridge 189:f392fc9709a3 231 * @{
AnnaBridge 189:f392fc9709a3 232 */
AnnaBridge 189:f392fc9709a3 233
AnnaBridge 189:f392fc9709a3 234 /** @defgroup ADC_Error_Code ADC Error Code
AnnaBridge 189:f392fc9709a3 235 * @{
AnnaBridge 189:f392fc9709a3 236 */
AnnaBridge 189:f392fc9709a3 237 #define HAL_ADC_ERROR_NONE 0x00U /*!< No error */
AnnaBridge 189:f392fc9709a3 238 #define HAL_ADC_ERROR_INTERNAL 0x01U /*!< ADC IP internal error: if problem of clocking,
AnnaBridge 189:f392fc9709a3 239 enable/disable, erroneous state */
AnnaBridge 189:f392fc9709a3 240 #define HAL_ADC_ERROR_OVR 0x02U /*!< Overrun error */
AnnaBridge 189:f392fc9709a3 241 #define HAL_ADC_ERROR_DMA 0x04U /*!< DMA transfer error */
AnnaBridge 189:f392fc9709a3 242 /**
AnnaBridge 189:f392fc9709a3 243 * @}
AnnaBridge 189:f392fc9709a3 244 */
AnnaBridge 189:f392fc9709a3 245
AnnaBridge 189:f392fc9709a3 246
AnnaBridge 189:f392fc9709a3 247 /** @defgroup ADC_ClockPrescaler ADC Clock Prescaler
AnnaBridge 189:f392fc9709a3 248 * @{
AnnaBridge 189:f392fc9709a3 249 */
AnnaBridge 189:f392fc9709a3 250 #define ADC_CLOCK_SYNC_PCLK_DIV2 0x00000000U
AnnaBridge 189:f392fc9709a3 251 #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CCR_ADCPRE_0)
AnnaBridge 189:f392fc9709a3 252 #define ADC_CLOCK_SYNC_PCLK_DIV6 ((uint32_t)ADC_CCR_ADCPRE_1)
AnnaBridge 189:f392fc9709a3 253 #define ADC_CLOCK_SYNC_PCLK_DIV8 ((uint32_t)ADC_CCR_ADCPRE)
AnnaBridge 189:f392fc9709a3 254 /**
AnnaBridge 189:f392fc9709a3 255 * @}
AnnaBridge 189:f392fc9709a3 256 */
AnnaBridge 189:f392fc9709a3 257
AnnaBridge 189:f392fc9709a3 258 /** @defgroup ADC_delay_between_2_sampling_phases ADC Delay Between 2 Sampling Phases
AnnaBridge 189:f392fc9709a3 259 * @{
AnnaBridge 189:f392fc9709a3 260 */
AnnaBridge 189:f392fc9709a3 261 #define ADC_TWOSAMPLINGDELAY_5CYCLES 0x00000000U
AnnaBridge 189:f392fc9709a3 262 #define ADC_TWOSAMPLINGDELAY_6CYCLES ((uint32_t)ADC_CCR_DELAY_0)
AnnaBridge 189:f392fc9709a3 263 #define ADC_TWOSAMPLINGDELAY_7CYCLES ((uint32_t)ADC_CCR_DELAY_1)
AnnaBridge 189:f392fc9709a3 264 #define ADC_TWOSAMPLINGDELAY_8CYCLES ((uint32_t)(ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
AnnaBridge 189:f392fc9709a3 265 #define ADC_TWOSAMPLINGDELAY_9CYCLES ((uint32_t)ADC_CCR_DELAY_2)
AnnaBridge 189:f392fc9709a3 266 #define ADC_TWOSAMPLINGDELAY_10CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
AnnaBridge 189:f392fc9709a3 267 #define ADC_TWOSAMPLINGDELAY_11CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
AnnaBridge 189:f392fc9709a3 268 #define ADC_TWOSAMPLINGDELAY_12CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
AnnaBridge 189:f392fc9709a3 269 #define ADC_TWOSAMPLINGDELAY_13CYCLES ((uint32_t)ADC_CCR_DELAY_3)
AnnaBridge 189:f392fc9709a3 270 #define ADC_TWOSAMPLINGDELAY_14CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_0))
AnnaBridge 189:f392fc9709a3 271 #define ADC_TWOSAMPLINGDELAY_15CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1))
AnnaBridge 189:f392fc9709a3 272 #define ADC_TWOSAMPLINGDELAY_16CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
AnnaBridge 189:f392fc9709a3 273 #define ADC_TWOSAMPLINGDELAY_17CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2))
AnnaBridge 189:f392fc9709a3 274 #define ADC_TWOSAMPLINGDELAY_18CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
AnnaBridge 189:f392fc9709a3 275 #define ADC_TWOSAMPLINGDELAY_19CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
AnnaBridge 189:f392fc9709a3 276 #define ADC_TWOSAMPLINGDELAY_20CYCLES ((uint32_t)ADC_CCR_DELAY)
AnnaBridge 189:f392fc9709a3 277 /**
AnnaBridge 189:f392fc9709a3 278 * @}
AnnaBridge 189:f392fc9709a3 279 */
AnnaBridge 189:f392fc9709a3 280
AnnaBridge 189:f392fc9709a3 281 /** @defgroup ADC_Resolution ADC Resolution
AnnaBridge 189:f392fc9709a3 282 * @{
AnnaBridge 189:f392fc9709a3 283 */
AnnaBridge 189:f392fc9709a3 284 #define ADC_RESOLUTION_12B 0x00000000U
AnnaBridge 189:f392fc9709a3 285 #define ADC_RESOLUTION_10B ((uint32_t)ADC_CR1_RES_0)
AnnaBridge 189:f392fc9709a3 286 #define ADC_RESOLUTION_8B ((uint32_t)ADC_CR1_RES_1)
AnnaBridge 189:f392fc9709a3 287 #define ADC_RESOLUTION_6B ((uint32_t)ADC_CR1_RES)
AnnaBridge 189:f392fc9709a3 288 /**
AnnaBridge 189:f392fc9709a3 289 * @}
AnnaBridge 189:f392fc9709a3 290 */
AnnaBridge 189:f392fc9709a3 291
AnnaBridge 189:f392fc9709a3 292 /** @defgroup ADC_External_trigger_edge_Regular ADC External Trigger Edge Regular
AnnaBridge 189:f392fc9709a3 293 * @{
AnnaBridge 189:f392fc9709a3 294 */
AnnaBridge 189:f392fc9709a3 295 #define ADC_EXTERNALTRIGCONVEDGE_NONE 0x00000000U
AnnaBridge 189:f392fc9709a3 296 #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CR2_EXTEN_0)
AnnaBridge 189:f392fc9709a3 297 #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CR2_EXTEN_1)
AnnaBridge 189:f392fc9709a3 298 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_EXTEN)
AnnaBridge 189:f392fc9709a3 299 /**
AnnaBridge 189:f392fc9709a3 300 * @}
AnnaBridge 189:f392fc9709a3 301 */
AnnaBridge 189:f392fc9709a3 302
AnnaBridge 189:f392fc9709a3 303 /** @defgroup ADC_External_trigger_Source_Regular ADC External Trigger Source Regular
AnnaBridge 189:f392fc9709a3 304 * @{
AnnaBridge 189:f392fc9709a3 305 */
AnnaBridge 189:f392fc9709a3 306 /* Note: Parameter ADC_SOFTWARE_START is a software parameter used for */
AnnaBridge 189:f392fc9709a3 307 /* compatibility with other STM32 devices. */
AnnaBridge 189:f392fc9709a3 308 #define ADC_EXTERNALTRIGCONV_T1_CC1 0x00000000U
AnnaBridge 189:f392fc9709a3 309 #define ADC_EXTERNALTRIGCONV_T1_CC2 ((uint32_t)ADC_CR2_EXTSEL_0)
AnnaBridge 189:f392fc9709a3 310 #define ADC_EXTERNALTRIGCONV_T1_CC3 ((uint32_t)ADC_CR2_EXTSEL_1)
AnnaBridge 189:f392fc9709a3 311 #define ADC_EXTERNALTRIGCONV_T2_CC2 ((uint32_t)(ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
AnnaBridge 189:f392fc9709a3 312 #define ADC_EXTERNALTRIGCONV_T2_CC3 ((uint32_t)ADC_CR2_EXTSEL_2)
AnnaBridge 189:f392fc9709a3 313 #define ADC_EXTERNALTRIGCONV_T2_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
AnnaBridge 189:f392fc9709a3 314 #define ADC_EXTERNALTRIGCONV_T2_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1))
AnnaBridge 189:f392fc9709a3 315 #define ADC_EXTERNALTRIGCONV_T3_CC1 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
AnnaBridge 189:f392fc9709a3 316 #define ADC_EXTERNALTRIGCONV_T3_TRGO ((uint32_t)ADC_CR2_EXTSEL_3)
AnnaBridge 189:f392fc9709a3 317 #define ADC_EXTERNALTRIGCONV_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_0))
AnnaBridge 189:f392fc9709a3 318 #define ADC_EXTERNALTRIGCONV_T5_CC1 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_1))
AnnaBridge 189:f392fc9709a3 319 #define ADC_EXTERNALTRIGCONV_T5_CC2 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
AnnaBridge 189:f392fc9709a3 320 #define ADC_EXTERNALTRIGCONV_T5_CC3 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2))
AnnaBridge 189:f392fc9709a3 321 #define ADC_EXTERNALTRIGCONV_T8_CC1 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
AnnaBridge 189:f392fc9709a3 322 #define ADC_EXTERNALTRIGCONV_T8_TRGO ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1))
AnnaBridge 189:f392fc9709a3 323 #define ADC_EXTERNALTRIGCONV_Ext_IT11 ((uint32_t)ADC_CR2_EXTSEL)
AnnaBridge 189:f392fc9709a3 324 #define ADC_SOFTWARE_START ((uint32_t)ADC_CR2_EXTSEL + 1U)
AnnaBridge 189:f392fc9709a3 325 /**
AnnaBridge 189:f392fc9709a3 326 * @}
AnnaBridge 189:f392fc9709a3 327 */
AnnaBridge 189:f392fc9709a3 328
AnnaBridge 189:f392fc9709a3 329 /** @defgroup ADC_Data_align ADC Data Align
AnnaBridge 189:f392fc9709a3 330 * @{
AnnaBridge 189:f392fc9709a3 331 */
AnnaBridge 189:f392fc9709a3 332 #define ADC_DATAALIGN_RIGHT 0x00000000U
AnnaBridge 189:f392fc9709a3 333 #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CR2_ALIGN)
AnnaBridge 189:f392fc9709a3 334 /**
AnnaBridge 189:f392fc9709a3 335 * @}
AnnaBridge 189:f392fc9709a3 336 */
AnnaBridge 189:f392fc9709a3 337
AnnaBridge 189:f392fc9709a3 338 /** @defgroup ADC_channels ADC Common Channels
AnnaBridge 189:f392fc9709a3 339 * @{
AnnaBridge 189:f392fc9709a3 340 */
AnnaBridge 189:f392fc9709a3 341 #define ADC_CHANNEL_0 0x00000000U
AnnaBridge 189:f392fc9709a3 342 #define ADC_CHANNEL_1 ((uint32_t)ADC_CR1_AWDCH_0)
AnnaBridge 189:f392fc9709a3 343 #define ADC_CHANNEL_2 ((uint32_t)ADC_CR1_AWDCH_1)
AnnaBridge 189:f392fc9709a3 344 #define ADC_CHANNEL_3 ((uint32_t)(ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
AnnaBridge 189:f392fc9709a3 345 #define ADC_CHANNEL_4 ((uint32_t)ADC_CR1_AWDCH_2)
AnnaBridge 189:f392fc9709a3 346 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_0))
AnnaBridge 189:f392fc9709a3 347 #define ADC_CHANNEL_6 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1))
AnnaBridge 189:f392fc9709a3 348 #define ADC_CHANNEL_7 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
AnnaBridge 189:f392fc9709a3 349 #define ADC_CHANNEL_8 ((uint32_t)ADC_CR1_AWDCH_3)
AnnaBridge 189:f392fc9709a3 350 #define ADC_CHANNEL_9 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_0))
AnnaBridge 189:f392fc9709a3 351 #define ADC_CHANNEL_10 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_1))
AnnaBridge 189:f392fc9709a3 352 #define ADC_CHANNEL_11 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
AnnaBridge 189:f392fc9709a3 353 #define ADC_CHANNEL_12 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2))
AnnaBridge 189:f392fc9709a3 354 #define ADC_CHANNEL_13 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_0))
AnnaBridge 189:f392fc9709a3 355 #define ADC_CHANNEL_14 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1))
AnnaBridge 189:f392fc9709a3 356 #define ADC_CHANNEL_15 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
AnnaBridge 189:f392fc9709a3 357 #define ADC_CHANNEL_16 ((uint32_t)ADC_CR1_AWDCH_4)
AnnaBridge 189:f392fc9709a3 358 #define ADC_CHANNEL_17 ((uint32_t)(ADC_CR1_AWDCH_4 | ADC_CR1_AWDCH_0))
AnnaBridge 189:f392fc9709a3 359 #define ADC_CHANNEL_18 ((uint32_t)(ADC_CR1_AWDCH_4 | ADC_CR1_AWDCH_1))
AnnaBridge 189:f392fc9709a3 360
AnnaBridge 189:f392fc9709a3 361 #define ADC_CHANNEL_VREFINT ((uint32_t)ADC_CHANNEL_17)
AnnaBridge 189:f392fc9709a3 362 #define ADC_CHANNEL_VBAT ((uint32_t)ADC_CHANNEL_18)
AnnaBridge 189:f392fc9709a3 363 /**
AnnaBridge 189:f392fc9709a3 364 * @}
AnnaBridge 189:f392fc9709a3 365 */
AnnaBridge 189:f392fc9709a3 366
AnnaBridge 189:f392fc9709a3 367 /** @defgroup ADC_sampling_times ADC Sampling Times
AnnaBridge 189:f392fc9709a3 368 * @{
AnnaBridge 189:f392fc9709a3 369 */
AnnaBridge 189:f392fc9709a3 370 #define ADC_SAMPLETIME_3CYCLES 0x00000000U
AnnaBridge 189:f392fc9709a3 371 #define ADC_SAMPLETIME_15CYCLES ((uint32_t)ADC_SMPR1_SMP10_0)
AnnaBridge 189:f392fc9709a3 372 #define ADC_SAMPLETIME_28CYCLES ((uint32_t)ADC_SMPR1_SMP10_1)
AnnaBridge 189:f392fc9709a3 373 #define ADC_SAMPLETIME_56CYCLES ((uint32_t)(ADC_SMPR1_SMP10_1 | ADC_SMPR1_SMP10_0))
AnnaBridge 189:f392fc9709a3 374 #define ADC_SAMPLETIME_84CYCLES ((uint32_t)ADC_SMPR1_SMP10_2)
AnnaBridge 189:f392fc9709a3 375 #define ADC_SAMPLETIME_112CYCLES ((uint32_t)(ADC_SMPR1_SMP10_2 | ADC_SMPR1_SMP10_0))
AnnaBridge 189:f392fc9709a3 376 #define ADC_SAMPLETIME_144CYCLES ((uint32_t)(ADC_SMPR1_SMP10_2 | ADC_SMPR1_SMP10_1))
AnnaBridge 189:f392fc9709a3 377 #define ADC_SAMPLETIME_480CYCLES ((uint32_t)ADC_SMPR1_SMP10)
AnnaBridge 189:f392fc9709a3 378 /**
AnnaBridge 189:f392fc9709a3 379 * @}
AnnaBridge 189:f392fc9709a3 380 */
AnnaBridge 189:f392fc9709a3 381
AnnaBridge 189:f392fc9709a3 382 /** @defgroup ADC_EOCSelection ADC EOC Selection
AnnaBridge 189:f392fc9709a3 383 * @{
AnnaBridge 189:f392fc9709a3 384 */
AnnaBridge 189:f392fc9709a3 385 #define ADC_EOC_SEQ_CONV 0x00000000U
AnnaBridge 189:f392fc9709a3 386 #define ADC_EOC_SINGLE_CONV 0x00000001U
AnnaBridge 189:f392fc9709a3 387 #define ADC_EOC_SINGLE_SEQ_CONV 0x00000002U /*!< reserved for future use */
AnnaBridge 189:f392fc9709a3 388 /**
AnnaBridge 189:f392fc9709a3 389 * @}
AnnaBridge 189:f392fc9709a3 390 */
AnnaBridge 189:f392fc9709a3 391
AnnaBridge 189:f392fc9709a3 392 /** @defgroup ADC_Event_type ADC Event Type
AnnaBridge 189:f392fc9709a3 393 * @{
AnnaBridge 189:f392fc9709a3 394 */
AnnaBridge 189:f392fc9709a3 395 #define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD)
AnnaBridge 189:f392fc9709a3 396 #define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR)
AnnaBridge 189:f392fc9709a3 397 /**
AnnaBridge 189:f392fc9709a3 398 * @}
AnnaBridge 189:f392fc9709a3 399 */
AnnaBridge 189:f392fc9709a3 400
AnnaBridge 189:f392fc9709a3 401 /** @defgroup ADC_analog_watchdog_selection ADC Analog Watchdog Selection
AnnaBridge 189:f392fc9709a3 402 * @{
AnnaBridge 189:f392fc9709a3 403 */
AnnaBridge 189:f392fc9709a3 404 #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_AWDEN))
AnnaBridge 189:f392fc9709a3 405 #define ADC_ANALOGWATCHDOG_SINGLE_INJEC ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN))
AnnaBridge 189:f392fc9709a3 406 #define ADC_ANALOGWATCHDOG_SINGLE_REGINJEC ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
AnnaBridge 189:f392fc9709a3 407 #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t)ADC_CR1_AWDEN)
AnnaBridge 189:f392fc9709a3 408 #define ADC_ANALOGWATCHDOG_ALL_INJEC ((uint32_t)ADC_CR1_JAWDEN)
AnnaBridge 189:f392fc9709a3 409 #define ADC_ANALOGWATCHDOG_ALL_REGINJEC ((uint32_t)(ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
AnnaBridge 189:f392fc9709a3 410 #define ADC_ANALOGWATCHDOG_NONE 0x00000000U
AnnaBridge 189:f392fc9709a3 411 /**
AnnaBridge 189:f392fc9709a3 412 * @}
AnnaBridge 189:f392fc9709a3 413 */
AnnaBridge 189:f392fc9709a3 414
AnnaBridge 189:f392fc9709a3 415 /** @defgroup ADC_interrupts_definition ADC Interrupts Definition
AnnaBridge 189:f392fc9709a3 416 * @{
AnnaBridge 189:f392fc9709a3 417 */
AnnaBridge 189:f392fc9709a3 418 #define ADC_IT_EOC ((uint32_t)ADC_CR1_EOCIE)
AnnaBridge 189:f392fc9709a3 419 #define ADC_IT_AWD ((uint32_t)ADC_CR1_AWDIE)
AnnaBridge 189:f392fc9709a3 420 #define ADC_IT_JEOC ((uint32_t)ADC_CR1_JEOCIE)
AnnaBridge 189:f392fc9709a3 421 #define ADC_IT_OVR ((uint32_t)ADC_CR1_OVRIE)
AnnaBridge 189:f392fc9709a3 422 /**
AnnaBridge 189:f392fc9709a3 423 * @}
AnnaBridge 189:f392fc9709a3 424 */
AnnaBridge 189:f392fc9709a3 425
AnnaBridge 189:f392fc9709a3 426 /** @defgroup ADC_flags_definition ADC Flags Definition
AnnaBridge 189:f392fc9709a3 427 * @{
AnnaBridge 189:f392fc9709a3 428 */
AnnaBridge 189:f392fc9709a3 429 #define ADC_FLAG_AWD ((uint32_t)ADC_SR_AWD)
AnnaBridge 189:f392fc9709a3 430 #define ADC_FLAG_EOC ((uint32_t)ADC_SR_EOC)
AnnaBridge 189:f392fc9709a3 431 #define ADC_FLAG_JEOC ((uint32_t)ADC_SR_JEOC)
AnnaBridge 189:f392fc9709a3 432 #define ADC_FLAG_JSTRT ((uint32_t)ADC_SR_JSTRT)
AnnaBridge 189:f392fc9709a3 433 #define ADC_FLAG_STRT ((uint32_t)ADC_SR_STRT)
AnnaBridge 189:f392fc9709a3 434 #define ADC_FLAG_OVR ((uint32_t)ADC_SR_OVR)
AnnaBridge 189:f392fc9709a3 435 /**
AnnaBridge 189:f392fc9709a3 436 * @}
AnnaBridge 189:f392fc9709a3 437 */
AnnaBridge 189:f392fc9709a3 438
AnnaBridge 189:f392fc9709a3 439 /** @defgroup ADC_channels_type ADC Channels Type
AnnaBridge 189:f392fc9709a3 440 * @{
AnnaBridge 189:f392fc9709a3 441 */
AnnaBridge 189:f392fc9709a3 442 #define ADC_ALL_CHANNELS 0x00000001U
AnnaBridge 189:f392fc9709a3 443 #define ADC_REGULAR_CHANNELS 0x00000002U /*!< reserved for future use */
AnnaBridge 189:f392fc9709a3 444 #define ADC_INJECTED_CHANNELS 0x00000003U /*!< reserved for future use */
AnnaBridge 189:f392fc9709a3 445 /**
AnnaBridge 189:f392fc9709a3 446 * @}
AnnaBridge 189:f392fc9709a3 447 */
AnnaBridge 189:f392fc9709a3 448
AnnaBridge 189:f392fc9709a3 449 /**
AnnaBridge 189:f392fc9709a3 450 * @}
AnnaBridge 189:f392fc9709a3 451 */
AnnaBridge 189:f392fc9709a3 452
AnnaBridge 189:f392fc9709a3 453 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 454 /** @defgroup ADC_Exported_Macros ADC Exported Macros
AnnaBridge 189:f392fc9709a3 455 * @{
AnnaBridge 189:f392fc9709a3 456 */
AnnaBridge 189:f392fc9709a3 457
AnnaBridge 189:f392fc9709a3 458 /** @brief Reset ADC handle state
AnnaBridge 189:f392fc9709a3 459 * @param __HANDLE__ ADC handle
AnnaBridge 189:f392fc9709a3 460 * @retval None
AnnaBridge 189:f392fc9709a3 461 */
AnnaBridge 189:f392fc9709a3 462 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
AnnaBridge 189:f392fc9709a3 463
AnnaBridge 189:f392fc9709a3 464 /**
AnnaBridge 189:f392fc9709a3 465 * @brief Enable the ADC peripheral.
AnnaBridge 189:f392fc9709a3 466 * @param __HANDLE__ ADC handle
AnnaBridge 189:f392fc9709a3 467 * @retval None
AnnaBridge 189:f392fc9709a3 468 */
AnnaBridge 189:f392fc9709a3 469 #define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= ADC_CR2_ADON)
AnnaBridge 189:f392fc9709a3 470
AnnaBridge 189:f392fc9709a3 471 /**
AnnaBridge 189:f392fc9709a3 472 * @brief Disable the ADC peripheral.
AnnaBridge 189:f392fc9709a3 473 * @param __HANDLE__ ADC handle
AnnaBridge 189:f392fc9709a3 474 * @retval None
AnnaBridge 189:f392fc9709a3 475 */
AnnaBridge 189:f392fc9709a3 476 #define __HAL_ADC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= ~ADC_CR2_ADON)
AnnaBridge 189:f392fc9709a3 477
AnnaBridge 189:f392fc9709a3 478 /**
AnnaBridge 189:f392fc9709a3 479 * @brief Enable the ADC end of conversion interrupt.
AnnaBridge 189:f392fc9709a3 480 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 189:f392fc9709a3 481 * @param __INTERRUPT__ ADC Interrupt.
AnnaBridge 189:f392fc9709a3 482 * @retval None
AnnaBridge 189:f392fc9709a3 483 */
AnnaBridge 189:f392fc9709a3 484 #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) |= (__INTERRUPT__))
AnnaBridge 189:f392fc9709a3 485
AnnaBridge 189:f392fc9709a3 486 /**
AnnaBridge 189:f392fc9709a3 487 * @brief Disable the ADC end of conversion interrupt.
AnnaBridge 189:f392fc9709a3 488 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 189:f392fc9709a3 489 * @param __INTERRUPT__ ADC interrupt.
AnnaBridge 189:f392fc9709a3 490 * @retval None
AnnaBridge 189:f392fc9709a3 491 */
AnnaBridge 189:f392fc9709a3 492 #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) &= ~(__INTERRUPT__))
AnnaBridge 189:f392fc9709a3 493
AnnaBridge 189:f392fc9709a3 494 /** @brief Check if the specified ADC interrupt source is enabled or disabled.
AnnaBridge 189:f392fc9709a3 495 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 189:f392fc9709a3 496 * @param __INTERRUPT__ specifies the ADC interrupt source to check.
AnnaBridge 189:f392fc9709a3 497 * @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge 189:f392fc9709a3 498 */
AnnaBridge 189:f392fc9709a3 499 #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__))
AnnaBridge 189:f392fc9709a3 500
AnnaBridge 189:f392fc9709a3 501 /**
AnnaBridge 189:f392fc9709a3 502 * @brief Clear the ADC's pending flags.
AnnaBridge 189:f392fc9709a3 503 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 189:f392fc9709a3 504 * @param __FLAG__ ADC flag.
AnnaBridge 189:f392fc9709a3 505 * @retval None
AnnaBridge 189:f392fc9709a3 506 */
AnnaBridge 189:f392fc9709a3 507 #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
AnnaBridge 189:f392fc9709a3 508
AnnaBridge 189:f392fc9709a3 509 /**
AnnaBridge 189:f392fc9709a3 510 * @brief Get the selected ADC's flag status.
AnnaBridge 189:f392fc9709a3 511 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 189:f392fc9709a3 512 * @param __FLAG__ ADC flag.
AnnaBridge 189:f392fc9709a3 513 * @retval None
AnnaBridge 189:f392fc9709a3 514 */
AnnaBridge 189:f392fc9709a3 515 #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
AnnaBridge 189:f392fc9709a3 516
AnnaBridge 189:f392fc9709a3 517 /**
AnnaBridge 189:f392fc9709a3 518 * @}
AnnaBridge 189:f392fc9709a3 519 */
AnnaBridge 189:f392fc9709a3 520
AnnaBridge 189:f392fc9709a3 521 /* Include ADC HAL Extension module */
AnnaBridge 189:f392fc9709a3 522 #include "stm32f4xx_hal_adc_ex.h"
AnnaBridge 189:f392fc9709a3 523
AnnaBridge 189:f392fc9709a3 524 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 525 /** @addtogroup ADC_Exported_Functions
AnnaBridge 189:f392fc9709a3 526 * @{
AnnaBridge 189:f392fc9709a3 527 */
AnnaBridge 189:f392fc9709a3 528
AnnaBridge 189:f392fc9709a3 529 /** @addtogroup ADC_Exported_Functions_Group1
AnnaBridge 189:f392fc9709a3 530 * @{
AnnaBridge 189:f392fc9709a3 531 */
AnnaBridge 189:f392fc9709a3 532 /* Initialization/de-initialization functions ***********************************/
AnnaBridge 189:f392fc9709a3 533 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 534 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
AnnaBridge 189:f392fc9709a3 535 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 536 void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 537 /**
AnnaBridge 189:f392fc9709a3 538 * @}
AnnaBridge 189:f392fc9709a3 539 */
AnnaBridge 189:f392fc9709a3 540
AnnaBridge 189:f392fc9709a3 541 /** @addtogroup ADC_Exported_Functions_Group2
AnnaBridge 189:f392fc9709a3 542 * @{
AnnaBridge 189:f392fc9709a3 543 */
AnnaBridge 189:f392fc9709a3 544 /* I/O operation functions ******************************************************/
AnnaBridge 189:f392fc9709a3 545 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 546 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 547 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 548
AnnaBridge 189:f392fc9709a3 549 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 550
AnnaBridge 189:f392fc9709a3 551 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 552 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 553
AnnaBridge 189:f392fc9709a3 554 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 555
AnnaBridge 189:f392fc9709a3 556 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
AnnaBridge 189:f392fc9709a3 557 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 558
AnnaBridge 189:f392fc9709a3 559 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 560
AnnaBridge 189:f392fc9709a3 561 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 562 void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 563 void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 564 void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
AnnaBridge 189:f392fc9709a3 565 /**
AnnaBridge 189:f392fc9709a3 566 * @}
AnnaBridge 189:f392fc9709a3 567 */
AnnaBridge 189:f392fc9709a3 568
AnnaBridge 189:f392fc9709a3 569 /** @addtogroup ADC_Exported_Functions_Group3
AnnaBridge 189:f392fc9709a3 570 * @{
AnnaBridge 189:f392fc9709a3 571 */
AnnaBridge 189:f392fc9709a3 572 /* Peripheral Control functions *************************************************/
AnnaBridge 189:f392fc9709a3 573 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
AnnaBridge 189:f392fc9709a3 574 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
AnnaBridge 189:f392fc9709a3 575 /**
AnnaBridge 189:f392fc9709a3 576 * @}
AnnaBridge 189:f392fc9709a3 577 */
AnnaBridge 189:f392fc9709a3 578
AnnaBridge 189:f392fc9709a3 579 /** @addtogroup ADC_Exported_Functions_Group4
AnnaBridge 189:f392fc9709a3 580 * @{
AnnaBridge 189:f392fc9709a3 581 */
AnnaBridge 189:f392fc9709a3 582 /* Peripheral State functions ***************************************************/
AnnaBridge 189:f392fc9709a3 583 uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
AnnaBridge 189:f392fc9709a3 584 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
AnnaBridge 189:f392fc9709a3 585 /**
AnnaBridge 189:f392fc9709a3 586 * @}
AnnaBridge 189:f392fc9709a3 587 */
AnnaBridge 189:f392fc9709a3 588
AnnaBridge 189:f392fc9709a3 589 /**
AnnaBridge 189:f392fc9709a3 590 * @}
AnnaBridge 189:f392fc9709a3 591 */
AnnaBridge 189:f392fc9709a3 592 /* Private types -------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 593 /* Private variables ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 594 /* Private constants ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 595 /** @defgroup ADC_Private_Constants ADC Private Constants
AnnaBridge 189:f392fc9709a3 596 * @{
AnnaBridge 189:f392fc9709a3 597 */
AnnaBridge 189:f392fc9709a3 598 /* Delay for ADC stabilization time. */
AnnaBridge 189:f392fc9709a3 599 /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
AnnaBridge 189:f392fc9709a3 600 /* Unit: us */
AnnaBridge 189:f392fc9709a3 601 #define ADC_STAB_DELAY_US 3U
AnnaBridge 189:f392fc9709a3 602 /* Delay for temperature sensor stabilization time. */
AnnaBridge 189:f392fc9709a3 603 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
AnnaBridge 189:f392fc9709a3 604 /* Unit: us */
AnnaBridge 189:f392fc9709a3 605 #define ADC_TEMPSENSOR_DELAY_US 10U
AnnaBridge 189:f392fc9709a3 606 /**
AnnaBridge 189:f392fc9709a3 607 * @}
AnnaBridge 189:f392fc9709a3 608 */
AnnaBridge 189:f392fc9709a3 609
AnnaBridge 189:f392fc9709a3 610 /* Private macro ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 611
AnnaBridge 189:f392fc9709a3 612 /** @defgroup ADC_Private_Macros ADC Private Macros
AnnaBridge 189:f392fc9709a3 613 * @{
AnnaBridge 189:f392fc9709a3 614 */
AnnaBridge 189:f392fc9709a3 615 /* Macro reserved for internal HAL driver usage, not intended to be used in
AnnaBridge 189:f392fc9709a3 616 code of final user */
AnnaBridge 189:f392fc9709a3 617
AnnaBridge 189:f392fc9709a3 618 /**
AnnaBridge 189:f392fc9709a3 619 * @brief Verification of ADC state: enabled or disabled
AnnaBridge 189:f392fc9709a3 620 * @param __HANDLE__ ADC handle
AnnaBridge 189:f392fc9709a3 621 * @retval SET (ADC enabled) or RESET (ADC disabled)
AnnaBridge 189:f392fc9709a3 622 */
AnnaBridge 189:f392fc9709a3 623 #define ADC_IS_ENABLE(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 624 ((( ((__HANDLE__)->Instance->SR & ADC_SR_ADONS) == ADC_SR_ADONS ) \
AnnaBridge 189:f392fc9709a3 625 ) ? SET : RESET)
AnnaBridge 189:f392fc9709a3 626
AnnaBridge 189:f392fc9709a3 627 /**
AnnaBridge 189:f392fc9709a3 628 * @brief Test if conversion trigger of regular group is software start
AnnaBridge 189:f392fc9709a3 629 * or external trigger.
AnnaBridge 189:f392fc9709a3 630 * @param __HANDLE__ ADC handle
AnnaBridge 189:f392fc9709a3 631 * @retval SET (software start) or RESET (external trigger)
AnnaBridge 189:f392fc9709a3 632 */
AnnaBridge 189:f392fc9709a3 633 #define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 634 (((__HANDLE__)->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
AnnaBridge 189:f392fc9709a3 635
AnnaBridge 189:f392fc9709a3 636 /**
AnnaBridge 189:f392fc9709a3 637 * @brief Test if conversion trigger of injected group is software start
AnnaBridge 189:f392fc9709a3 638 * or external trigger.
AnnaBridge 189:f392fc9709a3 639 * @param __HANDLE__ ADC handle
AnnaBridge 189:f392fc9709a3 640 * @retval SET (software start) or RESET (external trigger)
AnnaBridge 189:f392fc9709a3 641 */
AnnaBridge 189:f392fc9709a3 642 #define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 643 (((__HANDLE__)->Instance->CR2 & ADC_CR2_JEXTEN) == RESET)
AnnaBridge 189:f392fc9709a3 644
AnnaBridge 189:f392fc9709a3 645 /**
AnnaBridge 189:f392fc9709a3 646 * @brief Simultaneously clears and sets specific bits of the handle State
AnnaBridge 189:f392fc9709a3 647 * @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(),
AnnaBridge 189:f392fc9709a3 648 * the first parameter is the ADC handle State, the second parameter is the
AnnaBridge 189:f392fc9709a3 649 * bit field to clear, the third and last parameter is the bit field to set.
AnnaBridge 189:f392fc9709a3 650 * @retval None
AnnaBridge 189:f392fc9709a3 651 */
AnnaBridge 189:f392fc9709a3 652 #define ADC_STATE_CLR_SET MODIFY_REG
AnnaBridge 189:f392fc9709a3 653
AnnaBridge 189:f392fc9709a3 654 /**
AnnaBridge 189:f392fc9709a3 655 * @brief Clear ADC error code (set it to error code: "no error")
AnnaBridge 189:f392fc9709a3 656 * @param __HANDLE__ ADC handle
AnnaBridge 189:f392fc9709a3 657 * @retval None
AnnaBridge 189:f392fc9709a3 658 */
AnnaBridge 189:f392fc9709a3 659 #define ADC_CLEAR_ERRORCODE(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 660 ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
AnnaBridge 189:f392fc9709a3 661
AnnaBridge 189:f392fc9709a3 662
AnnaBridge 189:f392fc9709a3 663 #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
AnnaBridge 189:f392fc9709a3 664 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) || \
AnnaBridge 189:f392fc9709a3 665 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV6) || \
AnnaBridge 189:f392fc9709a3 666 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV8))
AnnaBridge 189:f392fc9709a3 667 #define IS_ADC_SAMPLING_DELAY(DELAY) (((DELAY) == ADC_TWOSAMPLINGDELAY_5CYCLES) || \
AnnaBridge 189:f392fc9709a3 668 ((DELAY) == ADC_TWOSAMPLINGDELAY_6CYCLES) || \
AnnaBridge 189:f392fc9709a3 669 ((DELAY) == ADC_TWOSAMPLINGDELAY_7CYCLES) || \
AnnaBridge 189:f392fc9709a3 670 ((DELAY) == ADC_TWOSAMPLINGDELAY_8CYCLES) || \
AnnaBridge 189:f392fc9709a3 671 ((DELAY) == ADC_TWOSAMPLINGDELAY_9CYCLES) || \
AnnaBridge 189:f392fc9709a3 672 ((DELAY) == ADC_TWOSAMPLINGDELAY_10CYCLES) || \
AnnaBridge 189:f392fc9709a3 673 ((DELAY) == ADC_TWOSAMPLINGDELAY_11CYCLES) || \
AnnaBridge 189:f392fc9709a3 674 ((DELAY) == ADC_TWOSAMPLINGDELAY_12CYCLES) || \
AnnaBridge 189:f392fc9709a3 675 ((DELAY) == ADC_TWOSAMPLINGDELAY_13CYCLES) || \
AnnaBridge 189:f392fc9709a3 676 ((DELAY) == ADC_TWOSAMPLINGDELAY_14CYCLES) || \
AnnaBridge 189:f392fc9709a3 677 ((DELAY) == ADC_TWOSAMPLINGDELAY_15CYCLES) || \
AnnaBridge 189:f392fc9709a3 678 ((DELAY) == ADC_TWOSAMPLINGDELAY_16CYCLES) || \
AnnaBridge 189:f392fc9709a3 679 ((DELAY) == ADC_TWOSAMPLINGDELAY_17CYCLES) || \
AnnaBridge 189:f392fc9709a3 680 ((DELAY) == ADC_TWOSAMPLINGDELAY_18CYCLES) || \
AnnaBridge 189:f392fc9709a3 681 ((DELAY) == ADC_TWOSAMPLINGDELAY_19CYCLES) || \
AnnaBridge 189:f392fc9709a3 682 ((DELAY) == ADC_TWOSAMPLINGDELAY_20CYCLES))
AnnaBridge 189:f392fc9709a3 683 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
AnnaBridge 189:f392fc9709a3 684 ((RESOLUTION) == ADC_RESOLUTION_10B) || \
AnnaBridge 189:f392fc9709a3 685 ((RESOLUTION) == ADC_RESOLUTION_8B) || \
AnnaBridge 189:f392fc9709a3 686 ((RESOLUTION) == ADC_RESOLUTION_6B))
AnnaBridge 189:f392fc9709a3 687 #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
AnnaBridge 189:f392fc9709a3 688 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
AnnaBridge 189:f392fc9709a3 689 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
AnnaBridge 189:f392fc9709a3 690 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING))
AnnaBridge 189:f392fc9709a3 691 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
AnnaBridge 189:f392fc9709a3 692 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
AnnaBridge 189:f392fc9709a3 693 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \
AnnaBridge 189:f392fc9709a3 694 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
AnnaBridge 189:f392fc9709a3 695 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \
AnnaBridge 189:f392fc9709a3 696 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC4) || \
AnnaBridge 189:f392fc9709a3 697 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \
AnnaBridge 189:f392fc9709a3 698 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \
AnnaBridge 189:f392fc9709a3 699 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
AnnaBridge 189:f392fc9709a3 700 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
AnnaBridge 189:f392fc9709a3 701 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \
AnnaBridge 189:f392fc9709a3 702 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC2) || \
AnnaBridge 189:f392fc9709a3 703 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \
AnnaBridge 189:f392fc9709a3 704 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \
AnnaBridge 189:f392fc9709a3 705 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
AnnaBridge 189:f392fc9709a3 706 ((REGTRIG) == ADC_EXTERNALTRIGCONV_Ext_IT11)|| \
AnnaBridge 189:f392fc9709a3 707 ((REGTRIG) == ADC_SOFTWARE_START))
AnnaBridge 189:f392fc9709a3 708 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
AnnaBridge 189:f392fc9709a3 709 ((ALIGN) == ADC_DATAALIGN_LEFT))
AnnaBridge 189:f392fc9709a3 710 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_3CYCLES) || \
AnnaBridge 189:f392fc9709a3 711 ((TIME) == ADC_SAMPLETIME_15CYCLES) || \
AnnaBridge 189:f392fc9709a3 712 ((TIME) == ADC_SAMPLETIME_28CYCLES) || \
AnnaBridge 189:f392fc9709a3 713 ((TIME) == ADC_SAMPLETIME_56CYCLES) || \
AnnaBridge 189:f392fc9709a3 714 ((TIME) == ADC_SAMPLETIME_84CYCLES) || \
AnnaBridge 189:f392fc9709a3 715 ((TIME) == ADC_SAMPLETIME_112CYCLES) || \
AnnaBridge 189:f392fc9709a3 716 ((TIME) == ADC_SAMPLETIME_144CYCLES) || \
AnnaBridge 189:f392fc9709a3 717 ((TIME) == ADC_SAMPLETIME_480CYCLES))
AnnaBridge 189:f392fc9709a3 718 #define IS_ADC_EOCSelection(EOCSelection) (((EOCSelection) == ADC_EOC_SINGLE_CONV) || \
AnnaBridge 189:f392fc9709a3 719 ((EOCSelection) == ADC_EOC_SEQ_CONV) || \
AnnaBridge 189:f392fc9709a3 720 ((EOCSelection) == ADC_EOC_SINGLE_SEQ_CONV))
AnnaBridge 189:f392fc9709a3 721 #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
AnnaBridge 189:f392fc9709a3 722 ((EVENT) == ADC_OVR_EVENT))
AnnaBridge 189:f392fc9709a3 723 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
AnnaBridge 189:f392fc9709a3 724 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || \
AnnaBridge 189:f392fc9709a3 725 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) || \
AnnaBridge 189:f392fc9709a3 726 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG) || \
AnnaBridge 189:f392fc9709a3 727 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_INJEC) || \
AnnaBridge 189:f392fc9709a3 728 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REGINJEC) || \
AnnaBridge 189:f392fc9709a3 729 ((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE))
AnnaBridge 189:f392fc9709a3 730 #define IS_ADC_CHANNELS_TYPE(CHANNEL_TYPE) (((CHANNEL_TYPE) == ADC_ALL_CHANNELS) || \
AnnaBridge 189:f392fc9709a3 731 ((CHANNEL_TYPE) == ADC_REGULAR_CHANNELS) || \
AnnaBridge 189:f392fc9709a3 732 ((CHANNEL_TYPE) == ADC_INJECTED_CHANNELS))
AnnaBridge 189:f392fc9709a3 733 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFFU)
AnnaBridge 189:f392fc9709a3 734
AnnaBridge 189:f392fc9709a3 735 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 16U))
AnnaBridge 189:f392fc9709a3 736 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 1U) && ((RANK) <= (16U)))
AnnaBridge 189:f392fc9709a3 737 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 1U) && ((NUMBER) <= 8U))
AnnaBridge 189:f392fc9709a3 738 #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
AnnaBridge 189:f392fc9709a3 739 ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= 0x0FFFU)) || \
AnnaBridge 189:f392fc9709a3 740 (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= 0x03FFU)) || \
AnnaBridge 189:f392fc9709a3 741 (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= 0x00FFU)) || \
AnnaBridge 189:f392fc9709a3 742 (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= 0x003FU)))
AnnaBridge 189:f392fc9709a3 743
AnnaBridge 189:f392fc9709a3 744 /**
AnnaBridge 189:f392fc9709a3 745 * @brief Set ADC Regular channel sequence length.
AnnaBridge 189:f392fc9709a3 746 * @param _NbrOfConversion_ Regular channel sequence length.
AnnaBridge 189:f392fc9709a3 747 * @retval None
AnnaBridge 189:f392fc9709a3 748 */
AnnaBridge 189:f392fc9709a3 749 #define ADC_SQR1(_NbrOfConversion_) (((_NbrOfConversion_) - (uint8_t)1U) << 20U)
AnnaBridge 189:f392fc9709a3 750
AnnaBridge 189:f392fc9709a3 751 /**
AnnaBridge 189:f392fc9709a3 752 * @brief Set the ADC's sample time for channel numbers between 10 and 18.
AnnaBridge 189:f392fc9709a3 753 * @param _SAMPLETIME_ Sample time parameter.
AnnaBridge 189:f392fc9709a3 754 * @param _CHANNELNB_ Channel number.
AnnaBridge 189:f392fc9709a3 755 * @retval None
AnnaBridge 189:f392fc9709a3 756 */
AnnaBridge 189:f392fc9709a3 757 #define ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3U * (((uint32_t)((uint16_t)(_CHANNELNB_))) - 10U)))
AnnaBridge 189:f392fc9709a3 758
AnnaBridge 189:f392fc9709a3 759 /**
AnnaBridge 189:f392fc9709a3 760 * @brief Set the ADC's sample time for channel numbers between 0 and 9.
AnnaBridge 189:f392fc9709a3 761 * @param _SAMPLETIME_ Sample time parameter.
AnnaBridge 189:f392fc9709a3 762 * @param _CHANNELNB_ Channel number.
AnnaBridge 189:f392fc9709a3 763 * @retval None
AnnaBridge 189:f392fc9709a3 764 */
AnnaBridge 189:f392fc9709a3 765 #define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3U * ((uint32_t)((uint16_t)(_CHANNELNB_)))))
AnnaBridge 189:f392fc9709a3 766
AnnaBridge 189:f392fc9709a3 767 /**
AnnaBridge 189:f392fc9709a3 768 * @brief Set the selected regular channel rank for rank between 1 and 6.
AnnaBridge 189:f392fc9709a3 769 * @param _CHANNELNB_ Channel number.
AnnaBridge 189:f392fc9709a3 770 * @param _RANKNB_ Rank number.
AnnaBridge 189:f392fc9709a3 771 * @retval None
AnnaBridge 189:f392fc9709a3 772 */
AnnaBridge 189:f392fc9709a3 773 #define ADC_SQR3_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 1U)))
AnnaBridge 189:f392fc9709a3 774
AnnaBridge 189:f392fc9709a3 775 /**
AnnaBridge 189:f392fc9709a3 776 * @brief Set the selected regular channel rank for rank between 7 and 12.
AnnaBridge 189:f392fc9709a3 777 * @param _CHANNELNB_ Channel number.
AnnaBridge 189:f392fc9709a3 778 * @param _RANKNB_ Rank number.
AnnaBridge 189:f392fc9709a3 779 * @retval None
AnnaBridge 189:f392fc9709a3 780 */
AnnaBridge 189:f392fc9709a3 781 #define ADC_SQR2_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 7U)))
AnnaBridge 189:f392fc9709a3 782
AnnaBridge 189:f392fc9709a3 783 /**
AnnaBridge 189:f392fc9709a3 784 * @brief Set the selected regular channel rank for rank between 13 and 16.
AnnaBridge 189:f392fc9709a3 785 * @param _CHANNELNB_ Channel number.
AnnaBridge 189:f392fc9709a3 786 * @param _RANKNB_ Rank number.
AnnaBridge 189:f392fc9709a3 787 * @retval None
AnnaBridge 189:f392fc9709a3 788 */
AnnaBridge 189:f392fc9709a3 789 #define ADC_SQR1_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 13U)))
AnnaBridge 189:f392fc9709a3 790
AnnaBridge 189:f392fc9709a3 791 /**
AnnaBridge 189:f392fc9709a3 792 * @brief Enable ADC continuous conversion mode.
AnnaBridge 189:f392fc9709a3 793 * @param _CONTINUOUS_MODE_ Continuous mode.
AnnaBridge 189:f392fc9709a3 794 * @retval None
AnnaBridge 189:f392fc9709a3 795 */
AnnaBridge 189:f392fc9709a3 796 #define ADC_CR2_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 1U)
AnnaBridge 189:f392fc9709a3 797
AnnaBridge 189:f392fc9709a3 798 /**
AnnaBridge 189:f392fc9709a3 799 * @brief Configures the number of discontinuous conversions for the regular group channels.
AnnaBridge 189:f392fc9709a3 800 * @param _NBR_DISCONTINUOUSCONV_ Number of discontinuous conversions.
AnnaBridge 189:f392fc9709a3 801 * @retval None
AnnaBridge 189:f392fc9709a3 802 */
AnnaBridge 189:f392fc9709a3 803 #define ADC_CR1_DISCONTINUOUS(_NBR_DISCONTINUOUSCONV_) (((_NBR_DISCONTINUOUSCONV_) - 1U) << ADC_CR1_DISCNUM_Pos)
AnnaBridge 189:f392fc9709a3 804
AnnaBridge 189:f392fc9709a3 805 /**
AnnaBridge 189:f392fc9709a3 806 * @brief Enable ADC scan mode.
AnnaBridge 189:f392fc9709a3 807 * @param _SCANCONV_MODE_ Scan conversion mode.
AnnaBridge 189:f392fc9709a3 808 * @retval None
AnnaBridge 189:f392fc9709a3 809 */
AnnaBridge 189:f392fc9709a3 810 #define ADC_CR1_SCANCONV(_SCANCONV_MODE_) ((_SCANCONV_MODE_) << 8U)
AnnaBridge 189:f392fc9709a3 811
AnnaBridge 189:f392fc9709a3 812 /**
AnnaBridge 189:f392fc9709a3 813 * @brief Enable the ADC end of conversion selection.
AnnaBridge 189:f392fc9709a3 814 * @param _EOCSelection_MODE_ End of conversion selection mode.
AnnaBridge 189:f392fc9709a3 815 * @retval None
AnnaBridge 189:f392fc9709a3 816 */
AnnaBridge 189:f392fc9709a3 817 #define ADC_CR2_EOCSelection(_EOCSelection_MODE_) ((_EOCSelection_MODE_) << 10U)
AnnaBridge 189:f392fc9709a3 818
AnnaBridge 189:f392fc9709a3 819 /**
AnnaBridge 189:f392fc9709a3 820 * @brief Enable the ADC DMA continuous request.
AnnaBridge 189:f392fc9709a3 821 * @param _DMAContReq_MODE_ DMA continuous request mode.
AnnaBridge 189:f392fc9709a3 822 * @retval None
AnnaBridge 189:f392fc9709a3 823 */
AnnaBridge 189:f392fc9709a3 824 #define ADC_CR2_DMAContReq(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 9U)
AnnaBridge 189:f392fc9709a3 825
AnnaBridge 189:f392fc9709a3 826 /**
AnnaBridge 189:f392fc9709a3 827 * @brief Return resolution bits in CR1 register.
AnnaBridge 189:f392fc9709a3 828 * @param __HANDLE__ ADC handle
AnnaBridge 189:f392fc9709a3 829 * @retval None
AnnaBridge 189:f392fc9709a3 830 */
AnnaBridge 189:f392fc9709a3 831 #define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CR1) & ADC_CR1_RES)
AnnaBridge 189:f392fc9709a3 832
AnnaBridge 189:f392fc9709a3 833 /**
AnnaBridge 189:f392fc9709a3 834 * @}
AnnaBridge 189:f392fc9709a3 835 */
AnnaBridge 189:f392fc9709a3 836
AnnaBridge 189:f392fc9709a3 837 /* Private functions ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 838 /** @defgroup ADC_Private_Functions ADC Private Functions
AnnaBridge 189:f392fc9709a3 839 * @{
AnnaBridge 189:f392fc9709a3 840 */
AnnaBridge 189:f392fc9709a3 841
AnnaBridge 189:f392fc9709a3 842 /**
AnnaBridge 189:f392fc9709a3 843 * @}
AnnaBridge 189:f392fc9709a3 844 */
AnnaBridge 189:f392fc9709a3 845
AnnaBridge 189:f392fc9709a3 846 /**
AnnaBridge 189:f392fc9709a3 847 * @}
AnnaBridge 189:f392fc9709a3 848 */
AnnaBridge 189:f392fc9709a3 849
AnnaBridge 189:f392fc9709a3 850 /**
AnnaBridge 189:f392fc9709a3 851 * @}
AnnaBridge 189:f392fc9709a3 852 */
AnnaBridge 189:f392fc9709a3 853
AnnaBridge 189:f392fc9709a3 854 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 855 }
AnnaBridge 189:f392fc9709a3 856 #endif
AnnaBridge 189:f392fc9709a3 857
AnnaBridge 189:f392fc9709a3 858 #endif /*__STM32F4xx_ADC_H */
AnnaBridge 189:f392fc9709a3 859
AnnaBridge 189:f392fc9709a3 860
AnnaBridge 189:f392fc9709a3 861 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/