mbed official / mbed-dev

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/inc/iodefines/scif_iodefine.h@119:3921aeca8633
This updates the lib to the mbed lib v128

NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 119:3921aeca8633 1 /*******************************************************************************
mbed_official 119:3921aeca8633 2 * DISCLAIMER
mbed_official 119:3921aeca8633 3 * This software is supplied by Renesas Electronics Corporation and is only
mbed_official 119:3921aeca8633 4 * intended for use with Renesas products. No other uses are authorized. This
mbed_official 119:3921aeca8633 5 * software is owned by Renesas Electronics Corporation and is protected under
mbed_official 119:3921aeca8633 6 * all applicable laws, including copyright laws.
mbed_official 119:3921aeca8633 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
mbed_official 119:3921aeca8633 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
mbed_official 119:3921aeca8633 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
mbed_official 119:3921aeca8633 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
mbed_official 119:3921aeca8633 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
mbed_official 119:3921aeca8633 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
mbed_official 119:3921aeca8633 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
mbed_official 119:3921aeca8633 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
mbed_official 119:3921aeca8633 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
mbed_official 119:3921aeca8633 16 * Renesas reserves the right, without notice, to make changes to this software
mbed_official 119:3921aeca8633 17 * and to discontinue the availability of this software. By using this software,
mbed_official 119:3921aeca8633 18 * you agree to the additional terms and conditions found by accessing the
mbed_official 119:3921aeca8633 19 * following link:
mbed_official 119:3921aeca8633 20 * http://www.renesas.com/disclaimer*
mbed_official 119:3921aeca8633 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
mbed_official 119:3921aeca8633 22 *******************************************************************************/
mbed_official 119:3921aeca8633 23 /*******************************************************************************
mbed_official 119:3921aeca8633 24 * File Name : scif_iodefine.h
mbed_official 119:3921aeca8633 25 * $Rev: $
mbed_official 119:3921aeca8633 26 * $Date:: $
mbed_official 119:3921aeca8633 27 * Description : Definition of I/O Register (V1.00a)
mbed_official 119:3921aeca8633 28 ******************************************************************************/
mbed_official 119:3921aeca8633 29 #ifndef SCIF_IODEFINE_H
mbed_official 119:3921aeca8633 30 #define SCIF_IODEFINE_H
mbed_official 119:3921aeca8633 31 /* ->QAC 0857 : Over 1024 #define (C90) */
mbed_official 119:3921aeca8633 32 /* ->SEC M1.10.1 : Not magic number */
mbed_official 119:3921aeca8633 33
mbed_official 119:3921aeca8633 34 struct st_scif
mbed_official 119:3921aeca8633 35 { /* SCIF */
mbed_official 119:3921aeca8633 36 volatile uint16_t SCSMR; /* SCSMR */
mbed_official 119:3921aeca8633 37 volatile uint8_t dummy1[2]; /* */
mbed_official 119:3921aeca8633 38 volatile uint8_t SCBRR; /* SCBRR */
mbed_official 119:3921aeca8633 39 volatile uint8_t dummy2[3]; /* */
mbed_official 119:3921aeca8633 40 volatile uint16_t SCSCR; /* SCSCR */
mbed_official 119:3921aeca8633 41 volatile uint8_t dummy3[2]; /* */
mbed_official 119:3921aeca8633 42 volatile uint8_t SCFTDR; /* SCFTDR */
mbed_official 119:3921aeca8633 43 volatile uint8_t dummy4[3]; /* */
mbed_official 119:3921aeca8633 44 volatile uint16_t SCFSR; /* SCFSR */
mbed_official 119:3921aeca8633 45 volatile uint8_t dummy5[2]; /* */
mbed_official 119:3921aeca8633 46 volatile uint8_t SCFRDR; /* SCFRDR */
mbed_official 119:3921aeca8633 47 volatile uint8_t dummy6[3]; /* */
mbed_official 119:3921aeca8633 48 volatile uint16_t SCFCR; /* SCFCR */
mbed_official 119:3921aeca8633 49 volatile uint8_t dummy7[2]; /* */
mbed_official 119:3921aeca8633 50 volatile uint16_t SCFDR; /* SCFDR */
mbed_official 119:3921aeca8633 51 volatile uint8_t dummy8[2]; /* */
mbed_official 119:3921aeca8633 52 volatile uint16_t SCSPTR; /* SCSPTR */
mbed_official 119:3921aeca8633 53 volatile uint8_t dummy9[2]; /* */
mbed_official 119:3921aeca8633 54 volatile uint16_t SCLSR; /* SCLSR */
mbed_official 119:3921aeca8633 55 volatile uint8_t dummy10[2]; /* */
mbed_official 119:3921aeca8633 56 volatile uint16_t SCEMR; /* SCEMR */
mbed_official 119:3921aeca8633 57 };
mbed_official 119:3921aeca8633 58
mbed_official 119:3921aeca8633 59
mbed_official 119:3921aeca8633 60 #define SCIF0 (*(struct st_scif *)0xE8007000uL) /* SCIF0 */
mbed_official 119:3921aeca8633 61 #define SCIF1 (*(struct st_scif *)0xE8007800uL) /* SCIF1 */
mbed_official 119:3921aeca8633 62 #define SCIF2 (*(struct st_scif *)0xE8008000uL) /* SCIF2 */
mbed_official 119:3921aeca8633 63 #define SCIF3 (*(struct st_scif *)0xE8008800uL) /* SCIF3 */
mbed_official 119:3921aeca8633 64 #define SCIF4 (*(struct st_scif *)0xE8009000uL) /* SCIF4 */
mbed_official 119:3921aeca8633 65 #define SCIF5 (*(struct st_scif *)0xE8009800uL) /* SCIF5 */
mbed_official 119:3921aeca8633 66 #define SCIF6 (*(struct st_scif *)0xE800A000uL) /* SCIF6 */
mbed_official 119:3921aeca8633 67 #define SCIF7 (*(struct st_scif *)0xE800A800uL) /* SCIF7 */
mbed_official 119:3921aeca8633 68
mbed_official 119:3921aeca8633 69 #define P_SCIF0 (0xE8007000uL) /* SCIF0 */
mbed_official 119:3921aeca8633 70 #define P_SCIF1 (0xE8007800uL) /* SCIF1 */
mbed_official 119:3921aeca8633 71 #define P_SCIF2 (0xE8008000uL) /* SCIF2 */
mbed_official 119:3921aeca8633 72 #define P_SCIF3 (0xE8008800uL) /* SCIF3 */
mbed_official 119:3921aeca8633 73 #define P_SCIF4 (0xE8009000uL) /* SCIF4 */
mbed_official 119:3921aeca8633 74 #define P_SCIF5 (0xE8009800uL) /* SCIF5 */
mbed_official 119:3921aeca8633 75 #define P_SCIF6 (0xE800A000uL) /* SCIF6 */
mbed_official 119:3921aeca8633 76 #define P_SCIF7 (0xE800A800uL) /* SCIF7 */
mbed_official 119:3921aeca8633 77
mbed_official 119:3921aeca8633 78
mbed_official 119:3921aeca8633 79 /* Start of channnel array defines of SCIF */
mbed_official 119:3921aeca8633 80
mbed_official 119:3921aeca8633 81 /* Channnel array defines of SCIF */
mbed_official 119:3921aeca8633 82 /*(Sample) value = SCIF[ channel ]->SCSMR; */
mbed_official 119:3921aeca8633 83 #define SCIF_COUNT 8
mbed_official 119:3921aeca8633 84 #define SCIF_ADDRESS_LIST \
mbed_official 119:3921aeca8633 85 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
mbed_official 119:3921aeca8633 86 &SCIF0, &SCIF1, &SCIF2, &SCIF3, &SCIF4, &SCIF5, &SCIF6, &SCIF7 \
mbed_official 119:3921aeca8633 87 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
mbed_official 119:3921aeca8633 88
mbed_official 119:3921aeca8633 89 /* End of channnel array defines of SCIF */
mbed_official 119:3921aeca8633 90
mbed_official 119:3921aeca8633 91
mbed_official 119:3921aeca8633 92 #define SCSMR_0 SCIF0.SCSMR
mbed_official 119:3921aeca8633 93 #define SCBRR_0 SCIF0.SCBRR
mbed_official 119:3921aeca8633 94 #define SCSCR_0 SCIF0.SCSCR
mbed_official 119:3921aeca8633 95 #define SCFTDR_0 SCIF0.SCFTDR
mbed_official 119:3921aeca8633 96 #define SCFSR_0 SCIF0.SCFSR
mbed_official 119:3921aeca8633 97 #define SCFRDR_0 SCIF0.SCFRDR
mbed_official 119:3921aeca8633 98 #define SCFCR_0 SCIF0.SCFCR
mbed_official 119:3921aeca8633 99 #define SCFDR_0 SCIF0.SCFDR
mbed_official 119:3921aeca8633 100 #define SCSPTR_0 SCIF0.SCSPTR
mbed_official 119:3921aeca8633 101 #define SCLSR_0 SCIF0.SCLSR
mbed_official 119:3921aeca8633 102 #define SCEMR_0 SCIF0.SCEMR
mbed_official 119:3921aeca8633 103 #define SCSMR_1 SCIF1.SCSMR
mbed_official 119:3921aeca8633 104 #define SCBRR_1 SCIF1.SCBRR
mbed_official 119:3921aeca8633 105 #define SCSCR_1 SCIF1.SCSCR
mbed_official 119:3921aeca8633 106 #define SCFTDR_1 SCIF1.SCFTDR
mbed_official 119:3921aeca8633 107 #define SCFSR_1 SCIF1.SCFSR
mbed_official 119:3921aeca8633 108 #define SCFRDR_1 SCIF1.SCFRDR
mbed_official 119:3921aeca8633 109 #define SCFCR_1 SCIF1.SCFCR
mbed_official 119:3921aeca8633 110 #define SCFDR_1 SCIF1.SCFDR
mbed_official 119:3921aeca8633 111 #define SCSPTR_1 SCIF1.SCSPTR
mbed_official 119:3921aeca8633 112 #define SCLSR_1 SCIF1.SCLSR
mbed_official 119:3921aeca8633 113 #define SCEMR_1 SCIF1.SCEMR
mbed_official 119:3921aeca8633 114 #define SCSMR_2 SCIF2.SCSMR
mbed_official 119:3921aeca8633 115 #define SCBRR_2 SCIF2.SCBRR
mbed_official 119:3921aeca8633 116 #define SCSCR_2 SCIF2.SCSCR
mbed_official 119:3921aeca8633 117 #define SCFTDR_2 SCIF2.SCFTDR
mbed_official 119:3921aeca8633 118 #define SCFSR_2 SCIF2.SCFSR
mbed_official 119:3921aeca8633 119 #define SCFRDR_2 SCIF2.SCFRDR
mbed_official 119:3921aeca8633 120 #define SCFCR_2 SCIF2.SCFCR
mbed_official 119:3921aeca8633 121 #define SCFDR_2 SCIF2.SCFDR
mbed_official 119:3921aeca8633 122 #define SCSPTR_2 SCIF2.SCSPTR
mbed_official 119:3921aeca8633 123 #define SCLSR_2 SCIF2.SCLSR
mbed_official 119:3921aeca8633 124 #define SCEMR_2 SCIF2.SCEMR
mbed_official 119:3921aeca8633 125 #define SCSMR_3 SCIF3.SCSMR
mbed_official 119:3921aeca8633 126 #define SCBRR_3 SCIF3.SCBRR
mbed_official 119:3921aeca8633 127 #define SCSCR_3 SCIF3.SCSCR
mbed_official 119:3921aeca8633 128 #define SCFTDR_3 SCIF3.SCFTDR
mbed_official 119:3921aeca8633 129 #define SCFSR_3 SCIF3.SCFSR
mbed_official 119:3921aeca8633 130 #define SCFRDR_3 SCIF3.SCFRDR
mbed_official 119:3921aeca8633 131 #define SCFCR_3 SCIF3.SCFCR
mbed_official 119:3921aeca8633 132 #define SCFDR_3 SCIF3.SCFDR
mbed_official 119:3921aeca8633 133 #define SCSPTR_3 SCIF3.SCSPTR
mbed_official 119:3921aeca8633 134 #define SCLSR_3 SCIF3.SCLSR
mbed_official 119:3921aeca8633 135 #define SCEMR_3 SCIF3.SCEMR
mbed_official 119:3921aeca8633 136 #define SCSMR_4 SCIF4.SCSMR
mbed_official 119:3921aeca8633 137 #define SCBRR_4 SCIF4.SCBRR
mbed_official 119:3921aeca8633 138 #define SCSCR_4 SCIF4.SCSCR
mbed_official 119:3921aeca8633 139 #define SCFTDR_4 SCIF4.SCFTDR
mbed_official 119:3921aeca8633 140 #define SCFSR_4 SCIF4.SCFSR
mbed_official 119:3921aeca8633 141 #define SCFRDR_4 SCIF4.SCFRDR
mbed_official 119:3921aeca8633 142 #define SCFCR_4 SCIF4.SCFCR
mbed_official 119:3921aeca8633 143 #define SCFDR_4 SCIF4.SCFDR
mbed_official 119:3921aeca8633 144 #define SCSPTR_4 SCIF4.SCSPTR
mbed_official 119:3921aeca8633 145 #define SCLSR_4 SCIF4.SCLSR
mbed_official 119:3921aeca8633 146 #define SCEMR_4 SCIF4.SCEMR
mbed_official 119:3921aeca8633 147 #define SCSMR_5 SCIF5.SCSMR
mbed_official 119:3921aeca8633 148 #define SCBRR_5 SCIF5.SCBRR
mbed_official 119:3921aeca8633 149 #define SCSCR_5 SCIF5.SCSCR
mbed_official 119:3921aeca8633 150 #define SCFTDR_5 SCIF5.SCFTDR
mbed_official 119:3921aeca8633 151 #define SCFSR_5 SCIF5.SCFSR
mbed_official 119:3921aeca8633 152 #define SCFRDR_5 SCIF5.SCFRDR
mbed_official 119:3921aeca8633 153 #define SCFCR_5 SCIF5.SCFCR
mbed_official 119:3921aeca8633 154 #define SCFDR_5 SCIF5.SCFDR
mbed_official 119:3921aeca8633 155 #define SCSPTR_5 SCIF5.SCSPTR
mbed_official 119:3921aeca8633 156 #define SCLSR_5 SCIF5.SCLSR
mbed_official 119:3921aeca8633 157 #define SCEMR_5 SCIF5.SCEMR
mbed_official 119:3921aeca8633 158 #define SCSMR_6 SCIF6.SCSMR
mbed_official 119:3921aeca8633 159 #define SCBRR_6 SCIF6.SCBRR
mbed_official 119:3921aeca8633 160 #define SCSCR_6 SCIF6.SCSCR
mbed_official 119:3921aeca8633 161 #define SCFTDR_6 SCIF6.SCFTDR
mbed_official 119:3921aeca8633 162 #define SCFSR_6 SCIF6.SCFSR
mbed_official 119:3921aeca8633 163 #define SCFRDR_6 SCIF6.SCFRDR
mbed_official 119:3921aeca8633 164 #define SCFCR_6 SCIF6.SCFCR
mbed_official 119:3921aeca8633 165 #define SCFDR_6 SCIF6.SCFDR
mbed_official 119:3921aeca8633 166 #define SCSPTR_6 SCIF6.SCSPTR
mbed_official 119:3921aeca8633 167 #define SCLSR_6 SCIF6.SCLSR
mbed_official 119:3921aeca8633 168 #define SCEMR_6 SCIF6.SCEMR
mbed_official 119:3921aeca8633 169 #define SCSMR_7 SCIF7.SCSMR
mbed_official 119:3921aeca8633 170 #define SCBRR_7 SCIF7.SCBRR
mbed_official 119:3921aeca8633 171 #define SCSCR_7 SCIF7.SCSCR
mbed_official 119:3921aeca8633 172 #define SCFTDR_7 SCIF7.SCFTDR
mbed_official 119:3921aeca8633 173 #define SCFSR_7 SCIF7.SCFSR
mbed_official 119:3921aeca8633 174 #define SCFRDR_7 SCIF7.SCFRDR
mbed_official 119:3921aeca8633 175 #define SCFCR_7 SCIF7.SCFCR
mbed_official 119:3921aeca8633 176 #define SCFDR_7 SCIF7.SCFDR
mbed_official 119:3921aeca8633 177 #define SCSPTR_7 SCIF7.SCSPTR
mbed_official 119:3921aeca8633 178 #define SCLSR_7 SCIF7.SCLSR
mbed_official 119:3921aeca8633 179 #define SCEMR_7 SCIF7.SCEMR
mbed_official 119:3921aeca8633 180 /* <-SEC M1.10.1 */
mbed_official 119:3921aeca8633 181 /* <-QAC 0857 */
mbed_official 119:3921aeca8633 182 #endif