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targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf
- Committer:
- AnnaBridge
- Date:
- 2017-08-16
- Revision:
- 171:89b338f31ef1
- Parent:
- 165:e614a9f1c9e2
File content as of revision 171:89b338f31ef1:
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_1.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00003000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_IROM1_start__ = 0x00003000; /* FLASHA program start*/
define symbol __ICFEDIT_region_IROM1_end__ = 0x00051FFF; /* 316K = 320K - 4K(FIB table), FLASHA end */
define symbol __ICFEDIT_region_IROM2_start__ = 0x00102000;
define symbol __ICFEDIT_region_IROM2_end__ = 0x00151FFF; /* 320K */
define symbol __ICFEDIT_region_EROM1_start__ = 0x0;
define symbol __ICFEDIT_region_EROM1_end__ = 0x0;
define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
define symbol __ICFEDIT_region_EROM2_end__ = 0x0;
define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
define symbol __ICFEDIT_region_EROM3_end__ = 0x0;
define symbol __ICFEDIT_region_IRAM1_start__ = 0x3FFFC000; /* RAMA start */
define symbol __ICFEDIT_region_IRAM1_end__ = 0x3FFFFFFF; /* RAMA end */
define symbol __ICFEDIT_region_IRAM2_start__ = 0x3FFF8000; /* RAMB start */
define symbol __ICFEDIT_region_IRAM2_end__ = 0x3FFFBFFF; /* RAMB end */
define symbol __ICFEDIT_region_IRAM3_start__ = 0x3FFF4000; /* RAMC start */
define symbol __ICFEDIT_region_IRAM3_end__ = 0x3FFF7FFF; /* RAMC end */
define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM1_end__ = 0x0;
define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__]
| mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
define region RAM_VECTOR_region = mem:[from __ICFEDIT_region_IRAM3_start__ to __ICFEDIT_region_IRAM3_start__ + 0x90 - 1];
define region RAM_region = mem:[from __ICFEDIT_region_IRAM3_start__ + 0x90 to __ICFEDIT_region_IRAM3_end__]
| mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__]
| mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__ - __ICFEDIT_size_cstack__ ];
define region CSTACK_region = mem:[from __ICFEDIT_region_IRAM1_end__ - __ICFEDIT_size_cstack__ + 1 to __ICFEDIT_region_IRAM1_end__];
/* Define overlays for MIB's, ths allows view of one MIB from a application level while
* MAC and PHY only know about their own MIB */
define overlay MIBOVERLAY { section MIBSTARTSECTION };
define overlay MIBOVERLAY { section MIBSECTION };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block RAM_VECTORS with alignment = 8, size = 0x90 { };
initialize by copy { readwrite };
if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
{
// Required in a multi-threaded application
initialize by copy with packing = none { section __DLIB_PERTHREAD };
}
/* Initialize the code in RAM, copied over from FLASH */
initialize by copy with packing = none { readonly code section EXECINRAM };
/*initialize by copy { readwrite };*/
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section SWVERSION, readonly section FIBTABLE };
place in FLASH_region { readonly section .cstartup, readonly };
place at start of RAM_VECTOR_region {block RAM_VECTORS};
place in RAM_region { readwrite, block HEAP, section XHEAP, readonly code section EXECINRAM, overlay MIBOVERLAY, readwrite section MIBENDSECTION};
place at end of CSTACK_region { block CSTACK };


