mbed official / mbed-dev

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.h@157:ff67d9f36b67, 2017-02-02 (annotated)

Committer:
<>
Date:
Thu Feb 02 17:01:33 2017 +0000
Revision:
157:ff67d9f36b67
Parent:
149:156823d33999
Child:
161:2cc1468da177
This updates the lib to the mbed lib v135

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_dcmi.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 157:ff67d9f36b67 5 * @version V1.1.2
<> 157:ff67d9f36b67 6 * @date 23-September-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of DCMI HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F7xx_HAL_DCMI_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F7xx_HAL_DCMI_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 157:ff67d9f36b67 46 #if defined (DCMI)
<> 157:ff67d9f36b67 47
<> 144:ef7eb2e8f9f7 48 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 49 #include "stm32f7xx_hal_def.h"
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /** @addtogroup DCMI DCMI
<> 144:ef7eb2e8f9f7 56 * @brief DCMI HAL module driver
<> 144:ef7eb2e8f9f7 57 * @{
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 61 /** @defgroup DCMI_Exported_Types DCMI Exported Types
<> 144:ef7eb2e8f9f7 62 * @{
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64 /**
<> 144:ef7eb2e8f9f7 65 * @brief HAL DCMI State structures definition
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67 typedef enum
<> 144:ef7eb2e8f9f7 68 {
<> 144:ef7eb2e8f9f7 69 HAL_DCMI_STATE_RESET = 0x00U, /*!< DCMI not yet initialized or disabled */
<> 144:ef7eb2e8f9f7 70 HAL_DCMI_STATE_READY = 0x01U, /*!< DCMI initialized and ready for use */
<> 144:ef7eb2e8f9f7 71 HAL_DCMI_STATE_BUSY = 0x02U, /*!< DCMI internal processing is ongoing */
<> 144:ef7eb2e8f9f7 72 HAL_DCMI_STATE_TIMEOUT = 0x03U, /*!< DCMI timeout state */
<> 144:ef7eb2e8f9f7 73 HAL_DCMI_STATE_ERROR = 0x04U, /*!< DCMI error state */
<> 144:ef7eb2e8f9f7 74 HAL_DCMI_STATE_SUSPENDED = 0x05U /*!< DCMI suspend state */
<> 144:ef7eb2e8f9f7 75 }HAL_DCMI_StateTypeDef;
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /**
<> 144:ef7eb2e8f9f7 78 * @brief DCMIEx Embedded Synchronisation CODE Init structure definition
<> 144:ef7eb2e8f9f7 79 */
<> 144:ef7eb2e8f9f7 80 typedef struct
<> 144:ef7eb2e8f9f7 81 {
<> 144:ef7eb2e8f9f7 82 uint8_t FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
<> 144:ef7eb2e8f9f7 83 uint8_t LineStartCode; /*!< Specifies the code of the line start delimiter. */
<> 144:ef7eb2e8f9f7 84 uint8_t LineEndCode; /*!< Specifies the code of the line end delimiter. */
<> 144:ef7eb2e8f9f7 85 uint8_t FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
<> 144:ef7eb2e8f9f7 86 }DCMI_CodesInitTypeDef;
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /**
<> 144:ef7eb2e8f9f7 89 * @brief DCMI Init structure definition
<> 144:ef7eb2e8f9f7 90 */
<> 144:ef7eb2e8f9f7 91 typedef struct
<> 144:ef7eb2e8f9f7 92 {
<> 144:ef7eb2e8f9f7 93 uint32_t SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
<> 144:ef7eb2e8f9f7 94 This parameter can be a value of @ref DCMI_Synchronization_Mode */
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 uint32_t PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
<> 144:ef7eb2e8f9f7 97 This parameter can be a value of @ref DCMI_PIXCK_Polarity */
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 uint32_t VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
<> 144:ef7eb2e8f9f7 100 This parameter can be a value of @ref DCMI_VSYNC_Polarity */
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 uint32_t HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
<> 144:ef7eb2e8f9f7 103 This parameter can be a value of @ref DCMI_HSYNC_Polarity */
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 uint32_t CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
<> 144:ef7eb2e8f9f7 106 This parameter can be a value of @ref DCMI_Capture_Rate */
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 uint32_t ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
<> 144:ef7eb2e8f9f7 109 This parameter can be a value of @ref DCMI_Extended_Data_Mode */
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 DCMI_CodesInitTypeDef SyncroCode; /*!< Specifies the code of the line/frame start delimiter and the
<> 144:ef7eb2e8f9f7 112 line/frame end delimiter */
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 uint32_t JPEGMode; /*!< Enable or Disable the JPEG mode.
<> 144:ef7eb2e8f9f7 115 This parameter can be a value of @ref DCMI_MODE_JPEG */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 uint32_t ByteSelectMode; /*!< Specifies the data to be captured by the interface
<> 144:ef7eb2e8f9f7 118 This parameter can be a value of @ref DCMI_Byte_Select_Mode */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 uint32_t ByteSelectStart; /*!< Specifies if the data to be captured by the interface is even or odd
<> 144:ef7eb2e8f9f7 121 This parameter can be a value of @ref DCMI_Byte_Select_Start */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 uint32_t LineSelectMode; /*!< Specifies the line of data to be captured by the interface
<> 144:ef7eb2e8f9f7 124 This parameter can be a value of @ref DCMI_Line_Select_Mode */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 uint32_t LineSelectStart; /*!< Specifies if the line of data to be captured by the interface is even or odd
<> 144:ef7eb2e8f9f7 127 This parameter can be a value of @ref DCMI_Line_Select_Start */
<> 144:ef7eb2e8f9f7 128 }DCMI_InitTypeDef;
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /**
<> 144:ef7eb2e8f9f7 131 * @brief DCMI handle Structure definition
<> 144:ef7eb2e8f9f7 132 */
<> 144:ef7eb2e8f9f7 133 typedef struct
<> 144:ef7eb2e8f9f7 134 {
<> 144:ef7eb2e8f9f7 135 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 DCMI_InitTypeDef Init; /*!< DCMI parameters */
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 HAL_LockTypeDef Lock; /*!< DCMI locking object */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 __IO uint32_t XferCount; /*!< DMA transfer counter */
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 __IO uint32_t XferSize; /*!< DMA transfer size */
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 uint32_t XferTransferNumber; /*!< DMA transfer number */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 __IO uint32_t ErrorCode; /*!< DCMI Error code */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 }DCMI_HandleTypeDef;
<> 144:ef7eb2e8f9f7 156 /**
<> 144:ef7eb2e8f9f7 157 * @}
<> 144:ef7eb2e8f9f7 158 */
<> 144:ef7eb2e8f9f7 159 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /** @defgroup DCMI_Exported_Constants DCMI Exported Constants
<> 144:ef7eb2e8f9f7 162 * @{
<> 144:ef7eb2e8f9f7 163 */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /** @defgroup DCMI_Error_Code DCMI Error Code
<> 144:ef7eb2e8f9f7 166 * @{
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168 #define HAL_DCMI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
<> 144:ef7eb2e8f9f7 169 #define HAL_DCMI_ERROR_OVR ((uint32_t)0x00000001U) /*!< Overrun error */
<> 144:ef7eb2e8f9f7 170 #define HAL_DCMI_ERROR_SYNC ((uint32_t)0x00000002U) /*!< Synchronization error */
<> 144:ef7eb2e8f9f7 171 #define HAL_DCMI_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
<> 144:ef7eb2e8f9f7 172 #define HAL_DCMI_ERROR_DMA ((uint32_t)0x00000040U) /*!< DMA error */
<> 144:ef7eb2e8f9f7 173 /**
<> 144:ef7eb2e8f9f7 174 * @}
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 /** @defgroup DCMI_Capture_Mode DCMI Capture Mode
<> 144:ef7eb2e8f9f7 178 * @{
<> 144:ef7eb2e8f9f7 179 */
<> 144:ef7eb2e8f9f7 180 #define DCMI_MODE_CONTINUOUS ((uint32_t)0x00000000U) /*!< The received data are transferred continuously
<> 144:ef7eb2e8f9f7 181 into the destination memory through the DMA */
<> 144:ef7eb2e8f9f7 182 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
<> 144:ef7eb2e8f9f7 183 frame and then transfers a single frame through the DMA */
<> 144:ef7eb2e8f9f7 184 /**
<> 144:ef7eb2e8f9f7 185 * @}
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 /** @defgroup DCMI_Synchronization_Mode DCMI Synchronization Mode
<> 144:ef7eb2e8f9f7 189 * @{
<> 144:ef7eb2e8f9f7 190 */
<> 144:ef7eb2e8f9f7 191 #define DCMI_SYNCHRO_HARDWARE ((uint32_t)0x00000000U) /*!< Hardware synchronization data capture (frame/line start/stop)
<> 144:ef7eb2e8f9f7 192 is synchronized with the HSYNC/VSYNC signals */
<> 144:ef7eb2e8f9f7 193 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
<> 144:ef7eb2e8f9f7 194 synchronization codes embedded in the data flow */
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /**
<> 144:ef7eb2e8f9f7 197 * @}
<> 144:ef7eb2e8f9f7 198 */
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /** @defgroup DCMI_PIXCK_Polarity DCMI PIXCK Polarity
<> 144:ef7eb2e8f9f7 201 * @{
<> 144:ef7eb2e8f9f7 202 */
<> 144:ef7eb2e8f9f7 203 #define DCMI_PCKPOLARITY_FALLING ((uint32_t)0x00000000U) /*!< Pixel clock active on Falling edge */
<> 144:ef7eb2e8f9f7 204 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 /**
<> 144:ef7eb2e8f9f7 207 * @}
<> 144:ef7eb2e8f9f7 208 */
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 /** @defgroup DCMI_VSYNC_Polarity DCMI VSYNC Polarity
<> 144:ef7eb2e8f9f7 211 * @{
<> 144:ef7eb2e8f9f7 212 */
<> 144:ef7eb2e8f9f7 213 #define DCMI_VSPOLARITY_LOW ((uint32_t)0x00000000U) /*!< Vertical synchronization active Low */
<> 144:ef7eb2e8f9f7 214 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /**
<> 144:ef7eb2e8f9f7 217 * @}
<> 144:ef7eb2e8f9f7 218 */
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /** @defgroup DCMI_HSYNC_Polarity DCMI HSYNC Polarity
<> 144:ef7eb2e8f9f7 221 * @{
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223 #define DCMI_HSPOLARITY_LOW ((uint32_t)0x00000000U) /*!< Horizontal synchronization active Low */
<> 144:ef7eb2e8f9f7 224 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 /**
<> 144:ef7eb2e8f9f7 227 * @}
<> 144:ef7eb2e8f9f7 228 */
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /** @defgroup DCMI_MODE_JPEG DCMI MODE JPEG
<> 144:ef7eb2e8f9f7 231 * @{
<> 144:ef7eb2e8f9f7 232 */
<> 144:ef7eb2e8f9f7 233 #define DCMI_JPEG_DISABLE ((uint32_t)0x00000000U) /*!< Mode JPEG Disabled */
<> 144:ef7eb2e8f9f7 234 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /**
<> 144:ef7eb2e8f9f7 237 * @}
<> 144:ef7eb2e8f9f7 238 */
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 /** @defgroup DCMI_Capture_Rate DCMI Capture Rate
<> 144:ef7eb2e8f9f7 241 * @{
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243 #define DCMI_CR_ALL_FRAME ((uint32_t)0x00000000U) /*!< All frames are captured */
<> 144:ef7eb2e8f9f7 244 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
<> 144:ef7eb2e8f9f7 245 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /**
<> 144:ef7eb2e8f9f7 248 * @}
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /** @defgroup DCMI_Extended_Data_Mode DCMI Extended Data Mode
<> 144:ef7eb2e8f9f7 252 * @{
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254 #define DCMI_EXTEND_DATA_8B ((uint32_t)0x00000000U) /*!< Interface captures 8-bit data on every pixel clock */
<> 144:ef7eb2e8f9f7 255 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
<> 144:ef7eb2e8f9f7 256 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
<> 144:ef7eb2e8f9f7 257 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /**
<> 144:ef7eb2e8f9f7 260 * @}
<> 144:ef7eb2e8f9f7 261 */
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 /** @defgroup DCMI_Window_Coordinate DCMI Window Coordinate
<> 144:ef7eb2e8f9f7 264 * @{
<> 144:ef7eb2e8f9f7 265 */
<> 144:ef7eb2e8f9f7 266 #define DCMI_WINDOW_COORDINATE ((uint32_t)0x3FFFU) /*!< Window coordinate */
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /**
<> 144:ef7eb2e8f9f7 269 * @}
<> 144:ef7eb2e8f9f7 270 */
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 /** @defgroup DCMI_Window_Height DCMI Window Height
<> 144:ef7eb2e8f9f7 273 * @{
<> 144:ef7eb2e8f9f7 274 */
<> 144:ef7eb2e8f9f7 275 #define DCMI_WINDOW_HEIGHT ((uint32_t)0x1FFFU) /*!< Window Height */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /**
<> 144:ef7eb2e8f9f7 278 * @}
<> 144:ef7eb2e8f9f7 279 */
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 /** @defgroup DCMI_interrupt_sources DCMI interrupt sources
<> 144:ef7eb2e8f9f7 282 * @{
<> 144:ef7eb2e8f9f7 283 */
<> 144:ef7eb2e8f9f7 284 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE) /*!< Capture complete interrupt */
<> 144:ef7eb2e8f9f7 285 #define DCMI_IT_OVR ((uint32_t)DCMI_IER_OVR_IE) /*!< Overrun interrupt */
<> 144:ef7eb2e8f9f7 286 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE) /*!< Synchronization error interrupt */
<> 144:ef7eb2e8f9f7 287 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE) /*!< VSYNC interrupt */
<> 144:ef7eb2e8f9f7 288 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE) /*!< Line interrupt */
<> 144:ef7eb2e8f9f7 289 /**
<> 144:ef7eb2e8f9f7 290 * @}
<> 144:ef7eb2e8f9f7 291 */
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 /** @defgroup DCMI_Flags DCMI Flags
<> 144:ef7eb2e8f9f7 294 * @{
<> 144:ef7eb2e8f9f7 295 */
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 /**
<> 144:ef7eb2e8f9f7 298 * @brief DCMI SR register
<> 144:ef7eb2e8f9f7 299 */
<> 144:ef7eb2e8f9f7 300 #define DCMI_FLAG_HSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_HSYNC) /*!< HSYNC pin state (active line / synchronization between lines) */
<> 144:ef7eb2e8f9f7 301 #define DCMI_FLAG_VSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_VSYNC) /*!< VSYNC pin state (active frame / synchronization between frames) */
<> 144:ef7eb2e8f9f7 302 #define DCMI_FLAG_FNE ((uint32_t)DCMI_SR_INDEX|DCMI_SR_FNE) /*!< FIFO not empty flag */
<> 144:ef7eb2e8f9f7 303 /**
<> 144:ef7eb2e8f9f7 304 * @brief DCMI RIS register
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RIS_FRAME_RIS) /*!< Frame capture complete interrupt flag */
<> 144:ef7eb2e8f9f7 307 #define DCMI_FLAG_OVRRI ((uint32_t)DCMI_RIS_OVR_RIS) /*!< Overrun interrupt flag */
<> 144:ef7eb2e8f9f7 308 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RIS_ERR_RIS) /*!< Synchronization error interrupt flag */
<> 144:ef7eb2e8f9f7 309 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RIS_VSYNC_RIS) /*!< VSYNC interrupt flag */
<> 144:ef7eb2e8f9f7 310 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RIS_LINE_RIS) /*!< Line interrupt flag */
<> 144:ef7eb2e8f9f7 311 /**
<> 144:ef7eb2e8f9f7 312 * @brief DCMI MIS register
<> 144:ef7eb2e8f9f7 313 */
<> 144:ef7eb2e8f9f7 314 #define DCMI_FLAG_FRAMEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_FRAME_MIS) /*!< DCMI Frame capture complete masked interrupt status */
<> 144:ef7eb2e8f9f7 315 #define DCMI_FLAG_OVRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_OVR_MIS ) /*!< DCMI Overrun masked interrupt status */
<> 144:ef7eb2e8f9f7 316 #define DCMI_FLAG_ERRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_ERR_MIS ) /*!< DCMI Synchronization error masked interrupt status */
<> 144:ef7eb2e8f9f7 317 #define DCMI_FLAG_VSYNCMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_VSYNC_MIS) /*!< DCMI VSYNC masked interrupt status */
<> 144:ef7eb2e8f9f7 318 #define DCMI_FLAG_LINEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_LINE_MIS ) /*!< DCMI Line masked interrupt status */
<> 144:ef7eb2e8f9f7 319 /**
<> 144:ef7eb2e8f9f7 320 * @}
<> 144:ef7eb2e8f9f7 321 */
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 /** @defgroup DCMI_Byte_Select_Mode DCMI Byte Select Mode
<> 144:ef7eb2e8f9f7 324 * @{
<> 144:ef7eb2e8f9f7 325 */
<> 144:ef7eb2e8f9f7 326 #define DCMI_BSM_ALL ((uint32_t)0x00000000U) /*!< Interface captures all received data */
<> 144:ef7eb2e8f9f7 327 #define DCMI_BSM_OTHER ((uint32_t)DCMI_CR_BSM_0) /*!< Interface captures every other byte from the received data */
<> 144:ef7eb2e8f9f7 328 #define DCMI_BSM_ALTERNATE_4 ((uint32_t)DCMI_CR_BSM_1) /*!< Interface captures one byte out of four */
<> 144:ef7eb2e8f9f7 329 #define DCMI_BSM_ALTERNATE_2 ((uint32_t)(DCMI_CR_BSM_0 | DCMI_CR_BSM_1)) /*!< Interface captures two bytes out of four */
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 /**
<> 144:ef7eb2e8f9f7 332 * @}
<> 144:ef7eb2e8f9f7 333 */
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /** @defgroup DCMI_Byte_Select_Start DCMI Byte Select Start
<> 144:ef7eb2e8f9f7 336 * @{
<> 144:ef7eb2e8f9f7 337 */
<> 144:ef7eb2e8f9f7 338 #define DCMI_OEBS_ODD ((uint32_t)0x00000000U) /*!< Interface captures first data from the frame/line start, second one being dropped */
<> 144:ef7eb2e8f9f7 339 #define DCMI_OEBS_EVEN ((uint32_t)DCMI_CR_OEBS) /*!< Interface captures second data from the frame/line start, first one being dropped */
<> 144:ef7eb2e8f9f7 340
<> 144:ef7eb2e8f9f7 341 /**
<> 144:ef7eb2e8f9f7 342 * @}
<> 144:ef7eb2e8f9f7 343 */
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 /** @defgroup DCMI_Line_Select_Mode DCMI Line Select Mode
<> 144:ef7eb2e8f9f7 346 * @{
<> 144:ef7eb2e8f9f7 347 */
<> 144:ef7eb2e8f9f7 348 #define DCMI_LSM_ALL ((uint32_t)0x00000000U) /*!< Interface captures all received lines */
<> 144:ef7eb2e8f9f7 349 #define DCMI_LSM_ALTERNATE_2 ((uint32_t)DCMI_CR_LSM) /*!< Interface captures one line out of two */
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /**
<> 144:ef7eb2e8f9f7 352 * @}
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /** @defgroup DCMI_Line_Select_Start DCMI Line Select Start
<> 144:ef7eb2e8f9f7 356 * @{
<> 144:ef7eb2e8f9f7 357 */
<> 144:ef7eb2e8f9f7 358 #define DCMI_OELS_ODD ((uint32_t)0x00000000U) /*!< Interface captures first line from the frame start, second one being dropped */
<> 144:ef7eb2e8f9f7 359 #define DCMI_OELS_EVEN ((uint32_t)DCMI_CR_OELS) /*!< Interface captures second line from the frame start, first one being dropped */
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 /**
<> 144:ef7eb2e8f9f7 362 * @}
<> 144:ef7eb2e8f9f7 363 */
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 /**
<> 144:ef7eb2e8f9f7 366 * @}
<> 144:ef7eb2e8f9f7 367 */
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 370 /** @defgroup DCMI_Exported_Macros DCMI Exported Macros
<> 144:ef7eb2e8f9f7 371 * @{
<> 144:ef7eb2e8f9f7 372 */
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 /** @brief Reset DCMI handle state
<> 144:ef7eb2e8f9f7 375 * @param __HANDLE__: specifies the DCMI handle.
<> 144:ef7eb2e8f9f7 376 * @retval None
<> 144:ef7eb2e8f9f7 377 */
<> 144:ef7eb2e8f9f7 378 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
<> 144:ef7eb2e8f9f7 379
<> 144:ef7eb2e8f9f7 380 /**
<> 144:ef7eb2e8f9f7 381 * @brief Enable the DCMI.
<> 144:ef7eb2e8f9f7 382 * @param __HANDLE__: DCMI handle
<> 144:ef7eb2e8f9f7 383 * @retval None
<> 144:ef7eb2e8f9f7 384 */
<> 144:ef7eb2e8f9f7 385 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 /**
<> 144:ef7eb2e8f9f7 388 * @brief Disable the DCMI.
<> 144:ef7eb2e8f9f7 389 * @param __HANDLE__: DCMI handle
<> 144:ef7eb2e8f9f7 390 * @retval None
<> 144:ef7eb2e8f9f7 391 */
<> 144:ef7eb2e8f9f7 392 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
<> 144:ef7eb2e8f9f7 393
<> 144:ef7eb2e8f9f7 394 /* Interrupt & Flag management */
<> 144:ef7eb2e8f9f7 395 /**
<> 144:ef7eb2e8f9f7 396 * @brief Get the DCMI pending flag.
<> 144:ef7eb2e8f9f7 397 * @param __HANDLE__: DCMI handle
<> 144:ef7eb2e8f9f7 398 * @param __FLAG__: Get the specified flag.
<> 144:ef7eb2e8f9f7 399 * This parameter can be one of the following values (no combination allowed)
<> 144:ef7eb2e8f9f7 400 * @arg DCMI_FLAG_HSYNC: HSYNC pin state (active line / synchronization between lines)
<> 144:ef7eb2e8f9f7 401 * @arg DCMI_FLAG_VSYNC: VSYNC pin state (active frame / synchronization between frames)
<> 144:ef7eb2e8f9f7 402 * @arg DCMI_FLAG_FNE: FIFO empty flag
<> 144:ef7eb2e8f9f7 403 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
<> 144:ef7eb2e8f9f7 404 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
<> 144:ef7eb2e8f9f7 405 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
<> 144:ef7eb2e8f9f7 406 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
<> 144:ef7eb2e8f9f7 407 * @arg DCMI_FLAG_LINERI: Line flag mask
<> 144:ef7eb2e8f9f7 408 * @arg DCMI_FLAG_FRAMEMI: DCMI Capture complete masked interrupt status
<> 144:ef7eb2e8f9f7 409 * @arg DCMI_FLAG_OVRMI: DCMI Overrun masked interrupt status
<> 144:ef7eb2e8f9f7 410 * @arg DCMI_FLAG_ERRMI: DCMI Synchronization error masked interrupt status
<> 144:ef7eb2e8f9f7 411 * @arg DCMI_FLAG_VSYNCMI: DCMI VSYNC masked interrupt status
<> 144:ef7eb2e8f9f7 412 * @arg DCMI_FLAG_LINEMI: DCMI Line masked interrupt status
<> 144:ef7eb2e8f9f7 413 * @retval The state of FLAG.
<> 144:ef7eb2e8f9f7 414 */
<> 144:ef7eb2e8f9f7 415 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
<> 144:ef7eb2e8f9f7 416 ((((__FLAG__) & (DCMI_SR_INDEX|DCMI_MIS_INDEX)) == 0x0)? ((__HANDLE__)->Instance->RIS & (__FLAG__)) :\
<> 144:ef7eb2e8f9f7 417 (((__FLAG__) & DCMI_SR_INDEX) == 0x0)? ((__HANDLE__)->Instance->MIS & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419 /**
<> 144:ef7eb2e8f9f7 420 * @brief Clear the DCMI pending flags.
<> 144:ef7eb2e8f9f7 421 * @param __HANDLE__: DCMI handle
<> 144:ef7eb2e8f9f7 422 * @param __FLAG__: specifies the flag to clear.
<> 144:ef7eb2e8f9f7 423 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 424 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
<> 144:ef7eb2e8f9f7 425 * @arg DCMI_FLAG_OVFRI: Overflow flag mask
<> 144:ef7eb2e8f9f7 426 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
<> 144:ef7eb2e8f9f7 427 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
<> 144:ef7eb2e8f9f7 428 * @arg DCMI_FLAG_LINERI: Line flag mask
<> 144:ef7eb2e8f9f7 429 * @retval None
<> 144:ef7eb2e8f9f7 430 */
<> 144:ef7eb2e8f9f7 431 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
<> 144:ef7eb2e8f9f7 432
<> 144:ef7eb2e8f9f7 433 /**
<> 144:ef7eb2e8f9f7 434 * @brief Enable the specified DCMI interrupts.
<> 144:ef7eb2e8f9f7 435 * @param __HANDLE__: DCMI handle
<> 144:ef7eb2e8f9f7 436 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
<> 144:ef7eb2e8f9f7 437 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 438 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
<> 144:ef7eb2e8f9f7 439 * @arg DCMI_IT_OVF: Overflow interrupt mask
<> 144:ef7eb2e8f9f7 440 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
<> 144:ef7eb2e8f9f7 441 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
<> 144:ef7eb2e8f9f7 442 * @arg DCMI_IT_LINE: Line interrupt mask
<> 144:ef7eb2e8f9f7 443 * @retval None
<> 144:ef7eb2e8f9f7 444 */
<> 144:ef7eb2e8f9f7 445 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 /**
<> 144:ef7eb2e8f9f7 448 * @brief Disable the specified DCMI interrupts.
<> 144:ef7eb2e8f9f7 449 * @param __HANDLE__: DCMI handle
<> 144:ef7eb2e8f9f7 450 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
<> 144:ef7eb2e8f9f7 451 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 452 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
<> 144:ef7eb2e8f9f7 453 * @arg DCMI_IT_OVF: Overflow interrupt mask
<> 144:ef7eb2e8f9f7 454 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
<> 144:ef7eb2e8f9f7 455 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
<> 144:ef7eb2e8f9f7 456 * @arg DCMI_IT_LINE: Line interrupt mask
<> 144:ef7eb2e8f9f7 457 * @retval None
<> 144:ef7eb2e8f9f7 458 */
<> 144:ef7eb2e8f9f7 459 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
<> 144:ef7eb2e8f9f7 460
<> 144:ef7eb2e8f9f7 461 /**
<> 144:ef7eb2e8f9f7 462 * @brief Check whether the specified DCMI interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 463 * @param __HANDLE__: DCMI handle
<> 144:ef7eb2e8f9f7 464 * @param __INTERRUPT__: specifies the DCMI interrupt source to check.
<> 144:ef7eb2e8f9f7 465 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 466 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
<> 144:ef7eb2e8f9f7 467 * @arg DCMI_IT_OVF: Overflow interrupt mask
<> 144:ef7eb2e8f9f7 468 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
<> 144:ef7eb2e8f9f7 469 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
<> 144:ef7eb2e8f9f7 470 * @arg DCMI_IT_LINE: Line interrupt mask
<> 144:ef7eb2e8f9f7 471 * @retval The state of INTERRUPT.
<> 144:ef7eb2e8f9f7 472 */
<> 144:ef7eb2e8f9f7 473 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 474
<> 144:ef7eb2e8f9f7 475 /**
<> 144:ef7eb2e8f9f7 476 * @}
<> 144:ef7eb2e8f9f7 477 */
<> 144:ef7eb2e8f9f7 478
<> 144:ef7eb2e8f9f7 479 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 480 /** @addtogroup DCMI_Exported_Functions DCMI Exported Functions
<> 144:ef7eb2e8f9f7 481 * @{
<> 144:ef7eb2e8f9f7 482 */
<> 144:ef7eb2e8f9f7 483
<> 144:ef7eb2e8f9f7 484 /** @addtogroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 485 * @{
<> 144:ef7eb2e8f9f7 486 */
<> 144:ef7eb2e8f9f7 487 /* Initialization and de-initialization functions *****************************/
<> 144:ef7eb2e8f9f7 488 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 489 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 490 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
<> 144:ef7eb2e8f9f7 491 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
<> 144:ef7eb2e8f9f7 492 /**
<> 144:ef7eb2e8f9f7 493 * @}
<> 144:ef7eb2e8f9f7 494 */
<> 144:ef7eb2e8f9f7 495
<> 144:ef7eb2e8f9f7 496 /** @addtogroup DCMI_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 497 * @{
<> 144:ef7eb2e8f9f7 498 */
<> 144:ef7eb2e8f9f7 499 /* IO operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 500 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
<> 144:ef7eb2e8f9f7 501 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
<> 144:ef7eb2e8f9f7 502 HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi);
<> 144:ef7eb2e8f9f7 503 HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi);
<> 144:ef7eb2e8f9f7 504 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 505 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 506 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 507 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 508 void HAL_DCMI_VsyncCallback(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 509 void HAL_DCMI_HsyncCallback(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 510 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 511 /**
<> 144:ef7eb2e8f9f7 512 * @}
<> 144:ef7eb2e8f9f7 513 */
<> 144:ef7eb2e8f9f7 514
<> 144:ef7eb2e8f9f7 515 /** @addtogroup DCMI_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 516 * @{
<> 144:ef7eb2e8f9f7 517 */
<> 144:ef7eb2e8f9f7 518 /* Peripheral Control functions ***********************************************/
<> 144:ef7eb2e8f9f7 519 HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
<> 144:ef7eb2e8f9f7 520 HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 521 HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 522
<> 144:ef7eb2e8f9f7 523 /**
<> 144:ef7eb2e8f9f7 524 * @}
<> 144:ef7eb2e8f9f7 525 */
<> 144:ef7eb2e8f9f7 526
<> 144:ef7eb2e8f9f7 527 /** @addtogroup DCMI_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 528 * @{
<> 144:ef7eb2e8f9f7 529 */
<> 144:ef7eb2e8f9f7 530 /* Peripheral State functions *************************************************/
<> 144:ef7eb2e8f9f7 531 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 532 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
<> 144:ef7eb2e8f9f7 533 /**
<> 144:ef7eb2e8f9f7 534 * @}
<> 144:ef7eb2e8f9f7 535 */
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 /**
<> 144:ef7eb2e8f9f7 538 * @}
<> 144:ef7eb2e8f9f7 539 */
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 542 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 543 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 544 /** @defgroup DCMI_Private_Constants DCMI Private Constants
<> 144:ef7eb2e8f9f7 545 * @{
<> 144:ef7eb2e8f9f7 546 */
<> 144:ef7eb2e8f9f7 547 #define DCMI_MIS_INDEX ((uint32_t)0x1000) /*!< DCMI MIS register index */
<> 144:ef7eb2e8f9f7 548 #define DCMI_SR_INDEX ((uint32_t)0x2000) /*!< DCMI SR register index */
<> 144:ef7eb2e8f9f7 549 /**
<> 144:ef7eb2e8f9f7 550 * @}
<> 144:ef7eb2e8f9f7 551 */
<> 144:ef7eb2e8f9f7 552 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 553 /** @defgroup DCMI_Private_Macros DCMI Private Macros
<> 144:ef7eb2e8f9f7 554 * @{
<> 144:ef7eb2e8f9f7 555 */
<> 144:ef7eb2e8f9f7 556 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
<> 144:ef7eb2e8f9f7 557 ((MODE) == DCMI_MODE_SNAPSHOT))
<> 144:ef7eb2e8f9f7 558
<> 144:ef7eb2e8f9f7 559 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
<> 144:ef7eb2e8f9f7 560 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
<> 144:ef7eb2e8f9f7 561
<> 144:ef7eb2e8f9f7 562 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
<> 144:ef7eb2e8f9f7 563 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
<> 144:ef7eb2e8f9f7 566 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
<> 144:ef7eb2e8f9f7 567
<> 144:ef7eb2e8f9f7 568 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
<> 144:ef7eb2e8f9f7 569 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
<> 144:ef7eb2e8f9f7 570
<> 144:ef7eb2e8f9f7 571 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
<> 144:ef7eb2e8f9f7 572 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
<> 144:ef7eb2e8f9f7 573
<> 144:ef7eb2e8f9f7 574 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
<> 144:ef7eb2e8f9f7 575 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
<> 144:ef7eb2e8f9f7 576 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
<> 144:ef7eb2e8f9f7 577
<> 144:ef7eb2e8f9f7 578 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
<> 144:ef7eb2e8f9f7 579 ((DATA) == DCMI_EXTEND_DATA_10B) || \
<> 144:ef7eb2e8f9f7 580 ((DATA) == DCMI_EXTEND_DATA_12B) || \
<> 144:ef7eb2e8f9f7 581 ((DATA) == DCMI_EXTEND_DATA_14B))
<> 144:ef7eb2e8f9f7 582
<> 144:ef7eb2e8f9f7 583 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
<> 144:ef7eb2e8f9f7 584
<> 144:ef7eb2e8f9f7 585 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
<> 144:ef7eb2e8f9f7 586
<> 144:ef7eb2e8f9f7 587 #define IS_DCMI_BYTE_SELECT_MODE(MODE)(((MODE) == DCMI_BSM_ALL) || \
<> 144:ef7eb2e8f9f7 588 ((MODE) == DCMI_BSM_OTHER) || \
<> 144:ef7eb2e8f9f7 589 ((MODE) == DCMI_BSM_ALTERNATE_4) || \
<> 144:ef7eb2e8f9f7 590 ((MODE) == DCMI_BSM_ALTERNATE_2))
<> 144:ef7eb2e8f9f7 591
<> 144:ef7eb2e8f9f7 592 #define IS_DCMI_BYTE_SELECT_START(POLARITY)(((POLARITY) == DCMI_OEBS_ODD) || \
<> 144:ef7eb2e8f9f7 593 ((POLARITY) == DCMI_OEBS_EVEN))
<> 144:ef7eb2e8f9f7 594
<> 144:ef7eb2e8f9f7 595 #define IS_DCMI_LINE_SELECT_MODE(MODE)(((MODE) == DCMI_LSM_ALL) || \
<> 144:ef7eb2e8f9f7 596 ((MODE) == DCMI_LSM_ALTERNATE_2))
<> 144:ef7eb2e8f9f7 597
<> 144:ef7eb2e8f9f7 598 #define IS_DCMI_LINE_SELECT_START(POLARITY)(((POLARITY) == DCMI_OELS_ODD) || \
<> 144:ef7eb2e8f9f7 599 ((POLARITY) == DCMI_OELS_EVEN))
<> 144:ef7eb2e8f9f7 600
<> 144:ef7eb2e8f9f7 601 /**
<> 144:ef7eb2e8f9f7 602 * @}
<> 144:ef7eb2e8f9f7 603 */
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 606 /** @addtogroup DCMI_Private_Functions DCMI Private Functions
<> 144:ef7eb2e8f9f7 607 * @{
<> 144:ef7eb2e8f9f7 608 */
<> 144:ef7eb2e8f9f7 609
<> 144:ef7eb2e8f9f7 610 /**
<> 144:ef7eb2e8f9f7 611 * @}
<> 144:ef7eb2e8f9f7 612 */
<> 144:ef7eb2e8f9f7 613
<> 144:ef7eb2e8f9f7 614 /**
<> 144:ef7eb2e8f9f7 615 * @}
<> 144:ef7eb2e8f9f7 616 */
<> 144:ef7eb2e8f9f7 617 /**
<> 144:ef7eb2e8f9f7 618 * @}
<> 144:ef7eb2e8f9f7 619 */
<> 157:ff67d9f36b67 620 #endif /* DCMI */
<> 144:ef7eb2e8f9f7 621
<> 144:ef7eb2e8f9f7 622 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 623 }
<> 144:ef7eb2e8f9f7 624 #endif
<> 144:ef7eb2e8f9f7 625
<> 144:ef7eb2e8f9f7 626 #endif /* __STM32F7xx_HAL_DCMI_H */
<> 144:ef7eb2e8f9f7 627
<> 144:ef7eb2e8f9f7 628 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/