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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_usart.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
182:a56a73fd2a6f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx_hal_usart.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief USART HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the Universal Synchronous Asynchronous Receiver Transmitter (USART) peripheral:
<> 144:ef7eb2e8f9f7 8 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 9 * + IO operation functions
<> 144:ef7eb2e8f9f7 10 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 11 @verbatim
<> 144:ef7eb2e8f9f7 12 ==============================================================================
<> 144:ef7eb2e8f9f7 13 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 14 ==============================================================================
<> 144:ef7eb2e8f9f7 15 [..]
<> 144:ef7eb2e8f9f7 16 The USART HAL driver can be used as follows:
<> 144:ef7eb2e8f9f7 17
<> 144:ef7eb2e8f9f7 18 (#) Declare a USART_HandleTypeDef handle structure.
<> 144:ef7eb2e8f9f7 19 (#) Initialize the USART low level resources by implementing the HAL_USART_MspInit () API:
<> 144:ef7eb2e8f9f7 20 (##) Enable the USARTx interface clock.
<> 144:ef7eb2e8f9f7 21 (##) USART pins configuration:
<> 144:ef7eb2e8f9f7 22 (+++) Enable the clock for the USART GPIOs.
<> 144:ef7eb2e8f9f7 23 (+++) Configure these USART pins as alternate function pull-up.
<> 144:ef7eb2e8f9f7 24 (##) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(),
<> 144:ef7eb2e8f9f7 25 HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
<> 144:ef7eb2e8f9f7 26 (+++) Configure the USARTx interrupt priority.
<> 144:ef7eb2e8f9f7 27 (+++) Enable the NVIC USART IRQ handle.
<> 144:ef7eb2e8f9f7 28 (##) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 29 HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
<> 144:ef7eb2e8f9f7 30 (+++) Declare a DMA handle structure for the Tx/Rx stream.
<> 144:ef7eb2e8f9f7 31 (+++) Enable the DMAx interface clock.
<> 144:ef7eb2e8f9f7 32 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
<> 144:ef7eb2e8f9f7 33 (+++) Configure the DMA Tx/Rx Stream.
<> 144:ef7eb2e8f9f7 34 (+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle.
<> 144:ef7eb2e8f9f7 35 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx Stream.
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
<> 144:ef7eb2e8f9f7 38 flow control and Mode(Receiver/Transmitter) in the husart Init structure.
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 (#) Initialize the USART registers by calling the HAL_USART_Init() API:
<> 144:ef7eb2e8f9f7 41 (++) These APIs configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
<> 144:ef7eb2e8f9f7 42 by calling the customized HAL_USART_MspInit(&husart) API.
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 -@@- The specific USART interrupts (Transmission complete interrupt,
<> 144:ef7eb2e8f9f7 45 RXNE interrupt and Error Interrupts) will be managed using the macros
<> 144:ef7eb2e8f9f7 46 __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process.
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 (#) Three operation modes are available within this driver :
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 *** Polling mode IO operation ***
<> 144:ef7eb2e8f9f7 51 =================================
<> 144:ef7eb2e8f9f7 52 [..]
<> 144:ef7eb2e8f9f7 53 (+) Send an amount of data in blocking mode using HAL_USART_Transmit()
<> 144:ef7eb2e8f9f7 54 (+) Receive an amount of data in blocking mode using HAL_USART_Receive()
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 *** Interrupt mode IO operation ***
<> 144:ef7eb2e8f9f7 57 ===================================
<> 144:ef7eb2e8f9f7 58 [..]
<> 144:ef7eb2e8f9f7 59 (+) Send an amount of data in non blocking mode using HAL_USART_Transmit_IT()
<> 144:ef7eb2e8f9f7 60 (+) At transmission end of transfer HAL_USART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 61 add his own code by customization of function pointer HAL_USART_TxCpltCallback
<> 144:ef7eb2e8f9f7 62 (+) Receive an amount of data in non blocking mode using HAL_USART_Receive_IT()
<> 144:ef7eb2e8f9f7 63 (+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 64 add his own code by customization of function pointer HAL_USART_RxCpltCallback
<> 144:ef7eb2e8f9f7 65 (+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 66 add his own code by customization of function pointer HAL_USART_ErrorCallback
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 *** DMA mode IO operation ***
<> 144:ef7eb2e8f9f7 69 ==============================
<> 144:ef7eb2e8f9f7 70 [..]
<> 144:ef7eb2e8f9f7 71 (+) Send an amount of data in non blocking mode (DMA) using HAL_USART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 72 (+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 73 add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
<> 144:ef7eb2e8f9f7 74 (+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 75 add his own code by customization of function pointer HAL_USART_TxCpltCallback
<> 144:ef7eb2e8f9f7 76 (+) Receive an amount of data in non blocking mode (DMA) using HAL_USART_Receive_DMA()
<> 144:ef7eb2e8f9f7 77 (+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 78 add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
<> 144:ef7eb2e8f9f7 79 (+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 80 add his own code by customization of function pointer HAL_USART_RxCpltCallback
<> 144:ef7eb2e8f9f7 81 (+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 82 add his own code by customization of function pointer HAL_USART_ErrorCallback
<> 144:ef7eb2e8f9f7 83 (+) Pause the DMA Transfer using HAL_USART_DMAPause()
<> 144:ef7eb2e8f9f7 84 (+) Resume the DMA Transfer using HAL_USART_DMAResume()
<> 144:ef7eb2e8f9f7 85 (+) Stop the DMA Transfer using HAL_USART_DMAStop()
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 *** USART HAL driver macros list ***
<> 144:ef7eb2e8f9f7 88 =============================================
<> 144:ef7eb2e8f9f7 89 [..]
<> 144:ef7eb2e8f9f7 90 Below the list of most used macros in USART HAL driver.
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 (+) __HAL_USART_ENABLE: Enable the USART peripheral
<> 144:ef7eb2e8f9f7 93 (+) __HAL_USART_DISABLE: Disable the USART peripheral
<> 144:ef7eb2e8f9f7 94 (+) __HAL_USART_GET_FLAG : Check whether the specified USART flag is set or not
<> 144:ef7eb2e8f9f7 95 (+) __HAL_USART_CLEAR_FLAG : Clear the specified USART pending flag
<> 144:ef7eb2e8f9f7 96 (+) __HAL_USART_ENABLE_IT: Enable the specified USART interrupt
<> 144:ef7eb2e8f9f7 97 (+) __HAL_USART_DISABLE_IT: Disable the specified USART interrupt
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 [..]
<> 144:ef7eb2e8f9f7 100 (@) You can refer to the USART HAL driver header file for more useful macros
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 @endverbatim
<> 144:ef7eb2e8f9f7 103 ******************************************************************************
<> 144:ef7eb2e8f9f7 104 * @attention
<> 144:ef7eb2e8f9f7 105 *
AnnaBridge 167:e84263d55307 106 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 107 *
<> 144:ef7eb2e8f9f7 108 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 109 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 110 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 111 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 112 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 113 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 114 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 115 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 116 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 117 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 118 *
<> 144:ef7eb2e8f9f7 119 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 120 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 121 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 122 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 123 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 124 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 125 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 126 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 127 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 128 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 129 *
<> 144:ef7eb2e8f9f7 130 ******************************************************************************
<> 144:ef7eb2e8f9f7 131 */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 134 #include "stm32f4xx_hal.h"
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 /** @addtogroup STM32F4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 137 * @{
<> 144:ef7eb2e8f9f7 138 */
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 /** @defgroup USART USART
<> 144:ef7eb2e8f9f7 141 * @brief HAL USART Synchronous module driver
<> 144:ef7eb2e8f9f7 142 * @{
<> 144:ef7eb2e8f9f7 143 */
<> 144:ef7eb2e8f9f7 144 #ifdef HAL_USART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 145 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 146 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 147 /** @addtogroup USART_Private_Constants
<> 144:ef7eb2e8f9f7 148 * @{
<> 144:ef7eb2e8f9f7 149 */
<> 144:ef7eb2e8f9f7 150 #define DUMMY_DATA 0xFFFFU
<> 144:ef7eb2e8f9f7 151 #define USART_TIMEOUT_VALUE 22000U
<> 144:ef7eb2e8f9f7 152 /**
<> 144:ef7eb2e8f9f7 153 * @}
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 156 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 157 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 158 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 159 /** @addtogroup USART_Private_Functions
<> 144:ef7eb2e8f9f7 160 * @{
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162 static void USART_EndTxTransfer(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 163 static void USART_EndRxTransfer(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 164 static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 165 static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 166 static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 167 static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 168 static void USART_SetConfig (USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 169 static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 170 static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 171 static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 172 static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 173 static void USART_DMAError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 174 static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
AnnaBridge 167:e84263d55307 175 static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 167:e84263d55307 176 static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 179 /**
<> 144:ef7eb2e8f9f7 180 * @}
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 184 /** @defgroup USART_Exported_Functions USART Exported Functions
<> 144:ef7eb2e8f9f7 185 * @{
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 /** @defgroup USART_Exported_Functions_Group1 USART Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 189 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 190 *
<> 144:ef7eb2e8f9f7 191 @verbatim
<> 144:ef7eb2e8f9f7 192 ==============================================================================
<> 144:ef7eb2e8f9f7 193 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 194 ==============================================================================
<> 144:ef7eb2e8f9f7 195 [..]
<> 144:ef7eb2e8f9f7 196 This subsection provides a set of functions allowing to initialize the USART
<> 144:ef7eb2e8f9f7 197 in asynchronous and in synchronous modes.
<> 144:ef7eb2e8f9f7 198 (+) For the asynchronous mode only these parameters can be configured:
<> 144:ef7eb2e8f9f7 199 (++) Baud Rate
<> 144:ef7eb2e8f9f7 200 (++) Word Length
<> 144:ef7eb2e8f9f7 201 (++) Stop Bit
<> 144:ef7eb2e8f9f7 202 (++) Parity: If the parity is enabled, then the MSB bit of the data written
<> 144:ef7eb2e8f9f7 203 in the data register is transmitted but is changed by the parity bit.
<> 144:ef7eb2e8f9f7 204 Depending on the frame length defined by the M bit (8-bits or 9-bits),
<> 144:ef7eb2e8f9f7 205 please refer to Reference manual for possible USART frame formats.
<> 144:ef7eb2e8f9f7 206 (++) USART polarity
<> 144:ef7eb2e8f9f7 207 (++) USART phase
<> 144:ef7eb2e8f9f7 208 (++) USART LastBit
<> 144:ef7eb2e8f9f7 209 (++) Receiver/transmitter modes
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 [..]
<> 144:ef7eb2e8f9f7 212 The HAL_USART_Init() function follows the USART synchronous configuration
<> 144:ef7eb2e8f9f7 213 procedure (details for the procedure are available in reference manual (RM0329)).
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 @endverbatim
<> 144:ef7eb2e8f9f7 216 * @{
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 /**
<> 144:ef7eb2e8f9f7 220 * @brief Initializes the USART mode according to the specified
<> 144:ef7eb2e8f9f7 221 * parameters in the USART_InitTypeDef and create the associated handle.
AnnaBridge 182:a56a73fd2a6f 222 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 223 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 224 * @retval HAL status
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 227 {
<> 144:ef7eb2e8f9f7 228 /* Check the USART handle allocation */
<> 144:ef7eb2e8f9f7 229 if(husart == NULL)
<> 144:ef7eb2e8f9f7 230 {
<> 144:ef7eb2e8f9f7 231 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 232 }
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /* Check the parameters */
<> 144:ef7eb2e8f9f7 235 assert_param(IS_USART_INSTANCE(husart->Instance));
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 if(husart->State == HAL_USART_STATE_RESET)
<> 144:ef7eb2e8f9f7 238 {
<> 144:ef7eb2e8f9f7 239 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 240 husart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 241 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 242 HAL_USART_MspInit(husart);
<> 144:ef7eb2e8f9f7 243 }
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 husart->State = HAL_USART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /* Set the USART Communication parameters */
<> 144:ef7eb2e8f9f7 248 USART_SetConfig(husart);
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /* In USART mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 251 - LINEN bit in the USART_CR2 register
<> 144:ef7eb2e8f9f7 252 - HDSEL, SCEN and IREN bits in the USART_CR3 register */
<> 144:ef7eb2e8f9f7 253 CLEAR_BIT(husart->Instance->CR2, USART_CR2_LINEN);
<> 144:ef7eb2e8f9f7 254 CLEAR_BIT(husart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /* Enable the Peripheral */
<> 144:ef7eb2e8f9f7 257 __HAL_USART_ENABLE(husart);
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /* Initialize the USART state */
<> 144:ef7eb2e8f9f7 260 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 261 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 return HAL_OK;
<> 144:ef7eb2e8f9f7 264 }
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /**
<> 144:ef7eb2e8f9f7 267 * @brief DeInitializes the USART peripheral.
AnnaBridge 182:a56a73fd2a6f 268 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 269 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 270 * @retval HAL status
<> 144:ef7eb2e8f9f7 271 */
<> 144:ef7eb2e8f9f7 272 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 273 {
<> 144:ef7eb2e8f9f7 274 /* Check the USART handle allocation */
<> 144:ef7eb2e8f9f7 275 if(husart == NULL)
<> 144:ef7eb2e8f9f7 276 {
<> 144:ef7eb2e8f9f7 277 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 278 }
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /* Check the parameters */
<> 144:ef7eb2e8f9f7 281 assert_param(IS_USART_INSTANCE(husart->Instance));
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 husart->State = HAL_USART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 286 __HAL_USART_DISABLE(husart);
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 289 HAL_USART_MspDeInit(husart);
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 292 husart->State = HAL_USART_STATE_RESET;
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /* Release Lock */
<> 144:ef7eb2e8f9f7 295 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 return HAL_OK;
<> 144:ef7eb2e8f9f7 298 }
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 /**
<> 144:ef7eb2e8f9f7 301 * @brief USART MSP Init.
AnnaBridge 182:a56a73fd2a6f 302 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 303 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 304 * @retval None
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306 __weak void HAL_USART_MspInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 307 {
<> 144:ef7eb2e8f9f7 308 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 309 UNUSED(husart);
<> 144:ef7eb2e8f9f7 310 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 311 the HAL_USART_MspInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 312 */
<> 144:ef7eb2e8f9f7 313 }
<> 144:ef7eb2e8f9f7 314
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @brief USART MSP DeInit.
AnnaBridge 182:a56a73fd2a6f 317 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 318 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 319 * @retval None
<> 144:ef7eb2e8f9f7 320 */
<> 144:ef7eb2e8f9f7 321 __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 322 {
<> 144:ef7eb2e8f9f7 323 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 324 UNUSED(husart);
<> 144:ef7eb2e8f9f7 325 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 326 the HAL_USART_MspDeInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 327 */
<> 144:ef7eb2e8f9f7 328 }
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /**
<> 144:ef7eb2e8f9f7 331 * @}
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333
<> 144:ef7eb2e8f9f7 334 /** @defgroup USART_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 335 * @brief USART Transmit and Receive functions
<> 144:ef7eb2e8f9f7 336 *
<> 144:ef7eb2e8f9f7 337 @verbatim
<> 144:ef7eb2e8f9f7 338 ==============================================================================
<> 144:ef7eb2e8f9f7 339 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 340 ==============================================================================
<> 144:ef7eb2e8f9f7 341 [..]
<> 144:ef7eb2e8f9f7 342 This subsection provides a set of functions allowing to manage the USART synchronous
<> 144:ef7eb2e8f9f7 343 data transfers.
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 [..]
<> 144:ef7eb2e8f9f7 346 The USART supports master mode only: it cannot receive or send data related to an input
<> 144:ef7eb2e8f9f7 347 clock (SCLK is always an output).
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 (#) There are two modes of transfer:
<> 144:ef7eb2e8f9f7 350 (++) Blocking mode: The communication is performed in polling mode.
<> 144:ef7eb2e8f9f7 351 The HAL status of all data processing is returned by the same function
<> 144:ef7eb2e8f9f7 352 after finishing transfer.
<> 144:ef7eb2e8f9f7 353 (++) No-Blocking mode: The communication is performed using Interrupts
<> 144:ef7eb2e8f9f7 354 or DMA, These API's return the HAL status.
<> 144:ef7eb2e8f9f7 355 The end of the data processing will be indicated through the
<> 144:ef7eb2e8f9f7 356 dedicated USART IRQ when using Interrupt mode or the DMA IRQ when
<> 144:ef7eb2e8f9f7 357 using DMA mode.
<> 144:ef7eb2e8f9f7 358 The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback()
<> 144:ef7eb2e8f9f7 359 user callbacks
<> 144:ef7eb2e8f9f7 360 will be executed respectively at the end of the transmit or Receive process
<> 144:ef7eb2e8f9f7 361 The HAL_USART_ErrorCallback() user callback will be executed when a communication
<> 144:ef7eb2e8f9f7 362 error is detected
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 (#) Blocking mode APIs are :
<> 144:ef7eb2e8f9f7 365 (++) HAL_USART_Transmit() in simplex mode
<> 144:ef7eb2e8f9f7 366 (++) HAL_USART_Receive() in full duplex receive only
<> 144:ef7eb2e8f9f7 367 (++) HAL_USART_TransmitReceive() in full duplex mode
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 (#) Non Blocking mode APIs with Interrupt are :
<> 144:ef7eb2e8f9f7 370 (++) HAL_USART_Transmit_IT()in simplex mode
<> 144:ef7eb2e8f9f7 371 (++) HAL_USART_Receive_IT() in full duplex receive only
<> 144:ef7eb2e8f9f7 372 (++) HAL_USART_TransmitReceive_IT() in full duplex mode
<> 144:ef7eb2e8f9f7 373 (++) HAL_USART_IRQHandler()
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 (#) Non Blocking mode functions with DMA are :
<> 144:ef7eb2e8f9f7 376 (++) HAL_USART_Transmit_DMA()in simplex mode
<> 144:ef7eb2e8f9f7 377 (++) HAL_USART_Receive_DMA() in full duplex receive only
<> 144:ef7eb2e8f9f7 378 (++) HAL_USART_TransmitReceie_DMA() in full duplex mode
<> 144:ef7eb2e8f9f7 379 (++) HAL_USART_DMAPause()
<> 144:ef7eb2e8f9f7 380 (++) HAL_USART_DMAResume()
<> 144:ef7eb2e8f9f7 381 (++) HAL_USART_DMAStop()
<> 144:ef7eb2e8f9f7 382
<> 144:ef7eb2e8f9f7 383 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
<> 144:ef7eb2e8f9f7 384 (++) HAL_USART_TxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 385 (++) HAL_USART_TxCpltCallback()
<> 144:ef7eb2e8f9f7 386 (++) HAL_USART_RxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 387 (++) HAL_USART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 388 (++) HAL_USART_ErrorCallback()
<> 144:ef7eb2e8f9f7 389 (++) HAL_USART_TxRxCpltCallback()
<> 144:ef7eb2e8f9f7 390
<> 144:ef7eb2e8f9f7 391 @endverbatim
<> 144:ef7eb2e8f9f7 392 * @{
<> 144:ef7eb2e8f9f7 393 */
<> 144:ef7eb2e8f9f7 394
<> 144:ef7eb2e8f9f7 395 /**
<> 144:ef7eb2e8f9f7 396 * @brief Simplex Send an amount of data in blocking mode.
AnnaBridge 182:a56a73fd2a6f 397 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 398 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 399 * @param pTxData Pointer to data buffer
AnnaBridge 182:a56a73fd2a6f 400 * @param Size Amount of data to be sent
AnnaBridge 182:a56a73fd2a6f 401 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 402 * @retval HAL status
<> 144:ef7eb2e8f9f7 403 */
<> 144:ef7eb2e8f9f7 404 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 405 {
<> 144:ef7eb2e8f9f7 406 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 407 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 408
<> 144:ef7eb2e8f9f7 409 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 410 {
AnnaBridge 167:e84263d55307 411 if((pTxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 412 {
<> 144:ef7eb2e8f9f7 413 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 414 }
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 /* Process Locked */
<> 144:ef7eb2e8f9f7 417 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 420 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 421
<> 144:ef7eb2e8f9f7 422 /* Init tickstart for timeout managment */
<> 144:ef7eb2e8f9f7 423 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 426 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 427 while(husart->TxXferCount > 0U)
<> 144:ef7eb2e8f9f7 428 {
<> 144:ef7eb2e8f9f7 429 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 430 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 431 {
<> 144:ef7eb2e8f9f7 432 /* Wait for TC flag in order to write data in DR */
<> 144:ef7eb2e8f9f7 433 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 434 {
<> 144:ef7eb2e8f9f7 435 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 436 }
<> 144:ef7eb2e8f9f7 437 tmp = (uint16_t*) pTxData;
AnnaBridge 167:e84263d55307 438 husart->Instance->DR = (*tmp & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 439 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 440 {
<> 144:ef7eb2e8f9f7 441 pTxData += 2U;
<> 144:ef7eb2e8f9f7 442 }
<> 144:ef7eb2e8f9f7 443 else
<> 144:ef7eb2e8f9f7 444 {
<> 144:ef7eb2e8f9f7 445 pTxData += 1U;
<> 144:ef7eb2e8f9f7 446 }
<> 144:ef7eb2e8f9f7 447 }
<> 144:ef7eb2e8f9f7 448 else
<> 144:ef7eb2e8f9f7 449 {
<> 144:ef7eb2e8f9f7 450 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 451 {
<> 144:ef7eb2e8f9f7 452 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 453 }
AnnaBridge 167:e84263d55307 454 husart->Instance->DR = (*pTxData++ & (uint8_t)0xFF);
<> 144:ef7eb2e8f9f7 455 }
<> 144:ef7eb2e8f9f7 456 }
<> 144:ef7eb2e8f9f7 457
<> 144:ef7eb2e8f9f7 458 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 459 {
<> 144:ef7eb2e8f9f7 460 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 461 }
<> 144:ef7eb2e8f9f7 462
<> 144:ef7eb2e8f9f7 463 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 464
<> 144:ef7eb2e8f9f7 465 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 466 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 467
<> 144:ef7eb2e8f9f7 468 return HAL_OK;
<> 144:ef7eb2e8f9f7 469 }
<> 144:ef7eb2e8f9f7 470 else
<> 144:ef7eb2e8f9f7 471 {
<> 144:ef7eb2e8f9f7 472 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 473 }
<> 144:ef7eb2e8f9f7 474 }
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /**
<> 144:ef7eb2e8f9f7 477 * @brief Full-Duplex Receive an amount of data in blocking mode.
AnnaBridge 182:a56a73fd2a6f 478 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 479 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 480 * @param pRxData Pointer to data buffer
AnnaBridge 182:a56a73fd2a6f 481 * @param Size Amount of data to be received
AnnaBridge 182:a56a73fd2a6f 482 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 483 * @retval HAL status
<> 144:ef7eb2e8f9f7 484 */
<> 144:ef7eb2e8f9f7 485 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 486 {
<> 144:ef7eb2e8f9f7 487 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 488 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 489
<> 144:ef7eb2e8f9f7 490 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 491 {
AnnaBridge 167:e84263d55307 492 if((pRxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 493 {
<> 144:ef7eb2e8f9f7 494 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 495 }
<> 144:ef7eb2e8f9f7 496 /* Process Locked */
<> 144:ef7eb2e8f9f7 497 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 498
<> 144:ef7eb2e8f9f7 499 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 500 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /* Init tickstart for timeout managment */
<> 144:ef7eb2e8f9f7 503 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 506 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 507 /* Check the remain data to be received */
<> 144:ef7eb2e8f9f7 508 while(husart->RxXferCount > 0U)
<> 144:ef7eb2e8f9f7 509 {
<> 144:ef7eb2e8f9f7 510 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 511 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 512 {
<> 144:ef7eb2e8f9f7 513 /* Wait until TXE flag is set to send dummy byte in order to generate the clock for the slave to send data */
<> 144:ef7eb2e8f9f7 514 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 515 {
<> 144:ef7eb2e8f9f7 516 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 517 }
<> 144:ef7eb2e8f9f7 518 /* Send dummy byte in order to generate clock */
AnnaBridge 167:e84263d55307 519 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 520
<> 144:ef7eb2e8f9f7 521 /* Wait for RXNE Flag */
<> 144:ef7eb2e8f9f7 522 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 523 {
<> 144:ef7eb2e8f9f7 524 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 525 }
<> 144:ef7eb2e8f9f7 526 tmp = (uint16_t*) pRxData ;
<> 144:ef7eb2e8f9f7 527 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 528 {
AnnaBridge 167:e84263d55307 529 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF);
AnnaBridge 167:e84263d55307 530 pRxData +=2U;
<> 144:ef7eb2e8f9f7 531 }
<> 144:ef7eb2e8f9f7 532 else
<> 144:ef7eb2e8f9f7 533 {
AnnaBridge 167:e84263d55307 534 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FF);
AnnaBridge 167:e84263d55307 535 pRxData +=1U;
<> 144:ef7eb2e8f9f7 536 }
<> 144:ef7eb2e8f9f7 537 }
<> 144:ef7eb2e8f9f7 538 else
<> 144:ef7eb2e8f9f7 539 {
<> 144:ef7eb2e8f9f7 540 /* Wait until TXE flag is set to send dummy byte in order to generate the clock for the slave to send data */
<> 144:ef7eb2e8f9f7 541 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 542 {
<> 144:ef7eb2e8f9f7 543 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 544 }
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546 /* Send Dummy Byte in order to generate clock */
AnnaBridge 167:e84263d55307 547 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x00FF);
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 /* Wait until RXNE flag is set to receive the byte */
<> 144:ef7eb2e8f9f7 550 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 551 {
<> 144:ef7eb2e8f9f7 552 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 553 }
<> 144:ef7eb2e8f9f7 554 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 555 {
<> 144:ef7eb2e8f9f7 556 /* Receive data */
AnnaBridge 167:e84263d55307 557 *pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 558 }
<> 144:ef7eb2e8f9f7 559 else
<> 144:ef7eb2e8f9f7 560 {
<> 144:ef7eb2e8f9f7 561 /* Receive data */
AnnaBridge 167:e84263d55307 562 *pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007F);
<> 144:ef7eb2e8f9f7 563 }
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 }
<> 144:ef7eb2e8f9f7 566 }
<> 144:ef7eb2e8f9f7 567
<> 144:ef7eb2e8f9f7 568 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 571 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 572
<> 144:ef7eb2e8f9f7 573 return HAL_OK;
<> 144:ef7eb2e8f9f7 574 }
<> 144:ef7eb2e8f9f7 575 else
<> 144:ef7eb2e8f9f7 576 {
<> 144:ef7eb2e8f9f7 577 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 578 }
<> 144:ef7eb2e8f9f7 579 }
<> 144:ef7eb2e8f9f7 580
<> 144:ef7eb2e8f9f7 581 /**
<> 144:ef7eb2e8f9f7 582 * @brief Full-Duplex Send receive an amount of data in full-duplex mode (blocking mode).
AnnaBridge 182:a56a73fd2a6f 583 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 584 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 585 * @param pTxData Pointer to data transmitted buffer
AnnaBridge 182:a56a73fd2a6f 586 * @param pRxData Pointer to data received buffer
AnnaBridge 182:a56a73fd2a6f 587 * @param Size Amount of data to be sent
AnnaBridge 182:a56a73fd2a6f 588 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 589 * @retval HAL status
<> 144:ef7eb2e8f9f7 590 */
<> 144:ef7eb2e8f9f7 591 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 592 {
<> 144:ef7eb2e8f9f7 593 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 594 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 595
<> 144:ef7eb2e8f9f7 596 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 597 {
AnnaBridge 167:e84263d55307 598 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 599 {
<> 144:ef7eb2e8f9f7 600 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 601 }
<> 144:ef7eb2e8f9f7 602 /* Process Locked */
<> 144:ef7eb2e8f9f7 603 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 606 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 607
<> 144:ef7eb2e8f9f7 608 /* Init tickstart for timeout managment */
<> 144:ef7eb2e8f9f7 609 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 610
<> 144:ef7eb2e8f9f7 611 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 612 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 613 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 614 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 615
<> 144:ef7eb2e8f9f7 616 /* Check the remain data to be received */
<> 144:ef7eb2e8f9f7 617 while(husart->TxXferCount > 0U)
<> 144:ef7eb2e8f9f7 618 {
<> 144:ef7eb2e8f9f7 619 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 620 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 621 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 622 {
<> 144:ef7eb2e8f9f7 623 /* Wait for TC flag in order to write data in DR */
<> 144:ef7eb2e8f9f7 624 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 625 {
<> 144:ef7eb2e8f9f7 626 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 627 }
<> 144:ef7eb2e8f9f7 628 tmp = (uint16_t*) pTxData;
AnnaBridge 167:e84263d55307 629 husart->Instance->DR = (*tmp & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 630 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 631 {
<> 144:ef7eb2e8f9f7 632 pTxData += 2U;
<> 144:ef7eb2e8f9f7 633 }
<> 144:ef7eb2e8f9f7 634 else
<> 144:ef7eb2e8f9f7 635 {
<> 144:ef7eb2e8f9f7 636 pTxData += 1U;
<> 144:ef7eb2e8f9f7 637 }
<> 144:ef7eb2e8f9f7 638
<> 144:ef7eb2e8f9f7 639 /* Wait for RXNE Flag */
<> 144:ef7eb2e8f9f7 640 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 641 {
<> 144:ef7eb2e8f9f7 642 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 643 }
<> 144:ef7eb2e8f9f7 644 tmp = (uint16_t*) pRxData ;
<> 144:ef7eb2e8f9f7 645 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 646 {
AnnaBridge 167:e84263d55307 647 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 648 pRxData += 2U;
<> 144:ef7eb2e8f9f7 649 }
<> 144:ef7eb2e8f9f7 650 else
<> 144:ef7eb2e8f9f7 651 {
AnnaBridge 167:e84263d55307 652 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FF);
<> 144:ef7eb2e8f9f7 653 pRxData += 1U;
<> 144:ef7eb2e8f9f7 654 }
<> 144:ef7eb2e8f9f7 655 }
<> 144:ef7eb2e8f9f7 656 else
<> 144:ef7eb2e8f9f7 657 {
<> 144:ef7eb2e8f9f7 658 /* Wait for TC flag in order to write data in DR */
<> 144:ef7eb2e8f9f7 659 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 660 {
<> 144:ef7eb2e8f9f7 661 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 662 }
AnnaBridge 167:e84263d55307 663 husart->Instance->DR = (*pTxData++ & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 664
<> 144:ef7eb2e8f9f7 665 /* Wait for RXNE Flag */
<> 144:ef7eb2e8f9f7 666 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 667 {
<> 144:ef7eb2e8f9f7 668 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 669 }
<> 144:ef7eb2e8f9f7 670 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 671 {
<> 144:ef7eb2e8f9f7 672 /* Receive data */
AnnaBridge 167:e84263d55307 673 *pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 674 }
<> 144:ef7eb2e8f9f7 675 else
<> 144:ef7eb2e8f9f7 676 {
<> 144:ef7eb2e8f9f7 677 /* Receive data */
AnnaBridge 167:e84263d55307 678 *pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007F);
<> 144:ef7eb2e8f9f7 679 }
<> 144:ef7eb2e8f9f7 680 }
<> 144:ef7eb2e8f9f7 681 }
<> 144:ef7eb2e8f9f7 682
<> 144:ef7eb2e8f9f7 683 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 684
<> 144:ef7eb2e8f9f7 685 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 686 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 687
<> 144:ef7eb2e8f9f7 688 return HAL_OK;
<> 144:ef7eb2e8f9f7 689 }
<> 144:ef7eb2e8f9f7 690 else
<> 144:ef7eb2e8f9f7 691 {
<> 144:ef7eb2e8f9f7 692 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 693 }
<> 144:ef7eb2e8f9f7 694 }
<> 144:ef7eb2e8f9f7 695
<> 144:ef7eb2e8f9f7 696 /**
<> 144:ef7eb2e8f9f7 697 * @brief Simplex Send an amount of data in non-blocking mode.
AnnaBridge 182:a56a73fd2a6f 698 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 699 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 700 * @param pTxData Pointer to data buffer
AnnaBridge 182:a56a73fd2a6f 701 * @param Size Amount of data to be sent
<> 144:ef7eb2e8f9f7 702 * @retval HAL status
<> 144:ef7eb2e8f9f7 703 * @note The USART errors are not managed to avoid the overrun error.
<> 144:ef7eb2e8f9f7 704 */
<> 144:ef7eb2e8f9f7 705 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 706 {
<> 144:ef7eb2e8f9f7 707 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 708 {
AnnaBridge 167:e84263d55307 709 if((pTxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 710 {
<> 144:ef7eb2e8f9f7 711 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 712 }
<> 144:ef7eb2e8f9f7 713
<> 144:ef7eb2e8f9f7 714 /* Process Locked */
<> 144:ef7eb2e8f9f7 715 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 716
<> 144:ef7eb2e8f9f7 717 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 718 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 719 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 720
<> 144:ef7eb2e8f9f7 721 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 722 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 723
<> 144:ef7eb2e8f9f7 724 /* The USART Error Interrupts: (Frame error, Noise error, Overrun error)
<> 144:ef7eb2e8f9f7 725 are not managed by the USART transmit process to avoid the overrun interrupt
<> 144:ef7eb2e8f9f7 726 when the USART mode is configured for transmit and receive "USART_MODE_TX_RX"
<> 144:ef7eb2e8f9f7 727 to benefit for the frame error and noise interrupts the USART mode should be
<> 144:ef7eb2e8f9f7 728 configured only for transmit "USART_MODE_TX"
<> 144:ef7eb2e8f9f7 729 The __HAL_USART_ENABLE_IT(husart, USART_IT_ERR) can be used to enable the Frame error,
<> 144:ef7eb2e8f9f7 730 Noise error interrupt */
<> 144:ef7eb2e8f9f7 731
<> 144:ef7eb2e8f9f7 732 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 733 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 734
<> 144:ef7eb2e8f9f7 735 /* Enable the USART Transmit Data Register Empty Interrupt */
<> 144:ef7eb2e8f9f7 736 SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 737
<> 144:ef7eb2e8f9f7 738 return HAL_OK;
<> 144:ef7eb2e8f9f7 739 }
<> 144:ef7eb2e8f9f7 740 else
<> 144:ef7eb2e8f9f7 741 {
<> 144:ef7eb2e8f9f7 742 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 743 }
<> 144:ef7eb2e8f9f7 744 }
<> 144:ef7eb2e8f9f7 745
<> 144:ef7eb2e8f9f7 746 /**
<> 144:ef7eb2e8f9f7 747 * @brief Simplex Receive an amount of data in non-blocking mode.
AnnaBridge 182:a56a73fd2a6f 748 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 749 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 750 * @param pRxData Pointer to data buffer
AnnaBridge 182:a56a73fd2a6f 751 * @param Size Amount of data to be received
<> 144:ef7eb2e8f9f7 752 * @retval HAL status
<> 144:ef7eb2e8f9f7 753 */
<> 144:ef7eb2e8f9f7 754 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 755 {
<> 144:ef7eb2e8f9f7 756 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 757 {
AnnaBridge 167:e84263d55307 758 if((pRxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 759 {
<> 144:ef7eb2e8f9f7 760 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 761 }
<> 144:ef7eb2e8f9f7 762 /* Process Locked */
<> 144:ef7eb2e8f9f7 763 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 764
<> 144:ef7eb2e8f9f7 765 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 766 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 767 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 770 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 771
<> 144:ef7eb2e8f9f7 772 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 773 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 774
AnnaBridge 167:e84263d55307 775 /* Enable the USART Parity Error and Data Register not empty Interrupts */
AnnaBridge 167:e84263d55307 776 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 777
<> 144:ef7eb2e8f9f7 778 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 779 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 780
<> 144:ef7eb2e8f9f7 781 /* Send dummy byte in order to generate the clock for the slave to send data */
AnnaBridge 167:e84263d55307 782 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 783
<> 144:ef7eb2e8f9f7 784 return HAL_OK;
<> 144:ef7eb2e8f9f7 785 }
<> 144:ef7eb2e8f9f7 786 else
<> 144:ef7eb2e8f9f7 787 {
<> 144:ef7eb2e8f9f7 788 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 789 }
<> 144:ef7eb2e8f9f7 790 }
<> 144:ef7eb2e8f9f7 791
<> 144:ef7eb2e8f9f7 792 /**
<> 144:ef7eb2e8f9f7 793 * @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
AnnaBridge 182:a56a73fd2a6f 794 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 795 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 796 * @param pTxData Pointer to data transmitted buffer
AnnaBridge 182:a56a73fd2a6f 797 * @param pRxData Pointer to data received buffer
AnnaBridge 182:a56a73fd2a6f 798 * @param Size Amount of data to be received
<> 144:ef7eb2e8f9f7 799 * @retval HAL status
<> 144:ef7eb2e8f9f7 800 */
<> 144:ef7eb2e8f9f7 801 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 802 {
<> 144:ef7eb2e8f9f7 803 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 804 {
AnnaBridge 167:e84263d55307 805 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 806 {
<> 144:ef7eb2e8f9f7 807 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 808 }
<> 144:ef7eb2e8f9f7 809 /* Process Locked */
<> 144:ef7eb2e8f9f7 810 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 811
<> 144:ef7eb2e8f9f7 812 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 813 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 814 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 815 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 816 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 817 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 818
<> 144:ef7eb2e8f9f7 819 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 820 husart->State = HAL_USART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 821
<> 144:ef7eb2e8f9f7 822 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 823 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 824
<> 144:ef7eb2e8f9f7 825 /* Enable the USART Data Register not empty Interrupt */
<> 144:ef7eb2e8f9f7 826 SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 827
<> 144:ef7eb2e8f9f7 828 /* Enable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 829 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 830
<> 144:ef7eb2e8f9f7 831 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 832 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 833
<> 144:ef7eb2e8f9f7 834 /* Enable the USART Transmit Data Register Empty Interrupt */
<> 144:ef7eb2e8f9f7 835 SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 836
<> 144:ef7eb2e8f9f7 837 return HAL_OK;
<> 144:ef7eb2e8f9f7 838 }
<> 144:ef7eb2e8f9f7 839 else
<> 144:ef7eb2e8f9f7 840 {
<> 144:ef7eb2e8f9f7 841 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 842 }
<> 144:ef7eb2e8f9f7 843 }
<> 144:ef7eb2e8f9f7 844
<> 144:ef7eb2e8f9f7 845 /**
<> 144:ef7eb2e8f9f7 846 * @brief Simplex Send an amount of data in non-blocking mode.
AnnaBridge 182:a56a73fd2a6f 847 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 848 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 849 * @param pTxData Pointer to data buffer
AnnaBridge 182:a56a73fd2a6f 850 * @param Size Amount of data to be sent
<> 144:ef7eb2e8f9f7 851 * @retval HAL status
<> 144:ef7eb2e8f9f7 852 */
<> 144:ef7eb2e8f9f7 853 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 854 {
<> 144:ef7eb2e8f9f7 855 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 856
<> 144:ef7eb2e8f9f7 857 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 858 {
AnnaBridge 167:e84263d55307 859 if((pTxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 860 {
<> 144:ef7eb2e8f9f7 861 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 862 }
<> 144:ef7eb2e8f9f7 863 /* Process Locked */
<> 144:ef7eb2e8f9f7 864 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 865
<> 144:ef7eb2e8f9f7 866 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 867 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 868 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 871 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 872
<> 144:ef7eb2e8f9f7 873 /* Set the USART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 874 husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 875
<> 144:ef7eb2e8f9f7 876 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 877 husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 878
<> 144:ef7eb2e8f9f7 879 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 880 husart->hdmatx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 881
<> 144:ef7eb2e8f9f7 882 /* Set the DMA abort callback */
<> 144:ef7eb2e8f9f7 883 husart->hdmatx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 884
<> 144:ef7eb2e8f9f7 885 /* Enable the USART transmit DMA Stream */
<> 144:ef7eb2e8f9f7 886 tmp = (uint32_t*)&pTxData;
<> 144:ef7eb2e8f9f7 887 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->DR, Size);
<> 144:ef7eb2e8f9f7 888
<> 144:ef7eb2e8f9f7 889 /* Clear the TC flag in the SR register by writing 0 to it */
<> 144:ef7eb2e8f9f7 890 __HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC);
<> 144:ef7eb2e8f9f7 891
<> 144:ef7eb2e8f9f7 892 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 893 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 894
<> 144:ef7eb2e8f9f7 895 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 896 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 897 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 898
<> 144:ef7eb2e8f9f7 899 return HAL_OK;
<> 144:ef7eb2e8f9f7 900 }
<> 144:ef7eb2e8f9f7 901 else
<> 144:ef7eb2e8f9f7 902 {
<> 144:ef7eb2e8f9f7 903 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 904 }
<> 144:ef7eb2e8f9f7 905 }
<> 144:ef7eb2e8f9f7 906
<> 144:ef7eb2e8f9f7 907 /**
<> 144:ef7eb2e8f9f7 908 * @brief Full-Duplex Receive an amount of data in non-blocking mode.
AnnaBridge 182:a56a73fd2a6f 909 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 910 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 911 * @param pRxData Pointer to data buffer
AnnaBridge 182:a56a73fd2a6f 912 * @param Size Amount of data to be received
<> 144:ef7eb2e8f9f7 913 * @retval HAL status
<> 144:ef7eb2e8f9f7 914 * @note The USART DMA transmit stream must be configured in order to generate the clock for the slave.
<> 144:ef7eb2e8f9f7 915 * @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit.
<> 144:ef7eb2e8f9f7 916 */
<> 144:ef7eb2e8f9f7 917 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 918 {
<> 144:ef7eb2e8f9f7 919 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 920
<> 144:ef7eb2e8f9f7 921 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 922 {
AnnaBridge 167:e84263d55307 923 if((pRxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 924 {
<> 144:ef7eb2e8f9f7 925 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 926 }
<> 144:ef7eb2e8f9f7 927
<> 144:ef7eb2e8f9f7 928 /* Process Locked */
<> 144:ef7eb2e8f9f7 929 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 930
<> 144:ef7eb2e8f9f7 931 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 932 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 933 husart->pTxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 934 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 935
<> 144:ef7eb2e8f9f7 936 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 937 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 938
<> 144:ef7eb2e8f9f7 939 /* Set the USART DMA Rx transfer complete callback */
<> 144:ef7eb2e8f9f7 940 husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 941
<> 144:ef7eb2e8f9f7 942 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 943 husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 944
<> 144:ef7eb2e8f9f7 945 /* Set the USART DMA Rx transfer error callback */
<> 144:ef7eb2e8f9f7 946 husart->hdmarx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 947
<> 144:ef7eb2e8f9f7 948 /* Set the DMA abort callback */
<> 144:ef7eb2e8f9f7 949 husart->hdmarx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 950
<> 144:ef7eb2e8f9f7 951 /* Set the USART Tx DMA transfer complete callback as NULL because the communication closing
<> 144:ef7eb2e8f9f7 952 is performed in DMA reception complete callback */
<> 144:ef7eb2e8f9f7 953 husart->hdmatx->XferHalfCpltCallback = NULL;
<> 144:ef7eb2e8f9f7 954 husart->hdmatx->XferCpltCallback = NULL;
<> 144:ef7eb2e8f9f7 955
<> 144:ef7eb2e8f9f7 956 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 957 husart->hdmatx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 958
<> 144:ef7eb2e8f9f7 959 /* Set the DMA AbortCpltCallback */
<> 144:ef7eb2e8f9f7 960 husart->hdmatx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 961
<> 144:ef7eb2e8f9f7 962 /* Enable the USART receive DMA Stream */
<> 144:ef7eb2e8f9f7 963 tmp = (uint32_t*)&pRxData;
<> 144:ef7eb2e8f9f7 964 HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 965
<> 144:ef7eb2e8f9f7 966 /* Enable the USART transmit DMA Stream: the transmit stream is used in order
<> 144:ef7eb2e8f9f7 967 to generate in the non-blocking mode the clock to the slave device,
<> 144:ef7eb2e8f9f7 968 this mode isn't a simplex receive mode but a full-duplex receive one */
<> 144:ef7eb2e8f9f7 969 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->DR, Size);
<> 144:ef7eb2e8f9f7 970
AnnaBridge 167:e84263d55307 971 /* Clear the Overrun flag just before enabling the DMA Rx request: mandatory for the second transfer */
<> 144:ef7eb2e8f9f7 972 __HAL_USART_CLEAR_OREFLAG(husart);
<> 144:ef7eb2e8f9f7 973
<> 144:ef7eb2e8f9f7 974 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 975 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 976
<> 144:ef7eb2e8f9f7 977 /* Enable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 978 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 979
<> 144:ef7eb2e8f9f7 980 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 981 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 982
<> 144:ef7eb2e8f9f7 983 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 984 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 985 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 986
<> 144:ef7eb2e8f9f7 987 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 988 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 989 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 990
<> 144:ef7eb2e8f9f7 991 return HAL_OK;
<> 144:ef7eb2e8f9f7 992 }
<> 144:ef7eb2e8f9f7 993 else
<> 144:ef7eb2e8f9f7 994 {
<> 144:ef7eb2e8f9f7 995 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 996 }
<> 144:ef7eb2e8f9f7 997 }
<> 144:ef7eb2e8f9f7 998
<> 144:ef7eb2e8f9f7 999 /**
<> 144:ef7eb2e8f9f7 1000 * @brief Full-Duplex Transmit Receive an amount of data in non-blocking mode.
AnnaBridge 182:a56a73fd2a6f 1001 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1002 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 1003 * @param pTxData Pointer to data transmitted buffer
AnnaBridge 182:a56a73fd2a6f 1004 * @param pRxData Pointer to data received buffer
AnnaBridge 182:a56a73fd2a6f 1005 * @param Size Amount of data to be received
<> 144:ef7eb2e8f9f7 1006 * @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit.
<> 144:ef7eb2e8f9f7 1007 * @retval HAL status
<> 144:ef7eb2e8f9f7 1008 */
<> 144:ef7eb2e8f9f7 1009 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 1010 {
<> 144:ef7eb2e8f9f7 1011 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 1012
<> 144:ef7eb2e8f9f7 1013 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 1014 {
AnnaBridge 167:e84263d55307 1015 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 1016 {
<> 144:ef7eb2e8f9f7 1017 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1018 }
<> 144:ef7eb2e8f9f7 1019 /* Process Locked */
<> 144:ef7eb2e8f9f7 1020 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1021
<> 144:ef7eb2e8f9f7 1022 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 1023 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 1024 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 1025 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 1026
<> 144:ef7eb2e8f9f7 1027 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1028 husart->State = HAL_USART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 1029
<> 144:ef7eb2e8f9f7 1030 /* Set the USART DMA Rx transfer complete callback */
<> 144:ef7eb2e8f9f7 1031 husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 1032
<> 144:ef7eb2e8f9f7 1033 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1034 husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 1035
<> 144:ef7eb2e8f9f7 1036 /* Set the USART DMA Tx transfer complete callback */
<> 144:ef7eb2e8f9f7 1037 husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 1038
<> 144:ef7eb2e8f9f7 1039 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1040 husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 1041
<> 144:ef7eb2e8f9f7 1042 /* Set the USART DMA Tx transfer error callback */
<> 144:ef7eb2e8f9f7 1043 husart->hdmatx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 1044
<> 144:ef7eb2e8f9f7 1045 /* Set the USART DMA Rx transfer error callback */
<> 144:ef7eb2e8f9f7 1046 husart->hdmarx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 1047
<> 144:ef7eb2e8f9f7 1048 /* Set the DMA abort callback */
<> 144:ef7eb2e8f9f7 1049 husart->hdmarx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 1050
<> 144:ef7eb2e8f9f7 1051 /* Enable the USART receive DMA Stream */
<> 144:ef7eb2e8f9f7 1052 tmp = (uint32_t*)&pRxData;
<> 144:ef7eb2e8f9f7 1053 HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 1054
<> 144:ef7eb2e8f9f7 1055 /* Enable the USART transmit DMA Stream */
<> 144:ef7eb2e8f9f7 1056 tmp = (uint32_t*)&pTxData;
<> 144:ef7eb2e8f9f7 1057 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->DR, Size);
<> 144:ef7eb2e8f9f7 1058
<> 144:ef7eb2e8f9f7 1059 /* Clear the TC flag in the SR register by writing 0 to it */
<> 144:ef7eb2e8f9f7 1060 __HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC);
<> 144:ef7eb2e8f9f7 1061
<> 144:ef7eb2e8f9f7 1062 /* Clear the Overrun flag: mandatory for the second transfer in circular mode */
<> 144:ef7eb2e8f9f7 1063 __HAL_USART_CLEAR_OREFLAG(husart);
<> 144:ef7eb2e8f9f7 1064
<> 144:ef7eb2e8f9f7 1065 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1066 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1067
<> 144:ef7eb2e8f9f7 1068 /* Enable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 1069 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1070
<> 144:ef7eb2e8f9f7 1071 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1072 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1073
<> 144:ef7eb2e8f9f7 1074 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 1075 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 1076 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1077
<> 144:ef7eb2e8f9f7 1078 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 1079 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 1080 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1081
<> 144:ef7eb2e8f9f7 1082 return HAL_OK;
<> 144:ef7eb2e8f9f7 1083 }
<> 144:ef7eb2e8f9f7 1084 else
<> 144:ef7eb2e8f9f7 1085 {
<> 144:ef7eb2e8f9f7 1086 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1087 }
<> 144:ef7eb2e8f9f7 1088 }
<> 144:ef7eb2e8f9f7 1089
<> 144:ef7eb2e8f9f7 1090 /**
<> 144:ef7eb2e8f9f7 1091 * @brief Pauses the DMA Transfer.
AnnaBridge 182:a56a73fd2a6f 1092 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1093 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1094 * @retval HAL status
<> 144:ef7eb2e8f9f7 1095 */
<> 144:ef7eb2e8f9f7 1096 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1097 {
<> 144:ef7eb2e8f9f7 1098 /* Process Locked */
<> 144:ef7eb2e8f9f7 1099 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1100
<> 144:ef7eb2e8f9f7 1101 /* Disable the USART DMA Tx request */
<> 144:ef7eb2e8f9f7 1102 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1103
<> 144:ef7eb2e8f9f7 1104 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1105 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1106
<> 144:ef7eb2e8f9f7 1107 return HAL_OK;
<> 144:ef7eb2e8f9f7 1108 }
<> 144:ef7eb2e8f9f7 1109
<> 144:ef7eb2e8f9f7 1110 /**
<> 144:ef7eb2e8f9f7 1111 * @brief Resumes the DMA Transfer.
AnnaBridge 182:a56a73fd2a6f 1112 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1113 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1114 * @retval HAL status
<> 144:ef7eb2e8f9f7 1115 */
<> 144:ef7eb2e8f9f7 1116 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1117 {
<> 144:ef7eb2e8f9f7 1118 /* Process Locked */
<> 144:ef7eb2e8f9f7 1119 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1120
<> 144:ef7eb2e8f9f7 1121 /* Enable the USART DMA Tx request */
<> 144:ef7eb2e8f9f7 1122 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1123
<> 144:ef7eb2e8f9f7 1124 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1125 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1126
<> 144:ef7eb2e8f9f7 1127 return HAL_OK;
<> 144:ef7eb2e8f9f7 1128 }
<> 144:ef7eb2e8f9f7 1129
<> 144:ef7eb2e8f9f7 1130 /**
<> 144:ef7eb2e8f9f7 1131 * @brief Stops the DMA Transfer.
AnnaBridge 182:a56a73fd2a6f 1132 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1133 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1134 * @retval HAL status
<> 144:ef7eb2e8f9f7 1135 */
<> 144:ef7eb2e8f9f7 1136 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1137 {
<> 144:ef7eb2e8f9f7 1138 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1139 /* The Lock is not implemented on this API to allow the user application
<> 144:ef7eb2e8f9f7 1140 to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback():
<> 144:ef7eb2e8f9f7 1141 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
<> 144:ef7eb2e8f9f7 1142 and the correspond call back is executed HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 1143 */
<> 144:ef7eb2e8f9f7 1144
<> 144:ef7eb2e8f9f7 1145 /* Stop USART DMA Tx request if ongoing */
<> 144:ef7eb2e8f9f7 1146 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1147 if((husart->State == HAL_USART_STATE_BUSY_TX) && dmarequest)
<> 144:ef7eb2e8f9f7 1148 {
<> 144:ef7eb2e8f9f7 1149 USART_EndTxTransfer(husart);
<> 144:ef7eb2e8f9f7 1150
<> 144:ef7eb2e8f9f7 1151 /* Abort the USART DMA Tx channel */
<> 144:ef7eb2e8f9f7 1152 if(husart->hdmatx != NULL)
<> 144:ef7eb2e8f9f7 1153 {
<> 144:ef7eb2e8f9f7 1154 HAL_DMA_Abort(husart->hdmatx);
<> 144:ef7eb2e8f9f7 1155 }
<> 144:ef7eb2e8f9f7 1156
<> 144:ef7eb2e8f9f7 1157 /* Disable the USART Tx DMA request */
<> 144:ef7eb2e8f9f7 1158 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1159 }
<> 144:ef7eb2e8f9f7 1160
<> 144:ef7eb2e8f9f7 1161 /* Stop USART DMA Rx request if ongoing */
<> 144:ef7eb2e8f9f7 1162 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1163 if((husart->State == HAL_USART_STATE_BUSY_RX) && dmarequest)
<> 144:ef7eb2e8f9f7 1164 {
<> 144:ef7eb2e8f9f7 1165 USART_EndRxTransfer(husart);
<> 144:ef7eb2e8f9f7 1166
<> 144:ef7eb2e8f9f7 1167 /* Abort the USART DMA Rx channel */
<> 144:ef7eb2e8f9f7 1168 if(husart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1169 {
<> 144:ef7eb2e8f9f7 1170 HAL_DMA_Abort(husart->hdmarx);
<> 144:ef7eb2e8f9f7 1171 }
<> 144:ef7eb2e8f9f7 1172
<> 144:ef7eb2e8f9f7 1173 /* Disable the USART Rx DMA request */
<> 144:ef7eb2e8f9f7 1174 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1175 }
<> 144:ef7eb2e8f9f7 1176
<> 144:ef7eb2e8f9f7 1177 return HAL_OK;
<> 144:ef7eb2e8f9f7 1178 }
<> 144:ef7eb2e8f9f7 1179
<> 144:ef7eb2e8f9f7 1180 /**
AnnaBridge 167:e84263d55307 1181 * @brief Abort ongoing transfer (blocking mode).
AnnaBridge 167:e84263d55307 1182 * @param husart USART handle.
AnnaBridge 167:e84263d55307 1183 * @note This procedure could be used for aborting any ongoing transfer (either Tx or Rx,
AnnaBridge 167:e84263d55307 1184 * as described by TransferType parameter) started in Interrupt or DMA mode.
AnnaBridge 167:e84263d55307 1185 * This procedure performs following operations :
AnnaBridge 167:e84263d55307 1186 * - Disable PPP Interrupts (depending of transfer direction)
AnnaBridge 167:e84263d55307 1187 * - Disable the DMA transfer in the peripheral register (if enabled)
AnnaBridge 167:e84263d55307 1188 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
AnnaBridge 167:e84263d55307 1189 * - Set handle State to READY
AnnaBridge 167:e84263d55307 1190 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
AnnaBridge 167:e84263d55307 1191 * @retval HAL status
AnnaBridge 167:e84263d55307 1192 */
AnnaBridge 167:e84263d55307 1193 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
AnnaBridge 167:e84263d55307 1194 {
AnnaBridge 167:e84263d55307 1195 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
AnnaBridge 167:e84263d55307 1196 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
AnnaBridge 167:e84263d55307 1197 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
AnnaBridge 167:e84263d55307 1198
AnnaBridge 167:e84263d55307 1199 /* Disable the USART DMA Tx request if enabled */
AnnaBridge 167:e84263d55307 1200 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
AnnaBridge 167:e84263d55307 1201 {
AnnaBridge 167:e84263d55307 1202 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
AnnaBridge 167:e84263d55307 1203
AnnaBridge 167:e84263d55307 1204 /* Abort the USART DMA Tx channel : use blocking DMA Abort API (no callback) */
AnnaBridge 167:e84263d55307 1205 if(husart->hdmatx != NULL)
AnnaBridge 167:e84263d55307 1206 {
AnnaBridge 167:e84263d55307 1207 /* Set the USART DMA Abort callback to Null.
AnnaBridge 167:e84263d55307 1208 No call back execution at end of DMA abort procedure */
AnnaBridge 167:e84263d55307 1209 husart->hdmatx->XferAbortCallback = NULL;
AnnaBridge 167:e84263d55307 1210
AnnaBridge 167:e84263d55307 1211 HAL_DMA_Abort(husart->hdmatx);
AnnaBridge 167:e84263d55307 1212 }
AnnaBridge 167:e84263d55307 1213 }
AnnaBridge 167:e84263d55307 1214
AnnaBridge 167:e84263d55307 1215 /* Disable the USART DMA Rx request if enabled */
AnnaBridge 167:e84263d55307 1216 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
AnnaBridge 167:e84263d55307 1217 {
AnnaBridge 167:e84263d55307 1218 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
AnnaBridge 167:e84263d55307 1219
AnnaBridge 167:e84263d55307 1220 /* Abort the USART DMA Rx channel : use blocking DMA Abort API (no callback) */
AnnaBridge 167:e84263d55307 1221 if(husart->hdmarx != NULL)
AnnaBridge 167:e84263d55307 1222 {
AnnaBridge 167:e84263d55307 1223 /* Set the USART DMA Abort callback to Null.
AnnaBridge 167:e84263d55307 1224 No call back execution at end of DMA abort procedure */
AnnaBridge 167:e84263d55307 1225 husart->hdmarx->XferAbortCallback = NULL;
AnnaBridge 167:e84263d55307 1226
AnnaBridge 167:e84263d55307 1227 HAL_DMA_Abort(husart->hdmarx);
AnnaBridge 167:e84263d55307 1228 }
AnnaBridge 167:e84263d55307 1229 }
AnnaBridge 167:e84263d55307 1230
AnnaBridge 167:e84263d55307 1231 /* Reset Tx and Rx transfer counters */
AnnaBridge 167:e84263d55307 1232 husart->TxXferCount = 0x00U;
AnnaBridge 167:e84263d55307 1233 husart->RxXferCount = 0x00U;
AnnaBridge 167:e84263d55307 1234
AnnaBridge 167:e84263d55307 1235 /* Restore husart->State to Ready */
AnnaBridge 167:e84263d55307 1236 husart->State = HAL_USART_STATE_READY;
AnnaBridge 167:e84263d55307 1237
AnnaBridge 167:e84263d55307 1238 /* Reset Handle ErrorCode to No Error */
AnnaBridge 167:e84263d55307 1239 husart->ErrorCode = HAL_USART_ERROR_NONE;
AnnaBridge 167:e84263d55307 1240
AnnaBridge 167:e84263d55307 1241 return HAL_OK;
AnnaBridge 167:e84263d55307 1242 }
AnnaBridge 167:e84263d55307 1243
AnnaBridge 167:e84263d55307 1244 /**
AnnaBridge 167:e84263d55307 1245 * @brief Abort ongoing transfer (Interrupt mode).
AnnaBridge 167:e84263d55307 1246 * @param husart USART handle.
AnnaBridge 167:e84263d55307 1247 * @note This procedure could be used for aborting any ongoing transfer (either Tx or Rx,
AnnaBridge 167:e84263d55307 1248 * as described by TransferType parameter) started in Interrupt or DMA mode.
AnnaBridge 167:e84263d55307 1249 * This procedure performs following operations :
AnnaBridge 167:e84263d55307 1250 * - Disable PPP Interrupts (depending of transfer direction)
AnnaBridge 167:e84263d55307 1251 * - Disable the DMA transfer in the peripheral register (if enabled)
AnnaBridge 167:e84263d55307 1252 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
AnnaBridge 167:e84263d55307 1253 * - Set handle State to READY
AnnaBridge 167:e84263d55307 1254 * - At abort completion, call user abort complete callback
AnnaBridge 167:e84263d55307 1255 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
AnnaBridge 167:e84263d55307 1256 * considered as completed only when user abort complete callback is executed (not when exiting function).
AnnaBridge 167:e84263d55307 1257 * @retval HAL status
AnnaBridge 167:e84263d55307 1258 */
AnnaBridge 167:e84263d55307 1259 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
AnnaBridge 167:e84263d55307 1260 {
AnnaBridge 167:e84263d55307 1261 uint32_t AbortCplt = 0x01U;
AnnaBridge 167:e84263d55307 1262
AnnaBridge 167:e84263d55307 1263 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
AnnaBridge 167:e84263d55307 1264 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
AnnaBridge 167:e84263d55307 1265 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
AnnaBridge 167:e84263d55307 1266
AnnaBridge 167:e84263d55307 1267 /* If DMA Tx and/or DMA Rx Handles are associated to USART Handle, DMA Abort complete callbacks should be initialised
AnnaBridge 167:e84263d55307 1268 before any call to DMA Abort functions */
AnnaBridge 167:e84263d55307 1269 /* DMA Tx Handle is valid */
AnnaBridge 167:e84263d55307 1270 if(husart->hdmatx != NULL)
AnnaBridge 167:e84263d55307 1271 {
AnnaBridge 167:e84263d55307 1272 /* Set DMA Abort Complete callback if USART DMA Tx request if enabled.
AnnaBridge 167:e84263d55307 1273 Otherwise, set it to NULL */
AnnaBridge 167:e84263d55307 1274 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
AnnaBridge 167:e84263d55307 1275 {
AnnaBridge 167:e84263d55307 1276 husart->hdmatx->XferAbortCallback = USART_DMATxAbortCallback;
AnnaBridge 167:e84263d55307 1277 }
AnnaBridge 167:e84263d55307 1278 else
AnnaBridge 167:e84263d55307 1279 {
AnnaBridge 167:e84263d55307 1280 husart->hdmatx->XferAbortCallback = NULL;
AnnaBridge 167:e84263d55307 1281 }
AnnaBridge 167:e84263d55307 1282 }
AnnaBridge 167:e84263d55307 1283 /* DMA Rx Handle is valid */
AnnaBridge 167:e84263d55307 1284 if(husart->hdmarx != NULL)
AnnaBridge 167:e84263d55307 1285 {
AnnaBridge 167:e84263d55307 1286 /* Set DMA Abort Complete callback if USART DMA Rx request if enabled.
AnnaBridge 167:e84263d55307 1287 Otherwise, set it to NULL */
AnnaBridge 167:e84263d55307 1288 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
AnnaBridge 167:e84263d55307 1289 {
AnnaBridge 167:e84263d55307 1290 husart->hdmarx->XferAbortCallback = USART_DMARxAbortCallback;
AnnaBridge 167:e84263d55307 1291 }
AnnaBridge 167:e84263d55307 1292 else
AnnaBridge 167:e84263d55307 1293 {
AnnaBridge 167:e84263d55307 1294 husart->hdmarx->XferAbortCallback = NULL;
AnnaBridge 167:e84263d55307 1295 }
AnnaBridge 167:e84263d55307 1296 }
AnnaBridge 167:e84263d55307 1297
AnnaBridge 167:e84263d55307 1298 /* Disable the USART DMA Tx request if enabled */
AnnaBridge 167:e84263d55307 1299 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
AnnaBridge 167:e84263d55307 1300 {
AnnaBridge 167:e84263d55307 1301 /* Disable DMA Tx at USART level */
AnnaBridge 167:e84263d55307 1302 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
AnnaBridge 167:e84263d55307 1303
AnnaBridge 167:e84263d55307 1304 /* Abort the USART DMA Tx channel : use non blocking DMA Abort API (callback) */
AnnaBridge 167:e84263d55307 1305 if(husart->hdmatx != NULL)
AnnaBridge 167:e84263d55307 1306 {
AnnaBridge 167:e84263d55307 1307 /* USART Tx DMA Abort callback has already been initialised :
AnnaBridge 167:e84263d55307 1308 will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
AnnaBridge 167:e84263d55307 1309
AnnaBridge 167:e84263d55307 1310 /* Abort DMA TX */
AnnaBridge 167:e84263d55307 1311 if(HAL_DMA_Abort_IT(husart->hdmatx) != HAL_OK)
AnnaBridge 167:e84263d55307 1312 {
AnnaBridge 167:e84263d55307 1313 husart->hdmatx->XferAbortCallback = NULL;
AnnaBridge 167:e84263d55307 1314 }
AnnaBridge 167:e84263d55307 1315 else
AnnaBridge 167:e84263d55307 1316 {
AnnaBridge 167:e84263d55307 1317 AbortCplt = 0x00U;
AnnaBridge 167:e84263d55307 1318 }
AnnaBridge 167:e84263d55307 1319 }
AnnaBridge 167:e84263d55307 1320 }
AnnaBridge 167:e84263d55307 1321
AnnaBridge 167:e84263d55307 1322 /* Disable the USART DMA Rx request if enabled */
AnnaBridge 167:e84263d55307 1323 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
AnnaBridge 167:e84263d55307 1324 {
AnnaBridge 167:e84263d55307 1325 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
AnnaBridge 167:e84263d55307 1326
AnnaBridge 167:e84263d55307 1327 /* Abort the USART DMA Rx channel : use non blocking DMA Abort API (callback) */
AnnaBridge 167:e84263d55307 1328 if(husart->hdmarx != NULL)
AnnaBridge 167:e84263d55307 1329 {
AnnaBridge 167:e84263d55307 1330 /* USART Rx DMA Abort callback has already been initialised :
AnnaBridge 167:e84263d55307 1331 will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
AnnaBridge 167:e84263d55307 1332
AnnaBridge 167:e84263d55307 1333 /* Abort DMA RX */
AnnaBridge 167:e84263d55307 1334 if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
AnnaBridge 167:e84263d55307 1335 {
AnnaBridge 167:e84263d55307 1336 husart->hdmarx->XferAbortCallback = NULL;
AnnaBridge 167:e84263d55307 1337 AbortCplt = 0x01U;
AnnaBridge 167:e84263d55307 1338 }
AnnaBridge 167:e84263d55307 1339 else
AnnaBridge 167:e84263d55307 1340 {
AnnaBridge 167:e84263d55307 1341 AbortCplt = 0x00U;
AnnaBridge 167:e84263d55307 1342 }
AnnaBridge 167:e84263d55307 1343 }
AnnaBridge 167:e84263d55307 1344 }
AnnaBridge 167:e84263d55307 1345
AnnaBridge 167:e84263d55307 1346 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
AnnaBridge 167:e84263d55307 1347 if(AbortCplt == 0x01U)
AnnaBridge 167:e84263d55307 1348 {
AnnaBridge 167:e84263d55307 1349 /* Reset Tx and Rx transfer counters */
AnnaBridge 167:e84263d55307 1350 husart->TxXferCount = 0x00U;
AnnaBridge 167:e84263d55307 1351 husart->RxXferCount = 0x00U;
AnnaBridge 167:e84263d55307 1352
AnnaBridge 167:e84263d55307 1353 /* Reset errorCode */
AnnaBridge 167:e84263d55307 1354 husart->ErrorCode = HAL_USART_ERROR_NONE;
AnnaBridge 167:e84263d55307 1355
AnnaBridge 167:e84263d55307 1356 /* Restore husart->State to Ready */
AnnaBridge 167:e84263d55307 1357 husart->State = HAL_USART_STATE_READY;
AnnaBridge 167:e84263d55307 1358
AnnaBridge 167:e84263d55307 1359 /* As no DMA to be aborted, call directly user Abort complete callback */
AnnaBridge 167:e84263d55307 1360 HAL_USART_AbortCpltCallback(husart);
AnnaBridge 167:e84263d55307 1361 }
AnnaBridge 167:e84263d55307 1362
AnnaBridge 167:e84263d55307 1363 return HAL_OK;
AnnaBridge 167:e84263d55307 1364 }
AnnaBridge 167:e84263d55307 1365
AnnaBridge 167:e84263d55307 1366 /**
<> 144:ef7eb2e8f9f7 1367 * @brief This function handles USART interrupt request.
AnnaBridge 182:a56a73fd2a6f 1368 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1369 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1370 * @retval None
<> 144:ef7eb2e8f9f7 1371 */
<> 144:ef7eb2e8f9f7 1372 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1373 {
<> 144:ef7eb2e8f9f7 1374 uint32_t isrflags = READ_REG(husart->Instance->SR);
<> 144:ef7eb2e8f9f7 1375 uint32_t cr1its = READ_REG(husart->Instance->CR1);
<> 144:ef7eb2e8f9f7 1376 uint32_t cr3its = READ_REG(husart->Instance->CR3);
<> 144:ef7eb2e8f9f7 1377 uint32_t errorflags = 0x00U;
<> 144:ef7eb2e8f9f7 1378 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1379
<> 144:ef7eb2e8f9f7 1380 /* If no error occurs */
<> 144:ef7eb2e8f9f7 1381 errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
<> 144:ef7eb2e8f9f7 1382 if(errorflags == RESET)
<> 144:ef7eb2e8f9f7 1383 {
<> 144:ef7eb2e8f9f7 1384 /* USART in mode Receiver -------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1385 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 144:ef7eb2e8f9f7 1386 {
<> 144:ef7eb2e8f9f7 1387 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1388 {
<> 144:ef7eb2e8f9f7 1389 USART_Receive_IT(husart);
<> 144:ef7eb2e8f9f7 1390 }
<> 144:ef7eb2e8f9f7 1391 else
<> 144:ef7eb2e8f9f7 1392 {
<> 144:ef7eb2e8f9f7 1393 USART_TransmitReceive_IT(husart);
<> 144:ef7eb2e8f9f7 1394 }
<> 144:ef7eb2e8f9f7 1395 return;
<> 144:ef7eb2e8f9f7 1396 }
<> 144:ef7eb2e8f9f7 1397 }
<> 144:ef7eb2e8f9f7 1398 /* If some errors occur */
AnnaBridge 167:e84263d55307 1399 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
<> 144:ef7eb2e8f9f7 1400 {
<> 144:ef7eb2e8f9f7 1401 /* USART parity error interrupt occurred ----------------------------------*/
<> 144:ef7eb2e8f9f7 1402 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
<> 144:ef7eb2e8f9f7 1403 {
<> 144:ef7eb2e8f9f7 1404 husart->ErrorCode |= HAL_USART_ERROR_PE;
<> 144:ef7eb2e8f9f7 1405 }
<> 144:ef7eb2e8f9f7 1406
<> 144:ef7eb2e8f9f7 1407 /* USART noise error interrupt occurred --------------------------------*/
<> 144:ef7eb2e8f9f7 1408 if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1409 {
<> 144:ef7eb2e8f9f7 1410 husart->ErrorCode |= HAL_USART_ERROR_NE;
<> 144:ef7eb2e8f9f7 1411 }
<> 144:ef7eb2e8f9f7 1412
<> 144:ef7eb2e8f9f7 1413 /* USART frame error interrupt occurred --------------------------------*/
<> 144:ef7eb2e8f9f7 1414 if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1415 {
<> 144:ef7eb2e8f9f7 1416 husart->ErrorCode |= HAL_USART_ERROR_FE;
<> 144:ef7eb2e8f9f7 1417 }
<> 144:ef7eb2e8f9f7 1418
<> 144:ef7eb2e8f9f7 1419 /* USART Over-Run interrupt occurred -----------------------------------*/
<> 144:ef7eb2e8f9f7 1420 if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1421 {
<> 144:ef7eb2e8f9f7 1422 husart->ErrorCode |= HAL_USART_ERROR_ORE;
<> 144:ef7eb2e8f9f7 1423 }
<> 144:ef7eb2e8f9f7 1424
<> 144:ef7eb2e8f9f7 1425 if(husart->ErrorCode != HAL_USART_ERROR_NONE)
<> 144:ef7eb2e8f9f7 1426 {
<> 144:ef7eb2e8f9f7 1427 /* USART in mode Receiver -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 1428 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 144:ef7eb2e8f9f7 1429 {
<> 144:ef7eb2e8f9f7 1430 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1431 {
<> 144:ef7eb2e8f9f7 1432 USART_Receive_IT(husart);
<> 144:ef7eb2e8f9f7 1433 }
<> 144:ef7eb2e8f9f7 1434 else
<> 144:ef7eb2e8f9f7 1435 {
<> 144:ef7eb2e8f9f7 1436 USART_TransmitReceive_IT(husart);
<> 144:ef7eb2e8f9f7 1437 }
<> 144:ef7eb2e8f9f7 1438 }
<> 144:ef7eb2e8f9f7 1439 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
<> 144:ef7eb2e8f9f7 1440 consider error as blocking */
<> 144:ef7eb2e8f9f7 1441 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1442 if(((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) || dmarequest)
<> 144:ef7eb2e8f9f7 1443 {
<> 144:ef7eb2e8f9f7 1444 /* Set the USART state ready to be able to start again the process,
<> 144:ef7eb2e8f9f7 1445 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
<> 144:ef7eb2e8f9f7 1446 USART_EndRxTransfer(husart);
<> 144:ef7eb2e8f9f7 1447
<> 144:ef7eb2e8f9f7 1448 /* Disable the USART DMA Rx request if enabled */
<> 144:ef7eb2e8f9f7 1449 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
<> 144:ef7eb2e8f9f7 1450 {
<> 144:ef7eb2e8f9f7 1451 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1452
<> 144:ef7eb2e8f9f7 1453 /* Abort the USART DMA Rx channel */
<> 144:ef7eb2e8f9f7 1454 if(husart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1455 {
<> 144:ef7eb2e8f9f7 1456 /* Set the USART DMA Abort callback :
<> 144:ef7eb2e8f9f7 1457 will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
<> 144:ef7eb2e8f9f7 1458 husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError;
<> 144:ef7eb2e8f9f7 1459
<> 144:ef7eb2e8f9f7 1460 if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
<> 144:ef7eb2e8f9f7 1461 {
<> 144:ef7eb2e8f9f7 1462 /* Call Directly XferAbortCallback function in case of error */
<> 144:ef7eb2e8f9f7 1463 husart->hdmarx->XferAbortCallback(husart->hdmarx);
<> 144:ef7eb2e8f9f7 1464 }
<> 144:ef7eb2e8f9f7 1465 }
<> 144:ef7eb2e8f9f7 1466 else
<> 144:ef7eb2e8f9f7 1467 {
<> 144:ef7eb2e8f9f7 1468 /* Call user error callback */
<> 144:ef7eb2e8f9f7 1469 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1470 }
<> 144:ef7eb2e8f9f7 1471 }
<> 144:ef7eb2e8f9f7 1472 else
<> 144:ef7eb2e8f9f7 1473 {
<> 144:ef7eb2e8f9f7 1474 /* Call user error callback */
<> 144:ef7eb2e8f9f7 1475 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1476 }
<> 144:ef7eb2e8f9f7 1477 }
<> 144:ef7eb2e8f9f7 1478 else
<> 144:ef7eb2e8f9f7 1479 {
<> 144:ef7eb2e8f9f7 1480 /* Call user error callback */
<> 144:ef7eb2e8f9f7 1481 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1482 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1483 }
<> 144:ef7eb2e8f9f7 1484 }
<> 144:ef7eb2e8f9f7 1485 return;
<> 144:ef7eb2e8f9f7 1486 }
<> 144:ef7eb2e8f9f7 1487
<> 144:ef7eb2e8f9f7 1488 /* USART in mode Transmitter -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 1489 if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
<> 144:ef7eb2e8f9f7 1490 {
<> 144:ef7eb2e8f9f7 1491 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1492 {
<> 144:ef7eb2e8f9f7 1493 USART_Transmit_IT(husart);
<> 144:ef7eb2e8f9f7 1494 }
<> 144:ef7eb2e8f9f7 1495 else
<> 144:ef7eb2e8f9f7 1496 {
<> 144:ef7eb2e8f9f7 1497 USART_TransmitReceive_IT(husart);
<> 144:ef7eb2e8f9f7 1498 }
<> 144:ef7eb2e8f9f7 1499 return;
<> 144:ef7eb2e8f9f7 1500 }
<> 144:ef7eb2e8f9f7 1501
<> 144:ef7eb2e8f9f7 1502 /* USART in mode Transmitter (transmission end) ----------------------------*/
<> 144:ef7eb2e8f9f7 1503 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
<> 144:ef7eb2e8f9f7 1504 {
<> 144:ef7eb2e8f9f7 1505 USART_EndTransmit_IT(husart);
<> 144:ef7eb2e8f9f7 1506 return;
<> 144:ef7eb2e8f9f7 1507 }
<> 144:ef7eb2e8f9f7 1508 }
<> 144:ef7eb2e8f9f7 1509
<> 144:ef7eb2e8f9f7 1510 /**
<> 144:ef7eb2e8f9f7 1511 * @brief Tx Transfer completed callbacks.
AnnaBridge 182:a56a73fd2a6f 1512 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1513 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1514 * @retval None
<> 144:ef7eb2e8f9f7 1515 */
<> 144:ef7eb2e8f9f7 1516 __weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1517 {
<> 144:ef7eb2e8f9f7 1518 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1519 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1520 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1521 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1522 */
<> 144:ef7eb2e8f9f7 1523 }
<> 144:ef7eb2e8f9f7 1524
<> 144:ef7eb2e8f9f7 1525 /**
<> 144:ef7eb2e8f9f7 1526 * @brief Tx Half Transfer completed callbacks.
AnnaBridge 182:a56a73fd2a6f 1527 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1528 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1529 * @retval None
<> 144:ef7eb2e8f9f7 1530 */
<> 144:ef7eb2e8f9f7 1531 __weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1532 {
<> 144:ef7eb2e8f9f7 1533 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1534 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1535 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1536 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1537 */
<> 144:ef7eb2e8f9f7 1538 }
<> 144:ef7eb2e8f9f7 1539
<> 144:ef7eb2e8f9f7 1540 /**
<> 144:ef7eb2e8f9f7 1541 * @brief Rx Transfer completed callbacks.
AnnaBridge 182:a56a73fd2a6f 1542 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1543 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1544 * @retval None
<> 144:ef7eb2e8f9f7 1545 */
<> 144:ef7eb2e8f9f7 1546 __weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1547 {
<> 144:ef7eb2e8f9f7 1548 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1549 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1550 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1551 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1552 */
<> 144:ef7eb2e8f9f7 1553 }
<> 144:ef7eb2e8f9f7 1554
<> 144:ef7eb2e8f9f7 1555 /**
<> 144:ef7eb2e8f9f7 1556 * @brief Rx Half Transfer completed callbacks.
AnnaBridge 182:a56a73fd2a6f 1557 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1558 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1559 * @retval None
<> 144:ef7eb2e8f9f7 1560 */
<> 144:ef7eb2e8f9f7 1561 __weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1562 {
<> 144:ef7eb2e8f9f7 1563 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1564 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1565 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1566 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1567 */
<> 144:ef7eb2e8f9f7 1568 }
<> 144:ef7eb2e8f9f7 1569
<> 144:ef7eb2e8f9f7 1570 /**
<> 144:ef7eb2e8f9f7 1571 * @brief Tx/Rx Transfers completed callback for the non-blocking process.
AnnaBridge 182:a56a73fd2a6f 1572 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1573 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1574 * @retval None
<> 144:ef7eb2e8f9f7 1575 */
<> 144:ef7eb2e8f9f7 1576 __weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1577 {
<> 144:ef7eb2e8f9f7 1578 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1579 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1580 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1581 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1582 */
<> 144:ef7eb2e8f9f7 1583 }
<> 144:ef7eb2e8f9f7 1584
<> 144:ef7eb2e8f9f7 1585 /**
<> 144:ef7eb2e8f9f7 1586 * @brief USART error callbacks.
AnnaBridge 182:a56a73fd2a6f 1587 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1588 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1589 * @retval None
<> 144:ef7eb2e8f9f7 1590 */
<> 144:ef7eb2e8f9f7 1591 __weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1592 {
<> 144:ef7eb2e8f9f7 1593 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1594 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1595 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1596 the HAL_USART_ErrorCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1597 */
<> 144:ef7eb2e8f9f7 1598 }
<> 144:ef7eb2e8f9f7 1599
<> 144:ef7eb2e8f9f7 1600 /**
AnnaBridge 167:e84263d55307 1601 * @brief USART Abort Complete callback.
AnnaBridge 167:e84263d55307 1602 * @param husart USART handle.
AnnaBridge 167:e84263d55307 1603 * @retval None
AnnaBridge 167:e84263d55307 1604 */
AnnaBridge 167:e84263d55307 1605 __weak void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart)
AnnaBridge 167:e84263d55307 1606 {
AnnaBridge 167:e84263d55307 1607 /* Prevent unused argument(s) compilation warning */
AnnaBridge 167:e84263d55307 1608 UNUSED(husart);
AnnaBridge 167:e84263d55307 1609
AnnaBridge 167:e84263d55307 1610 /* NOTE : This function should not be modified, when the callback is needed,
AnnaBridge 167:e84263d55307 1611 the HAL_USART_AbortCpltCallback can be implemented in the user file.
AnnaBridge 167:e84263d55307 1612 */
AnnaBridge 167:e84263d55307 1613 }
AnnaBridge 167:e84263d55307 1614
AnnaBridge 167:e84263d55307 1615 /**
<> 144:ef7eb2e8f9f7 1616 * @}
<> 144:ef7eb2e8f9f7 1617 */
<> 144:ef7eb2e8f9f7 1618
<> 144:ef7eb2e8f9f7 1619 /** @defgroup USART_Exported_Functions_Group3 Peripheral State and Errors functions
<> 144:ef7eb2e8f9f7 1620 * @brief USART State and Errors functions
<> 144:ef7eb2e8f9f7 1621 *
<> 144:ef7eb2e8f9f7 1622 @verbatim
<> 144:ef7eb2e8f9f7 1623 ==============================================================================
<> 144:ef7eb2e8f9f7 1624 ##### Peripheral State and Errors functions #####
<> 144:ef7eb2e8f9f7 1625 ==============================================================================
<> 144:ef7eb2e8f9f7 1626 [..]
<> 144:ef7eb2e8f9f7 1627 This subsection provides a set of functions allowing to return the State of
<> 144:ef7eb2e8f9f7 1628 USART communication
<> 144:ef7eb2e8f9f7 1629 process, return Peripheral Errors occurred during communication process
<> 144:ef7eb2e8f9f7 1630 (+) HAL_USART_GetState() API can be helpful to check in run-time the state
<> 144:ef7eb2e8f9f7 1631 of the USART peripheral.
<> 144:ef7eb2e8f9f7 1632 (+) HAL_USART_GetError() check in run-time errors that could be occurred during
<> 144:ef7eb2e8f9f7 1633 communication.
<> 144:ef7eb2e8f9f7 1634 @endverbatim
<> 144:ef7eb2e8f9f7 1635 * @{
<> 144:ef7eb2e8f9f7 1636 */
<> 144:ef7eb2e8f9f7 1637
<> 144:ef7eb2e8f9f7 1638 /**
<> 144:ef7eb2e8f9f7 1639 * @brief Returns the USART state.
AnnaBridge 182:a56a73fd2a6f 1640 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1641 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1642 * @retval HAL state
<> 144:ef7eb2e8f9f7 1643 */
<> 144:ef7eb2e8f9f7 1644 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1645 {
<> 144:ef7eb2e8f9f7 1646 return husart->State;
<> 144:ef7eb2e8f9f7 1647 }
<> 144:ef7eb2e8f9f7 1648
<> 144:ef7eb2e8f9f7 1649 /**
<> 144:ef7eb2e8f9f7 1650 * @brief Return the USART error code
AnnaBridge 182:a56a73fd2a6f 1651 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1652 * the configuration information for the specified USART.
<> 144:ef7eb2e8f9f7 1653 * @retval USART Error Code
<> 144:ef7eb2e8f9f7 1654 */
<> 144:ef7eb2e8f9f7 1655 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1656 {
<> 144:ef7eb2e8f9f7 1657 return husart->ErrorCode;
<> 144:ef7eb2e8f9f7 1658 }
<> 144:ef7eb2e8f9f7 1659
<> 144:ef7eb2e8f9f7 1660 /**
<> 144:ef7eb2e8f9f7 1661 * @}
<> 144:ef7eb2e8f9f7 1662 */
<> 144:ef7eb2e8f9f7 1663
<> 144:ef7eb2e8f9f7 1664 /**
<> 144:ef7eb2e8f9f7 1665 * @brief DMA USART transmit process complete callback.
AnnaBridge 182:a56a73fd2a6f 1666 * @param hdma DMA handle
<> 144:ef7eb2e8f9f7 1667 * @retval None
<> 144:ef7eb2e8f9f7 1668 */
<> 144:ef7eb2e8f9f7 1669 static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1670 {
<> 144:ef7eb2e8f9f7 1671 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1672 /* DMA Normal mode */
<> 144:ef7eb2e8f9f7 1673 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
<> 144:ef7eb2e8f9f7 1674 {
<> 144:ef7eb2e8f9f7 1675 husart->TxXferCount = 0U;
<> 144:ef7eb2e8f9f7 1676 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1677 {
<> 144:ef7eb2e8f9f7 1678 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
<> 144:ef7eb2e8f9f7 1679 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 1680 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1681
<> 144:ef7eb2e8f9f7 1682 /* Enable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1683 SET_BIT(husart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 1684 }
<> 144:ef7eb2e8f9f7 1685 }
<> 144:ef7eb2e8f9f7 1686 /* DMA Circular mode */
<> 144:ef7eb2e8f9f7 1687 else
<> 144:ef7eb2e8f9f7 1688 {
<> 144:ef7eb2e8f9f7 1689 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1690 {
<> 144:ef7eb2e8f9f7 1691 HAL_USART_TxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1692 }
<> 144:ef7eb2e8f9f7 1693 }
<> 144:ef7eb2e8f9f7 1694 }
<> 144:ef7eb2e8f9f7 1695
<> 144:ef7eb2e8f9f7 1696 /**
<> 144:ef7eb2e8f9f7 1697 * @brief DMA USART transmit process half complete callback
AnnaBridge 182:a56a73fd2a6f 1698 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1699 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1700 * @retval None
<> 144:ef7eb2e8f9f7 1701 */
<> 144:ef7eb2e8f9f7 1702 static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1703 {
<> 144:ef7eb2e8f9f7 1704 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1705
<> 144:ef7eb2e8f9f7 1706 HAL_USART_TxHalfCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1707 }
<> 144:ef7eb2e8f9f7 1708
<> 144:ef7eb2e8f9f7 1709 /**
<> 144:ef7eb2e8f9f7 1710 * @brief DMA USART receive process complete callback.
AnnaBridge 182:a56a73fd2a6f 1711 * @param hdma DMA handle
<> 144:ef7eb2e8f9f7 1712 * @retval None
<> 144:ef7eb2e8f9f7 1713 */
<> 144:ef7eb2e8f9f7 1714 static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1715 {
<> 144:ef7eb2e8f9f7 1716 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1717 /* DMA Normal mode */
<> 144:ef7eb2e8f9f7 1718 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
<> 144:ef7eb2e8f9f7 1719 {
<> 144:ef7eb2e8f9f7 1720 husart->RxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1721
<> 144:ef7eb2e8f9f7 1722 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 144:ef7eb2e8f9f7 1723 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1724 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1725
AnnaBridge 182:a56a73fd2a6f 1726 /* Disable the DMA transfer for the Transmit/receiver request by clearing the DMAT/DMAR bit
AnnaBridge 182:a56a73fd2a6f 1727 in the USART CR3 register */
AnnaBridge 182:a56a73fd2a6f 1728 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
AnnaBridge 182:a56a73fd2a6f 1729 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
AnnaBridge 182:a56a73fd2a6f 1730
AnnaBridge 182:a56a73fd2a6f 1731 husart->State= HAL_USART_STATE_READY;
AnnaBridge 182:a56a73fd2a6f 1732
AnnaBridge 182:a56a73fd2a6f 1733 /* The USART state is HAL_USART_STATE_BUSY_RX */
<> 144:ef7eb2e8f9f7 1734 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1735 {
<> 144:ef7eb2e8f9f7 1736 HAL_USART_RxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1737 }
<> 144:ef7eb2e8f9f7 1738 /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
<> 144:ef7eb2e8f9f7 1739 else
<> 144:ef7eb2e8f9f7 1740 {
<> 144:ef7eb2e8f9f7 1741 HAL_USART_TxRxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1742 }
<> 144:ef7eb2e8f9f7 1743 }
<> 144:ef7eb2e8f9f7 1744 /* DMA circular mode */
<> 144:ef7eb2e8f9f7 1745 else
<> 144:ef7eb2e8f9f7 1746 {
<> 144:ef7eb2e8f9f7 1747 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1748 {
<> 144:ef7eb2e8f9f7 1749 HAL_USART_RxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1750 }
<> 144:ef7eb2e8f9f7 1751 /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
<> 144:ef7eb2e8f9f7 1752 else
<> 144:ef7eb2e8f9f7 1753 {
<> 144:ef7eb2e8f9f7 1754 HAL_USART_TxRxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1755 }
<> 144:ef7eb2e8f9f7 1756 }
<> 144:ef7eb2e8f9f7 1757 }
<> 144:ef7eb2e8f9f7 1758
<> 144:ef7eb2e8f9f7 1759 /**
<> 144:ef7eb2e8f9f7 1760 * @brief DMA USART receive process half complete callback
AnnaBridge 182:a56a73fd2a6f 1761 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1762 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1763 * @retval None
<> 144:ef7eb2e8f9f7 1764 */
<> 144:ef7eb2e8f9f7 1765 static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1766 {
<> 144:ef7eb2e8f9f7 1767 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1768
<> 144:ef7eb2e8f9f7 1769 HAL_USART_RxHalfCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1770 }
<> 144:ef7eb2e8f9f7 1771
<> 144:ef7eb2e8f9f7 1772 /**
<> 144:ef7eb2e8f9f7 1773 * @brief DMA USART communication error callback.
AnnaBridge 182:a56a73fd2a6f 1774 * @param hdma DMA handle
<> 144:ef7eb2e8f9f7 1775 * @retval None
<> 144:ef7eb2e8f9f7 1776 */
<> 144:ef7eb2e8f9f7 1777 static void USART_DMAError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1778 {
<> 144:ef7eb2e8f9f7 1779 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1780 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1781 husart->RxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1782 husart->TxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1783
<> 144:ef7eb2e8f9f7 1784 /* Stop USART DMA Tx request if ongoing */
<> 144:ef7eb2e8f9f7 1785 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1786 if((husart->State == HAL_USART_STATE_BUSY_TX) && dmarequest)
<> 144:ef7eb2e8f9f7 1787 {
<> 144:ef7eb2e8f9f7 1788 USART_EndTxTransfer(husart);
<> 144:ef7eb2e8f9f7 1789 }
<> 144:ef7eb2e8f9f7 1790
<> 144:ef7eb2e8f9f7 1791 /* Stop USART DMA Rx request if ongoing */
<> 144:ef7eb2e8f9f7 1792 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1793 if((husart->State == HAL_USART_STATE_BUSY_RX) && dmarequest)
<> 144:ef7eb2e8f9f7 1794 {
<> 144:ef7eb2e8f9f7 1795 USART_EndRxTransfer(husart);
<> 144:ef7eb2e8f9f7 1796 }
<> 144:ef7eb2e8f9f7 1797
<> 144:ef7eb2e8f9f7 1798 husart->ErrorCode |= HAL_USART_ERROR_DMA;
<> 144:ef7eb2e8f9f7 1799 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1800
<> 144:ef7eb2e8f9f7 1801 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1802 }
<> 144:ef7eb2e8f9f7 1803
<> 144:ef7eb2e8f9f7 1804 /**
<> 144:ef7eb2e8f9f7 1805 * @brief This function handles USART Communication Timeout.
AnnaBridge 182:a56a73fd2a6f 1806 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1807 * the configuration information for the specified USART module.
AnnaBridge 182:a56a73fd2a6f 1808 * @param Flag specifies the USART flag to check.
AnnaBridge 182:a56a73fd2a6f 1809 * @param Status The new Flag status (SET or RESET).
AnnaBridge 182:a56a73fd2a6f 1810 * @param Tickstart Tick start value.
AnnaBridge 182:a56a73fd2a6f 1811 * @param Timeout Timeout duration.
<> 144:ef7eb2e8f9f7 1812 * @retval HAL status
<> 144:ef7eb2e8f9f7 1813 */
<> 144:ef7eb2e8f9f7 1814 static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1815 {
<> 144:ef7eb2e8f9f7 1816 /* Wait until flag is set */
<> 144:ef7eb2e8f9f7 1817 while((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
<> 144:ef7eb2e8f9f7 1818 {
<> 144:ef7eb2e8f9f7 1819 /* Check for the Timeout */
<> 144:ef7eb2e8f9f7 1820 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1821 {
<> 144:ef7eb2e8f9f7 1822 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1823 {
<> 144:ef7eb2e8f9f7 1824 /* Disable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1825 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 1826
<> 144:ef7eb2e8f9f7 1827 /* Disable the USART RXNE Interrupt */
<> 144:ef7eb2e8f9f7 1828 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 1829
<> 144:ef7eb2e8f9f7 1830 /* Disable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 1831 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1832
<> 144:ef7eb2e8f9f7 1833 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1834 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1835
<> 144:ef7eb2e8f9f7 1836 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1837
<> 144:ef7eb2e8f9f7 1838 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1839 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1840
<> 144:ef7eb2e8f9f7 1841 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1842 }
<> 144:ef7eb2e8f9f7 1843 }
<> 144:ef7eb2e8f9f7 1844 }
<> 144:ef7eb2e8f9f7 1845 return HAL_OK;
<> 144:ef7eb2e8f9f7 1846 }
<> 144:ef7eb2e8f9f7 1847
<> 144:ef7eb2e8f9f7 1848 /**
<> 144:ef7eb2e8f9f7 1849 * @brief End ongoing Tx transfer on USART peripheral (following error detection or Transmit completion).
AnnaBridge 182:a56a73fd2a6f 1850 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 1851 * @retval None
<> 144:ef7eb2e8f9f7 1852 */
<> 144:ef7eb2e8f9f7 1853 static void USART_EndTxTransfer(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1854 {
<> 144:ef7eb2e8f9f7 1855 /* Disable TXEIE and TCIE interrupts */
<> 144:ef7eb2e8f9f7 1856 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
<> 144:ef7eb2e8f9f7 1857
<> 144:ef7eb2e8f9f7 1858 /* At end of Tx process, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 1859 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1860 }
<> 144:ef7eb2e8f9f7 1861
<> 144:ef7eb2e8f9f7 1862 /**
<> 144:ef7eb2e8f9f7 1863 * @brief End ongoing Rx transfer on USART peripheral (following error detection or Reception completion).
AnnaBridge 182:a56a73fd2a6f 1864 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 1865 * @retval None
<> 144:ef7eb2e8f9f7 1866 */
<> 144:ef7eb2e8f9f7 1867 static void USART_EndRxTransfer(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1868 {
<> 144:ef7eb2e8f9f7 1869 /* Disable RXNE, PE and ERR interrupts */
<> 144:ef7eb2e8f9f7 1870 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 144:ef7eb2e8f9f7 1871 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1872
<> 144:ef7eb2e8f9f7 1873 /* At end of Rx process, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 1874 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1875 }
<> 144:ef7eb2e8f9f7 1876
<> 144:ef7eb2e8f9f7 1877 /**
<> 144:ef7eb2e8f9f7 1878 * @brief DMA USART communication abort callback, when initiated by HAL services on Error
<> 144:ef7eb2e8f9f7 1879 * (To be called at end of DMA Abort procedure following error occurrence).
<> 144:ef7eb2e8f9f7 1880 * @param hdma DMA handle.
<> 144:ef7eb2e8f9f7 1881 * @retval None
<> 144:ef7eb2e8f9f7 1882 */
<> 144:ef7eb2e8f9f7 1883 static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1884 {
<> 144:ef7eb2e8f9f7 1885 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1886 husart->RxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1887 husart->TxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1888
<> 144:ef7eb2e8f9f7 1889 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1890 }
<> 144:ef7eb2e8f9f7 1891
<> 144:ef7eb2e8f9f7 1892 /**
AnnaBridge 167:e84263d55307 1893 * @brief DMA USART Tx communication abort callback, when initiated by user
AnnaBridge 167:e84263d55307 1894 * (To be called at end of DMA Tx Abort procedure following user abort request).
AnnaBridge 167:e84263d55307 1895 * @note When this callback is executed, User Abort complete call back is called only if no
AnnaBridge 167:e84263d55307 1896 * Abort still ongoing for Rx DMA Handle.
AnnaBridge 167:e84263d55307 1897 * @param hdma DMA handle.
AnnaBridge 167:e84263d55307 1898 * @retval None
AnnaBridge 167:e84263d55307 1899 */
AnnaBridge 167:e84263d55307 1900 static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
AnnaBridge 167:e84263d55307 1901 {
AnnaBridge 167:e84263d55307 1902 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
AnnaBridge 167:e84263d55307 1903
AnnaBridge 167:e84263d55307 1904 husart->hdmatx->XferAbortCallback = NULL;
AnnaBridge 167:e84263d55307 1905
AnnaBridge 167:e84263d55307 1906 /* Check if an Abort process is still ongoing */
AnnaBridge 167:e84263d55307 1907 if(husart->hdmarx != NULL)
AnnaBridge 167:e84263d55307 1908 {
AnnaBridge 167:e84263d55307 1909 if(husart->hdmarx->XferAbortCallback != NULL)
AnnaBridge 167:e84263d55307 1910 {
AnnaBridge 167:e84263d55307 1911 return;
AnnaBridge 167:e84263d55307 1912 }
AnnaBridge 167:e84263d55307 1913 }
AnnaBridge 167:e84263d55307 1914
AnnaBridge 167:e84263d55307 1915 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
AnnaBridge 167:e84263d55307 1916 husart->TxXferCount = 0x00U;
AnnaBridge 167:e84263d55307 1917 husart->RxXferCount = 0x00U;
AnnaBridge 167:e84263d55307 1918
AnnaBridge 167:e84263d55307 1919 /* Reset errorCode */
AnnaBridge 167:e84263d55307 1920 husart->ErrorCode = HAL_USART_ERROR_NONE;
AnnaBridge 167:e84263d55307 1921
AnnaBridge 167:e84263d55307 1922 /* Restore husart->State to Ready */
AnnaBridge 167:e84263d55307 1923 husart->State = HAL_USART_STATE_READY;
AnnaBridge 167:e84263d55307 1924
AnnaBridge 167:e84263d55307 1925 /* Call user Abort complete callback */
AnnaBridge 167:e84263d55307 1926 HAL_USART_AbortCpltCallback(husart);
AnnaBridge 167:e84263d55307 1927 }
AnnaBridge 167:e84263d55307 1928
AnnaBridge 167:e84263d55307 1929 /**
AnnaBridge 167:e84263d55307 1930 * @brief DMA USART Rx communication abort callback, when initiated by user
AnnaBridge 167:e84263d55307 1931 * (To be called at end of DMA Rx Abort procedure following user abort request).
AnnaBridge 167:e84263d55307 1932 * @note When this callback is executed, User Abort complete call back is called only if no
AnnaBridge 167:e84263d55307 1933 * Abort still ongoing for Tx DMA Handle.
AnnaBridge 167:e84263d55307 1934 * @param hdma DMA handle.
AnnaBridge 167:e84263d55307 1935 * @retval None
AnnaBridge 167:e84263d55307 1936 */
AnnaBridge 167:e84263d55307 1937 static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
AnnaBridge 167:e84263d55307 1938 {
AnnaBridge 167:e84263d55307 1939 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
AnnaBridge 167:e84263d55307 1940
AnnaBridge 167:e84263d55307 1941 husart->hdmarx->XferAbortCallback = NULL;
AnnaBridge 167:e84263d55307 1942
AnnaBridge 167:e84263d55307 1943 /* Check if an Abort process is still ongoing */
AnnaBridge 167:e84263d55307 1944 if(husart->hdmatx != NULL)
AnnaBridge 167:e84263d55307 1945 {
AnnaBridge 167:e84263d55307 1946 if(husart->hdmatx->XferAbortCallback != NULL)
AnnaBridge 167:e84263d55307 1947 {
AnnaBridge 167:e84263d55307 1948 return;
AnnaBridge 167:e84263d55307 1949 }
AnnaBridge 167:e84263d55307 1950 }
AnnaBridge 167:e84263d55307 1951
AnnaBridge 167:e84263d55307 1952 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
AnnaBridge 167:e84263d55307 1953 husart->TxXferCount = 0x00U;
AnnaBridge 167:e84263d55307 1954 husart->RxXferCount = 0x00U;
AnnaBridge 167:e84263d55307 1955
AnnaBridge 167:e84263d55307 1956 /* Reset errorCode */
AnnaBridge 167:e84263d55307 1957 husart->ErrorCode = HAL_USART_ERROR_NONE;
AnnaBridge 167:e84263d55307 1958
AnnaBridge 167:e84263d55307 1959 /* Restore husart->State to Ready */
AnnaBridge 167:e84263d55307 1960 husart->State = HAL_USART_STATE_READY;
AnnaBridge 167:e84263d55307 1961
AnnaBridge 167:e84263d55307 1962 /* Call user Abort complete callback */
AnnaBridge 167:e84263d55307 1963 HAL_USART_AbortCpltCallback(husart);
AnnaBridge 167:e84263d55307 1964 }
AnnaBridge 167:e84263d55307 1965
AnnaBridge 167:e84263d55307 1966 /**
<> 144:ef7eb2e8f9f7 1967 * @brief Simplex Send an amount of data in non-blocking mode.
AnnaBridge 182:a56a73fd2a6f 1968 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1969 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1970 * @retval HAL status
<> 144:ef7eb2e8f9f7 1971 * @note The USART errors are not managed to avoid the overrun error.
<> 144:ef7eb2e8f9f7 1972 */
<> 144:ef7eb2e8f9f7 1973 static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1974 {
<> 144:ef7eb2e8f9f7 1975 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1976
<> 144:ef7eb2e8f9f7 1977 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1978 {
<> 144:ef7eb2e8f9f7 1979 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1980 {
<> 144:ef7eb2e8f9f7 1981 tmp = (uint16_t*) husart->pTxBuffPtr;
AnnaBridge 167:e84263d55307 1982 husart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 1983 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1984 {
<> 144:ef7eb2e8f9f7 1985 husart->pTxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 1986 }
<> 144:ef7eb2e8f9f7 1987 else
<> 144:ef7eb2e8f9f7 1988 {
<> 144:ef7eb2e8f9f7 1989 husart->pTxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 1990 }
<> 144:ef7eb2e8f9f7 1991 }
<> 144:ef7eb2e8f9f7 1992 else
<> 144:ef7eb2e8f9f7 1993 {
AnnaBridge 167:e84263d55307 1994 husart->Instance->DR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 1995 }
<> 144:ef7eb2e8f9f7 1996
<> 144:ef7eb2e8f9f7 1997 if(--husart->TxXferCount == 0U)
<> 144:ef7eb2e8f9f7 1998 {
<> 144:ef7eb2e8f9f7 1999 /* Disable the USART Transmit data register empty Interrupt */
<> 144:ef7eb2e8f9f7 2000 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 2001
<> 144:ef7eb2e8f9f7 2002 /* Enable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 2003 SET_BIT(husart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 2004 }
<> 144:ef7eb2e8f9f7 2005 return HAL_OK;
<> 144:ef7eb2e8f9f7 2006 }
<> 144:ef7eb2e8f9f7 2007 else
<> 144:ef7eb2e8f9f7 2008 {
<> 144:ef7eb2e8f9f7 2009 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 2010 }
<> 144:ef7eb2e8f9f7 2011 }
<> 144:ef7eb2e8f9f7 2012
<> 144:ef7eb2e8f9f7 2013 /**
<> 144:ef7eb2e8f9f7 2014 * @brief Wraps up transmission in non blocking mode.
AnnaBridge 182:a56a73fd2a6f 2015 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 2016 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 2017 * @retval HAL status
<> 144:ef7eb2e8f9f7 2018 */
<> 144:ef7eb2e8f9f7 2019 static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2020 {
<> 144:ef7eb2e8f9f7 2021 /* Disable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 2022 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 2023
<> 144:ef7eb2e8f9f7 2024 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 2025 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 2026
<> 144:ef7eb2e8f9f7 2027 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 2028
<> 144:ef7eb2e8f9f7 2029 HAL_USART_TxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 2030
<> 144:ef7eb2e8f9f7 2031 return HAL_OK;
<> 144:ef7eb2e8f9f7 2032 }
<> 144:ef7eb2e8f9f7 2033
<> 144:ef7eb2e8f9f7 2034 /**
<> 144:ef7eb2e8f9f7 2035 * @brief Simplex Receive an amount of data in non-blocking mode.
AnnaBridge 182:a56a73fd2a6f 2036 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 2037 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 2038 * @retval HAL status
<> 144:ef7eb2e8f9f7 2039 */
<> 144:ef7eb2e8f9f7 2040 static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2041 {
<> 144:ef7eb2e8f9f7 2042 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 2043 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 2044 {
<> 144:ef7eb2e8f9f7 2045 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 2046 {
<> 144:ef7eb2e8f9f7 2047 tmp = (uint16_t*) husart->pRxBuffPtr;
<> 144:ef7eb2e8f9f7 2048 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 2049 {
AnnaBridge 167:e84263d55307 2050 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 2051 husart->pRxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 2052 }
<> 144:ef7eb2e8f9f7 2053 else
<> 144:ef7eb2e8f9f7 2054 {
AnnaBridge 167:e84263d55307 2055 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FF);
<> 144:ef7eb2e8f9f7 2056 husart->pRxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 2057 }
<> 144:ef7eb2e8f9f7 2058 if(--husart->RxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 2059 {
<> 144:ef7eb2e8f9f7 2060 /* Send dummy byte in order to generate the clock for the slave to send the next data */
AnnaBridge 167:e84263d55307 2061 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 2062 }
<> 144:ef7eb2e8f9f7 2063 }
<> 144:ef7eb2e8f9f7 2064 else
<> 144:ef7eb2e8f9f7 2065 {
<> 144:ef7eb2e8f9f7 2066 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 2067 {
AnnaBridge 167:e84263d55307 2068 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 2069 }
<> 144:ef7eb2e8f9f7 2070 else
<> 144:ef7eb2e8f9f7 2071 {
AnnaBridge 167:e84263d55307 2072 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007F);
<> 144:ef7eb2e8f9f7 2073 }
<> 144:ef7eb2e8f9f7 2074
<> 144:ef7eb2e8f9f7 2075 if(--husart->RxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 2076 {
<> 144:ef7eb2e8f9f7 2077 /* Send dummy byte in order to generate the clock for the slave to send the next data */
AnnaBridge 167:e84263d55307 2078 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x00FF);
<> 144:ef7eb2e8f9f7 2079 }
<> 144:ef7eb2e8f9f7 2080 }
<> 144:ef7eb2e8f9f7 2081
<> 144:ef7eb2e8f9f7 2082 if(husart->RxXferCount == 0U)
<> 144:ef7eb2e8f9f7 2083 {
<> 144:ef7eb2e8f9f7 2084 /* Disable the USART RXNE Interrupt */
<> 144:ef7eb2e8f9f7 2085 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 2086
<> 144:ef7eb2e8f9f7 2087 /* Disable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 2088 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 2089
<> 144:ef7eb2e8f9f7 2090 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 2091 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 2092
<> 144:ef7eb2e8f9f7 2093 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 2094 HAL_USART_RxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 2095
<> 144:ef7eb2e8f9f7 2096 return HAL_OK;
<> 144:ef7eb2e8f9f7 2097 }
<> 144:ef7eb2e8f9f7 2098 return HAL_OK;
<> 144:ef7eb2e8f9f7 2099 }
<> 144:ef7eb2e8f9f7 2100 else
<> 144:ef7eb2e8f9f7 2101 {
<> 144:ef7eb2e8f9f7 2102 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 2103 }
<> 144:ef7eb2e8f9f7 2104 }
<> 144:ef7eb2e8f9f7 2105
<> 144:ef7eb2e8f9f7 2106 /**
<> 144:ef7eb2e8f9f7 2107 * @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
AnnaBridge 182:a56a73fd2a6f 2108 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 2109 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 2110 * @retval HAL status
<> 144:ef7eb2e8f9f7 2111 */
<> 144:ef7eb2e8f9f7 2112 static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2113 {
<> 144:ef7eb2e8f9f7 2114 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 2115
<> 144:ef7eb2e8f9f7 2116 if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 2117 {
<> 144:ef7eb2e8f9f7 2118 if(husart->TxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 2119 {
<> 144:ef7eb2e8f9f7 2120 if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET)
<> 144:ef7eb2e8f9f7 2121 {
<> 144:ef7eb2e8f9f7 2122 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 2123 {
<> 144:ef7eb2e8f9f7 2124 tmp = (uint16_t*) husart->pTxBuffPtr;
AnnaBridge 167:e84263d55307 2125 husart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 2126 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 2127 {
<> 144:ef7eb2e8f9f7 2128 husart->pTxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 2129 }
<> 144:ef7eb2e8f9f7 2130 else
<> 144:ef7eb2e8f9f7 2131 {
<> 144:ef7eb2e8f9f7 2132 husart->pTxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 2133 }
<> 144:ef7eb2e8f9f7 2134 }
<> 144:ef7eb2e8f9f7 2135 else
<> 144:ef7eb2e8f9f7 2136 {
AnnaBridge 167:e84263d55307 2137 husart->Instance->DR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 2138 }
<> 144:ef7eb2e8f9f7 2139 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 2140
<> 144:ef7eb2e8f9f7 2141 /* Check the latest data transmitted */
<> 144:ef7eb2e8f9f7 2142 if(husart->TxXferCount == 0U)
<> 144:ef7eb2e8f9f7 2143 {
<> 144:ef7eb2e8f9f7 2144 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 2145 }
<> 144:ef7eb2e8f9f7 2146 }
<> 144:ef7eb2e8f9f7 2147 }
<> 144:ef7eb2e8f9f7 2148
<> 144:ef7eb2e8f9f7 2149 if(husart->RxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 2150 {
<> 144:ef7eb2e8f9f7 2151 if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET)
<> 144:ef7eb2e8f9f7 2152 {
<> 144:ef7eb2e8f9f7 2153 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 2154 {
<> 144:ef7eb2e8f9f7 2155 tmp = (uint16_t*) husart->pRxBuffPtr;
<> 144:ef7eb2e8f9f7 2156 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 2157 {
AnnaBridge 167:e84263d55307 2158 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 2159 husart->pRxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 2160 }
<> 144:ef7eb2e8f9f7 2161 else
<> 144:ef7eb2e8f9f7 2162 {
AnnaBridge 167:e84263d55307 2163 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FF);
<> 144:ef7eb2e8f9f7 2164 husart->pRxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 2165 }
<> 144:ef7eb2e8f9f7 2166 }
<> 144:ef7eb2e8f9f7 2167 else
<> 144:ef7eb2e8f9f7 2168 {
<> 144:ef7eb2e8f9f7 2169 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 2170 {
AnnaBridge 167:e84263d55307 2171 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 2172 }
<> 144:ef7eb2e8f9f7 2173 else
<> 144:ef7eb2e8f9f7 2174 {
AnnaBridge 167:e84263d55307 2175 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007F);
<> 144:ef7eb2e8f9f7 2176 }
<> 144:ef7eb2e8f9f7 2177 }
<> 144:ef7eb2e8f9f7 2178 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 2179 }
<> 144:ef7eb2e8f9f7 2180 }
<> 144:ef7eb2e8f9f7 2181
<> 144:ef7eb2e8f9f7 2182 /* Check the latest data received */
<> 144:ef7eb2e8f9f7 2183 if(husart->RxXferCount == 0U)
<> 144:ef7eb2e8f9f7 2184 {
<> 144:ef7eb2e8f9f7 2185 /* Disable the USART RXNE Interrupt */
<> 144:ef7eb2e8f9f7 2186 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 2187
<> 144:ef7eb2e8f9f7 2188 /* Disable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 2189 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 2190
<> 144:ef7eb2e8f9f7 2191 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 2192 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 2193
<> 144:ef7eb2e8f9f7 2194 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 2195
<> 144:ef7eb2e8f9f7 2196 HAL_USART_TxRxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 2197
<> 144:ef7eb2e8f9f7 2198 return HAL_OK;
<> 144:ef7eb2e8f9f7 2199 }
<> 144:ef7eb2e8f9f7 2200
<> 144:ef7eb2e8f9f7 2201 return HAL_OK;
<> 144:ef7eb2e8f9f7 2202 }
<> 144:ef7eb2e8f9f7 2203 else
<> 144:ef7eb2e8f9f7 2204 {
<> 144:ef7eb2e8f9f7 2205 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 2206 }
<> 144:ef7eb2e8f9f7 2207 }
<> 144:ef7eb2e8f9f7 2208
<> 144:ef7eb2e8f9f7 2209 /**
<> 144:ef7eb2e8f9f7 2210 * @brief Configures the USART pferipheral.
AnnaBridge 182:a56a73fd2a6f 2211 * @param husart pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 2212 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 2213 * @retval None
<> 144:ef7eb2e8f9f7 2214 */
<> 144:ef7eb2e8f9f7 2215 static void USART_SetConfig(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2216 {
<> 144:ef7eb2e8f9f7 2217 uint32_t tmpreg = 0x00U;
<> 144:ef7eb2e8f9f7 2218
<> 144:ef7eb2e8f9f7 2219 /* Check the parameters */
<> 144:ef7eb2e8f9f7 2220 assert_param(IS_USART_INSTANCE(husart->Instance));
<> 144:ef7eb2e8f9f7 2221 assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
<> 144:ef7eb2e8f9f7 2222 assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
<> 144:ef7eb2e8f9f7 2223 assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
<> 144:ef7eb2e8f9f7 2224 assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 2225 assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
<> 144:ef7eb2e8f9f7 2226 assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
<> 144:ef7eb2e8f9f7 2227 assert_param(IS_USART_PARITY(husart->Init.Parity));
<> 144:ef7eb2e8f9f7 2228 assert_param(IS_USART_MODE(husart->Init.Mode));
<> 144:ef7eb2e8f9f7 2229
<> 144:ef7eb2e8f9f7 2230 /* The LBCL, CPOL and CPHA bits have to be selected when both the transmitter and the
<> 144:ef7eb2e8f9f7 2231 receiver are disabled (TE=RE=0) to ensure that the clock pulses function correctly. */
<> 144:ef7eb2e8f9f7 2232 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
<> 144:ef7eb2e8f9f7 2233
<> 144:ef7eb2e8f9f7 2234 /*---------------------------- USART CR2 Configuration ---------------------*/
<> 144:ef7eb2e8f9f7 2235 tmpreg = husart->Instance->CR2;
<> 144:ef7eb2e8f9f7 2236 /* Clear CLKEN, CPOL, CPHA and LBCL bits */
<> 144:ef7eb2e8f9f7 2237 tmpreg &= (uint32_t)~((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP));
<> 144:ef7eb2e8f9f7 2238 /* Configure the USART Clock, CPOL, CPHA and LastBit -----------------------*/
<> 144:ef7eb2e8f9f7 2239 /* Set CPOL bit according to husart->Init.CLKPolarity value */
<> 144:ef7eb2e8f9f7 2240 /* Set CPHA bit according to husart->Init.CLKPhase value */
<> 144:ef7eb2e8f9f7 2241 /* Set LBCL bit according to husart->Init.CLKLastBit value */
<> 144:ef7eb2e8f9f7 2242 /* Set Stop Bits: Set STOP[13:12] bits according to husart->Init.StopBits value */
<> 144:ef7eb2e8f9f7 2243 tmpreg |= (uint32_t)(USART_CLOCK_ENABLE| husart->Init.CLKPolarity |
<> 144:ef7eb2e8f9f7 2244 husart->Init.CLKPhase| husart->Init.CLKLastBit | husart->Init.StopBits);
<> 144:ef7eb2e8f9f7 2245 /* Write to USART CR2 */
<> 144:ef7eb2e8f9f7 2246 WRITE_REG(husart->Instance->CR2, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 2247
<> 144:ef7eb2e8f9f7 2248 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 2249 tmpreg = husart->Instance->CR1;
<> 144:ef7eb2e8f9f7 2250
<> 144:ef7eb2e8f9f7 2251 /* Clear M, PCE, PS, TE, RE and OVER8 bits */
<> 144:ef7eb2e8f9f7 2252 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | \
<> 144:ef7eb2e8f9f7 2253 USART_CR1_RE | USART_CR1_OVER8));
<> 144:ef7eb2e8f9f7 2254
<> 144:ef7eb2e8f9f7 2255 /* Configure the USART Word Length, Parity and mode:
<> 144:ef7eb2e8f9f7 2256 Set the M bits according to husart->Init.WordLength value
<> 144:ef7eb2e8f9f7 2257 Set PCE and PS bits according to husart->Init.Parity value
<> 144:ef7eb2e8f9f7 2258 Set TE and RE bits according to husart->Init.Mode value
<> 144:ef7eb2e8f9f7 2259 Force OVER8 bit to 1 in order to reach the max USART frequencies */
<> 144:ef7eb2e8f9f7 2260 tmpreg |= (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8;
<> 144:ef7eb2e8f9f7 2261
<> 144:ef7eb2e8f9f7 2262 /* Write to USART CR1 */
<> 144:ef7eb2e8f9f7 2263 WRITE_REG(husart->Instance->CR1, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 2264
<> 144:ef7eb2e8f9f7 2265 /*-------------------------- USART CR3 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 2266 /* Clear CTSE and RTSE bits */
<> 144:ef7eb2e8f9f7 2267 CLEAR_BIT(husart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE));
<> 144:ef7eb2e8f9f7 2268
<> 144:ef7eb2e8f9f7 2269 /*-------------------------- USART BRR Configuration -----------------------*/
AnnaBridge 167:e84263d55307 2270 #if defined(USART6)
<> 144:ef7eb2e8f9f7 2271 if((husart->Instance == USART1) || (husart->Instance == USART6))
<> 144:ef7eb2e8f9f7 2272 {
<> 144:ef7eb2e8f9f7 2273 husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 2274 }
AnnaBridge 167:e84263d55307 2275 #else
AnnaBridge 167:e84263d55307 2276 if(husart->Instance == USART1)
AnnaBridge 167:e84263d55307 2277 {
AnnaBridge 167:e84263d55307 2278 husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate);
AnnaBridge 167:e84263d55307 2279 }
AnnaBridge 167:e84263d55307 2280 #endif /* USART6 */
<> 144:ef7eb2e8f9f7 2281 else
<> 144:ef7eb2e8f9f7 2282 {
<> 144:ef7eb2e8f9f7 2283 husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK1Freq(), husart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 2284 }
<> 144:ef7eb2e8f9f7 2285 }
<> 144:ef7eb2e8f9f7 2286
<> 144:ef7eb2e8f9f7 2287 /**
<> 144:ef7eb2e8f9f7 2288 * @}
<> 144:ef7eb2e8f9f7 2289 */
<> 144:ef7eb2e8f9f7 2290
<> 144:ef7eb2e8f9f7 2291 #endif /* HAL_USART_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 2292 /**
<> 144:ef7eb2e8f9f7 2293 * @}
<> 144:ef7eb2e8f9f7 2294 */
<> 144:ef7eb2e8f9f7 2295
<> 144:ef7eb2e8f9f7 2296 /**
<> 144:ef7eb2e8f9f7 2297 * @}
<> 144:ef7eb2e8f9f7 2298 */
<> 144:ef7eb2e8f9f7 2299
<> 144:ef7eb2e8f9f7 2300 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/