mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_pwr_ex.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_pwr_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Extended PWR HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the Power Controller (PWR) peripheral:
<> 144:ef7eb2e8f9f7 8 * + Extended Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 9 * + Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 ******************************************************************************
<> 144:ef7eb2e8f9f7 12 * @attention
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 17 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 18 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 19 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 20 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 21 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 22 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 23 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 24 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 25 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 28 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 30 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 34 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 35 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 37 *
<> 144:ef7eb2e8f9f7 38 ******************************************************************************
<> 144:ef7eb2e8f9f7 39 */
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 42 #include "stm32f0xx_hal.h"
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 45 * @{
<> 144:ef7eb2e8f9f7 46 */
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /** @defgroup PWREx PWREx
<> 144:ef7eb2e8f9f7 49 * @brief PWREx HAL module driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 #ifdef HAL_PWR_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 56 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 57 /** @defgroup PWREx_Private_Constants PWREx Private Constants
<> 144:ef7eb2e8f9f7 58 * @{
<> 144:ef7eb2e8f9f7 59 */
<> 156:95d6b41a828b 60 #define PVD_MODE_IT (0x00010000U)
<> 156:95d6b41a828b 61 #define PVD_MODE_EVT (0x00020000U)
<> 156:95d6b41a828b 62 #define PVD_RISING_EDGE (0x00000001U)
<> 156:95d6b41a828b 63 #define PVD_FALLING_EDGE (0x00000002U)
<> 144:ef7eb2e8f9f7 64 /**
<> 144:ef7eb2e8f9f7 65 * @}
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 69 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 70 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 71 /* Exported functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
<> 144:ef7eb2e8f9f7 74 * @{
<> 144:ef7eb2e8f9f7 75 */
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions
<> 144:ef7eb2e8f9f7 78 * @brief Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 79 *
<> 144:ef7eb2e8f9f7 80 @verbatim
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 ===============================================================================
<> 144:ef7eb2e8f9f7 83 ##### Peripheral extended control functions #####
<> 144:ef7eb2e8f9f7 84 ===============================================================================
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 *** PVD configuration ***
<> 144:ef7eb2e8f9f7 87 =========================
<> 144:ef7eb2e8f9f7 88 [..]
<> 144:ef7eb2e8f9f7 89 (+) The PVD is used to monitor the VDD power supply by comparing it to a
<> 144:ef7eb2e8f9f7 90 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
<> 144:ef7eb2e8f9f7 91 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
<> 144:ef7eb2e8f9f7 92 than the PVD threshold. This event is internally connected to the EXTI
<> 144:ef7eb2e8f9f7 93 line16 and can generate an interrupt if enabled. This is done through
<> 144:ef7eb2e8f9f7 94 HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions.
<> 144:ef7eb2e8f9f7 95 (+) The PVD is stopped in Standby mode.
<> 144:ef7eb2e8f9f7 96 -@- PVD is not available on STM32F030x4/x6/x8
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 *** VDDIO2 Monitor Configuration ***
<> 144:ef7eb2e8f9f7 99 ====================================
<> 144:ef7eb2e8f9f7 100 [..]
<> 144:ef7eb2e8f9f7 101 (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it
<> 144:ef7eb2e8f9f7 102 to VREFInt Voltage
<> 144:ef7eb2e8f9f7 103 (+) This monitor is internally connected to the EXTI line31
<> 144:ef7eb2e8f9f7 104 and can generate an interrupt if enabled. This is done through
<> 144:ef7eb2e8f9f7 105 HAL_PWREx_EnableVddio2Monitor() function.
<> 144:ef7eb2e8f9f7 106 -@- VDDIO2 is available on STM32F07x/09x/04x
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 @endverbatim
<> 144:ef7eb2e8f9f7 109 * @{
<> 144:ef7eb2e8f9f7 110 */
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 #if defined (STM32F031x6) || defined (STM32F051x8) || \
<> 144:ef7eb2e8f9f7 113 defined (STM32F071xB) || defined (STM32F091xC) || \
<> 144:ef7eb2e8f9f7 114 defined (STM32F042x6) || defined (STM32F072xB)
<> 144:ef7eb2e8f9f7 115 /**
<> 144:ef7eb2e8f9f7 116 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
Anna Bridge 180:96ed750bd169 117 * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
<> 144:ef7eb2e8f9f7 118 * information for the PVD.
<> 144:ef7eb2e8f9f7 119 * @note Refer to the electrical characteristics of your device datasheet for
<> 144:ef7eb2e8f9f7 120 * more details about the voltage threshold corresponding to each
<> 144:ef7eb2e8f9f7 121 * detection level.
<> 144:ef7eb2e8f9f7 122 * @retval None
<> 144:ef7eb2e8f9f7 123 */
<> 144:ef7eb2e8f9f7 124 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
<> 144:ef7eb2e8f9f7 125 {
<> 144:ef7eb2e8f9f7 126 /* Check the parameters */
<> 144:ef7eb2e8f9f7 127 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
<> 144:ef7eb2e8f9f7 128 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /* Set PLS[7:5] bits according to PVDLevel value */
<> 144:ef7eb2e8f9f7 131 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
<> 144:ef7eb2e8f9f7 134 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
<> 144:ef7eb2e8f9f7 135 __HAL_PWR_PVD_EXTI_DISABLE_IT();
<> 144:ef7eb2e8f9f7 136 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /* Configure interrupt mode */
<> 144:ef7eb2e8f9f7 139 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
<> 144:ef7eb2e8f9f7 140 {
<> 144:ef7eb2e8f9f7 141 __HAL_PWR_PVD_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 142 }
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 /* Configure event mode */
<> 144:ef7eb2e8f9f7 145 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
<> 144:ef7eb2e8f9f7 146 {
<> 144:ef7eb2e8f9f7 147 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
<> 144:ef7eb2e8f9f7 148 }
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /* Configure the edge */
<> 144:ef7eb2e8f9f7 151 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
<> 144:ef7eb2e8f9f7 152 {
<> 144:ef7eb2e8f9f7 153 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
<> 144:ef7eb2e8f9f7 154 }
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
<> 144:ef7eb2e8f9f7 157 {
<> 144:ef7eb2e8f9f7 158 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
<> 144:ef7eb2e8f9f7 159 }
<> 144:ef7eb2e8f9f7 160 }
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /**
<> 144:ef7eb2e8f9f7 163 * @brief Enables the Power Voltage Detector(PVD).
<> 144:ef7eb2e8f9f7 164 * @retval None
<> 144:ef7eb2e8f9f7 165 */
<> 144:ef7eb2e8f9f7 166 void HAL_PWR_EnablePVD(void)
<> 144:ef7eb2e8f9f7 167 {
<> 144:ef7eb2e8f9f7 168 PWR->CR |= (uint32_t)PWR_CR_PVDE;
<> 144:ef7eb2e8f9f7 169 }
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 /**
<> 144:ef7eb2e8f9f7 172 * @brief Disables the Power Voltage Detector(PVD).
<> 144:ef7eb2e8f9f7 173 * @retval None
<> 144:ef7eb2e8f9f7 174 */
<> 144:ef7eb2e8f9f7 175 void HAL_PWR_DisablePVD(void)
<> 144:ef7eb2e8f9f7 176 {
<> 144:ef7eb2e8f9f7 177 PWR->CR &= ~((uint32_t)PWR_CR_PVDE);
<> 144:ef7eb2e8f9f7 178 }
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /**
<> 144:ef7eb2e8f9f7 181 * @brief This function handles the PWR PVD interrupt request.
<> 144:ef7eb2e8f9f7 182 * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler().
<> 144:ef7eb2e8f9f7 183 * @retval None
<> 144:ef7eb2e8f9f7 184 */
<> 144:ef7eb2e8f9f7 185 void HAL_PWR_PVD_IRQHandler(void)
<> 144:ef7eb2e8f9f7 186 {
<> 144:ef7eb2e8f9f7 187 /* Check PWR exti flag */
<> 144:ef7eb2e8f9f7 188 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
<> 144:ef7eb2e8f9f7 189 {
<> 144:ef7eb2e8f9f7 190 /* PWR PVD interrupt user callback */
<> 144:ef7eb2e8f9f7 191 HAL_PWR_PVDCallback();
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 /* Clear PWR Exti pending bit */
<> 144:ef7eb2e8f9f7 194 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 195 }
<> 144:ef7eb2e8f9f7 196 }
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /**
<> 144:ef7eb2e8f9f7 199 * @brief PWR PVD interrupt callback
<> 144:ef7eb2e8f9f7 200 * @retval None
<> 144:ef7eb2e8f9f7 201 */
<> 144:ef7eb2e8f9f7 202 __weak void HAL_PWR_PVDCallback(void)
<> 144:ef7eb2e8f9f7 203 {
<> 144:ef7eb2e8f9f7 204 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 205 the HAL_PWR_PVDCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 206 */
<> 144:ef7eb2e8f9f7 207 }
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */
<> 144:ef7eb2e8f9f7 210 /* defined (STM32F071xB) || defined (STM32F091xC) || */
<> 144:ef7eb2e8f9f7 211 /* defined (STM32F042x6) || defined (STM32F072xB) */
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 #if defined (STM32F042x6) || defined (STM32F048xx) || \
<> 144:ef7eb2e8f9f7 214 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
<> 144:ef7eb2e8f9f7 215 defined (STM32F091xC) || defined (STM32F098xx)
<> 144:ef7eb2e8f9f7 216 /**
<> 144:ef7eb2e8f9f7 217 * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection.
<> 144:ef7eb2e8f9f7 218 * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint,
<> 144:ef7eb2e8f9f7 219 an interrupt is generated Irq line 1.
<> 144:ef7eb2e8f9f7 220 NVIS has to be enable by user.
<> 144:ef7eb2e8f9f7 221 * @retval None
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223 void HAL_PWREx_EnableVddio2Monitor(void)
<> 144:ef7eb2e8f9f7 224 {
<> 144:ef7eb2e8f9f7 225 __HAL_PWR_VDDIO2_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 226 __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE();
<> 144:ef7eb2e8f9f7 227 }
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /**
<> 144:ef7eb2e8f9f7 230 * @brief Disable the Vddio2 Monitor.
<> 144:ef7eb2e8f9f7 231 * @retval None
<> 144:ef7eb2e8f9f7 232 */
<> 144:ef7eb2e8f9f7 233 void HAL_PWREx_DisableVddio2Monitor(void)
<> 144:ef7eb2e8f9f7 234 {
<> 144:ef7eb2e8f9f7 235 __HAL_PWR_VDDIO2_EXTI_DISABLE_IT();
<> 144:ef7eb2e8f9f7 236 __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE();
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 }
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 /**
<> 144:ef7eb2e8f9f7 241 * @brief This function handles the PWR Vddio2 monitor interrupt request.
<> 144:ef7eb2e8f9f7 242 * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler().
<> 144:ef7eb2e8f9f7 243 * @retval None
<> 144:ef7eb2e8f9f7 244 */
<> 144:ef7eb2e8f9f7 245 void HAL_PWREx_Vddio2Monitor_IRQHandler(void)
<> 144:ef7eb2e8f9f7 246 {
<> 144:ef7eb2e8f9f7 247 /* Check PWR exti flag */
<> 144:ef7eb2e8f9f7 248 if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET)
<> 144:ef7eb2e8f9f7 249 {
<> 144:ef7eb2e8f9f7 250 /* PWR Vddio2 monitor interrupt user callback */
<> 144:ef7eb2e8f9f7 251 HAL_PWREx_Vddio2MonitorCallback();
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /* Clear PWR Exti pending bit */
<> 144:ef7eb2e8f9f7 254 __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 255 }
<> 144:ef7eb2e8f9f7 256 }
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 /**
<> 144:ef7eb2e8f9f7 259 * @brief PWR Vddio2 Monitor interrupt callback
<> 144:ef7eb2e8f9f7 260 * @retval None
<> 144:ef7eb2e8f9f7 261 */
<> 144:ef7eb2e8f9f7 262 __weak void HAL_PWREx_Vddio2MonitorCallback(void)
<> 144:ef7eb2e8f9f7 263 {
<> 144:ef7eb2e8f9f7 264 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 265 the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267 }
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
<> 144:ef7eb2e8f9f7 270 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
<> 144:ef7eb2e8f9f7 271 defined (STM32F091xC) || defined (STM32F098xx) */
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 /**
<> 144:ef7eb2e8f9f7 274 * @}
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /**
<> 144:ef7eb2e8f9f7 278 * @}
<> 144:ef7eb2e8f9f7 279 */
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 #endif /* HAL_PWR_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 282 /**
<> 144:ef7eb2e8f9f7 283 * @}
<> 144:ef7eb2e8f9f7 284 */
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /**
<> 144:ef7eb2e8f9f7 287 * @}
<> 144:ef7eb2e8f9f7 288 */
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/