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targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/drivers/spi_pl022_drv.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 184:08ed48f1de7f 1 /*
AnnaBridge 184:08ed48f1de7f 2 * Copyright (c) 2018 ARM Limited
AnnaBridge 184:08ed48f1de7f 3 *
AnnaBridge 184:08ed48f1de7f 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 184:08ed48f1de7f 5 * you may not use this file except in compliance with the License.
AnnaBridge 184:08ed48f1de7f 6 * You may obtain a copy of the License at
AnnaBridge 184:08ed48f1de7f 7 *
AnnaBridge 184:08ed48f1de7f 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 184:08ed48f1de7f 9 *
AnnaBridge 184:08ed48f1de7f 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 184:08ed48f1de7f 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 184:08ed48f1de7f 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 184:08ed48f1de7f 13 * See the License for the specific language governing permissions and
AnnaBridge 184:08ed48f1de7f 14 * limitations under the License.
AnnaBridge 184:08ed48f1de7f 15 */
AnnaBridge 184:08ed48f1de7f 16
AnnaBridge 184:08ed48f1de7f 17 /**
AnnaBridge 184:08ed48f1de7f 18 * \file spi_pl022_drv.h
AnnaBridge 184:08ed48f1de7f 19 * \brief Generic driver for ARM SPI PL022.
AnnaBridge 184:08ed48f1de7f 20 */
AnnaBridge 184:08ed48f1de7f 21
AnnaBridge 184:08ed48f1de7f 22 #ifndef __SPI_PL022_DRV_H__
AnnaBridge 184:08ed48f1de7f 23 #define __SPI_PL022_DRV_H__
AnnaBridge 184:08ed48f1de7f 24
AnnaBridge 184:08ed48f1de7f 25 #include <stdint.h>
AnnaBridge 184:08ed48f1de7f 26 #include <string.h>
AnnaBridge 184:08ed48f1de7f 27
AnnaBridge 184:08ed48f1de7f 28 #ifdef __cplusplus
AnnaBridge 184:08ed48f1de7f 29 extern "C" {
AnnaBridge 184:08ed48f1de7f 30 #endif
AnnaBridge 184:08ed48f1de7f 31
AnnaBridge 184:08ed48f1de7f 32 /* Frame format */
AnnaBridge 184:08ed48f1de7f 33 #define SPI_PL022_CFG_FRF_MOT 0
AnnaBridge 184:08ed48f1de7f 34 #define SPI_PL022_CFG_FRF_TI 1
AnnaBridge 184:08ed48f1de7f 35 #define SPI_PL022_CFG_FRF_MICROWIRE 2
AnnaBridge 184:08ed48f1de7f 36
AnnaBridge 184:08ed48f1de7f 37 enum spi_pl022_mode_select_t {
AnnaBridge 184:08ed48f1de7f 38 SPI_PL022_MASTER_SELECT = 0,
AnnaBridge 184:08ed48f1de7f 39 SPI_PL022_SLAVE_SELECT,
AnnaBridge 184:08ed48f1de7f 40 };
AnnaBridge 184:08ed48f1de7f 41
AnnaBridge 184:08ed48f1de7f 42 enum spi_pl022_slave_output_mode_t {
AnnaBridge 184:08ed48f1de7f 43 SPI_PL022_SLAVE_OUTPUT_EN = 0,
AnnaBridge 184:08ed48f1de7f 44 SPI_PL022_SLAVE_OUTPUT_DIS,
AnnaBridge 184:08ed48f1de7f 45 };
AnnaBridge 184:08ed48f1de7f 46
AnnaBridge 184:08ed48f1de7f 47 enum spi_pl022_loopback_select_t {
AnnaBridge 184:08ed48f1de7f 48 SPI_PL022_LOOPBACK_MODE_DIS = 0,
AnnaBridge 184:08ed48f1de7f 49 SPI_PL022_LOOPBACK_MODE_EN,
AnnaBridge 184:08ed48f1de7f 50 };
AnnaBridge 184:08ed48f1de7f 51
AnnaBridge 184:08ed48f1de7f 52 struct spi_pl022_periphid_t {
AnnaBridge 184:08ed48f1de7f 53 uint32_t partNumber;
AnnaBridge 184:08ed48f1de7f 54 uint32_t designerID;
AnnaBridge 184:08ed48f1de7f 55 uint32_t revision;
AnnaBridge 184:08ed48f1de7f 56 uint32_t configuration;
AnnaBridge 184:08ed48f1de7f 57 };
AnnaBridge 184:08ed48f1de7f 58
AnnaBridge 184:08ed48f1de7f 59 struct spi_pl022_primecell_id_t {
AnnaBridge 184:08ed48f1de7f 60 uint8_t cellid0;
AnnaBridge 184:08ed48f1de7f 61 uint8_t cellid1;
AnnaBridge 184:08ed48f1de7f 62 uint8_t cellid2;
AnnaBridge 184:08ed48f1de7f 63 uint8_t cellid3;
AnnaBridge 184:08ed48f1de7f 64 };
AnnaBridge 184:08ed48f1de7f 65
AnnaBridge 184:08ed48f1de7f 66 /* ARM SPI PL022 device control configuration structure */
AnnaBridge 184:08ed48f1de7f 67 struct spi_pl022_ctrl_cfg_t {
AnnaBridge 184:08ed48f1de7f 68 enum spi_pl022_mode_select_t spi_mode; /*!< master-slave */
AnnaBridge 184:08ed48f1de7f 69 uint8_t frame_format; /*!< frame format bitmap
AnnaBridge 184:08ed48f1de7f 70 clock phase [7] polarity [6]
AnnaBridge 184:08ed48f1de7f 71 reserved [5:3]
AnnaBridge 184:08ed48f1de7f 72 frame_format [1:0] */
AnnaBridge 184:08ed48f1de7f 73 uint8_t word_size; /*!< value 4 to 16 */
AnnaBridge 184:08ed48f1de7f 74 uint8_t reserved[2]; /*!< to keep 32 bits aligned */
AnnaBridge 184:08ed48f1de7f 75 uint32_t bit_rate; /*!< required bit rate */
AnnaBridge 184:08ed48f1de7f 76 };
AnnaBridge 184:08ed48f1de7f 77
AnnaBridge 184:08ed48f1de7f 78 /* ARM SPI PL022 device configuration structure */
AnnaBridge 184:08ed48f1de7f 79 struct spi_pl022_dev_cfg_t {
AnnaBridge 184:08ed48f1de7f 80 const uint32_t base; /*!< SPI PL022 base address */
AnnaBridge 184:08ed48f1de7f 81 const struct spi_pl022_ctrl_cfg_t default_ctrl_cfg; /*!< Default SPI
AnnaBridge 184:08ed48f1de7f 82 configuration */
AnnaBridge 184:08ed48f1de7f 83 };
AnnaBridge 184:08ed48f1de7f 84
AnnaBridge 184:08ed48f1de7f 85 /* ARM SPI PL022 device data structure */
AnnaBridge 184:08ed48f1de7f 86 struct spi_pl022_dev_data_t {
AnnaBridge 184:08ed48f1de7f 87 uint32_t state; /*!< SPI driver state */
AnnaBridge 184:08ed48f1de7f 88 uint32_t sys_clk; /*!< System clock frequency */
AnnaBridge 184:08ed48f1de7f 89 struct spi_pl022_ctrl_cfg_t ctrl_cfg; /*!< SPI control
AnnaBridge 184:08ed48f1de7f 90 configuration data */
AnnaBridge 184:08ed48f1de7f 91 };
AnnaBridge 184:08ed48f1de7f 92
AnnaBridge 184:08ed48f1de7f 93 /* ARM SPI PL022 device structure */
AnnaBridge 184:08ed48f1de7f 94 struct spi_pl022_dev_t {
AnnaBridge 184:08ed48f1de7f 95 const struct spi_pl022_dev_cfg_t* const cfg; /*!< SPI driver
AnnaBridge 184:08ed48f1de7f 96 configuration */
AnnaBridge 184:08ed48f1de7f 97 struct spi_pl022_dev_data_t* const data; /*!< SPI driver data */
AnnaBridge 184:08ed48f1de7f 98 };
AnnaBridge 184:08ed48f1de7f 99
AnnaBridge 184:08ed48f1de7f 100 enum spi_pl022_error_t {
AnnaBridge 184:08ed48f1de7f 101 SPI_PL022_ERR_NONE = 0, /*!< No error */
AnnaBridge 184:08ed48f1de7f 102 SPI_PL022_ERR_INVALID_ARGS, /*!< Invalid input arguments */
AnnaBridge 184:08ed48f1de7f 103 SPI_PL022_ERR_NOT_INIT, /*!< SPI driver is not initialized */
AnnaBridge 184:08ed48f1de7f 104 SPI_PL022_ERR_NO_TX, /*!< SPI transm FIFO full */
AnnaBridge 184:08ed48f1de7f 105 SPI_PL022_ERR_NO_RX, /*!< SPI receive FIFO empty */
AnnaBridge 184:08ed48f1de7f 106 SPI_PL022_ERR_BAD_CONFIG, /*!< Bad SPI configuration */
AnnaBridge 184:08ed48f1de7f 107 };
AnnaBridge 184:08ed48f1de7f 108
AnnaBridge 184:08ed48f1de7f 109
AnnaBridge 184:08ed48f1de7f 110 /* Interrupt mask defines for the interrupt APIs */
AnnaBridge 184:08ed48f1de7f 111
AnnaBridge 184:08ed48f1de7f 112 /* Receive Overrun Interrupt */
AnnaBridge 184:08ed48f1de7f 113 #define SPI_PL022_RX_OR_INTR_POS 0
AnnaBridge 184:08ed48f1de7f 114 #define SPI_PL022_RX_OR_INTR_MSK (0x1ul<<SPI_PL022_RX_OR_INTR_POS)
AnnaBridge 184:08ed48f1de7f 115
AnnaBridge 184:08ed48f1de7f 116 /* Receive Timeout Interrupt */
AnnaBridge 184:08ed48f1de7f 117 #define SPI_PL022_RX_TO_INTR_POS 1
AnnaBridge 184:08ed48f1de7f 118 #define SPI_PL022_RX_TO_INTR_MSK (0x1ul<<SPI_PL022_RX_TO_INTR_POS)
AnnaBridge 184:08ed48f1de7f 119
AnnaBridge 184:08ed48f1de7f 120 /* Receive FIFO Interrupt */
AnnaBridge 184:08ed48f1de7f 121 #define SPI_PL022_RX_FIFO_INTR_POS 2
AnnaBridge 184:08ed48f1de7f 122 #define SPI_PL022_RX_FIFO_INTR_MSK (0x1ul<<SPI_PL022_RX_FIFO_INTR_POS)
AnnaBridge 184:08ed48f1de7f 123
AnnaBridge 184:08ed48f1de7f 124 /* Transmit FIFO Interrupt */
AnnaBridge 184:08ed48f1de7f 125 #define SPI_PL022_TX_FIFO_INTR_POS 3
AnnaBridge 184:08ed48f1de7f 126 #define SPI_PL022_TX_FIFO_INTR_MSK (0x1ul<<SPI_PL022_TX_FIFO_INTR_POS)
AnnaBridge 184:08ed48f1de7f 127
AnnaBridge 184:08ed48f1de7f 128 #define SPI_PL022_ALL_INTR_MSK \
AnnaBridge 184:08ed48f1de7f 129 ((0x1ul<<(SPI_PL022_TX_FIFO_INTR_POS+1))-1)
AnnaBridge 184:08ed48f1de7f 130
AnnaBridge 184:08ed48f1de7f 131 /* Status register bit defines */
AnnaBridge 184:08ed48f1de7f 132
AnnaBridge 184:08ed48f1de7f 133 /* Transmit FIFO empty */
AnnaBridge 184:08ed48f1de7f 134 #define SPI_PL022_SSPSR_TFE_POS 0
AnnaBridge 184:08ed48f1de7f 135 #define SPI_PL022_SSPSR_TFE_MSK (0x1ul<<SPI_PL022_SSPSR_TFE_POS)
AnnaBridge 184:08ed48f1de7f 136
AnnaBridge 184:08ed48f1de7f 137 /* Transmit FIFO not full */
AnnaBridge 184:08ed48f1de7f 138 #define SPI_PL022_SSPSR_TNF_POS 1
AnnaBridge 184:08ed48f1de7f 139 #define SPI_PL022_SSPSR_TNF_MSK (0x1ul<<SPI_PL022_SSPSR_TNF_POS)
AnnaBridge 184:08ed48f1de7f 140
AnnaBridge 184:08ed48f1de7f 141 /* Receive FIFO not empty */
AnnaBridge 184:08ed48f1de7f 142 #define SPI_PL022_SSPSR_RNE_POS 2
AnnaBridge 184:08ed48f1de7f 143 #define SPI_PL022_SSPSR_RNE_MSK (0x1ul<<SPI_PL022_SSPSR_RNE_POS)
AnnaBridge 184:08ed48f1de7f 144
AnnaBridge 184:08ed48f1de7f 145 /* Receive FIFO full */
AnnaBridge 184:08ed48f1de7f 146 #define SPI_PL022_SSPSR_RFF_POS 3
AnnaBridge 184:08ed48f1de7f 147 #define SPI_PL022_SSPSR_RFF_MSK (0x1ul<<SPI_PL022_SSPSR_RFF_POS)
AnnaBridge 184:08ed48f1de7f 148
AnnaBridge 184:08ed48f1de7f 149 /* Busy either tx/rx or transmit fifo not empty */
AnnaBridge 184:08ed48f1de7f 150 #define SPI_PL022_SSPSR_BSY_POS 4
AnnaBridge 184:08ed48f1de7f 151 #define SPI_PL022_SSPSR_BSY_MSK (0x1ul<<SPI_PL022_SSPSR_BSY_POS)
AnnaBridge 184:08ed48f1de7f 152
AnnaBridge 184:08ed48f1de7f 153 /**
AnnaBridge 184:08ed48f1de7f 154 * \brief Enables PL022 SPI device
AnnaBridge 184:08ed48f1de7f 155 *
AnnaBridge 184:08ed48f1de7f 156 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 157 *
AnnaBridge 184:08ed48f1de7f 158 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 159 */
AnnaBridge 184:08ed48f1de7f 160 void spi_pl022_dev_enable(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 161
AnnaBridge 184:08ed48f1de7f 162 /**
AnnaBridge 184:08ed48f1de7f 163 * \brief Disables PL022 SPI device
AnnaBridge 184:08ed48f1de7f 164 *
AnnaBridge 184:08ed48f1de7f 165 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 166 *
AnnaBridge 184:08ed48f1de7f 167 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 168 */
AnnaBridge 184:08ed48f1de7f 169 void spi_pl022_dev_disable(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 170
AnnaBridge 184:08ed48f1de7f 171 /**
AnnaBridge 184:08ed48f1de7f 172 * \brief Returns SPI status register
AnnaBridge 184:08ed48f1de7f 173 *
AnnaBridge 184:08ed48f1de7f 174 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 175 *
AnnaBridge 184:08ed48f1de7f 176 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 177 */
AnnaBridge 184:08ed48f1de7f 178 uint32_t spi_pl022_get_status(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 179
AnnaBridge 184:08ed48f1de7f 180 /**
AnnaBridge 184:08ed48f1de7f 181 * \brief Initializes the SPI PL022 device.
AnnaBridge 184:08ed48f1de7f 182 *
AnnaBridge 184:08ed48f1de7f 183 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 184 * \param[in] sys_clk System clock.
AnnaBridge 184:08ed48f1de7f 185 *
AnnaBridge 184:08ed48f1de7f 186 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 184:08ed48f1de7f 187 *
AnnaBridge 184:08ed48f1de7f 188 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 189 */
AnnaBridge 184:08ed48f1de7f 190 enum spi_pl022_error_t spi_pl022_init(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 191 uint32_t sys_clk);
AnnaBridge 184:08ed48f1de7f 192
AnnaBridge 184:08ed48f1de7f 193 /**
AnnaBridge 184:08ed48f1de7f 194 * \brief Sets the SPI PL022 device configuration.
AnnaBridge 184:08ed48f1de7f 195 *
AnnaBridge 184:08ed48f1de7f 196 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 197 * \param[in] ctrl_cfg SPI control configuration.
AnnaBridge 184:08ed48f1de7f 198 *
AnnaBridge 184:08ed48f1de7f 199 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 184:08ed48f1de7f 200 *
AnnaBridge 184:08ed48f1de7f 201 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 202 */
AnnaBridge 184:08ed48f1de7f 203 enum spi_pl022_error_t spi_pl022_set_ctrl_cfg(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 204 const struct spi_pl022_ctrl_cfg_t* ctrl_cfg);
AnnaBridge 184:08ed48f1de7f 205
AnnaBridge 184:08ed48f1de7f 206 /**
AnnaBridge 184:08ed48f1de7f 207 * \brief Gets the SPI PL022 device configuration.
AnnaBridge 184:08ed48f1de7f 208 *
AnnaBridge 184:08ed48f1de7f 209 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 210 * \param[out] ctrl_cfg Pointer to fill the SPI control configuration.
AnnaBridge 184:08ed48f1de7f 211 *
AnnaBridge 184:08ed48f1de7f 212 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 184:08ed48f1de7f 213 *
AnnaBridge 184:08ed48f1de7f 214 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 215 */
AnnaBridge 184:08ed48f1de7f 216 enum spi_pl022_error_t spi_pl022_get_ctrl_cfg(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 217 struct spi_pl022_ctrl_cfg_t* ctrl_cfg);
AnnaBridge 184:08ed48f1de7f 218
AnnaBridge 184:08ed48f1de7f 219
AnnaBridge 184:08ed48f1de7f 220 /**
AnnaBridge 184:08ed48f1de7f 221 * \brief Selects SPI PL022 device as Master or Slave
AnnaBridge 184:08ed48f1de7f 222 *
AnnaBridge 184:08ed48f1de7f 223 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 224 * \param[in] mode Mode selection \ref spi_pl022_mode_select_t
AnnaBridge 184:08ed48f1de7f 225 *
AnnaBridge 184:08ed48f1de7f 226 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 227 */
AnnaBridge 184:08ed48f1de7f 228 void spi_pl022_select_mode(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 229 enum spi_pl022_mode_select_t mode);
AnnaBridge 184:08ed48f1de7f 230
AnnaBridge 184:08ed48f1de7f 231 /**
AnnaBridge 184:08ed48f1de7f 232 * \brief Enables/disables SPI PL022 Slave device output
AnnaBridge 184:08ed48f1de7f 233 *
AnnaBridge 184:08ed48f1de7f 234 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 235 * \param[in] mode Mode selection \ref spi_pl022_slave_output_mode_t
AnnaBridge 184:08ed48f1de7f 236 *
AnnaBridge 184:08ed48f1de7f 237 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 238 * \note This function doesn't check if dev is Slave or Master
AnnaBridge 184:08ed48f1de7f 239 */
AnnaBridge 184:08ed48f1de7f 240 void spi_pl022_set_slave_output(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 241 enum spi_pl022_slave_output_mode_t mode);
AnnaBridge 184:08ed48f1de7f 242
AnnaBridge 184:08ed48f1de7f 243 /**
AnnaBridge 184:08ed48f1de7f 244 * \brief Enables SPI PL022 device in loopback mode
AnnaBridge 184:08ed48f1de7f 245 *
AnnaBridge 184:08ed48f1de7f 246 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 247 * \param[in] mode Mode selection \ref spi_pl022_loopback_select_t
AnnaBridge 184:08ed48f1de7f 248 *
AnnaBridge 184:08ed48f1de7f 249 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 250 */
AnnaBridge 184:08ed48f1de7f 251 void spi_pl022_set_loopback_mode(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 252 enum spi_pl022_loopback_select_t mode);
AnnaBridge 184:08ed48f1de7f 253
AnnaBridge 184:08ed48f1de7f 254 /**
AnnaBridge 184:08ed48f1de7f 255 * \brief Clears interrupt mask of SPI PL022
AnnaBridge 184:08ed48f1de7f 256 *
AnnaBridge 184:08ed48f1de7f 257 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 258 * \param[in] irq_mask Selection of interrupts to enable
AnnaBridge 184:08ed48f1de7f 259 *
AnnaBridge 184:08ed48f1de7f 260 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 261 */
AnnaBridge 184:08ed48f1de7f 262 void spi_pl022_enable_interrupt(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 263 uint32_t irq_mask);
AnnaBridge 184:08ed48f1de7f 264
AnnaBridge 184:08ed48f1de7f 265 /**
AnnaBridge 184:08ed48f1de7f 266 * \brief Sets interrupt mask of SPI PL022
AnnaBridge 184:08ed48f1de7f 267 *
AnnaBridge 184:08ed48f1de7f 268 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 269 * \param[in] irq_mask Selection of interrupts to disable
AnnaBridge 184:08ed48f1de7f 270 *
AnnaBridge 184:08ed48f1de7f 271 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 272 */
AnnaBridge 184:08ed48f1de7f 273 void spi_pl022_disable_interrupt(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 274 uint32_t irq_mask);
AnnaBridge 184:08ed48f1de7f 275
AnnaBridge 184:08ed48f1de7f 276 /**
AnnaBridge 184:08ed48f1de7f 277 * \brief Gets raw interrupt status of SPI PL022
AnnaBridge 184:08ed48f1de7f 278 *
AnnaBridge 184:08ed48f1de7f 279 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 280 *
AnnaBridge 184:08ed48f1de7f 281 * \return Returns raw interrupt status value
AnnaBridge 184:08ed48f1de7f 282 *
AnnaBridge 184:08ed48f1de7f 283 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 284 */
AnnaBridge 184:08ed48f1de7f 285 uint32_t spi_pl022_get_raw_irq_status(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 286
AnnaBridge 184:08ed48f1de7f 287 /**
AnnaBridge 184:08ed48f1de7f 288 * \brief Gets masked interrupt status of SPI PL022
AnnaBridge 184:08ed48f1de7f 289 *
AnnaBridge 184:08ed48f1de7f 290 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 291 *
AnnaBridge 184:08ed48f1de7f 292 * \return Returns masked interrupt status value
AnnaBridge 184:08ed48f1de7f 293 *
AnnaBridge 184:08ed48f1de7f 294 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 295 */
AnnaBridge 184:08ed48f1de7f 296 uint32_t spi_pl022_get_masked_irq_status(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 297
AnnaBridge 184:08ed48f1de7f 298 /**
AnnaBridge 184:08ed48f1de7f 299 * \brief Sets interrupt mask of SPI PL022
AnnaBridge 184:08ed48f1de7f 300 *
AnnaBridge 184:08ed48f1de7f 301 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 302 * \param[in] irq_mask Selection of interrupts to disable
AnnaBridge 184:08ed48f1de7f 303 *
AnnaBridge 184:08ed48f1de7f 304 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 305 */
AnnaBridge 184:08ed48f1de7f 306 void spi_pl022_clear_interrupt(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 307 uint32_t irq_mask);
AnnaBridge 184:08ed48f1de7f 308
AnnaBridge 184:08ed48f1de7f 309 /**
AnnaBridge 184:08ed48f1de7f 310 * \brief Enables transmit or receive DMA
AnnaBridge 184:08ed48f1de7f 311 *
AnnaBridge 184:08ed48f1de7f 312 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 313 * \param[in] dma Selects the DMA to be enabled
AnnaBridge 184:08ed48f1de7f 314 * - bit position 0 - Receive DMA
AnnaBridge 184:08ed48f1de7f 315 * - bit position 1 - Transmit DMA
AnnaBridge 184:08ed48f1de7f 316 *
AnnaBridge 184:08ed48f1de7f 317 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 318 */
AnnaBridge 184:08ed48f1de7f 319 void spi_pl022_dma_mode_enable(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 320 uint32_t dma);
AnnaBridge 184:08ed48f1de7f 321
AnnaBridge 184:08ed48f1de7f 322 /**
AnnaBridge 184:08ed48f1de7f 323 * \brief Disables transmit or receive DMA
AnnaBridge 184:08ed48f1de7f 324 *
AnnaBridge 184:08ed48f1de7f 325 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 326 * \param[in] dma Selects the DMA to be disabled
AnnaBridge 184:08ed48f1de7f 327 * - bit position 0 - Receive DMA
AnnaBridge 184:08ed48f1de7f 328 * - bit position 1 - Transmit DMA
AnnaBridge 184:08ed48f1de7f 329 *
AnnaBridge 184:08ed48f1de7f 330 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 331 */
AnnaBridge 184:08ed48f1de7f 332 void spi_pl022_dma_mode_disable(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 333 uint32_t dma);
AnnaBridge 184:08ed48f1de7f 334
AnnaBridge 184:08ed48f1de7f 335 /**
AnnaBridge 184:08ed48f1de7f 336 * \brief Gets peripheral identification of the device
AnnaBridge 184:08ed48f1de7f 337 *
AnnaBridge 184:08ed48f1de7f 338 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 339 * \param[out] periphid Pointer to fill peripheral ids
AnnaBridge 184:08ed48f1de7f 340 *
AnnaBridge 184:08ed48f1de7f 341 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 342 */
AnnaBridge 184:08ed48f1de7f 343 void spi_pl022_get_periphID(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 344 struct spi_pl022_periphid_t* periphid);
AnnaBridge 184:08ed48f1de7f 345
AnnaBridge 184:08ed48f1de7f 346 /**
AnnaBridge 184:08ed48f1de7f 347 * \brief Gets PrimeCell identification of the device
AnnaBridge 184:08ed48f1de7f 348 *
AnnaBridge 184:08ed48f1de7f 349 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 350 * \param[out] cellid Pointer to fill PrimeCell ids
AnnaBridge 184:08ed48f1de7f 351 *
AnnaBridge 184:08ed48f1de7f 352 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 353 */
AnnaBridge 184:08ed48f1de7f 354 void spi_pl022_get_PrimeCell_ID(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 355 struct spi_pl022_primecell_id_t* cellid);
AnnaBridge 184:08ed48f1de7f 356
AnnaBridge 184:08ed48f1de7f 357 /**
AnnaBridge 184:08ed48f1de7f 358 * \brief Sets system clock.
AnnaBridge 184:08ed48f1de7f 359 *
AnnaBridge 184:08ed48f1de7f 360 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 361 * \param[in] sys_clk System clock.
AnnaBridge 184:08ed48f1de7f 362 *
AnnaBridge 184:08ed48f1de7f 363 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 184:08ed48f1de7f 364 *
AnnaBridge 184:08ed48f1de7f 365 * \note This function doesn't check if dev is NULL.
AnnaBridge 184:08ed48f1de7f 366 */
AnnaBridge 184:08ed48f1de7f 367 enum spi_pl022_error_t spi_pl022_set_sys_clk(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 368 uint32_t sys_clk);
AnnaBridge 184:08ed48f1de7f 369
AnnaBridge 184:08ed48f1de7f 370 /**
AnnaBridge 184:08ed48f1de7f 371 * \brief Reads single data from SPI. Non blocking.
AnnaBridge 184:08ed48f1de7f 372 *
AnnaBridge 184:08ed48f1de7f 373 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 374 * \param[out] rx_ptr Buffer pointer to be filled
AnnaBridge 184:08ed48f1de7f 375 * must be enough for configured word size
AnnaBridge 184:08ed48f1de7f 376 *
AnnaBridge 184:08ed48f1de7f 377 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 184:08ed48f1de7f 378 *
AnnaBridge 184:08ed48f1de7f 379 * \note This function doesn't check if dev is NULL and
AnnaBridge 184:08ed48f1de7f 380 * if the driver is initialized to reduce the number of checks and
AnnaBridge 184:08ed48f1de7f 381 * make the function execution faster.
AnnaBridge 184:08ed48f1de7f 382 */
AnnaBridge 184:08ed48f1de7f 383 enum spi_pl022_error_t spi_pl022_read(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 384 void *rx_ptr);
AnnaBridge 184:08ed48f1de7f 385
AnnaBridge 184:08ed48f1de7f 386 /**
AnnaBridge 184:08ed48f1de7f 387 * \brief Reads single data from slave SPI. Non blocking.
AnnaBridge 184:08ed48f1de7f 388 *
AnnaBridge 184:08ed48f1de7f 389 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 390 *
AnnaBridge 184:08ed48f1de7f 391 * \return Returns data value from the device
AnnaBridge 184:08ed48f1de7f 392 *
AnnaBridge 184:08ed48f1de7f 393 * \note This function doesn't check if dev is NULL and
AnnaBridge 184:08ed48f1de7f 394 * does not validate whether there is any data in the RX buffer
AnnaBridge 184:08ed48f1de7f 395 */
AnnaBridge 184:08ed48f1de7f 396 uint32_t spi_pl022_slave_read(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 397
AnnaBridge 184:08ed48f1de7f 398 /**
AnnaBridge 184:08ed48f1de7f 399 * \brief Writes single data to SPI. Non blocking.
AnnaBridge 184:08ed48f1de7f 400 *
AnnaBridge 184:08ed48f1de7f 401 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 402 * \param[in] mode Master or slave \ref spi_pl022_mode_select_t
AnnaBridge 184:08ed48f1de7f 403 * \param[out] tx_ptr Pointer to the data to be sent
AnnaBridge 184:08ed48f1de7f 404 *
AnnaBridge 184:08ed48f1de7f 405 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 184:08ed48f1de7f 406 *
AnnaBridge 184:08ed48f1de7f 407 * \note This function doesn't check if dev is NULL and
AnnaBridge 184:08ed48f1de7f 408 * if the driver is initialized to reduce the number of checks and
AnnaBridge 184:08ed48f1de7f 409 * make the function execution faster.
AnnaBridge 184:08ed48f1de7f 410 */
AnnaBridge 184:08ed48f1de7f 411 enum spi_pl022_error_t spi_pl022_write(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 412 const enum spi_pl022_mode_select_t mode,
AnnaBridge 184:08ed48f1de7f 413 const void *tx_ptr);
AnnaBridge 184:08ed48f1de7f 414
AnnaBridge 184:08ed48f1de7f 415 /**
AnnaBridge 184:08ed48f1de7f 416 * \brief Transmit and Receive data on SPI in a blocking call
AnnaBridge 184:08ed48f1de7f 417 *
AnnaBridge 184:08ed48f1de7f 418 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 419 * \param[in] tx_ptr Buffer pointer to be filled
AnnaBridge 184:08ed48f1de7f 420 * \param[in/out] tx_len_ptr Num values to transfer (updated on error)
AnnaBridge 184:08ed48f1de7f 421 * need to be multiples of transfer word length
AnnaBridge 184:08ed48f1de7f 422 * \param[out] rx_ptr Buffer pointer to be filled
AnnaBridge 184:08ed48f1de7f 423 * \param[in/out] rx_len_ptr Num values to receive (updated on error)
AnnaBridge 184:08ed48f1de7f 424 * need to be multiples of transfer word length
AnnaBridge 184:08ed48f1de7f 425 *
AnnaBridge 184:08ed48f1de7f 426 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 184:08ed48f1de7f 427 *
AnnaBridge 184:08ed48f1de7f 428 * \note This function doesn't check if dev is NULL and
AnnaBridge 184:08ed48f1de7f 429 * if the driver is initialized to reduce the number of checks and
AnnaBridge 184:08ed48f1de7f 430 * make the function execution faster.
AnnaBridge 184:08ed48f1de7f 431 */
AnnaBridge 184:08ed48f1de7f 432 enum spi_pl022_error_t spi_pl022_txrx_blocking(struct spi_pl022_dev_t* dev,
AnnaBridge 184:08ed48f1de7f 433 const void *tx_ptr,
AnnaBridge 184:08ed48f1de7f 434 uint32_t *tx_len_ptr,
AnnaBridge 184:08ed48f1de7f 435 void *rx_ptr,
AnnaBridge 184:08ed48f1de7f 436 uint32_t *rx_len_ptr);
AnnaBridge 184:08ed48f1de7f 437
AnnaBridge 184:08ed48f1de7f 438
AnnaBridge 184:08ed48f1de7f 439 /************************** TEST APIs ****************************/
AnnaBridge 184:08ed48f1de7f 440
AnnaBridge 184:08ed48f1de7f 441 /**
AnnaBridge 184:08ed48f1de7f 442 * \brief Enables Test FIFO mode
AnnaBridge 184:08ed48f1de7f 443 *
AnnaBridge 184:08ed48f1de7f 444 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 445 *
AnnaBridge 184:08ed48f1de7f 446 * \note This function doesn't check if dev is NULL
AnnaBridge 184:08ed48f1de7f 447 */
AnnaBridge 184:08ed48f1de7f 448 void spi_pl022_test_fifo_enable(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 449
AnnaBridge 184:08ed48f1de7f 450 /**
AnnaBridge 184:08ed48f1de7f 451 * \brief Disables Test FIFO mode
AnnaBridge 184:08ed48f1de7f 452 *
AnnaBridge 184:08ed48f1de7f 453 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 454 *
AnnaBridge 184:08ed48f1de7f 455 * \note This function doesn't check if dev is NULL
AnnaBridge 184:08ed48f1de7f 456 */
AnnaBridge 184:08ed48f1de7f 457 void spi_pl022_test_fifo_disable(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 458
AnnaBridge 184:08ed48f1de7f 459 /**
AnnaBridge 184:08ed48f1de7f 460 * \brief Enables Integration Test mode
AnnaBridge 184:08ed48f1de7f 461 *
AnnaBridge 184:08ed48f1de7f 462 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 463 *
AnnaBridge 184:08ed48f1de7f 464 * \note This function doesn't check if dev is NULL
AnnaBridge 184:08ed48f1de7f 465 */
AnnaBridge 184:08ed48f1de7f 466 void spi_pl022_integration_test_enable(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 467
AnnaBridge 184:08ed48f1de7f 468 /**
AnnaBridge 184:08ed48f1de7f 469 * \brief Disables Integration Test mode
AnnaBridge 184:08ed48f1de7f 470 *
AnnaBridge 184:08ed48f1de7f 471 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 472 *
AnnaBridge 184:08ed48f1de7f 473 * \note This function doesn't check if dev is NULL
AnnaBridge 184:08ed48f1de7f 474 */
AnnaBridge 184:08ed48f1de7f 475 void spi_pl022_integration_test_disable(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 476
AnnaBridge 184:08ed48f1de7f 477
AnnaBridge 184:08ed48f1de7f 478 /**
AnnaBridge 184:08ed48f1de7f 479 * \brief Writes data to Test data register
AnnaBridge 184:08ed48f1de7f 480 *
AnnaBridge 184:08ed48f1de7f 481 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 482 *
AnnaBridge 184:08ed48f1de7f 483 * \note This function doesn't check if dev is NULL and
AnnaBridge 184:08ed48f1de7f 484 * whether Test FIFO mode is enabled
AnnaBridge 184:08ed48f1de7f 485 */
AnnaBridge 184:08ed48f1de7f 486 void spi_pl022_write_test_data(struct spi_pl022_dev_t* dev, void *tx_ptr);
AnnaBridge 184:08ed48f1de7f 487
AnnaBridge 184:08ed48f1de7f 488 /**
AnnaBridge 184:08ed48f1de7f 489 * \brief Reads integration test output register
AnnaBridge 184:08ed48f1de7f 490 *
AnnaBridge 184:08ed48f1de7f 491 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 184:08ed48f1de7f 492 *
AnnaBridge 184:08ed48f1de7f 493 * \note This function doesn't check if dev is NULL
AnnaBridge 184:08ed48f1de7f 494 */
AnnaBridge 184:08ed48f1de7f 495 uint32_t spi_pl022_read_test_output_reg(struct spi_pl022_dev_t* dev);
AnnaBridge 184:08ed48f1de7f 496
AnnaBridge 184:08ed48f1de7f 497
AnnaBridge 184:08ed48f1de7f 498 #ifdef __cplusplus
AnnaBridge 184:08ed48f1de7f 499 }
AnnaBridge 184:08ed48f1de7f 500 #endif
AnnaBridge 184:08ed48f1de7f 501 #endif /* __SPI_PL022_DRV_H__ */