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cmsis/BUILD/mbed/TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f3xx_hal_nand.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32f3xx_hal_nand.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file of NAND HAL module.
AnnaBridge 189:f392fc9709a3 6 ******************************************************************************
AnnaBridge 189:f392fc9709a3 7 * @attention
AnnaBridge 189:f392fc9709a3 8 *
AnnaBridge 189:f392fc9709a3 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 189:f392fc9709a3 10 *
AnnaBridge 189:f392fc9709a3 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 12 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 189:f392fc9709a3 14 * this list of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 189:f392fc9709a3 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 189:f392fc9709a3 17 * and/or other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 189:f392fc9709a3 19 * may be used to endorse or promote products derived from this software
AnnaBridge 189:f392fc9709a3 20 * without specific prior written permission.
AnnaBridge 189:f392fc9709a3 21 *
AnnaBridge 189:f392fc9709a3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 189:f392fc9709a3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 189:f392fc9709a3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 189:f392fc9709a3 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 189:f392fc9709a3 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 189:f392fc9709a3 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 189:f392fc9709a3 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 189:f392fc9709a3 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 189:f392fc9709a3 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 32 *
AnnaBridge 189:f392fc9709a3 33 ******************************************************************************
AnnaBridge 189:f392fc9709a3 34 */
AnnaBridge 189:f392fc9709a3 35
AnnaBridge 189:f392fc9709a3 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 37 #ifndef __STM32F3xx_HAL_NAND_H
AnnaBridge 189:f392fc9709a3 38 #define __STM32F3xx_HAL_NAND_H
AnnaBridge 189:f392fc9709a3 39
AnnaBridge 189:f392fc9709a3 40 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 41 extern "C" {
AnnaBridge 189:f392fc9709a3 42 #endif
AnnaBridge 189:f392fc9709a3 43
AnnaBridge 189:f392fc9709a3 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 45 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
AnnaBridge 189:f392fc9709a3 46 #include "stm32f3xx_ll_fmc.h"
AnnaBridge 189:f392fc9709a3 47
AnnaBridge 189:f392fc9709a3 48 /** @addtogroup STM32F3xx_HAL_Driver
AnnaBridge 189:f392fc9709a3 49 * @{
AnnaBridge 189:f392fc9709a3 50 */
AnnaBridge 189:f392fc9709a3 51
AnnaBridge 189:f392fc9709a3 52 /** @addtogroup NAND
AnnaBridge 189:f392fc9709a3 53 * @{
AnnaBridge 189:f392fc9709a3 54 */
AnnaBridge 189:f392fc9709a3 55
AnnaBridge 189:f392fc9709a3 56 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 58 /** @defgroup NAND_Exported_Types NAND Exported Types
AnnaBridge 189:f392fc9709a3 59 * @{
AnnaBridge 189:f392fc9709a3 60 */
AnnaBridge 189:f392fc9709a3 61
AnnaBridge 189:f392fc9709a3 62 /**
AnnaBridge 189:f392fc9709a3 63 * @brief HAL NAND State structures definition
AnnaBridge 189:f392fc9709a3 64 */
AnnaBridge 189:f392fc9709a3 65 typedef enum
AnnaBridge 189:f392fc9709a3 66 {
AnnaBridge 189:f392fc9709a3 67 HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */
AnnaBridge 189:f392fc9709a3 68 HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
AnnaBridge 189:f392fc9709a3 69 HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
AnnaBridge 189:f392fc9709a3 70 HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */
AnnaBridge 189:f392fc9709a3 71 }HAL_NAND_StateTypeDef;
AnnaBridge 189:f392fc9709a3 72
AnnaBridge 189:f392fc9709a3 73 /**
AnnaBridge 189:f392fc9709a3 74 * @brief NAND Memory electronic signature Structure definition
AnnaBridge 189:f392fc9709a3 75 */
AnnaBridge 189:f392fc9709a3 76 typedef struct
AnnaBridge 189:f392fc9709a3 77 {
AnnaBridge 189:f392fc9709a3 78 /*<! NAND memory electronic signature maker and device IDs */
AnnaBridge 189:f392fc9709a3 79
AnnaBridge 189:f392fc9709a3 80 uint8_t Maker_Id;
AnnaBridge 189:f392fc9709a3 81
AnnaBridge 189:f392fc9709a3 82 uint8_t Device_Id;
AnnaBridge 189:f392fc9709a3 83
AnnaBridge 189:f392fc9709a3 84 uint8_t Third_Id;
AnnaBridge 189:f392fc9709a3 85
AnnaBridge 189:f392fc9709a3 86 uint8_t Fourth_Id;
AnnaBridge 189:f392fc9709a3 87 }NAND_IDTypeDef;
AnnaBridge 189:f392fc9709a3 88
AnnaBridge 189:f392fc9709a3 89 /**
AnnaBridge 189:f392fc9709a3 90 * @brief NAND Memory address Structure definition
AnnaBridge 189:f392fc9709a3 91 */
AnnaBridge 189:f392fc9709a3 92 typedef struct
AnnaBridge 189:f392fc9709a3 93 {
AnnaBridge 189:f392fc9709a3 94 uint16_t Page; /*!< NAND memory Page address */
AnnaBridge 189:f392fc9709a3 95
AnnaBridge 189:f392fc9709a3 96 uint16_t Plane; /*!< NAND memory Plane address */
AnnaBridge 189:f392fc9709a3 97
AnnaBridge 189:f392fc9709a3 98 uint16_t Block; /*!< NAND memory Block address */
AnnaBridge 189:f392fc9709a3 99
AnnaBridge 189:f392fc9709a3 100 }NAND_AddressTypeDef;
AnnaBridge 189:f392fc9709a3 101
AnnaBridge 189:f392fc9709a3 102 /**
AnnaBridge 189:f392fc9709a3 103 * @brief NAND Memory info Structure definition
AnnaBridge 189:f392fc9709a3 104 */
AnnaBridge 189:f392fc9709a3 105 typedef struct
AnnaBridge 189:f392fc9709a3 106 {
AnnaBridge 189:f392fc9709a3 107 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes
AnnaBridge 189:f392fc9709a3 108 for 8 bits adressing or words for 16 bits addressing */
AnnaBridge 189:f392fc9709a3 109
AnnaBridge 189:f392fc9709a3 110 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes
AnnaBridge 189:f392fc9709a3 111 for 8 bits adressing or words for 16 bits addressing */
AnnaBridge 189:f392fc9709a3 112
AnnaBridge 189:f392fc9709a3 113 uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */
AnnaBridge 189:f392fc9709a3 114
AnnaBridge 189:f392fc9709a3 115 uint32_t BlockNbr; /*!< NAND memory number of total blocks */
AnnaBridge 189:f392fc9709a3 116
AnnaBridge 189:f392fc9709a3 117 uint32_t PlaneNbr; /*!< NAND memory number of planes */
AnnaBridge 189:f392fc9709a3 118
AnnaBridge 189:f392fc9709a3 119 uint32_t PlaneSize; /*!< NAND memory plane size measured in number of blocks */
AnnaBridge 189:f392fc9709a3 120
AnnaBridge 189:f392fc9709a3 121 FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
AnnaBridge 189:f392fc9709a3 122 parameter is mandatory for some NAND parts after the read
AnnaBridge 189:f392fc9709a3 123 command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence.
AnnaBridge 189:f392fc9709a3 124 Example: Toshiba THTH58BYG3S0HBAI6.
AnnaBridge 189:f392fc9709a3 125 This parameter could be ENABLE or DISABLE
AnnaBridge 189:f392fc9709a3 126 Please check the Read Mode sequnece in the NAND device datasheet */
AnnaBridge 189:f392fc9709a3 127 }NAND_DeviceConfigTypeDef;
AnnaBridge 189:f392fc9709a3 128
AnnaBridge 189:f392fc9709a3 129 /**
AnnaBridge 189:f392fc9709a3 130 * @brief NAND handle Structure definition
AnnaBridge 189:f392fc9709a3 131 */
AnnaBridge 189:f392fc9709a3 132 typedef struct
AnnaBridge 189:f392fc9709a3 133 {
AnnaBridge 189:f392fc9709a3 134 FMC_NAND_TypeDef *Instance; /*!< Register base address */
AnnaBridge 189:f392fc9709a3 135
AnnaBridge 189:f392fc9709a3 136 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
AnnaBridge 189:f392fc9709a3 137
AnnaBridge 189:f392fc9709a3 138 HAL_LockTypeDef Lock; /*!< NAND locking object */
AnnaBridge 189:f392fc9709a3 139
AnnaBridge 189:f392fc9709a3 140 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
AnnaBridge 189:f392fc9709a3 141
AnnaBridge 189:f392fc9709a3 142 NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */
AnnaBridge 189:f392fc9709a3 143
AnnaBridge 189:f392fc9709a3 144 }NAND_HandleTypeDef;
AnnaBridge 189:f392fc9709a3 145 /**
AnnaBridge 189:f392fc9709a3 146 * @}
AnnaBridge 189:f392fc9709a3 147 */
AnnaBridge 189:f392fc9709a3 148
AnnaBridge 189:f392fc9709a3 149 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 150 /* Exported macros ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 151 /** @defgroup NAND_Exported_Macros NAND Exported Macros
AnnaBridge 189:f392fc9709a3 152 * @{
AnnaBridge 189:f392fc9709a3 153 */
AnnaBridge 189:f392fc9709a3 154
AnnaBridge 189:f392fc9709a3 155 /** @brief Reset NAND handle state
AnnaBridge 189:f392fc9709a3 156 * @param __HANDLE__ specifies the NAND handle.
AnnaBridge 189:f392fc9709a3 157 * @retval None
AnnaBridge 189:f392fc9709a3 158 */
AnnaBridge 189:f392fc9709a3 159 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
AnnaBridge 189:f392fc9709a3 160
AnnaBridge 189:f392fc9709a3 161 /**
AnnaBridge 189:f392fc9709a3 162 * @}
AnnaBridge 189:f392fc9709a3 163 */
AnnaBridge 189:f392fc9709a3 164
AnnaBridge 189:f392fc9709a3 165 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 166 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
AnnaBridge 189:f392fc9709a3 167 * @{
AnnaBridge 189:f392fc9709a3 168 */
AnnaBridge 189:f392fc9709a3 169
AnnaBridge 189:f392fc9709a3 170 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 189:f392fc9709a3 171 * @{
AnnaBridge 189:f392fc9709a3 172 */
AnnaBridge 189:f392fc9709a3 173
AnnaBridge 189:f392fc9709a3 174 /* Initialization/de-initialization functions ********************************/
AnnaBridge 189:f392fc9709a3 175 /* Initialization/de-initialization functions ********************************/
AnnaBridge 189:f392fc9709a3 176 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
AnnaBridge 189:f392fc9709a3 177 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 178
AnnaBridge 189:f392fc9709a3 179 HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig);
AnnaBridge 189:f392fc9709a3 180
AnnaBridge 189:f392fc9709a3 181 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
AnnaBridge 189:f392fc9709a3 182
AnnaBridge 189:f392fc9709a3 183 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 184 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 185 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 186 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 187
AnnaBridge 189:f392fc9709a3 188 /**
AnnaBridge 189:f392fc9709a3 189 * @}
AnnaBridge 189:f392fc9709a3 190 */
AnnaBridge 189:f392fc9709a3 191
AnnaBridge 189:f392fc9709a3 192 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
AnnaBridge 189:f392fc9709a3 193 * @{
AnnaBridge 189:f392fc9709a3 194 */
AnnaBridge 189:f392fc9709a3 195
AnnaBridge 189:f392fc9709a3 196 /* IO operation functions ****************************************************/
AnnaBridge 189:f392fc9709a3 197 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 198
AnnaBridge 189:f392fc9709a3 199 HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 189:f392fc9709a3 200 HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 189:f392fc9709a3 201 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 189:f392fc9709a3 202 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 189:f392fc9709a3 203
AnnaBridge 189:f392fc9709a3 204 HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 189:f392fc9709a3 205 HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 189:f392fc9709a3 206 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 189:f392fc9709a3 207 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 189:f392fc9709a3 208
AnnaBridge 189:f392fc9709a3 209 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 189:f392fc9709a3 210
AnnaBridge 189:f392fc9709a3 211 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 212 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 189:f392fc9709a3 213
AnnaBridge 189:f392fc9709a3 214 /**
AnnaBridge 189:f392fc9709a3 215 * @}
AnnaBridge 189:f392fc9709a3 216 */
AnnaBridge 189:f392fc9709a3 217
AnnaBridge 189:f392fc9709a3 218 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 189:f392fc9709a3 219 * @{
AnnaBridge 189:f392fc9709a3 220 */
AnnaBridge 189:f392fc9709a3 221
AnnaBridge 189:f392fc9709a3 222 /* NAND Control functions ****************************************************/
AnnaBridge 189:f392fc9709a3 223 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 224 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 225 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 226
AnnaBridge 189:f392fc9709a3 227 /**
AnnaBridge 189:f392fc9709a3 228 * @}
AnnaBridge 189:f392fc9709a3 229 */
AnnaBridge 189:f392fc9709a3 230
AnnaBridge 189:f392fc9709a3 231 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 189:f392fc9709a3 232 * @{
AnnaBridge 189:f392fc9709a3 233 */
AnnaBridge 189:f392fc9709a3 234 /* NAND State functions *******************************************************/
AnnaBridge 189:f392fc9709a3 235 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
AnnaBridge 189:f392fc9709a3 236 /**
AnnaBridge 189:f392fc9709a3 237 * @}
AnnaBridge 189:f392fc9709a3 238 */
AnnaBridge 189:f392fc9709a3 239
AnnaBridge 189:f392fc9709a3 240 /**
AnnaBridge 189:f392fc9709a3 241 * @}
AnnaBridge 189:f392fc9709a3 242 */
AnnaBridge 189:f392fc9709a3 243
AnnaBridge 189:f392fc9709a3 244 /* Private types -------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 245 /* Private variables ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 246 /* Private constants ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 247 /** @defgroup NAND_Private_Constants NAND Private Constants
AnnaBridge 189:f392fc9709a3 248 * @{
AnnaBridge 189:f392fc9709a3 249 */
AnnaBridge 189:f392fc9709a3 250 #define NAND_DEVICE1 FMC_BANK2
AnnaBridge 189:f392fc9709a3 251 #define NAND_DEVICE2 FMC_BANK3
AnnaBridge 189:f392fc9709a3 252 #define NAND_WRITE_TIMEOUT 0x01000000U
AnnaBridge 189:f392fc9709a3 253
AnnaBridge 189:f392fc9709a3 254 #define CMD_AREA ((uint32_t)(1U<<16U)) /* A16 = CLE high */
AnnaBridge 189:f392fc9709a3 255 #define ADDR_AREA ((uint32_t)(1U<<17U)) /* A17 = ALE high */
AnnaBridge 189:f392fc9709a3 256
AnnaBridge 189:f392fc9709a3 257 #define NAND_CMD_AREA_A ((uint8_t)0x00)
AnnaBridge 189:f392fc9709a3 258 #define NAND_CMD_AREA_B ((uint8_t)0x01)
AnnaBridge 189:f392fc9709a3 259 #define NAND_CMD_AREA_C ((uint8_t)0x50)
AnnaBridge 189:f392fc9709a3 260 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
AnnaBridge 189:f392fc9709a3 261
AnnaBridge 189:f392fc9709a3 262 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
AnnaBridge 189:f392fc9709a3 263 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
AnnaBridge 189:f392fc9709a3 264 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
AnnaBridge 189:f392fc9709a3 265 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
AnnaBridge 189:f392fc9709a3 266 #define NAND_CMD_READID ((uint8_t)0x90)
AnnaBridge 189:f392fc9709a3 267 #define NAND_CMD_STATUS ((uint8_t)0x70)
AnnaBridge 189:f392fc9709a3 268 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
AnnaBridge 189:f392fc9709a3 269 #define NAND_CMD_RESET ((uint8_t)0xFF)
AnnaBridge 189:f392fc9709a3 270
AnnaBridge 189:f392fc9709a3 271 /* NAND memory status */
AnnaBridge 189:f392fc9709a3 272 #define NAND_VALID_ADDRESS 0x00000100U
AnnaBridge 189:f392fc9709a3 273 #define NAND_INVALID_ADDRESS 0x00000200U
AnnaBridge 189:f392fc9709a3 274 #define NAND_TIMEOUT_ERROR 0x00000400U
AnnaBridge 189:f392fc9709a3 275 #define NAND_BUSY 0x00000000U
AnnaBridge 189:f392fc9709a3 276 #define NAND_ERROR 0x00000001U
AnnaBridge 189:f392fc9709a3 277 #define NAND_READY 0x00000040U
AnnaBridge 189:f392fc9709a3 278 /**
AnnaBridge 189:f392fc9709a3 279 * @}
AnnaBridge 189:f392fc9709a3 280 */
AnnaBridge 189:f392fc9709a3 281
AnnaBridge 189:f392fc9709a3 282 /* Private macros ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 283 /** @defgroup NAND_Private_Macros NAND Private Macros
AnnaBridge 189:f392fc9709a3 284 * @{
AnnaBridge 189:f392fc9709a3 285 */
AnnaBridge 189:f392fc9709a3 286
AnnaBridge 189:f392fc9709a3 287 /**
AnnaBridge 189:f392fc9709a3 288 * @brief NAND memory address computation.
AnnaBridge 189:f392fc9709a3 289 * @param __ADDRESS__ NAND memory address.
AnnaBridge 189:f392fc9709a3 290 * @param __HANDLE__ NAND handle.
AnnaBridge 189:f392fc9709a3 291 * @retval NAND Raw address value
AnnaBridge 189:f392fc9709a3 292 */
AnnaBridge 189:f392fc9709a3 293 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
AnnaBridge 189:f392fc9709a3 294 (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize)))
AnnaBridge 189:f392fc9709a3 295
AnnaBridge 189:f392fc9709a3 296 /**
AnnaBridge 189:f392fc9709a3 297 * @brief NAND memory Column address computation.
AnnaBridge 189:f392fc9709a3 298 * @param __HANDLE__ NAND handle.
AnnaBridge 189:f392fc9709a3 299 * @retval NAND Raw address value
AnnaBridge 189:f392fc9709a3 300 */
AnnaBridge 189:f392fc9709a3 301 #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize)
AnnaBridge 189:f392fc9709a3 302
AnnaBridge 189:f392fc9709a3 303 /**
AnnaBridge 189:f392fc9709a3 304 * @brief NAND memory address cycling.
AnnaBridge 189:f392fc9709a3 305 * @param __ADDRESS__ NAND memory address.
AnnaBridge 189:f392fc9709a3 306 * @retval NAND address cycling value.
AnnaBridge 189:f392fc9709a3 307 */
AnnaBridge 189:f392fc9709a3 308 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
AnnaBridge 189:f392fc9709a3 309 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
AnnaBridge 189:f392fc9709a3 310 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
AnnaBridge 189:f392fc9709a3 311 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
AnnaBridge 189:f392fc9709a3 312
AnnaBridge 189:f392fc9709a3 313 /**
AnnaBridge 189:f392fc9709a3 314 * @brief NAND memory Columns cycling.
AnnaBridge 189:f392fc9709a3 315 * @param __ADDRESS__ NAND memory address.
AnnaBridge 189:f392fc9709a3 316 * @retval NAND Column address cycling value.
AnnaBridge 189:f392fc9709a3 317 */
AnnaBridge 189:f392fc9709a3 318 #define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */
AnnaBridge 189:f392fc9709a3 319 #define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */
AnnaBridge 189:f392fc9709a3 320
AnnaBridge 189:f392fc9709a3 321 /**
AnnaBridge 189:f392fc9709a3 322 * @}
AnnaBridge 189:f392fc9709a3 323 */
AnnaBridge 189:f392fc9709a3 324
AnnaBridge 189:f392fc9709a3 325 /**
AnnaBridge 189:f392fc9709a3 326 * @}
AnnaBridge 189:f392fc9709a3 327 */
AnnaBridge 189:f392fc9709a3 328 /**
AnnaBridge 189:f392fc9709a3 329 * @}
AnnaBridge 189:f392fc9709a3 330 */
AnnaBridge 189:f392fc9709a3 331
AnnaBridge 189:f392fc9709a3 332 /**
AnnaBridge 189:f392fc9709a3 333 * @}
AnnaBridge 189:f392fc9709a3 334 */
AnnaBridge 189:f392fc9709a3 335
AnnaBridge 189:f392fc9709a3 336 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
AnnaBridge 189:f392fc9709a3 337
AnnaBridge 189:f392fc9709a3 338 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 339 }
AnnaBridge 189:f392fc9709a3 340 #endif
AnnaBridge 189:f392fc9709a3 341
AnnaBridge 189:f392fc9709a3 342 #endif /* __STM32F3xx_HAL_NAND_H */
AnnaBridge 189:f392fc9709a3 343
AnnaBridge 189:f392fc9709a3 344 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/