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targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c@35:cb6c51ca2109, 2015-12-13 (annotated)

Committer:
mbed_official
Date:
Sun Dec 13 13:45:10 2015 +0000
Revision:
35:cb6c51ca2109
Parent:
0:9b334a45a8ff
Child:
39:64ed51eaeb3a
Synchronized with git revision 12b02b95aecad00907d16005723cc6af4439735e



Full URL: https://github.com/mbedmicro/mbed/commit/12b02b95aecad00907d16005723cc6af4439735e/



Fix glitch when initializing NRF51-DK serial port

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2013 Nordic Semiconductor
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 // math.h required for floating point operations for baud rate calculation
bogdanm 0:9b334a45a8ff 17 //#include <math.h>
bogdanm 0:9b334a45a8ff 18 #include <string.h>
bogdanm 0:9b334a45a8ff 19 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 22 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 23 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 /******************************************************************************
bogdanm 0:9b334a45a8ff 26 * INITIALIZATION
bogdanm 0:9b334a45a8ff 27 ******************************************************************************/
bogdanm 0:9b334a45a8ff 28 #define UART_NUM 1
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 0:9b334a45a8ff 31 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 32 static const int acceptedSpeeds[17][2] = {
bogdanm 0:9b334a45a8ff 33 {1200, UART_BAUDRATE_BAUDRATE_Baud1200},
bogdanm 0:9b334a45a8ff 34 {2400, UART_BAUDRATE_BAUDRATE_Baud2400},
bogdanm 0:9b334a45a8ff 35 {4800, UART_BAUDRATE_BAUDRATE_Baud4800},
bogdanm 0:9b334a45a8ff 36 {9600, UART_BAUDRATE_BAUDRATE_Baud9600},
bogdanm 0:9b334a45a8ff 37 {14400, UART_BAUDRATE_BAUDRATE_Baud14400},
bogdanm 0:9b334a45a8ff 38 {19200, UART_BAUDRATE_BAUDRATE_Baud19200},
bogdanm 0:9b334a45a8ff 39 {28800, UART_BAUDRATE_BAUDRATE_Baud28800},
bogdanm 0:9b334a45a8ff 40 {31250, (0x00800000UL) /* 31250 baud */},
bogdanm 0:9b334a45a8ff 41 {38400, UART_BAUDRATE_BAUDRATE_Baud38400},
bogdanm 0:9b334a45a8ff 42 {57600, UART_BAUDRATE_BAUDRATE_Baud57600},
bogdanm 0:9b334a45a8ff 43 {76800, UART_BAUDRATE_BAUDRATE_Baud76800},
bogdanm 0:9b334a45a8ff 44 {115200, UART_BAUDRATE_BAUDRATE_Baud115200},
bogdanm 0:9b334a45a8ff 45 {230400, UART_BAUDRATE_BAUDRATE_Baud230400},
bogdanm 0:9b334a45a8ff 46 {250000, UART_BAUDRATE_BAUDRATE_Baud250000},
bogdanm 0:9b334a45a8ff 47 {460800, UART_BAUDRATE_BAUDRATE_Baud460800},
bogdanm 0:9b334a45a8ff 48 {921600, UART_BAUDRATE_BAUDRATE_Baud921600},
bogdanm 0:9b334a45a8ff 49 {1000000, UART_BAUDRATE_BAUDRATE_Baud1M}
bogdanm 0:9b334a45a8ff 50 };
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 int stdio_uart_inited = 0;
bogdanm 0:9b334a45a8ff 53 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 0:9b334a45a8ff 57 UARTName uart = UART_0;
bogdanm 0:9b334a45a8ff 58 obj->uart = (NRF_UART_Type *)uart;
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 //pin configurations --
mbed_official 35:cb6c51ca2109 61 NRF_GPIO->OUT |= (1 << tx);
mbed_official 35:cb6c51ca2109 62 NRF_GPIO->OUT |= (1 << RTS_PIN_NUMBER);
bogdanm 0:9b334a45a8ff 63 NRF_GPIO->DIR |= (1 << tx); //TX_PIN_NUMBER);
bogdanm 0:9b334a45a8ff 64 NRF_GPIO->DIR |= (1 << RTS_PIN_NUMBER);
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 NRF_GPIO->DIR &= ~(1 << rx); //RX_PIN_NUMBER);
bogdanm 0:9b334a45a8ff 67 NRF_GPIO->DIR &= ~(1 << CTS_PIN_NUMBER);
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 // set default baud rate and format
bogdanm 0:9b334a45a8ff 71 serial_baud (obj, 9600);
bogdanm 0:9b334a45a8ff 72 serial_format(obj, 8, ParityNone, 1);
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 obj->uart->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos);
bogdanm 0:9b334a45a8ff 75 obj->uart->TASKS_STARTTX = 1;
bogdanm 0:9b334a45a8ff 76 obj->uart->TASKS_STARTRX = 1;
bogdanm 0:9b334a45a8ff 77 obj->uart->EVENTS_RXDRDY = 0;
bogdanm 0:9b334a45a8ff 78 // dummy write needed or TXDRDY trails write rather than leads write.
bogdanm 0:9b334a45a8ff 79 // pins are disconnected so nothing is physically transmitted on the wire
bogdanm 0:9b334a45a8ff 80 obj->uart->TXD = 0;
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 obj->index = 0;
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 obj->uart->PSELRTS = RTS_PIN_NUMBER;
bogdanm 0:9b334a45a8ff 85 obj->uart->PSELTXD = tx; //TX_PIN_NUMBER;
bogdanm 0:9b334a45a8ff 86 obj->uart->PSELCTS = CTS_PIN_NUMBER;
bogdanm 0:9b334a45a8ff 87 obj->uart->PSELRXD = rx; //RX_PIN_NUMBER;
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 // set rx/tx pins in PullUp mode
bogdanm 0:9b334a45a8ff 90 if (tx != NC) {
bogdanm 0:9b334a45a8ff 91 pin_mode(tx, PullUp);
bogdanm 0:9b334a45a8ff 92 }
bogdanm 0:9b334a45a8ff 93 if (rx != NC) {
bogdanm 0:9b334a45a8ff 94 pin_mode(rx, PullUp);
bogdanm 0:9b334a45a8ff 95 }
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 if (uart == STDIO_UART) {
bogdanm 0:9b334a45a8ff 98 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 99 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 100 }
bogdanm 0:9b334a45a8ff 101 }
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 void serial_free(serial_t *obj)
bogdanm 0:9b334a45a8ff 104 {
bogdanm 0:9b334a45a8ff 105 serial_irq_ids[obj->index] = 0;
bogdanm 0:9b334a45a8ff 106 }
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 // serial_baud
bogdanm 0:9b334a45a8ff 109 // set the baud rate, taking in to account the current SystemFrequency
bogdanm 0:9b334a45a8ff 110 void serial_baud(serial_t *obj, int baudrate)
bogdanm 0:9b334a45a8ff 111 {
bogdanm 0:9b334a45a8ff 112 if (baudrate<=1200) {
bogdanm 0:9b334a45a8ff 113 obj->uart->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1200;
bogdanm 0:9b334a45a8ff 114 return;
bogdanm 0:9b334a45a8ff 115 }
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 for (int i = 1; i<17; i++) {
bogdanm 0:9b334a45a8ff 118 if (baudrate<acceptedSpeeds[i][0]) {
bogdanm 0:9b334a45a8ff 119 obj->uart->BAUDRATE = acceptedSpeeds[i - 1][1];
bogdanm 0:9b334a45a8ff 120 return;
bogdanm 0:9b334a45a8ff 121 }
bogdanm 0:9b334a45a8ff 122 }
bogdanm 0:9b334a45a8ff 123 obj->uart->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1M;
bogdanm 0:9b334a45a8ff 124 }
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
bogdanm 0:9b334a45a8ff 127 {
bogdanm 0:9b334a45a8ff 128 // 0: 1 stop bits, 1: 2 stop bits
bogdanm 0:9b334a45a8ff 129 // int parity_enable, parity_select;
bogdanm 0:9b334a45a8ff 130 switch (parity) {
bogdanm 0:9b334a45a8ff 131 case ParityNone:
bogdanm 0:9b334a45a8ff 132 obj->uart->CONFIG = 0;
bogdanm 0:9b334a45a8ff 133 break;
bogdanm 0:9b334a45a8ff 134 default:
bogdanm 0:9b334a45a8ff 135 obj->uart->CONFIG = (UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos);
bogdanm 0:9b334a45a8ff 136 return;
bogdanm 0:9b334a45a8ff 137 }
bogdanm 0:9b334a45a8ff 138 //no Flow Control
bogdanm 0:9b334a45a8ff 139 }
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 //******************************************************************************
bogdanm 0:9b334a45a8ff 142 // * INTERRUPT HANDLING
bogdanm 0:9b334a45a8ff 143 //******************************************************************************
bogdanm 0:9b334a45a8ff 144 static inline void uart_irq(uint32_t iir, uint32_t index)
bogdanm 0:9b334a45a8ff 145 {
bogdanm 0:9b334a45a8ff 146 SerialIrq irq_type;
bogdanm 0:9b334a45a8ff 147 switch (iir) {
bogdanm 0:9b334a45a8ff 148 case 1:
bogdanm 0:9b334a45a8ff 149 irq_type = TxIrq;
bogdanm 0:9b334a45a8ff 150 break;
bogdanm 0:9b334a45a8ff 151 case 2:
bogdanm 0:9b334a45a8ff 152 irq_type = RxIrq;
bogdanm 0:9b334a45a8ff 153 break;
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 default:
bogdanm 0:9b334a45a8ff 156 return;
bogdanm 0:9b334a45a8ff 157 }
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 if (serial_irq_ids[index] != 0) {
bogdanm 0:9b334a45a8ff 160 irq_handler(serial_irq_ids[index], irq_type);
bogdanm 0:9b334a45a8ff 161 }
bogdanm 0:9b334a45a8ff 162 }
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 165 extern "C" {
bogdanm 0:9b334a45a8ff 166 #endif
bogdanm 0:9b334a45a8ff 167 void UART0_IRQHandler()
bogdanm 0:9b334a45a8ff 168 {
bogdanm 0:9b334a45a8ff 169 uint32_t irtype = 0;
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 if((NRF_UART0->INTENSET & 0x80) && NRF_UART0->EVENTS_TXDRDY) {
bogdanm 0:9b334a45a8ff 172 irtype = 1;
bogdanm 0:9b334a45a8ff 173 } else if((NRF_UART0->INTENSET & 0x04) && NRF_UART0->EVENTS_RXDRDY) {
bogdanm 0:9b334a45a8ff 174 irtype = 2;
bogdanm 0:9b334a45a8ff 175 }
bogdanm 0:9b334a45a8ff 176 uart_irq(irtype, 0);
bogdanm 0:9b334a45a8ff 177 }
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 180 }
bogdanm 0:9b334a45a8ff 181 #endif
bogdanm 0:9b334a45a8ff 182 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
bogdanm 0:9b334a45a8ff 183 {
bogdanm 0:9b334a45a8ff 184 irq_handler = handler;
bogdanm 0:9b334a45a8ff 185 serial_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 186 }
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
bogdanm 0:9b334a45a8ff 189 {
bogdanm 0:9b334a45a8ff 190 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 switch ((int)obj->uart) {
bogdanm 0:9b334a45a8ff 193 case UART_0:
bogdanm 0:9b334a45a8ff 194 irq_n = UART0_IRQn;
bogdanm 0:9b334a45a8ff 195 break;
bogdanm 0:9b334a45a8ff 196 }
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 if (enable) {
bogdanm 0:9b334a45a8ff 199 switch (irq) {
bogdanm 0:9b334a45a8ff 200 case RxIrq:
bogdanm 0:9b334a45a8ff 201 obj->uart->INTENSET = (UART_INTENSET_RXDRDY_Msk);
bogdanm 0:9b334a45a8ff 202 break;
bogdanm 0:9b334a45a8ff 203 case TxIrq:
bogdanm 0:9b334a45a8ff 204 obj->uart->INTENSET = (UART_INTENSET_TXDRDY_Msk);
bogdanm 0:9b334a45a8ff 205 break;
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207 NVIC_SetPriority(irq_n, 3);
bogdanm 0:9b334a45a8ff 208 NVIC_EnableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 209 } else { // disable
bogdanm 0:9b334a45a8ff 210 // maseked writes to INTENSET dont disable and masked writes to
bogdanm 0:9b334a45a8ff 211 // INTENCLR seemed to clear the entire register, not bits.
bogdanm 0:9b334a45a8ff 212 // Added INTEN to memory map and seems to allow set and clearing of specific bits as desired
bogdanm 0:9b334a45a8ff 213 int all_disabled = 0;
bogdanm 0:9b334a45a8ff 214 switch (irq) {
bogdanm 0:9b334a45a8ff 215 case RxIrq:
bogdanm 0:9b334a45a8ff 216 obj->uart->INTENCLR = (UART_INTENCLR_RXDRDY_Msk);
bogdanm 0:9b334a45a8ff 217 all_disabled = (obj->uart->INTENCLR & (UART_INTENCLR_TXDRDY_Msk)) == 0;
bogdanm 0:9b334a45a8ff 218 break;
bogdanm 0:9b334a45a8ff 219 case TxIrq:
bogdanm 0:9b334a45a8ff 220 obj->uart->INTENCLR = (UART_INTENCLR_TXDRDY_Msk);
bogdanm 0:9b334a45a8ff 221 all_disabled = (obj->uart->INTENCLR & (UART_INTENCLR_RXDRDY_Msk)) == 0;
bogdanm 0:9b334a45a8ff 222 break;
bogdanm 0:9b334a45a8ff 223 }
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 if (all_disabled) {
bogdanm 0:9b334a45a8ff 226 NVIC_DisableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 227 }
bogdanm 0:9b334a45a8ff 228 }
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 //******************************************************************************
bogdanm 0:9b334a45a8ff 232 //* READ/WRITE
bogdanm 0:9b334a45a8ff 233 //******************************************************************************
bogdanm 0:9b334a45a8ff 234 int serial_getc(serial_t *obj)
bogdanm 0:9b334a45a8ff 235 {
bogdanm 0:9b334a45a8ff 236 while (!serial_readable(obj)) {
bogdanm 0:9b334a45a8ff 237 }
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 obj->uart->EVENTS_RXDRDY = 0;
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 return (uint8_t)obj->uart->RXD;
bogdanm 0:9b334a45a8ff 242 }
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 void serial_putc(serial_t *obj, int c)
bogdanm 0:9b334a45a8ff 245 {
bogdanm 0:9b334a45a8ff 246 while (!serial_writable(obj)) {
bogdanm 0:9b334a45a8ff 247 }
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 obj->uart->EVENTS_TXDRDY = 0;
bogdanm 0:9b334a45a8ff 250 obj->uart->TXD = (uint8_t)c;
bogdanm 0:9b334a45a8ff 251 }
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 int serial_readable(serial_t *obj)
bogdanm 0:9b334a45a8ff 254 {
bogdanm 0:9b334a45a8ff 255 return (obj->uart->EVENTS_RXDRDY == 1);
bogdanm 0:9b334a45a8ff 256 }
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 int serial_writable(serial_t *obj)
bogdanm 0:9b334a45a8ff 259 {
bogdanm 0:9b334a45a8ff 260 return (obj->uart->EVENTS_TXDRDY == 1);
bogdanm 0:9b334a45a8ff 261 }
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 void serial_break_set(serial_t *obj)
bogdanm 0:9b334a45a8ff 264 {
bogdanm 0:9b334a45a8ff 265 obj->uart->TASKS_SUSPEND = 1;
bogdanm 0:9b334a45a8ff 266 }
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 void serial_break_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 269 {
bogdanm 0:9b334a45a8ff 270 obj->uart->TASKS_STARTTX = 1;
bogdanm 0:9b334a45a8ff 271 obj->uart->TASKS_STARTRX = 1;
bogdanm 0:9b334a45a8ff 272 }
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
bogdanm 0:9b334a45a8ff 275 {
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 if (type == FlowControlRTSCTS || type == FlowControlRTS) {
bogdanm 0:9b334a45a8ff 278 NRF_GPIO->DIR |= (1<<rxflow);
bogdanm 0:9b334a45a8ff 279 pin_mode(rxflow, PullUp);
bogdanm 0:9b334a45a8ff 280 obj->uart->PSELRTS = rxflow;
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 obj->uart->CONFIG |= 0x01; // Enable HWFC
bogdanm 0:9b334a45a8ff 283 }
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 if (type == FlowControlRTSCTS || type == FlowControlCTS) {
bogdanm 0:9b334a45a8ff 286 NRF_GPIO->DIR &= ~(1<<txflow);
bogdanm 0:9b334a45a8ff 287 pin_mode(txflow, PullUp);
bogdanm 0:9b334a45a8ff 288 obj->uart->PSELCTS = txflow;
bogdanm 0:9b334a45a8ff 289
bogdanm 0:9b334a45a8ff 290 obj->uart->CONFIG |= 0x01; // Enable HWFC;
bogdanm 0:9b334a45a8ff 291 }
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 if (type == FlowControlNone) {
bogdanm 0:9b334a45a8ff 294 obj->uart->PSELRTS = 0xFFFFFFFF; // Disable RTS
bogdanm 0:9b334a45a8ff 295 obj->uart->PSELCTS = 0xFFFFFFFF; // Disable CTS
bogdanm 0:9b334a45a8ff 296
bogdanm 0:9b334a45a8ff 297 obj->uart->CONFIG &= ~0x01; // Enable HWFC;
bogdanm 0:9b334a45a8ff 298 }
bogdanm 0:9b334a45a8ff 299 }
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 void serial_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 302 }