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targets/hal/TARGET_NXP/TARGET_LPC176X/pwmout_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "pwmout_api.h"
bogdanm 0:9b334a45a8ff 18 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 19 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #define TCR_CNT_EN 0x00000001
bogdanm 0:9b334a45a8ff 22 #define TCR_RESET 0x00000002
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 // PORT ID, PWM ID, Pin function
bogdanm 0:9b334a45a8ff 25 static const PinMap PinMap_PWM[] = {
bogdanm 0:9b334a45a8ff 26 {P1_18, PWM_1, 2},
bogdanm 0:9b334a45a8ff 27 {P1_20, PWM_2, 2},
bogdanm 0:9b334a45a8ff 28 {P1_21, PWM_3, 2},
bogdanm 0:9b334a45a8ff 29 {P1_23, PWM_4, 2},
bogdanm 0:9b334a45a8ff 30 {P1_24, PWM_5, 2},
bogdanm 0:9b334a45a8ff 31 {P1_26, PWM_6, 2},
bogdanm 0:9b334a45a8ff 32 {P2_0 , PWM_1, 1},
bogdanm 0:9b334a45a8ff 33 {P2_1 , PWM_2, 1},
bogdanm 0:9b334a45a8ff 34 {P2_2 , PWM_3, 1},
bogdanm 0:9b334a45a8ff 35 {P2_3 , PWM_4, 1},
bogdanm 0:9b334a45a8ff 36 {P2_4 , PWM_5, 1},
bogdanm 0:9b334a45a8ff 37 {P2_5 , PWM_6, 1},
bogdanm 0:9b334a45a8ff 38 {P3_25, PWM_2, 3},
bogdanm 0:9b334a45a8ff 39 {P3_26, PWM_3, 3},
bogdanm 0:9b334a45a8ff 40 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 41 };
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 __IO uint32_t *PWM_MATCH[] = {
bogdanm 0:9b334a45a8ff 44 &(LPC_PWM1->MR0),
bogdanm 0:9b334a45a8ff 45 &(LPC_PWM1->MR1),
bogdanm 0:9b334a45a8ff 46 &(LPC_PWM1->MR2),
bogdanm 0:9b334a45a8ff 47 &(LPC_PWM1->MR3),
bogdanm 0:9b334a45a8ff 48 &(LPC_PWM1->MR4),
bogdanm 0:9b334a45a8ff 49 &(LPC_PWM1->MR5),
bogdanm 0:9b334a45a8ff 50 &(LPC_PWM1->MR6)
bogdanm 0:9b334a45a8ff 51 };
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 #define TCR_PWM_EN 0x00000008
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 static unsigned int pwm_clock_mhz;
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 void pwmout_init(pwmout_t* obj, PinName pin) {
bogdanm 0:9b334a45a8ff 58 // determine the channel
bogdanm 0:9b334a45a8ff 59 PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
bogdanm 0:9b334a45a8ff 60 MBED_ASSERT(pwm != (PWMName)NC);
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 obj->pwm = pwm;
bogdanm 0:9b334a45a8ff 63 obj->MR = PWM_MATCH[pwm];
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 // ensure the power is on
bogdanm 0:9b334a45a8ff 66 LPC_SC->PCONP |= 1 << 6;
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 // ensure clock to /4
bogdanm 0:9b334a45a8ff 69 LPC_SC->PCLKSEL0 &= ~(0x3 << 12); // pclk = /4
bogdanm 0:9b334a45a8ff 70 LPC_PWM1->PR = 0; // no pre-scale
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 // ensure single PWM mode
bogdanm 0:9b334a45a8ff 73 LPC_PWM1->MCR = 1 << 1; // reset TC on match 0
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 // enable the specific PWM output
bogdanm 0:9b334a45a8ff 76 LPC_PWM1->PCR |= 1 << (8 + pwm);
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 pwm_clock_mhz = SystemCoreClock / 4000000;
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 // default to 20ms: standard for servos, and fine for e.g. brightness control
bogdanm 0:9b334a45a8ff 81 pwmout_period_ms(obj, 20);
bogdanm 0:9b334a45a8ff 82 pwmout_write (obj, 0);
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 // Wire pinout
bogdanm 0:9b334a45a8ff 85 pinmap_pinout(pin, PinMap_PWM);
bogdanm 0:9b334a45a8ff 86 }
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 void pwmout_free(pwmout_t* obj) {
bogdanm 0:9b334a45a8ff 89 // [TODO]
bogdanm 0:9b334a45a8ff 90 }
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 void pwmout_write(pwmout_t* obj, float value) {
bogdanm 0:9b334a45a8ff 93 if (value < 0.0f) {
bogdanm 0:9b334a45a8ff 94 value = 0.0;
bogdanm 0:9b334a45a8ff 95 } else if (value > 1.0f) {
bogdanm 0:9b334a45a8ff 96 value = 1.0;
bogdanm 0:9b334a45a8ff 97 }
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 // set channel match to percentage
bogdanm 0:9b334a45a8ff 100 uint32_t v = (uint32_t)((float)(LPC_PWM1->MR0) * value);
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 // workaround for PWM1[1] - Never make it equal MR0, else we get 1 cycle dropout
bogdanm 0:9b334a45a8ff 103 if (v == LPC_PWM1->MR0) {
bogdanm 0:9b334a45a8ff 104 v++;
bogdanm 0:9b334a45a8ff 105 }
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 *obj->MR = v;
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 // accept on next period start
bogdanm 0:9b334a45a8ff 110 LPC_PWM1->LER |= 1 << obj->pwm;
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 float pwmout_read(pwmout_t* obj) {
bogdanm 0:9b334a45a8ff 114 float v = (float)(*obj->MR) / (float)(LPC_PWM1->MR0);
bogdanm 0:9b334a45a8ff 115 return (v > 1.0f) ? (1.0f) : (v);
bogdanm 0:9b334a45a8ff 116 }
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 void pwmout_period(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 119 pwmout_period_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 120 }
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 void pwmout_period_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 123 pwmout_period_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 124 }
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 // Set the PWM period, keeping the duty cycle the same.
bogdanm 0:9b334a45a8ff 127 void pwmout_period_us(pwmout_t* obj, int us) {
bogdanm 0:9b334a45a8ff 128 // calculate number of ticks
bogdanm 0:9b334a45a8ff 129 uint32_t ticks = pwm_clock_mhz * us;
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 // set reset
bogdanm 0:9b334a45a8ff 132 LPC_PWM1->TCR = TCR_RESET;
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 // set the global match register
bogdanm 0:9b334a45a8ff 135 LPC_PWM1->MR0 = ticks;
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 // Scale the pulse width to preserve the duty ratio
bogdanm 0:9b334a45a8ff 138 if (LPC_PWM1->MR0 > 0) {
bogdanm 0:9b334a45a8ff 139 *obj->MR = (*obj->MR * ticks) / LPC_PWM1->MR0;
bogdanm 0:9b334a45a8ff 140 }
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 // set the channel latch to update value at next period start
bogdanm 0:9b334a45a8ff 143 LPC_PWM1->LER |= 1 << 0;
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 // enable counter and pwm, clear reset
bogdanm 0:9b334a45a8ff 146 LPC_PWM1->TCR = TCR_CNT_EN | TCR_PWM_EN;
bogdanm 0:9b334a45a8ff 147 }
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 150 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 151 }
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 154 pwmout_pulsewidth_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 155 }
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
bogdanm 0:9b334a45a8ff 158 // calculate number of ticks
bogdanm 0:9b334a45a8ff 159 uint32_t v = pwm_clock_mhz * us;
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 // workaround for PWM1[1] - Never make it equal MR0, else we get 1 cycle dropout
bogdanm 0:9b334a45a8ff 162 if (v == LPC_PWM1->MR0) {
bogdanm 0:9b334a45a8ff 163 v++;
bogdanm 0:9b334a45a8ff 164 }
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 // set the match register value
bogdanm 0:9b334a45a8ff 167 *obj->MR = v;
bogdanm 0:9b334a45a8ff 168
bogdanm 0:9b334a45a8ff 169 // set the channel latch to update value at next period start
bogdanm 0:9b334a45a8ff 170 LPC_PWM1->LER |= 1 << obj->pwm;
bogdanm 0:9b334a45a8ff 171 }