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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_i2c.c@181:57724642e740, 2018-02-16 (annotated)

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
181:57724642e740
Parent:
149:156823d33999
Child:
184:08ed48f1de7f
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_ll_i2c.c
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @version V1.2.0
<> 149:156823d33999 6 * @date 01-July-2016
<> 149:156823d33999 7 * @brief I2C LL module driver.
<> 149:156823d33999 8 ******************************************************************************
<> 149:156823d33999 9 * @attention
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 149:156823d33999 12 *
<> 149:156823d33999 13 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 14 * are permitted provided that the following conditions are met:
<> 149:156823d33999 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 16 * this list of conditions and the following disclaimer.
<> 149:156823d33999 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 18 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 19 * and/or other materials provided with the distribution.
<> 149:156823d33999 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 21 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 22 * without specific prior written permission.
<> 149:156823d33999 23 *
<> 149:156823d33999 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 34 *
<> 149:156823d33999 35 ******************************************************************************
<> 149:156823d33999 36 */
<> 149:156823d33999 37 #if defined(USE_FULL_LL_DRIVER)
<> 149:156823d33999 38
<> 149:156823d33999 39 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 40 #include "stm32l1xx_ll_i2c.h"
<> 149:156823d33999 41 #include "stm32l1xx_ll_bus.h"
<> 149:156823d33999 42 #include "stm32l1xx_ll_rcc.h"
<> 149:156823d33999 43 #ifdef USE_FULL_ASSERT
<> 149:156823d33999 44 #include "stm32_assert.h"
<> 149:156823d33999 45 #else
<> 149:156823d33999 46 #define assert_param(expr) ((void)0U)
<> 149:156823d33999 47 #endif
<> 149:156823d33999 48
<> 149:156823d33999 49 /** @addtogroup STM32L1xx_LL_Driver
<> 149:156823d33999 50 * @{
<> 149:156823d33999 51 */
<> 149:156823d33999 52
<> 149:156823d33999 53 #if defined (I2C1) || defined (I2C2)
<> 149:156823d33999 54
<> 149:156823d33999 55 /** @defgroup I2C_LL I2C
<> 149:156823d33999 56 * @{
<> 149:156823d33999 57 */
<> 149:156823d33999 58
<> 149:156823d33999 59 /* Private types -------------------------------------------------------------*/
<> 149:156823d33999 60 /* Private variables ---------------------------------------------------------*/
<> 149:156823d33999 61 /* Private constants ---------------------------------------------------------*/
<> 149:156823d33999 62 /* Private macros ------------------------------------------------------------*/
<> 149:156823d33999 63 /** @addtogroup I2C_LL_Private_Macros
<> 149:156823d33999 64 * @{
<> 149:156823d33999 65 */
<> 149:156823d33999 66
<> 149:156823d33999 67 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
<> 149:156823d33999 68 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
<> 149:156823d33999 69 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
<> 149:156823d33999 70 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
<> 149:156823d33999 71
<> 149:156823d33999 72 #define IS_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0) && ((__VALUE__) <= LL_I2C_MAX_SPEED_FAST))
<> 149:156823d33999 73
<> 149:156823d33999 74 #define IS_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) || \
<> 149:156823d33999 75 ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9))
<> 149:156823d33999 76
<> 149:156823d33999 77 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= (uint32_t)0x000003FFU)
<> 149:156823d33999 78
<> 149:156823d33999 79 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
<> 149:156823d33999 80 ((__VALUE__) == LL_I2C_NACK))
<> 149:156823d33999 81
<> 149:156823d33999 82 #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
<> 149:156823d33999 83 ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
<> 149:156823d33999 84 /**
<> 149:156823d33999 85 * @}
<> 149:156823d33999 86 */
<> 149:156823d33999 87
<> 149:156823d33999 88 /* Private function prototypes -----------------------------------------------*/
<> 149:156823d33999 89
<> 149:156823d33999 90 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 91 /** @addtogroup I2C_LL_Exported_Functions
<> 149:156823d33999 92 * @{
<> 149:156823d33999 93 */
<> 149:156823d33999 94
<> 149:156823d33999 95 /** @addtogroup I2C_LL_EF_Init
<> 149:156823d33999 96 * @{
<> 149:156823d33999 97 */
<> 149:156823d33999 98
<> 149:156823d33999 99 /**
<> 149:156823d33999 100 * @brief De-initialize the I2C registers to their default reset values.
<> 149:156823d33999 101 * @param I2Cx I2C Instance.
<> 149:156823d33999 102 * @retval An ErrorStatus enumeration value:
<> 149:156823d33999 103 * - SUCCESS: I2C registers are de-initialized
<> 149:156823d33999 104 * - ERROR: I2C registers are not de-initialized
<> 149:156823d33999 105 */
<> 149:156823d33999 106 uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
<> 149:156823d33999 107 {
<> 149:156823d33999 108 ErrorStatus status = SUCCESS;
<> 149:156823d33999 109
<> 149:156823d33999 110 /* Check the I2C Instance I2Cx */
<> 149:156823d33999 111 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
<> 149:156823d33999 112
<> 149:156823d33999 113 if (I2Cx == I2C1)
<> 149:156823d33999 114 {
<> 149:156823d33999 115 /* Force reset of I2C clock */
<> 149:156823d33999 116 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
<> 149:156823d33999 117
<> 149:156823d33999 118 /* Release reset of I2C clock */
<> 149:156823d33999 119 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
<> 149:156823d33999 120 }
<> 149:156823d33999 121 else if (I2Cx == I2C2)
<> 149:156823d33999 122 {
<> 149:156823d33999 123 /* Force reset of I2C clock */
<> 149:156823d33999 124 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
<> 149:156823d33999 125
<> 149:156823d33999 126 /* Release reset of I2C clock */
<> 149:156823d33999 127 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
<> 149:156823d33999 128
<> 149:156823d33999 129 }
<> 149:156823d33999 130 else
<> 149:156823d33999 131 {
<> 149:156823d33999 132 status = ERROR;
<> 149:156823d33999 133 }
<> 149:156823d33999 134
<> 149:156823d33999 135 return status;
<> 149:156823d33999 136 }
<> 149:156823d33999 137
<> 149:156823d33999 138 /**
<> 149:156823d33999 139 * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
<> 149:156823d33999 140 * @param I2Cx I2C Instance.
<> 149:156823d33999 141 * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
<> 149:156823d33999 142 * @retval An ErrorStatus enumeration value:
<> 149:156823d33999 143 * - SUCCESS: I2C registers are initialized
<> 149:156823d33999 144 * - ERROR: Not applicable
<> 149:156823d33999 145 */
<> 149:156823d33999 146 uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
<> 149:156823d33999 147 {
<> 149:156823d33999 148 LL_RCC_ClocksTypeDef rcc_clocks;
<> 149:156823d33999 149
<> 149:156823d33999 150 /* Check the I2C Instance I2Cx */
<> 149:156823d33999 151 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
<> 149:156823d33999 152
<> 149:156823d33999 153 /* Check the I2C parameters from I2C_InitStruct */
<> 149:156823d33999 154 assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
<> 149:156823d33999 155 assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->ClockSpeed));
<> 149:156823d33999 156 assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->DutyCycle));
<> 149:156823d33999 157 assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
<> 149:156823d33999 158 assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
<> 149:156823d33999 159 assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
<> 149:156823d33999 160
<> 149:156823d33999 161 /* Disable the selected I2Cx Peripheral */
<> 149:156823d33999 162 LL_I2C_Disable(I2Cx);
<> 149:156823d33999 163
<> 149:156823d33999 164 /* Retrieve Clock frequencies */
<> 149:156823d33999 165 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
<> 149:156823d33999 166
<> 149:156823d33999 167 /*---------------------------- I2Cx SCL Clock Speed Configuration ------------
<> 149:156823d33999 168 * Configure the SCL speed :
<> 149:156823d33999 169 * - ClockSpeed: I2C_CR2_FREQ[5:0], I2C_TRISE_TRISE[5:0], I2C_CCR_FS,
<> 149:156823d33999 170 * and I2C_CCR_CCR[11:0] bits
<> 149:156823d33999 171 * - DutyCycle: I2C_CCR_DUTY[7:0] bits
<> 149:156823d33999 172 */
<> 149:156823d33999 173 LL_I2C_ConfigSpeed(I2Cx, rcc_clocks.PCLK1_Frequency, I2C_InitStruct->ClockSpeed, I2C_InitStruct->DutyCycle);
<> 149:156823d33999 174
<> 149:156823d33999 175 /*---------------------------- I2Cx OAR1 Configuration -----------------------
<> 149:156823d33999 176 * Disable, Configure and Enable I2Cx device own address 1 with parameters :
<> 149:156823d33999 177 * - OwnAddress1: I2C_OAR1_ADD[9:8], I2C_OAR1_ADD[7:1] and I2C_OAR1_ADD0 bits
<> 149:156823d33999 178 * - OwnAddrSize: I2C_OAR1_ADDMODE bit
<> 149:156823d33999 179 */
<> 149:156823d33999 180 LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
<> 149:156823d33999 181
<> 149:156823d33999 182 /*---------------------------- I2Cx MODE Configuration -----------------------
<> 149:156823d33999 183 * Configure I2Cx peripheral mode with parameter :
<> 149:156823d33999 184 * - PeripheralMode: I2C_CR1_SMBUS, I2C_CR1_SMBTYPE and I2C_CR1_ENARP bits
<> 149:156823d33999 185 */
<> 149:156823d33999 186 LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
<> 149:156823d33999 187
<> 149:156823d33999 188 /* Enable the selected I2Cx Peripheral */
<> 149:156823d33999 189 LL_I2C_Enable(I2Cx);
<> 149:156823d33999 190
<> 149:156823d33999 191 /*---------------------------- I2Cx CR2 Configuration ------------------------
<> 149:156823d33999 192 * Configure the ACKnowledge or Non ACKnowledge condition
<> 149:156823d33999 193 * after the address receive match code or next received byte with parameter :
<> 149:156823d33999 194 * - TypeAcknowledge: I2C_CR2_NACK bit
<> 149:156823d33999 195 */
<> 149:156823d33999 196 LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
<> 149:156823d33999 197
<> 149:156823d33999 198 return SUCCESS;
<> 149:156823d33999 199 }
<> 149:156823d33999 200
<> 149:156823d33999 201 /**
<> 149:156823d33999 202 * @brief Set each @ref LL_I2C_InitTypeDef field to default value.
<> 149:156823d33999 203 * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
<> 149:156823d33999 204 * @retval None
<> 149:156823d33999 205 */
<> 149:156823d33999 206 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
<> 149:156823d33999 207 {
<> 149:156823d33999 208 /* Set I2C_InitStruct fields to default values */
<> 149:156823d33999 209 I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
<> 149:156823d33999 210 I2C_InitStruct->ClockSpeed = 5000U;
<> 149:156823d33999 211 I2C_InitStruct->DutyCycle = LL_I2C_DUTYCYCLE_2;
<> 149:156823d33999 212 I2C_InitStruct->OwnAddress1 = 0U;
<> 149:156823d33999 213 I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
<> 149:156823d33999 214 I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
<> 149:156823d33999 215 }
<> 149:156823d33999 216
<> 149:156823d33999 217 /**
<> 149:156823d33999 218 * @}
<> 149:156823d33999 219 */
<> 149:156823d33999 220
<> 149:156823d33999 221 /**
<> 149:156823d33999 222 * @}
<> 149:156823d33999 223 */
<> 149:156823d33999 224
<> 149:156823d33999 225 /**
<> 149:156823d33999 226 * @}
<> 149:156823d33999 227 */
<> 149:156823d33999 228
<> 149:156823d33999 229 #endif /* I2C1 || I2C2 */
<> 149:156823d33999 230
<> 149:156823d33999 231 /**
<> 149:156823d33999 232 * @}
<> 149:156823d33999 233 */
<> 149:156823d33999 234
<> 149:156823d33999 235 #endif /* USE_FULL_LL_DRIVER */
<> 149:156823d33999 236
<> 149:156823d33999 237 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/