Diff: targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_301/LPC11U24.sct

Revision:

144:ef7eb2e8f9f7

Parent:

0:9b334a45a8ff

--- a/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_301/LPC11U24.sct	Tue Aug 02 14:07:36 2016 +0000
+++ b/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_301/LPC11U24.sct	Fri Sep 02 15:07:44 2016 +0100
@@ -1,17 +1,17 @@
-
-LR_IROM1 0x00000000 0x8000  {    ; load region size_region (32k)
-  ER_IROM1 0x00000000 0x8000  {  ; load address = execution address
-   *.o (RESET, +First)
-   *(InRoot$$Sections)
-   .ANY (+RO)
-  }
-  ; 8_byte_aligned(48 vect * 4 bytes) =  8_byte_aligned(0xC0) = 0xC0
-  ; 6KB - 0xC0 = 0x1740
-  RW_IRAM1 0x100000C0 0x1740  {
-   .ANY (+RW +ZI)
-  }
-  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
-   .ANY (USBRAM)
-  }
-}
-
+
+LR_IROM1 0x00000000 0x8000  {    ; load region size_region (32k)
+  ER_IROM1 0x00000000 0x8000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  ; 8_byte_aligned(48 vect * 4 bytes) =  8_byte_aligned(0xC0) = 0xC0
+  ; 6KB - 0xC0 = 0x1740
+  RW_IRAM1 0x100000C0 0x1740  {
+   .ANY (+RW +ZI)
+  }
+  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
+   .ANY (USBRAM)
+  }
+}
+