mbed official
mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
Diff: targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_flash_ex.h
- Revision:
- 165:e614a9f1c9e2
- Parent:
- 154:37f96f9d4de2
- Child:
- 187:0387e8f68319
--- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_flash_ex.h Wed May 10 12:06:41 2017 +0100
+++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_flash_ex.h Fri May 26 12:39:01 2017 +0100
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f1xx_hal_flash_ex.h
* @author MCD Application Team
- * @version V1.0.5
- * @date 06-December-2016
+ * @version V1.1.0
+ * @date 14-April-2017
* @brief Header file of Flash HAL Extended module.
******************************************************************************
* @attention
@@ -58,9 +58,9 @@
* @{
*/
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFFF7E0)
-#define OBR_REG_INDEX ((uint32_t)1)
-#define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP))
+#define FLASH_SIZE_DATA_REGISTER 0x1FFFF7E0U
+#define OBR_REG_INDEX 1U
+#define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP))
/**
* @}
@@ -74,7 +74,7 @@
#define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA)))
-#define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE))
+#define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE))
#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1))
@@ -92,39 +92,39 @@
/* Low Density */
#if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6))
-#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \
- ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF))
+#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08007FFFU) : \
+ ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08003FFFU))
#endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
/* Medium Density */
#if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
-#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \
- (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF) : \
- (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \
- ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF))))
+#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \
+ (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU) : \
+ (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFFU) : \
+ ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFFU))))
#endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
/* High Density */
#if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE))
-#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFF) : \
- (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFF) : \
- ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF)))
+#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFFU) : \
+ (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFFU) : \
+ ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU)))
#endif /* STM32F100xE || STM32F101xE || STM32F103xE */
/* XL Density */
#if defined(FLASH_BANK2_END)
-#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFF) : \
- ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFF))
+#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFFU) : \
+ ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFFU))
#endif /* FLASH_BANK2_END */
/* Connectivity Line */
#if (defined(STM32F105xC) || defined(STM32F107xC))
-#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF) : \
- (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \
- ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF)))
+#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU) : \
+ (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \
+ ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU)))
#endif /* STM32F105xC || STM32F107xC */
-#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
+#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U))
#if defined(FLASH_BANK2_END)
#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
@@ -136,40 +136,40 @@
/* Low Density */
#if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6))
-#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \
- ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFF)))
+#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \
+ ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFFU)))
#endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
/* Medium Density */
#if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
-#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \
- ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? \
- ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \
- ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFF)))))
+#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \
+ ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? \
+ ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \
+ ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFFU)))))
#endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
/* High Density */
#if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE))
-#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? \
- ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? \
- ((ADDRESS) <= 0x0805FFFF) : ((ADDRESS) <= 0x0803FFFF))))
+#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? \
+ ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? \
+ ((ADDRESS) <= 0x0805FFFFU) : ((ADDRESS) <= 0x0803FFFFU))))
#endif /* STM32F100xE || STM32F101xE || STM32F103xE */
/* XL Density */
#if defined(FLASH_BANK2_END)
-#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? \
- ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFF)))
+#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? \
+ ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFFU)))
#endif /* FLASH_BANK2_END */
/* Connectivity Line */
#if (defined(STM32F105xC) || defined(STM32F107xC))
-#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? \
- ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \
- ((ADDRESS) <= 0x0801FFFF) : ((ADDRESS) <= 0x0800FFFF))))
+#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? \
+ ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \
+ ((ADDRESS) <= 0x0801FFFFU) : ((ADDRESS) <= 0x0800FFFFU))))
#endif /* STM32F105xC || STM32F107xC */
@@ -258,12 +258,12 @@
* @{
*/
#if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
-#define FLASH_PAGE_SIZE ((uint32_t)0x400)
+#define FLASH_PAGE_SIZE 0x400U
#endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
/* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
#if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC))
-#define FLASH_PAGE_SIZE ((uint32_t)0x800)
+#define FLASH_PAGE_SIZE 0x800U
#endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
/* STM32F101xG || STM32F103xG */
/* STM32F105xC || STM32F107xC */
@@ -275,8 +275,8 @@
/** @defgroup FLASHEx_Type_Erase Type Erase
* @{
*/
-#define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/
-#define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x02) /*!<Flash mass erase activation*/
+#define FLASH_TYPEERASE_PAGES 0x00U /*!<Pages erase only*/
+#define FLASH_TYPEERASE_MASSERASE 0x02U /*!<Flash mass erase activation*/
/**
* @}
@@ -286,12 +286,12 @@
* @{
*/
#if defined(FLASH_BANK2_END)
-#define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
-#define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */
+#define FLASH_BANK_1 1U /*!< Bank 1 */
+#define FLASH_BANK_2 2U /*!< Bank 2 */
#define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
#else
-#define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
+#define FLASH_BANK_1 1U /*!< Bank 1 */
#endif
/**
* @}
@@ -308,10 +308,10 @@
/** @defgroup FLASHEx_OB_Type Option Bytes Type
* @{
*/
-#define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/
-#define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/
-#define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/
-#define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/
+#define OPTIONBYTE_WRP 0x01U /*!<WRP option byte configuration*/
+#define OPTIONBYTE_RDP 0x02U /*!<RDP option byte configuration*/
+#define OPTIONBYTE_USER 0x04U /*!<USER option byte configuration*/
+#define OPTIONBYTE_DATA 0x08U /*!<DATA option byte configuration*/
/**
* @}
@@ -320,8 +320,8 @@
/** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State
* @{
*/
-#define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/
-#define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/
+#define OB_WRPSTATE_DISABLE 0x00U /*!<Disable the write protection of the desired pages*/
+#define OB_WRPSTATE_ENABLE 0x01U /*!<Enable the write protection of the desired pagess*/
/**
* @}
@@ -334,43 +334,43 @@
#if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \
|| defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \
|| defined(STM32F103xB)
-#define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /*!< Write protection of page 0 to 3 */
-#define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /*!< Write protection of page 4 to 7 */
-#define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /*!< Write protection of page 8 to 11 */
-#define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /*!< Write protection of page 12 to 15 */
-#define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /*!< Write protection of page 16 to 19 */
-#define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /*!< Write protection of page 20 to 23 */
-#define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /*!< Write protection of page 24 to 27 */
-#define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /*!< Write protection of page 28 to 31 */
+#define OB_WRP_PAGES0TO3 0x00000001U /*!< Write protection of page 0 to 3 */
+#define OB_WRP_PAGES4TO7 0x00000002U /*!< Write protection of page 4 to 7 */
+#define OB_WRP_PAGES8TO11 0x00000004U /*!< Write protection of page 8 to 11 */
+#define OB_WRP_PAGES12TO15 0x00000008U /*!< Write protection of page 12 to 15 */
+#define OB_WRP_PAGES16TO19 0x00000010U /*!< Write protection of page 16 to 19 */
+#define OB_WRP_PAGES20TO23 0x00000020U /*!< Write protection of page 20 to 23 */
+#define OB_WRP_PAGES24TO27 0x00000040U /*!< Write protection of page 24 to 27 */
+#define OB_WRP_PAGES28TO31 0x00000080U /*!< Write protection of page 28 to 31 */
#endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
/* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
/* STM32 Medium-density devices */
#if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
-#define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /*!< Write protection of page 32 to 35 */
-#define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /*!< Write protection of page 36 to 39 */
-#define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /*!< Write protection of page 40 to 43 */
-#define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /*!< Write protection of page 44 to 47 */
-#define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /*!< Write protection of page 48 to 51 */
-#define OB_WRP_PAGES52TO55 ((uint32_t)0x00002000) /*!< Write protection of page 52 to 55 */
-#define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /*!< Write protection of page 56 to 59 */
-#define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /*!< Write protection of page 60 to 63 */
-#define OB_WRP_PAGES64TO67 ((uint32_t)0x00010000) /*!< Write protection of page 64 to 67 */
-#define OB_WRP_PAGES68TO71 ((uint32_t)0x00020000) /*!< Write protection of page 68 to 71 */
-#define OB_WRP_PAGES72TO75 ((uint32_t)0x00040000) /*!< Write protection of page 72 to 75 */
-#define OB_WRP_PAGES76TO79 ((uint32_t)0x00080000) /*!< Write protection of page 76 to 79 */
-#define OB_WRP_PAGES80TO83 ((uint32_t)0x00100000) /*!< Write protection of page 80 to 83 */
-#define OB_WRP_PAGES84TO87 ((uint32_t)0x00200000) /*!< Write protection of page 84 to 87 */
-#define OB_WRP_PAGES88TO91 ((uint32_t)0x00400000) /*!< Write protection of page 88 to 91 */
-#define OB_WRP_PAGES92TO95 ((uint32_t)0x00800000) /*!< Write protection of page 92 to 95 */
-#define OB_WRP_PAGES96TO99 ((uint32_t)0x01000000) /*!< Write protection of page 96 to 99 */
-#define OB_WRP_PAGES100TO103 ((uint32_t)0x02000000) /*!< Write protection of page 100 to 103 */
-#define OB_WRP_PAGES104TO107 ((uint32_t)0x04000000) /*!< Write protection of page 104 to 107 */
-#define OB_WRP_PAGES108TO111 ((uint32_t)0x08000000) /*!< Write protection of page 108 to 111 */
-#define OB_WRP_PAGES112TO115 ((uint32_t)0x10000000) /*!< Write protection of page 112 to 115 */
-#define OB_WRP_PAGES116TO119 ((uint32_t)0x20000000) /*!< Write protection of page 115 to 119 */
-#define OB_WRP_PAGES120TO123 ((uint32_t)0x40000000) /*!< Write protection of page 120 to 123 */
-#define OB_WRP_PAGES124TO127 ((uint32_t)0x80000000) /*!< Write protection of page 124 to 127 */
+#define OB_WRP_PAGES32TO35 0x00000100U /*!< Write protection of page 32 to 35 */
+#define OB_WRP_PAGES36TO39 0x00000200U /*!< Write protection of page 36 to 39 */
+#define OB_WRP_PAGES40TO43 0x00000400U /*!< Write protection of page 40 to 43 */
+#define OB_WRP_PAGES44TO47 0x00000800U /*!< Write protection of page 44 to 47 */
+#define OB_WRP_PAGES48TO51 0x00001000U /*!< Write protection of page 48 to 51 */
+#define OB_WRP_PAGES52TO55 0x00002000U /*!< Write protection of page 52 to 55 */
+#define OB_WRP_PAGES56TO59 0x00004000U /*!< Write protection of page 56 to 59 */
+#define OB_WRP_PAGES60TO63 0x00008000U /*!< Write protection of page 60 to 63 */
+#define OB_WRP_PAGES64TO67 0x00010000U /*!< Write protection of page 64 to 67 */
+#define OB_WRP_PAGES68TO71 0x00020000U /*!< Write protection of page 68 to 71 */
+#define OB_WRP_PAGES72TO75 0x00040000U /*!< Write protection of page 72 to 75 */
+#define OB_WRP_PAGES76TO79 0x00080000U /*!< Write protection of page 76 to 79 */
+#define OB_WRP_PAGES80TO83 0x00100000U /*!< Write protection of page 80 to 83 */
+#define OB_WRP_PAGES84TO87 0x00200000U /*!< Write protection of page 84 to 87 */
+#define OB_WRP_PAGES88TO91 0x00400000U /*!< Write protection of page 88 to 91 */
+#define OB_WRP_PAGES92TO95 0x00800000U /*!< Write protection of page 92 to 95 */
+#define OB_WRP_PAGES96TO99 0x01000000U /*!< Write protection of page 96 to 99 */
+#define OB_WRP_PAGES100TO103 0x02000000U /*!< Write protection of page 100 to 103 */
+#define OB_WRP_PAGES104TO107 0x04000000U /*!< Write protection of page 104 to 107 */
+#define OB_WRP_PAGES108TO111 0x08000000U /*!< Write protection of page 108 to 111 */
+#define OB_WRP_PAGES112TO115 0x10000000U /*!< Write protection of page 112 to 115 */
+#define OB_WRP_PAGES116TO119 0x20000000U /*!< Write protection of page 115 to 119 */
+#define OB_WRP_PAGES120TO123 0x40000000U /*!< Write protection of page 120 to 123 */
+#define OB_WRP_PAGES124TO127 0x80000000U /*!< Write protection of page 124 to 127 */
#endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
@@ -378,81 +378,81 @@
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \
|| defined(STM32F101xG) || defined(STM32F103xG) \
|| defined(STM32F105xC) || defined(STM32F107xC)
-#define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /*!< Write protection of page 0 TO 1 */
-#define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /*!< Write protection of page 2 TO 3 */
-#define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /*!< Write protection of page 4 TO 5 */
-#define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /*!< Write protection of page 6 TO 7 */
-#define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /*!< Write protection of page 8 TO 9 */
-#define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /*!< Write protection of page 10 TO 11 */
-#define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /*!< Write protection of page 12 TO 13 */
-#define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /*!< Write protection of page 14 TO 15 */
-#define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /*!< Write protection of page 16 TO 17 */
-#define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /*!< Write protection of page 18 TO 19 */
-#define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /*!< Write protection of page 20 TO 21 */
-#define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /*!< Write protection of page 22 TO 23 */
-#define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /*!< Write protection of page 24 TO 25 */
-#define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /*!< Write protection of page 26 TO 27 */
-#define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /*!< Write protection of page 28 TO 29 */
-#define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /*!< Write protection of page 30 TO 31 */
-#define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /*!< Write protection of page 32 TO 33 */
-#define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /*!< Write protection of page 34 TO 35 */
-#define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /*!< Write protection of page 36 TO 37 */
-#define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /*!< Write protection of page 38 TO 39 */
-#define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /*!< Write protection of page 40 TO 41 */
-#define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /*!< Write protection of page 42 TO 43 */
-#define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /*!< Write protection of page 44 TO 45 */
-#define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /*!< Write protection of page 46 TO 47 */
-#define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /*!< Write protection of page 48 TO 49 */
-#define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /*!< Write protection of page 50 TO 51 */
-#define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /*!< Write protection of page 52 TO 53 */
-#define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /*!< Write protection of page 54 TO 55 */
-#define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /*!< Write protection of page 56 TO 57 */
-#define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /*!< Write protection of page 58 TO 59 */
-#define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /*!< Write protection of page 60 TO 61 */
-#define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 127 */
-#define OB_WRP_PAGES62TO255 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 255 */
-#define OB_WRP_PAGES62TO511 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 511 */
+#define OB_WRP_PAGES0TO1 0x00000001U /*!< Write protection of page 0 TO 1 */
+#define OB_WRP_PAGES2TO3 0x00000002U /*!< Write protection of page 2 TO 3 */
+#define OB_WRP_PAGES4TO5 0x00000004U /*!< Write protection of page 4 TO 5 */
+#define OB_WRP_PAGES6TO7 0x00000008U /*!< Write protection of page 6 TO 7 */
+#define OB_WRP_PAGES8TO9 0x00000010U /*!< Write protection of page 8 TO 9 */
+#define OB_WRP_PAGES10TO11 0x00000020U /*!< Write protection of page 10 TO 11 */
+#define OB_WRP_PAGES12TO13 0x00000040U /*!< Write protection of page 12 TO 13 */
+#define OB_WRP_PAGES14TO15 0x00000080U /*!< Write protection of page 14 TO 15 */
+#define OB_WRP_PAGES16TO17 0x00000100U /*!< Write protection of page 16 TO 17 */
+#define OB_WRP_PAGES18TO19 0x00000200U /*!< Write protection of page 18 TO 19 */
+#define OB_WRP_PAGES20TO21 0x00000400U /*!< Write protection of page 20 TO 21 */
+#define OB_WRP_PAGES22TO23 0x00000800U /*!< Write protection of page 22 TO 23 */
+#define OB_WRP_PAGES24TO25 0x00001000U /*!< Write protection of page 24 TO 25 */
+#define OB_WRP_PAGES26TO27 0x00002000U /*!< Write protection of page 26 TO 27 */
+#define OB_WRP_PAGES28TO29 0x00004000U /*!< Write protection of page 28 TO 29 */
+#define OB_WRP_PAGES30TO31 0x00008000U /*!< Write protection of page 30 TO 31 */
+#define OB_WRP_PAGES32TO33 0x00010000U /*!< Write protection of page 32 TO 33 */
+#define OB_WRP_PAGES34TO35 0x00020000U /*!< Write protection of page 34 TO 35 */
+#define OB_WRP_PAGES36TO37 0x00040000U /*!< Write protection of page 36 TO 37 */
+#define OB_WRP_PAGES38TO39 0x00080000U /*!< Write protection of page 38 TO 39 */
+#define OB_WRP_PAGES40TO41 0x00100000U /*!< Write protection of page 40 TO 41 */
+#define OB_WRP_PAGES42TO43 0x00200000U /*!< Write protection of page 42 TO 43 */
+#define OB_WRP_PAGES44TO45 0x00400000U /*!< Write protection of page 44 TO 45 */
+#define OB_WRP_PAGES46TO47 0x00800000U /*!< Write protection of page 46 TO 47 */
+#define OB_WRP_PAGES48TO49 0x01000000U /*!< Write protection of page 48 TO 49 */
+#define OB_WRP_PAGES50TO51 0x02000000U /*!< Write protection of page 50 TO 51 */
+#define OB_WRP_PAGES52TO53 0x04000000U /*!< Write protection of page 52 TO 53 */
+#define OB_WRP_PAGES54TO55 0x08000000U /*!< Write protection of page 54 TO 55 */
+#define OB_WRP_PAGES56TO57 0x10000000U /*!< Write protection of page 56 TO 57 */
+#define OB_WRP_PAGES58TO59 0x20000000U /*!< Write protection of page 58 TO 59 */
+#define OB_WRP_PAGES60TO61 0x40000000U /*!< Write protection of page 60 TO 61 */
+#define OB_WRP_PAGES62TO127 0x80000000U /*!< Write protection of page 62 TO 127 */
+#define OB_WRP_PAGES62TO255 0x80000000U /*!< Write protection of page 62 TO 255 */
+#define OB_WRP_PAGES62TO511 0x80000000U /*!< Write protection of page 62 TO 511 */
#endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
/* STM32F101xG || STM32F103xG */
/* STM32F105xC || STM32F107xC */
-#define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */
+#define OB_WRP_ALLPAGES 0xFFFFFFFFU /*!< Write protection of all Pages */
/* Low Density */
#if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)
-#define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
+#define OB_WRP_PAGES0TO31MASK 0x000000FFU
#endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
/* Medium Density */
#if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
-#define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
-#define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00)
-#define OB_WRP_PAGES64TO95MASK ((uint32_t)0x00FF0000)
-#define OB_WRP_PAGES96TO127MASK ((uint32_t)0xFF000000)
+#define OB_WRP_PAGES0TO31MASK 0x000000FFU
+#define OB_WRP_PAGES32TO63MASK 0x0000FF00U
+#define OB_WRP_PAGES64TO95MASK 0x00FF0000U
+#define OB_WRP_PAGES96TO127MASK 0xFF000000U
#endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
/* High Density */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)
-#define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
-#define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
-#define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
-#define OB_WRP_PAGES48TO255MASK ((uint32_t)0xFF000000)
+#define OB_WRP_PAGES0TO15MASK 0x000000FFU
+#define OB_WRP_PAGES16TO31MASK 0x0000FF00U
+#define OB_WRP_PAGES32TO47MASK 0x00FF0000U
+#define OB_WRP_PAGES48TO255MASK 0xFF000000U
#endif /* STM32F100xE || STM32F101xE || STM32F103xE */
/* XL Density */
#if defined(STM32F101xG) || defined(STM32F103xG)
-#define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
-#define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
-#define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
-#define OB_WRP_PAGES48TO511MASK ((uint32_t)0xFF000000)
+#define OB_WRP_PAGES0TO15MASK 0x000000FFU
+#define OB_WRP_PAGES16TO31MASK 0x0000FF00U
+#define OB_WRP_PAGES32TO47MASK 0x00FF0000U
+#define OB_WRP_PAGES48TO511MASK 0xFF000000U
#endif /* STM32F101xG || STM32F103xG */
/* Connectivity line devices */
#if defined(STM32F105xC) || defined(STM32F107xC)
-#define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
-#define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
-#define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
-#define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000)
+#define OB_WRP_PAGES0TO15MASK 0x000000FFU
+#define OB_WRP_PAGES16TO31MASK 0x0000FF00U
+#define OB_WRP_PAGES32TO47MASK 0x00FF0000U
+#define OB_WRP_PAGES48TO127MASK 0xFF000000U
#endif /* STM32F105xC || STM32F107xC */
/**
@@ -509,8 +509,8 @@
/** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address
* @{
*/
-#define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804)
-#define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806)
+#define OB_DATA_ADDRESS_DATA0 0x1FFFF804U
+#define OB_DATA_ADDRESS_DATA1 0x1FFFF806U
/**
* @}
*/
@@ -538,10 +538,10 @@
#define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */
#define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */
- #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16) /*!< FLASH Bank2 Busy flag */
- #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16) /*!< FLASH Bank2 Programming error flag */
- #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16) /*!< FLASH Bank2 Write protected error flag */
- #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16) /*!< FLASH Bank2 End of Operation flag */
+ #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16U) /*!< FLASH Bank2 Busy flag */
+ #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16U) /*!< FLASH Bank2 Programming error flag */
+ #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16U) /*!< FLASH Bank2 Write protected error flag */
+ #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16U) /*!< FLASH Bank2 End of Operation flag */
#else
@@ -551,7 +551,7 @@
#define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */
#endif
- #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8 | FLASH_OBR_OPTERR)) /*!< Option Byte Error */
+ #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8U | FLASH_OBR_OPTERR)) /*!< Option Byte Error */
/**
* @}
*/
@@ -567,8 +567,8 @@
#define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */
#define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */
- #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16) /*!< End of FLASH Operation Interrupt source Bank2 */
- #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16) /*!< Error Interrupt source Bank2 */
+ #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16U) /*!< End of FLASH Operation Interrupt source Bank2 */
+ #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16U) /*!< Error Interrupt source Bank2 */
#else
@@ -612,10 +612,10 @@
*/
#define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \
/* Enable Bank1 IT */ \
- SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \
+ SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \
/* Enable Bank2 IT */ \
- SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \
- } while(0)
+ SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \
+ } while(0U)
/**
* @brief Disable the specified FLASH interrupt.
@@ -629,10 +629,10 @@
*/
#define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \
/* Disable Bank1 IT */ \
- CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \
+ CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \
/* Disable Bank2 IT */ \
- CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \
- } while(0)
+ CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \
+ } while(0U)
/**
* @brief Get the specified FLASH flag status.
@@ -653,7 +653,7 @@
(FLASH->OBR & FLASH_OBR_OPTERR) : \
((((__FLAG__) & SR_FLAG_MASK) != RESET)? \
(FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \
- (FLASH->SR2 & ((__FLAG__) >> 16))))
+ (FLASH->SR2 & ((__FLAG__) >> 16U))))
/**
* @brief Clear the specified FLASH flag.
@@ -683,12 +683,12 @@
FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \
} \
/* Clear Flag in Bank2 */ \
- if (((__FLAG__) >> 16) != RESET) \
+ if (((__FLAG__) >> 16U) != RESET) \
{ \
- FLASH->SR2 = ((__FLAG__) >> 16); \
+ FLASH->SR2 = ((__FLAG__) >> 16U); \
} \
} \
- } while(0)
+ } while(0U)
#else
/**
* @brief Enable the specified FLASH interrupt.
@@ -744,7 +744,7 @@
/* Clear Flag in Bank1 */ \
FLASH->SR = (__FLAG__); \
} \
- } while(0)
+ } while(0U)
#endif
