Diff: targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_cortex.h

Revision:

180:96ed750bd169

Parent:

156:95d6b41a828b

--- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_cortex.h	Thu Dec 07 14:01:42 2017 +0000
+++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_cortex.h	Wed Jan 17 15:23:54 2018 +0000
@@ -2,8 +2,6 @@
   ******************************************************************************
   * @file    stm32f0xx_ll_cortex.h
   * @author  MCD Application Team
-  * @version V1.4.0
-  * @date    27-May-2016
   * @brief   Header file of CORTEX LL module.
   @verbatim
   ==============================================================================
@@ -83,8 +81,8 @@
 /** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source
   * @{
   */
-#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8     ((uint32_t)0x00000000U)                 /*!< AHB clock divided by 8 selected as SysTick clock source.*/
-#define LL_SYSTICK_CLKSOURCE_HCLK          ((uint32_t)SysTick_CTRL_CLKSOURCE_Msk) /*!< AHB clock selected as SysTick clock source. */
+#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8     0x00000000U                 /*!< AHB clock divided by 8 selected as SysTick clock source.*/
+#define LL_SYSTICK_CLKSOURCE_HCLK          SysTick_CTRL_CLKSOURCE_Msk  /*!< AHB clock selected as SysTick clock source. */
 /**
   * @}
   */