mbed official
mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
Diff: targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_flash_ex.h
- Revision:
- 156:95d6b41a828b
- Parent:
- 149:156823d33999
- Child:
- 180:96ed750bd169
--- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_flash_ex.h Thu Jan 05 10:51:54 2017 +0000
+++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_flash_ex.h Mon Jan 16 15:03:32 2017 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_hal_flash_ex.h
* @author MCD Application Team
- * @version V1.4.0
- * @date 27-May-2016
+ * @version V1.5.0
+ * @date 04-November-2016
* @brief Header file of Flash HAL Extended module.
******************************************************************************
* @attention
@@ -89,7 +89,7 @@
#endif /* FLASH_OBR_BOOT_SEL */
-#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
+#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U))
#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= FLASH_BANK1_END)
@@ -162,12 +162,12 @@
*/
#if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \
|| defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6)
-#define FLASH_PAGE_SIZE 0x400
+#define FLASH_PAGE_SIZE 0x400U
#endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F058xx || STM32F070x6 */
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \
|| defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
-#define FLASH_PAGE_SIZE 0x800
+#define FLASH_PAGE_SIZE 0x800U
#endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F030xC */
/**
* @}
@@ -176,8 +176,8 @@
/** @defgroup FLASHEx_Type_Erase FLASH Type Erase
* @{
*/
-#define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/
-#define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!<Flash mass erase activation*/
+#define FLASH_TYPEERASE_PAGES (0x00U) /*!<Pages erase only*/
+#define FLASH_TYPEERASE_MASSERASE (0x01U) /*!<Flash mass erase activation*/
/**
* @}
@@ -190,10 +190,10 @@
/** @defgroup FLASHEx_OB_Type Option Bytes Type
* @{
*/
-#define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/
-#define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/
-#define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/
-#define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/
+#define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration*/
+#define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration*/
+#define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration*/
+#define OPTIONBYTE_DATA (0x08U) /*!<DATA option byte configuration*/
/**
* @}
@@ -202,8 +202,8 @@
/** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State
* @{
*/
-#define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/
-#define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/
+#define OB_WRPSTATE_DISABLE (0x00U) /*!<Disable the write protection of the desired pages*/
+#define OB_WRPSTATE_ENABLE (0x01U) /*!<Enable the write protection of the desired pagess*/
/**
* @}
@@ -214,98 +214,98 @@
*/
#if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \
|| defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6)
-#define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /* Write protection of page 0 to 3 */
-#define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /* Write protection of page 4 to 7 */
-#define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /* Write protection of page 8 to 11 */
-#define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /* Write protection of page 12 to 15 */
-#define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /* Write protection of page 16 to 19 */
-#define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /* Write protection of page 20 to 23 */
-#define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /* Write protection of page 24 to 27 */
-#define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /* Write protection of page 28 to 31 */
+#define OB_WRP_PAGES0TO3 (0x00000001U) /* Write protection of page 0 to 3 */
+#define OB_WRP_PAGES4TO7 (0x00000002U) /* Write protection of page 4 to 7 */
+#define OB_WRP_PAGES8TO11 (0x00000004U) /* Write protection of page 8 to 11 */
+#define OB_WRP_PAGES12TO15 (0x00000008U) /* Write protection of page 12 to 15 */
+#define OB_WRP_PAGES16TO19 (0x00000010U) /* Write protection of page 16 to 19 */
+#define OB_WRP_PAGES20TO23 (0x00000020U) /* Write protection of page 20 to 23 */
+#define OB_WRP_PAGES24TO27 (0x00000040U) /* Write protection of page 24 to 27 */
+#define OB_WRP_PAGES28TO31 (0x00000080U) /* Write protection of page 28 to 31 */
#if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx)
-#define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /* Write protection of page 32 to 35 */
-#define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /* Write protection of page 36 to 39 */
-#define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /* Write protection of page 40 to 43 */
-#define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /* Write protection of page 44 to 47 */
-#define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /* Write protection of page 48 to 51 */
-#define OB_WRP_PAGES52TO57 ((uint32_t)0x00002000) /* Write protection of page 52 to 57 */
-#define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /* Write protection of page 56 to 59 */
-#define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /* Write protection of page 60 to 63 */
+#define OB_WRP_PAGES32TO35 (0x00000100U) /* Write protection of page 32 to 35 */
+#define OB_WRP_PAGES36TO39 (0x00000200U) /* Write protection of page 36 to 39 */
+#define OB_WRP_PAGES40TO43 (0x00000400U) /* Write protection of page 40 to 43 */
+#define OB_WRP_PAGES44TO47 (0x00000800U) /* Write protection of page 44 to 47 */
+#define OB_WRP_PAGES48TO51 (0x00001000U) /* Write protection of page 48 to 51 */
+#define OB_WRP_PAGES52TO57 (0x00002000U) /* Write protection of page 52 to 57 */
+#define OB_WRP_PAGES56TO59 (0x00004000U) /* Write protection of page 56 to 59 */
+#define OB_WRP_PAGES60TO63 (0x00008000U) /* Write protection of page 60 to 63 */
#endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */
#if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \
|| defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6)
-#define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FFU)
+#define OB_WRP_PAGES0TO31MASK (0x000000FFU)
#endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F058xx || STM32F070x6 */
#if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx)
-#define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00U)
+#define OB_WRP_PAGES32TO63MASK (0x0000FF00U)
#endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */
#if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F038xx)|| defined(STM32F070x6)
-#define OB_WRP_ALLPAGES ((uint32_t)0x000000FFU) /*!< Write protection of all pages */
+#define OB_WRP_ALLPAGES (0x000000FFU) /*!< Write protection of all pages */
#endif /* STM32F030x6 || STM32F031x6 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F070x6 */
#if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx)
-#define OB_WRP_ALLPAGES ((uint32_t)0x0000FFFF) /*!< Write protection of all pages */
+#define OB_WRP_ALLPAGES (0x0000FFFFU) /*!< Write protection of all pages */
#endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */
#endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F058xx || STM32F070x6 */
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \
|| defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
-#define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /* Write protection of page 0 to 1 */
-#define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /* Write protection of page 2 to 3 */
-#define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /* Write protection of page 4 to 5 */
-#define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /* Write protection of page 6 to 7 */
-#define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /* Write protection of page 8 to 9 */
-#define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /* Write protection of page 10 to 11 */
-#define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /* Write protection of page 12 to 13 */
-#define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /* Write protection of page 14 to 15 */
-#define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /* Write protection of page 16 to 17 */
-#define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /* Write protection of page 18 to 19 */
-#define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /* Write protection of page 20 to 21 */
-#define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /* Write protection of page 22 to 23 */
-#define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /* Write protection of page 24 to 25 */
-#define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /* Write protection of page 26 to 27 */
-#define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /* Write protection of page 28 to 29 */
-#define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /* Write protection of page 30 to 31 */
-#define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /* Write protection of page 32 to 33 */
-#define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /* Write protection of page 34 to 35 */
-#define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /* Write protection of page 36 to 37 */
-#define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /* Write protection of page 38 to 39 */
-#define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /* Write protection of page 40 to 41 */
-#define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /* Write protection of page 42 to 43 */
-#define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /* Write protection of page 44 to 45 */
-#define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /* Write protection of page 46 to 47 */
-#define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /* Write protection of page 48 to 49 */
-#define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /* Write protection of page 50 to 51 */
-#define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /* Write protection of page 52 to 53 */
-#define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /* Write protection of page 54 to 55 */
-#define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /* Write protection of page 56 to 57 */
-#define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /* Write protection of page 58 to 59 */
-#define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /* Write protection of page 60 to 61 */
+#define OB_WRP_PAGES0TO1 (0x00000001U) /* Write protection of page 0 to 1 */
+#define OB_WRP_PAGES2TO3 (0x00000002U) /* Write protection of page 2 to 3 */
+#define OB_WRP_PAGES4TO5 (0x00000004U) /* Write protection of page 4 to 5 */
+#define OB_WRP_PAGES6TO7 (0x00000008U) /* Write protection of page 6 to 7 */
+#define OB_WRP_PAGES8TO9 (0x00000010U) /* Write protection of page 8 to 9 */
+#define OB_WRP_PAGES10TO11 (0x00000020U) /* Write protection of page 10 to 11 */
+#define OB_WRP_PAGES12TO13 (0x00000040U) /* Write protection of page 12 to 13 */
+#define OB_WRP_PAGES14TO15 (0x00000080U) /* Write protection of page 14 to 15 */
+#define OB_WRP_PAGES16TO17 (0x00000100U) /* Write protection of page 16 to 17 */
+#define OB_WRP_PAGES18TO19 (0x00000200U) /* Write protection of page 18 to 19 */
+#define OB_WRP_PAGES20TO21 (0x00000400U) /* Write protection of page 20 to 21 */
+#define OB_WRP_PAGES22TO23 (0x00000800U) /* Write protection of page 22 to 23 */
+#define OB_WRP_PAGES24TO25 (0x00001000U) /* Write protection of page 24 to 25 */
+#define OB_WRP_PAGES26TO27 (0x00002000U) /* Write protection of page 26 to 27 */
+#define OB_WRP_PAGES28TO29 (0x00004000U) /* Write protection of page 28 to 29 */
+#define OB_WRP_PAGES30TO31 (0x00008000U) /* Write protection of page 30 to 31 */
+#define OB_WRP_PAGES32TO33 (0x00010000U) /* Write protection of page 32 to 33 */
+#define OB_WRP_PAGES34TO35 (0x00020000U) /* Write protection of page 34 to 35 */
+#define OB_WRP_PAGES36TO37 (0x00040000U) /* Write protection of page 36 to 37 */
+#define OB_WRP_PAGES38TO39 (0x00080000U) /* Write protection of page 38 to 39 */
+#define OB_WRP_PAGES40TO41 (0x00100000U) /* Write protection of page 40 to 41 */
+#define OB_WRP_PAGES42TO43 (0x00200000U) /* Write protection of page 42 to 43 */
+#define OB_WRP_PAGES44TO45 (0x00400000U) /* Write protection of page 44 to 45 */
+#define OB_WRP_PAGES46TO47 (0x00800000U) /* Write protection of page 46 to 47 */
+#define OB_WRP_PAGES48TO49 (0x01000000U) /* Write protection of page 48 to 49 */
+#define OB_WRP_PAGES50TO51 (0x02000000U) /* Write protection of page 50 to 51 */
+#define OB_WRP_PAGES52TO53 (0x04000000U) /* Write protection of page 52 to 53 */
+#define OB_WRP_PAGES54TO55 (0x08000000U) /* Write protection of page 54 to 55 */
+#define OB_WRP_PAGES56TO57 (0x10000000U) /* Write protection of page 56 to 57 */
+#define OB_WRP_PAGES58TO59 (0x20000000U) /* Write protection of page 58 to 59 */
+#define OB_WRP_PAGES60TO61 (0x40000000U) /* Write protection of page 60 to 61 */
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)
-#define OB_WRP_PAGES62TO63 ((uint32_t)0x80000000U) /* Write protection of page 62 to 63 */
+#define OB_WRP_PAGES62TO63 (0x80000000U) /* Write protection of page 62 to 63 */
#endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB */
#if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
-#define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000U) /* Write protection of page 62 to 127 */
+#define OB_WRP_PAGES62TO127 (0x80000000U) /* Write protection of page 62 to 127 */
#endif /* STM32F091xC || STM32F098xx || STM32F030xC */
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \
|| defined(STM32F091xC) || defined(STM32F098xx)|| defined(STM32F030xC)
-#define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FFU)
-#define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00U)
-#define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000U)
+#define OB_WRP_PAGES0TO15MASK (0x000000FFU)
+#define OB_WRP_PAGES16TO31MASK (0x0000FF00U)
+#define OB_WRP_PAGES32TO47MASK (0x00FF0000U)
#endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F070xB || STM32F030xC */
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)
-#define OB_WRP_PAGES48TO63MASK ((uint32_t)0xFF000000U)
+#define OB_WRP_PAGES48TO63MASK (0xFF000000U)
#endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB */
#if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
-#define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000U)
+#define OB_WRP_PAGES48TO127MASK (0xFF000000U)
#endif /* STM32F091xC || STM32F098xx || STM32F030xC */
-#define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFFU) /*!< Write protection of all pages */
+#define OB_WRP_ALLPAGES (0xFFFFFFFFU) /*!< Write protection of all pages */
#endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F030xC || STM32F070xB */
/**
@@ -315,9 +315,9 @@
/** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection
* @{
*/
-#define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
-#define OB_RDP_LEVEL_1 ((uint8_t)0xBB)
-#define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2
+#define OB_RDP_LEVEL_0 ((uint8_t)0xAAU)
+#define OB_RDP_LEVEL_1 ((uint8_t)0xBBU)
+#define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /*!< Warning: When enabling read protection level 2
it's no more possible to go back to level 1 or 0 */
/**
* @}
@@ -326,8 +326,8 @@
/** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog
* @{
*/
-#define OB_IWDG_SW ((uint8_t)0x01) /*!< Software IWDG selected */
-#define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
+#define OB_IWDG_SW ((uint8_t)0x01U) /*!< Software IWDG selected */
+#define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware IWDG selected */
/**
* @}
*/
@@ -335,8 +335,8 @@
/** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP
* @{
*/
-#define OB_STOP_NO_RST ((uint8_t)0x02) /*!< No reset generated when entering in STOP */
-#define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
+#define OB_STOP_NO_RST ((uint8_t)0x02U) /*!< No reset generated when entering in STOP */
+#define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */
/**
* @}
*/
@@ -344,8 +344,8 @@
/** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY
* @{
*/
-#define OB_STDBY_NO_RST ((uint8_t)0x04) /*!< No reset generated when entering in STANDBY */
-#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
+#define OB_STDBY_NO_RST ((uint8_t)0x04U) /*!< No reset generated when entering in STANDBY */
+#define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */
/**
* @}
*/
@@ -353,8 +353,8 @@
/** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1
* @{
*/
-#define OB_BOOT1_RESET ((uint8_t)0x00) /*!< BOOT1 Reset */
-#define OB_BOOT1_SET ((uint8_t)0x10) /*!< BOOT1 Set */
+#define OB_BOOT1_RESET ((uint8_t)0x00U) /*!< BOOT1 Reset */
+#define OB_BOOT1_SET ((uint8_t)0x10U) /*!< BOOT1 Set */
/**
* @}
*/
@@ -362,8 +362,8 @@
/** @defgroup FLASHEx_OB_VDDA_Analog_Monitoring Option Byte VDDA Analog Monitoring
* @{
*/
-#define OB_VDDA_ANALOG_ON ((uint8_t)0x20) /*!< Analog monitoring on VDDA Power source ON */
-#define OB_VDDA_ANALOG_OFF ((uint8_t)0x00) /*!< Analog monitoring on VDDA Power source OFF */
+#define OB_VDDA_ANALOG_ON ((uint8_t)0x20U) /*!< Analog monitoring on VDDA Power source ON */
+#define OB_VDDA_ANALOG_OFF ((uint8_t)0x00U) /*!< Analog monitoring on VDDA Power source OFF */
/**
* @}
*/
@@ -371,8 +371,8 @@
/** @defgroup FLASHEx_OB_RAM_Parity_Check_Enable Option Byte SRAM Parity Check Enable
* @{
*/
-#define OB_SRAM_PARITY_SET ((uint8_t)0x00) /*!< SRAM parity check enable set */
-#define OB_SRAM_PARITY_RESET ((uint8_t)0x40) /*!< SRAM parity check enable reset */
+#define OB_SRAM_PARITY_SET ((uint8_t)0x00U) /*!< SRAM parity check enable set */
+#define OB_SRAM_PARITY_RESET ((uint8_t)0x40U) /*!< SRAM parity check enable reset */
/**
* @}
*/
@@ -381,8 +381,8 @@
/** @defgroup FLASHEx_OB_BOOT_SEL FLASHEx Option Byte BOOT SEL
* @{
*/
-#define OB_BOOT_SEL_RESET ((uint8_t)0x00) /*!< BOOT_SEL Reset */
-#define OB_BOOT_SEL_SET ((uint8_t)0x80) /*!< BOOT_SEL Set */
+#define OB_BOOT_SEL_RESET ((uint8_t)0x00U) /*!< BOOT_SEL Reset */
+#define OB_BOOT_SEL_SET ((uint8_t)0x80U) /*!< BOOT_SEL Set */
/**
* @}
*/
@@ -390,8 +390,8 @@
/** @defgroup FLASHEx_OB_BOOT0 FLASHEx Option Byte BOOT0
* @{
*/
-#define OB_BOOT0_RESET ((uint8_t)0x00) /*!< BOOT0 Reset */
-#define OB_BOOT0_SET ((uint8_t)0x08) /*!< BOOT0 Set */
+#define OB_BOOT0_RESET ((uint8_t)0x00U) /*!< BOOT0 Reset */
+#define OB_BOOT0_SET ((uint8_t)0x08U) /*!< BOOT0 Set */
/**
* @}
*/
@@ -401,8 +401,8 @@
/** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address
* @{
*/
-#define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804)
-#define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806)
+#define OB_DATA_ADDRESS_DATA0 (0x1FFFF804U)
+#define OB_DATA_ADDRESS_DATA1 (0x1FFFF806U)
/**
* @}
*/
