mbed official
mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
Diff: targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_smbus.c
- Revision:
- 151:5eaa88a5bcc7
- Parent:
- 149:156823d33999
- Child:
- 186:707f6e361f3e
--- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_smbus.c Tue Nov 08 17:45:16 2016 +0000
+++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_smbus.c Thu Nov 24 17:03:03 2016 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l0xx_hal_smbus.c
* @author MCD Application Team
- * @version V1.5.0
- * @date 8-January-2016
+ * @version V1.7.0
+ * @date 31-May-2016
* @brief SMBUS HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -145,16 +145,16 @@
* @{
*/
/* Private define ------------------------------------------------------------*/
-#define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! SMBUS TIMING clear register Mask */
-#define HAL_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
-#define HAL_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
-#define HAL_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
-#define HAL_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
-#define HAL_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
-#define HAL_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
-#define HAL_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
-#define HAL_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
-#define MAX_NBYTE_SIZE 255
+#define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFFU) /*<! SMBUS TIMING clear register Mask */
+#define HAL_TIMEOUT_ADDR ((uint32_t)10000U) /* 10 s */
+#define HAL_TIMEOUT_BUSY ((uint32_t)25U) /* 25 ms */
+#define HAL_TIMEOUT_DIR ((uint32_t)25U) /* 25 ms */
+#define HAL_TIMEOUT_RXNE ((uint32_t)25U) /* 25 ms */
+#define HAL_TIMEOUT_STOPF ((uint32_t)25U) /* 25 ms */
+#define HAL_TIMEOUT_TC ((uint32_t)25U) /* 25 ms */
+#define HAL_TIMEOUT_TCR ((uint32_t)25U) /* 25 ms */
+#define HAL_TIMEOUT_TXIS ((uint32_t)25U) /* 25 ms */
+#define MAX_NBYTE_SIZE 255U
/* Private macro -------------------------------------------------------------*/
#define __SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR)
@@ -268,7 +268,7 @@
/*---------------------------- SMBUSx OAR1 Configuration -------------------*/
/* Configure SMBUSx: Own Address1 and ack own address1 mode */
hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
- if(hsmbus->Init.OwnAddress1 != 0)
+ if(hsmbus->Init.OwnAddress1 != 0U)
{
if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
{
@@ -632,7 +632,7 @@
/* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
/* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
- SMBUS_TransferConfig(hsmbus, DevAddress, 1, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, DevAddress, 1U, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
@@ -673,7 +673,7 @@
if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == NULL) || (Size == 0U))
{
return HAL_ERROR;
}
@@ -697,7 +697,7 @@
hsmbus->XferOptions = XferOptions;
/* Set NBYTE to transmit */
- SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus,0U,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
@@ -744,7 +744,7 @@
if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == NULL) || (Size == 0U))
{
return HAL_ERROR;
}
@@ -772,13 +772,13 @@
/* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
/* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
/* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
- if((hsmbus->XferSize == 1) || ((hsmbus->XferSize == 2) && (__SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
+ if((hsmbus->XferSize == 1U) || ((hsmbus->XferSize == 2U) && (__SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
{
- SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus,0U,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
}
else
{
- SMBUS_TransferConfig(hsmbus,0,/*hsmbus->XferSize*/1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus,0U,/*hsmbus->XferSize*/1U, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
}
/* Clear ADDR flag after prepare the transfer parameters */
@@ -888,8 +888,8 @@
*/
HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
{
- uint32_t tickstart = 0x00;
- __IO uint32_t SMBUS_Trials = 0x00;
+ uint32_t tickstart = 0x00U;
+ __IO uint32_t SMBUS_Trials = 0x00U;
if(hsmbus->State == HAL_SMBUS_STATE_READY)
{
@@ -914,7 +914,7 @@
tickstart = HAL_GetTick();
while((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
{
- if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
+ if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
{
hsmbus->State = HAL_SMBUS_STATE_TIMEOUT;
}
@@ -993,7 +993,7 @@
*/
void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
{
- uint32_t tmpisrvalue = 0;
+ uint32_t tmpisrvalue = 0U;
/* Use a local variable to store the current ISR flags */
/* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
@@ -1381,7 +1381,7 @@
}
else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
{
- if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
+ if((hsmbus->XferSize == 0U)&&(hsmbus->XferCount!=0U))
{
DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
@@ -1403,7 +1403,7 @@
hsmbus->XferSize = hsmbus->XferCount;
}
}
- else if((hsmbus->XferSize == 0)&&(hsmbus->XferCount==0))
+ else if((hsmbus->XferSize == 0U)&&(hsmbus->XferCount==0U))
{
/* Call TxCpltCallback if no stop mode is set */
if(__SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
@@ -1437,7 +1437,7 @@
}
else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
{
- if(hsmbus->XferCount == 0)
+ if(hsmbus->XferCount == 0U)
{
/* Specific use case for Quick command */
if(hsmbus->pBuffPtr == NULL)
@@ -1493,8 +1493,8 @@
*/
static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
{
- uint8_t TransferDirection = 0;
- uint16_t SlaveAddrCode = 0;
+ uint8_t TransferDirection = 0U;
+ uint16_t SlaveAddrCode = 0U;
/* Process Locked */
__HAL_LOCK(hsmbus);
@@ -1505,7 +1505,7 @@
/* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
/* Mean XferCount == 0*/
/* So clear Flag NACKF only */
- if(hsmbus->XferCount == 0)
+ if(hsmbus->XferCount == 0U)
{
/* Clear NACK Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
@@ -1560,15 +1560,15 @@
hsmbus->XferSize--;
hsmbus->XferCount--;
- if(hsmbus->XferCount == 1)
+ if(hsmbus->XferCount == 1U)
{
/* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
/* or only the last Byte of Transfer */
/* So reset the RELOAD bit mode */
hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
- SMBUS_TransferConfig(hsmbus,0 ,1 , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus,0U ,1U , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
}
- else if(hsmbus->XferCount == 0)
+ else if(hsmbus->XferCount == 0U)
{
/* Last Byte is received, disable Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
@@ -1586,7 +1586,7 @@
else
{
/* Set Reload for next Bytes */
- SMBUS_TransferConfig(hsmbus,0, 1, SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus,0U, 1U, SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
/* Ack last Byte Read */
hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
@@ -1599,7 +1599,7 @@
/* Check if all Datas have already been sent */
/* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
- if(hsmbus->XferCount > 0)
+ if(hsmbus->XferCount > 0U)
{
/* Write data to TXDR */
hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
@@ -1607,7 +1607,7 @@
hsmbus->XferSize--;
}
- if(hsmbus->XferSize == 0)
+ if(hsmbus->XferSize == 0U)
{
/* Last Byte is Transmitted */
/* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
@@ -1646,7 +1646,7 @@
/* Clear ADDR flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
- hsmbus->XferOptions = 0;
+ hsmbus->XferOptions = 0U;
hsmbus->PreviousState = hsmbus->State;
hsmbus->State = HAL_SMBUS_STATE_READY;
@@ -1673,7 +1673,7 @@
*/
static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
{
- uint32_t tmpisr = 0;
+ uint32_t tmpisr = 0U;
if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
{
@@ -1715,7 +1715,7 @@
*/
static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
{
- uint32_t tmpisr = 0;
+ uint32_t tmpisr = 0U;
if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) )
{
@@ -1791,7 +1791,7 @@
*/
static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
{
- uint32_t tickstart = 0x00;
+ uint32_t tickstart = 0x00U;
tickstart = HAL_GetTick();
/* Wait until flag is set */
@@ -1802,7 +1802,7 @@
/* Check for the Timeout */
if(Timeout != HAL_MAX_DELAY)
{
- if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
+ if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
{
hsmbus->PreviousState = hsmbus->State;
hsmbus->State= HAL_SMBUS_STATE_READY;
@@ -1822,7 +1822,7 @@
/* Check for the Timeout */
if(Timeout != HAL_MAX_DELAY)
{
- if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
+ if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
{
hsmbus->PreviousState = hsmbus->State;
hsmbus->State= HAL_SMBUS_STATE_READY;
@@ -1860,7 +1860,7 @@
*/
static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
{
- uint32_t tmpreg = 0;
+ uint32_t tmpreg = 0U;
/* Check the parameters */
assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance));
@@ -1874,7 +1874,7 @@
tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE));
/* update tmpreg */
- tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \
+ tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16U ) & I2C_CR2_NBYTES) | \
(uint32_t)Mode | (uint32_t)Request);
/* update CR2 register */
