mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_TT/TARGET_TT_M3HQ/sleep.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 189:f392fc9709a3 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 189:f392fc9709a3 | 2 | * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved |
AnnaBridge | 189:f392fc9709a3 | 3 | * SPDX-License-Identifier: Apache-2.0 |
AnnaBridge | 189:f392fc9709a3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 189:f392fc9709a3 | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 189:f392fc9709a3 | 6 | * You may obtain a copy of the License at |
AnnaBridge | 189:f392fc9709a3 | 7 | * |
AnnaBridge | 189:f392fc9709a3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 189:f392fc9709a3 | 9 | * |
AnnaBridge | 189:f392fc9709a3 | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 189:f392fc9709a3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 189:f392fc9709a3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 189:f392fc9709a3 | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 189:f392fc9709a3 | 14 | * limitations under the License. |
AnnaBridge | 189:f392fc9709a3 | 15 | */ |
AnnaBridge | 189:f392fc9709a3 | 16 | #include "sleep_api.h" |
AnnaBridge | 189:f392fc9709a3 | 17 | #include "gpio_include.h" |
AnnaBridge | 189:f392fc9709a3 | 18 | |
AnnaBridge | 189:f392fc9709a3 | 19 | static void warming_up_time(void); |
AnnaBridge | 189:f392fc9709a3 | 20 | |
AnnaBridge | 189:f392fc9709a3 | 21 | void hal_sleep(void) |
AnnaBridge | 189:f392fc9709a3 | 22 | { |
AnnaBridge | 189:f392fc9709a3 | 23 | // Set low power consumption mode IDLE |
AnnaBridge | 189:f392fc9709a3 | 24 | TSB_CG->STBYCR = CG_STBY_MODE_IDLE; |
AnnaBridge | 189:f392fc9709a3 | 25 | __DSB(); // Enter idle mode |
AnnaBridge | 189:f392fc9709a3 | 26 | __WFI(); |
AnnaBridge | 189:f392fc9709a3 | 27 | } |
AnnaBridge | 189:f392fc9709a3 | 28 | |
AnnaBridge | 189:f392fc9709a3 | 29 | void hal_deepsleep(void) |
AnnaBridge | 189:f392fc9709a3 | 30 | { |
AnnaBridge | 189:f392fc9709a3 | 31 | uint32_t tmp; |
AnnaBridge | 189:f392fc9709a3 | 32 | // WDT sysclock enable |
AnnaBridge | 189:f392fc9709a3 | 33 | TSB_CG_FSYSENB_IPENB31 = ENABLE; |
AnnaBridge | 189:f392fc9709a3 | 34 | while ((TSB_FC->SR0 & 0x01) != 0x01); // Flash Wait |
AnnaBridge | 189:f392fc9709a3 | 35 | // Wait for end of Warming-up for IHOSC1 |
AnnaBridge | 189:f392fc9709a3 | 36 | while(TSB_CG_WUPHCR_WUEF); |
AnnaBridge | 189:f392fc9709a3 | 37 | // Set Warm-up clock to IHOSC1 |
AnnaBridge | 189:f392fc9709a3 | 38 | TSB_CG_WUPHCR_WUCLK = DISABLE; |
AnnaBridge | 189:f392fc9709a3 | 39 | // Set Warming-up time (xxxx) for IHOSC1 return from STOP1 mode |
AnnaBridge | 189:f392fc9709a3 | 40 | warming_up_time(); |
AnnaBridge | 189:f392fc9709a3 | 41 | // Set low power consumption mode STOP1 |
AnnaBridge | 189:f392fc9709a3 | 42 | TSB_CG->STBYCR = CG_STBY_MODE_STOP1; |
AnnaBridge | 189:f392fc9709a3 | 43 | // Set PLL of fsys to fosc(= PLL no USE) |
AnnaBridge | 189:f392fc9709a3 | 44 | TSB_CG_PLL0SEL_PLL0SEL = DISABLE; |
AnnaBridge | 189:f392fc9709a3 | 45 | // Wait for PLL status of fsys until off state(fosc = 0) |
AnnaBridge | 189:f392fc9709a3 | 46 | while(TSB_CG_PLL0SEL_PLL0ST); |
AnnaBridge | 189:f392fc9709a3 | 47 | TSB_CG_PLL0SEL_PLL0ON = DISABLE; // Stop PLL of fsys |
AnnaBridge | 189:f392fc9709a3 | 48 | TSB_CG_OSCCR_IHOSC1EN = ENABLE; // Enable IHOSC1 |
AnnaBridge | 189:f392fc9709a3 | 49 | TSB_CG_OSCCR_OSCSEL = DISABLE; // Set fosc to IHOSC1 |
AnnaBridge | 189:f392fc9709a3 | 50 | while(TSB_CG_OSCCR_OSCF); // Wait for fosc status until IHOSC1 |
AnnaBridge | 189:f392fc9709a3 | 51 | tmp = TSB_CG->OSCCR; // Set EHOSC off |
AnnaBridge | 189:f392fc9709a3 | 52 | tmp &= EXTERNEL_OSC_MASK; |
AnnaBridge | 189:f392fc9709a3 | 53 | TSB_CG->OSCCR = tmp; |
AnnaBridge | 189:f392fc9709a3 | 54 | TSB_CG_OSCCR_IHOSC2EN = DISABLE; //Stop IHOSC2 of OFD |
AnnaBridge | 189:f392fc9709a3 | 55 | // Wait for status of OFD until off ”0” |
AnnaBridge | 189:f392fc9709a3 | 56 | while(TSB_CG_OSCCR_IHOSC2F); |
AnnaBridge | 189:f392fc9709a3 | 57 | __DSB(); // Enter STOP1 mode |
AnnaBridge | 189:f392fc9709a3 | 58 | __WFI(); |
AnnaBridge | 189:f392fc9709a3 | 59 | } |
AnnaBridge | 189:f392fc9709a3 | 60 | |
AnnaBridge | 189:f392fc9709a3 | 61 | static void warming_up_time(void) |
AnnaBridge | 189:f392fc9709a3 | 62 | { |
AnnaBridge | 189:f392fc9709a3 | 63 | uint32_t work; |
AnnaBridge | 189:f392fc9709a3 | 64 | uint64_t x; |
AnnaBridge | 189:f392fc9709a3 | 65 | x = (uint64_t)((uint64_t)(IHOSC_CFG_WARM_UP_TIME) * (uint64_t)(IHOSC_CFG_CLOCK)); |
AnnaBridge | 189:f392fc9709a3 | 66 | x = (uint64_t)(x / (uint64_t)(1000000)); |
AnnaBridge | 189:f392fc9709a3 | 67 | if (x > (uint64_t)(0xFFFF)) { |
AnnaBridge | 189:f392fc9709a3 | 68 | // invalid value |
AnnaBridge | 189:f392fc9709a3 | 69 | } |
AnnaBridge | 189:f392fc9709a3 | 70 | work = (uint32_t)x; |
AnnaBridge | 189:f392fc9709a3 | 71 | work &= (uint32_t)(0xFFFFFFF0); |
AnnaBridge | 189:f392fc9709a3 | 72 | work <<= 16; |
AnnaBridge | 189:f392fc9709a3 | 73 | work |= (uint32_t)(TSB_CG->WUPHCR & ~CGWUPHCR_WUPT_HIGH_MASK); |
AnnaBridge | 189:f392fc9709a3 | 74 | TSB_CG->WUPHCR = work; |
AnnaBridge | 189:f392fc9709a3 | 75 | } |