mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_TOSHIBA/TARGET_TMPM4G9/us_ticker.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 188:bcfe06ba3d64 1 /* mbed Microcontroller Library
AnnaBridge 188:bcfe06ba3d64 2 * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved
AnnaBridge 188:bcfe06ba3d64 3 *
AnnaBridge 188:bcfe06ba3d64 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 188:bcfe06ba3d64 5 * you may not use this file except in compliance with the License.
AnnaBridge 188:bcfe06ba3d64 6 * You may obtain a copy of the License at
AnnaBridge 188:bcfe06ba3d64 7 *
AnnaBridge 188:bcfe06ba3d64 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 188:bcfe06ba3d64 9 *
AnnaBridge 188:bcfe06ba3d64 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 188:bcfe06ba3d64 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 188:bcfe06ba3d64 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 188:bcfe06ba3d64 13 * See the License for the specific language governing permissions and
AnnaBridge 188:bcfe06ba3d64 14 * limitations under the License.
AnnaBridge 188:bcfe06ba3d64 15 */
AnnaBridge 188:bcfe06ba3d64 16 #include "us_ticker_api.h"
AnnaBridge 188:bcfe06ba3d64 17 #include "TMPM4G9.h"
AnnaBridge 188:bcfe06ba3d64 18 #include "txz_t32a.h"
AnnaBridge 188:bcfe06ba3d64 19
AnnaBridge 188:bcfe06ba3d64 20 #define CLR_TIMER_INT_FLAG (uint8_t)0x41
AnnaBridge 188:bcfe06ba3d64 21
AnnaBridge 188:bcfe06ba3d64 22 static uint8_t us_ticker_inited = 0; // Is ticker initialized yet?
AnnaBridge 188:bcfe06ba3d64 23
AnnaBridge 188:bcfe06ba3d64 24 const ticker_info_t* us_ticker_get_info()
AnnaBridge 188:bcfe06ba3d64 25 {
AnnaBridge 188:bcfe06ba3d64 26 static const ticker_info_t info = {
AnnaBridge 188:bcfe06ba3d64 27 2500000,
AnnaBridge 188:bcfe06ba3d64 28 32
AnnaBridge 188:bcfe06ba3d64 29 };
AnnaBridge 188:bcfe06ba3d64 30 return &info;
AnnaBridge 188:bcfe06ba3d64 31 }
AnnaBridge 188:bcfe06ba3d64 32
AnnaBridge 188:bcfe06ba3d64 33 // Initialize us_ticker
AnnaBridge 188:bcfe06ba3d64 34 void us_ticker_init(void)
AnnaBridge 188:bcfe06ba3d64 35 {
AnnaBridge 188:bcfe06ba3d64 36 if (us_ticker_inited) {
AnnaBridge 188:bcfe06ba3d64 37 us_ticker_disable_interrupt();
AnnaBridge 188:bcfe06ba3d64 38 return;
AnnaBridge 188:bcfe06ba3d64 39 }
AnnaBridge 188:bcfe06ba3d64 40 us_ticker_inited = 1;
AnnaBridge 188:bcfe06ba3d64 41
AnnaBridge 188:bcfe06ba3d64 42 // Enable clock for T32A0
AnnaBridge 188:bcfe06ba3d64 43 TSB_CG_FSYSMENA_IPMENA06 = TXZ_ENABLE;
AnnaBridge 188:bcfe06ba3d64 44
AnnaBridge 188:bcfe06ba3d64 45 // T32A ch0 TimerC Reg Match/Over Flow/Under Flow
AnnaBridge 188:bcfe06ba3d64 46 TSB_IB->IMC006 = TXZ_ENABLE;
AnnaBridge 188:bcfe06ba3d64 47
AnnaBridge 188:bcfe06ba3d64 48 // Configure Timer T32A0
AnnaBridge 188:bcfe06ba3d64 49 TSB_T32A0->MOD = T32A_MODE_32;
AnnaBridge 188:bcfe06ba3d64 50 TSB_T32A0->RUNC = (T32A_RUN_ENABLE | T32A_COUNT_STOP);
AnnaBridge 188:bcfe06ba3d64 51 TSB_T32A0->CRC = T32A_PRSCLx_32;
AnnaBridge 188:bcfe06ba3d64 52 TSB_T32A0->IMC = (T32A_IMUFx_MASK_REQ | T32A_IMOFx_MASK_REQ);
AnnaBridge 188:bcfe06ba3d64 53 TSB_T32A0->RUNC = (T32A_RUN_ENABLE | T32A_COUNT_START);
AnnaBridge 188:bcfe06ba3d64 54
AnnaBridge 188:bcfe06ba3d64 55 NVIC_SetVector(INTT32A00_A_CT_IRQn, (uint32_t)us_ticker_irq_handler);
AnnaBridge 188:bcfe06ba3d64 56 NVIC_EnableIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 57 }
AnnaBridge 188:bcfe06ba3d64 58
AnnaBridge 188:bcfe06ba3d64 59 uint32_t us_ticker_read(void)
AnnaBridge 188:bcfe06ba3d64 60 {
AnnaBridge 188:bcfe06ba3d64 61 uint32_t ret_val = 0;
AnnaBridge 188:bcfe06ba3d64 62
AnnaBridge 188:bcfe06ba3d64 63 if (!us_ticker_inited) {
AnnaBridge 188:bcfe06ba3d64 64 us_ticker_init();
AnnaBridge 188:bcfe06ba3d64 65 }
AnnaBridge 188:bcfe06ba3d64 66
AnnaBridge 188:bcfe06ba3d64 67 ret_val = (TSB_T32A0->TMRC);
AnnaBridge 188:bcfe06ba3d64 68 return ret_val;
AnnaBridge 188:bcfe06ba3d64 69 }
AnnaBridge 188:bcfe06ba3d64 70
AnnaBridge 188:bcfe06ba3d64 71 void us_ticker_set_interrupt(timestamp_t timestamp)
AnnaBridge 188:bcfe06ba3d64 72 {
AnnaBridge 188:bcfe06ba3d64 73 NVIC_DisableIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 74 TSB_T32A0->RUNC = (T32A_RUN_ENABLE | T32A_COUNT_STOP);
AnnaBridge 188:bcfe06ba3d64 75 TSB_T32A0->RGC1 = timestamp ;
AnnaBridge 188:bcfe06ba3d64 76 NVIC_EnableIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 77 TSB_T32A0->RUNC = (T32A_RUN_ENABLE | T32A_COUNT_START);
AnnaBridge 188:bcfe06ba3d64 78 }
AnnaBridge 188:bcfe06ba3d64 79
AnnaBridge 188:bcfe06ba3d64 80 void us_ticker_fire_interrupt(void)
AnnaBridge 188:bcfe06ba3d64 81 {
AnnaBridge 188:bcfe06ba3d64 82 NVIC_SetPendingIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 83 NVIC_EnableIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 84 }
AnnaBridge 188:bcfe06ba3d64 85
AnnaBridge 188:bcfe06ba3d64 86 void us_ticker_disable_interrupt(void)
AnnaBridge 188:bcfe06ba3d64 87 {
AnnaBridge 188:bcfe06ba3d64 88 // Disable interrupts in NVIC
AnnaBridge 188:bcfe06ba3d64 89 TSB_IB->IMC006 = CLR_TIMER_INT_FLAG;
AnnaBridge 188:bcfe06ba3d64 90 NVIC_ClearPendingIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 91 NVIC_DisableIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 92 }
AnnaBridge 188:bcfe06ba3d64 93
AnnaBridge 188:bcfe06ba3d64 94 void us_ticker_clear_interrupt(void)
AnnaBridge 188:bcfe06ba3d64 95 {
AnnaBridge 188:bcfe06ba3d64 96 TSB_IB->IMC006 = CLR_TIMER_INT_FLAG;
AnnaBridge 188:bcfe06ba3d64 97 NVIC_ClearPendingIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 98 }
AnnaBridge 188:bcfe06ba3d64 99
AnnaBridge 188:bcfe06ba3d64 100 void us_ticker_free(void)
AnnaBridge 188:bcfe06ba3d64 101 {
AnnaBridge 188:bcfe06ba3d64 102 TSB_T32A0->RUNC = T32A_RUN_DISABLE;
AnnaBridge 188:bcfe06ba3d64 103 TSB_IB->IMC006 = CLR_TIMER_INT_FLAG;
AnnaBridge 188:bcfe06ba3d64 104 NVIC_ClearPendingIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 105 NVIC_DisableIRQ(INTT32A00_A_CT_IRQn);
AnnaBridge 188:bcfe06ba3d64 106 TSB_CG_FSYSMENA_IPMENA06 = TXZ_DISABLE;
AnnaBridge 188:bcfe06ba3d64 107 }