mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_TOSHIBA/TARGET_TMPM46B/us_ticker.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 188:bcfe06ba3d64
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 184:08ed48f1de7f | 1 | /* mbed Microcontroller Library |
AnnaBridge | 188:bcfe06ba3d64 | 2 | * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved |
AnnaBridge | 184:08ed48f1de7f | 3 | * |
AnnaBridge | 184:08ed48f1de7f | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 184:08ed48f1de7f | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 184:08ed48f1de7f | 6 | * You may obtain a copy of the License at |
AnnaBridge | 184:08ed48f1de7f | 7 | * |
AnnaBridge | 184:08ed48f1de7f | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 184:08ed48f1de7f | 9 | * |
AnnaBridge | 184:08ed48f1de7f | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 184:08ed48f1de7f | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 184:08ed48f1de7f | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 184:08ed48f1de7f | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 184:08ed48f1de7f | 14 | * limitations under the License. |
AnnaBridge | 184:08ed48f1de7f | 15 | */ |
AnnaBridge | 188:bcfe06ba3d64 | 16 | #include <stdbool.h> |
AnnaBridge | 184:08ed48f1de7f | 17 | #include "us_ticker_api.h" |
AnnaBridge | 184:08ed48f1de7f | 18 | #include "tmpm46b_tmrb.h" |
AnnaBridge | 184:08ed48f1de7f | 19 | |
AnnaBridge | 188:bcfe06ba3d64 | 20 | #define MAX_TICK_16_BIT 0xFFFF |
AnnaBridge | 188:bcfe06ba3d64 | 21 | #define TMRB_CLK_DIV 0x3 |
AnnaBridge | 184:08ed48f1de7f | 22 | |
AnnaBridge | 188:bcfe06ba3d64 | 23 | static bool us_ticker_inited = false; // Is ticker initialized yet? |
AnnaBridge | 184:08ed48f1de7f | 24 | |
AnnaBridge | 184:08ed48f1de7f | 25 | const ticker_info_t* us_ticker_get_info() |
AnnaBridge | 184:08ed48f1de7f | 26 | { |
AnnaBridge | 184:08ed48f1de7f | 27 | static const ticker_info_t info = { |
AnnaBridge | 184:08ed48f1de7f | 28 | 1875000, // 1875000, |
AnnaBridge | 184:08ed48f1de7f | 29 | 16 // 16 bit counter |
AnnaBridge | 184:08ed48f1de7f | 30 | }; |
AnnaBridge | 184:08ed48f1de7f | 31 | return &info; |
AnnaBridge | 184:08ed48f1de7f | 32 | } |
AnnaBridge | 184:08ed48f1de7f | 33 | |
AnnaBridge | 184:08ed48f1de7f | 34 | // initialize us_ticker |
AnnaBridge | 184:08ed48f1de7f | 35 | void us_ticker_init(void) |
AnnaBridge | 184:08ed48f1de7f | 36 | { |
AnnaBridge | 184:08ed48f1de7f | 37 | TMRB_InitTypeDef m_tmrb0; |
AnnaBridge | 184:08ed48f1de7f | 38 | |
AnnaBridge | 184:08ed48f1de7f | 39 | if (us_ticker_inited) { |
AnnaBridge | 188:bcfe06ba3d64 | 40 | us_ticker_disable_interrupt(); |
AnnaBridge | 184:08ed48f1de7f | 41 | return; |
AnnaBridge | 184:08ed48f1de7f | 42 | } |
AnnaBridge | 188:bcfe06ba3d64 | 43 | us_ticker_inited = true; |
AnnaBridge | 188:bcfe06ba3d64 | 44 | |
AnnaBridge | 188:bcfe06ba3d64 | 45 | // TSB_TB0 using free-run |
AnnaBridge | 188:bcfe06ba3d64 | 46 | m_tmrb0.Mode = TMRB_INTERVAL_TIMER; |
AnnaBridge | 188:bcfe06ba3d64 | 47 | m_tmrb0.ClkDiv = TMRB_CLK_DIV; |
AnnaBridge | 188:bcfe06ba3d64 | 48 | m_tmrb0.UpCntCtrl = TMRB_FREE_RUN; |
AnnaBridge | 188:bcfe06ba3d64 | 49 | m_tmrb0.TrailingTiming = MAX_TICK_16_BIT; |
AnnaBridge | 188:bcfe06ba3d64 | 50 | m_tmrb0.LeadingTiming = MAX_TICK_16_BIT; |
AnnaBridge | 184:08ed48f1de7f | 51 | |
AnnaBridge | 184:08ed48f1de7f | 52 | // Enable channel 0 |
AnnaBridge | 184:08ed48f1de7f | 53 | TMRB_Enable(TSB_TB0); |
AnnaBridge | 184:08ed48f1de7f | 54 | // Stops and clear count operation |
AnnaBridge | 184:08ed48f1de7f | 55 | TMRB_SetRunState(TSB_TB0, TMRB_STOP); |
AnnaBridge | 188:bcfe06ba3d64 | 56 | // Mask All interrupts |
AnnaBridge | 188:bcfe06ba3d64 | 57 | TMRB_SetINTMask(TSB_TB0, TMRB_MASK_MATCH_LEADING_INT | TMRB_MASK_MATCH_TRAILING_INT | TMRB_MASK_OVERFLOW_INT); |
AnnaBridge | 184:08ed48f1de7f | 58 | TMRB_Init(TSB_TB0, &m_tmrb0); |
AnnaBridge | 184:08ed48f1de7f | 59 | // Enable TMRB when system is in idle mode |
AnnaBridge | 184:08ed48f1de7f | 60 | TMRB_SetIdleMode(TSB_TB0, ENABLE); |
AnnaBridge | 184:08ed48f1de7f | 61 | // Starts TSB_TB0 |
AnnaBridge | 184:08ed48f1de7f | 62 | TMRB_SetRunState(TSB_TB0, TMRB_RUN); |
AnnaBridge | 188:bcfe06ba3d64 | 63 | NVIC_SetVector(INTTB0_IRQn, (uint32_t)us_ticker_irq_handler); |
AnnaBridge | 184:08ed48f1de7f | 64 | } |
AnnaBridge | 184:08ed48f1de7f | 65 | |
AnnaBridge | 184:08ed48f1de7f | 66 | uint32_t us_ticker_read(void) |
AnnaBridge | 184:08ed48f1de7f | 67 | { |
AnnaBridge | 184:08ed48f1de7f | 68 | uint32_t ret_val = 0; |
AnnaBridge | 184:08ed48f1de7f | 69 | |
AnnaBridge | 184:08ed48f1de7f | 70 | if (!us_ticker_inited) { |
AnnaBridge | 184:08ed48f1de7f | 71 | us_ticker_init(); |
AnnaBridge | 184:08ed48f1de7f | 72 | } |
AnnaBridge | 184:08ed48f1de7f | 73 | |
AnnaBridge | 184:08ed48f1de7f | 74 | ret_val = (uint32_t)TMRB_GetUpCntValue(TSB_TB0); |
AnnaBridge | 184:08ed48f1de7f | 75 | |
AnnaBridge | 184:08ed48f1de7f | 76 | return ret_val; |
AnnaBridge | 184:08ed48f1de7f | 77 | } |
AnnaBridge | 184:08ed48f1de7f | 78 | |
AnnaBridge | 184:08ed48f1de7f | 79 | void us_ticker_set_interrupt(timestamp_t timestamp) |
AnnaBridge | 184:08ed48f1de7f | 80 | { |
AnnaBridge | 188:bcfe06ba3d64 | 81 | NVIC_DisableIRQ(INTTB0_IRQn); |
AnnaBridge | 188:bcfe06ba3d64 | 82 | NVIC_ClearPendingIRQ(INTTB0_IRQn); |
AnnaBridge | 188:bcfe06ba3d64 | 83 | TMRB_ChangeTrailingTiming(TSB_TB0, timestamp); |
AnnaBridge | 188:bcfe06ba3d64 | 84 | // Mask all Interrupts except trailing edge interrupt |
AnnaBridge | 188:bcfe06ba3d64 | 85 | TMRB_SetINTMask(TSB_TB0, TMRB_MASK_MATCH_LEADING_INT | TMRB_MASK_OVERFLOW_INT); |
AnnaBridge | 188:bcfe06ba3d64 | 86 | NVIC_EnableIRQ(INTTB0_IRQn); |
AnnaBridge | 184:08ed48f1de7f | 87 | } |
AnnaBridge | 184:08ed48f1de7f | 88 | |
AnnaBridge | 184:08ed48f1de7f | 89 | void us_ticker_fire_interrupt(void) |
AnnaBridge | 184:08ed48f1de7f | 90 | { |
AnnaBridge | 188:bcfe06ba3d64 | 91 | NVIC_SetPendingIRQ(INTTB0_IRQn); |
AnnaBridge | 188:bcfe06ba3d64 | 92 | NVIC_EnableIRQ(INTTB0_IRQn); |
AnnaBridge | 184:08ed48f1de7f | 93 | } |
AnnaBridge | 184:08ed48f1de7f | 94 | |
AnnaBridge | 184:08ed48f1de7f | 95 | void us_ticker_disable_interrupt(void) |
AnnaBridge | 184:08ed48f1de7f | 96 | { |
AnnaBridge | 188:bcfe06ba3d64 | 97 | // Mask All interrupts |
AnnaBridge | 188:bcfe06ba3d64 | 98 | TMRB_SetINTMask(TSB_TB0, TMRB_MASK_MATCH_LEADING_INT | TMRB_MASK_MATCH_TRAILING_INT | TMRB_MASK_OVERFLOW_INT); |
AnnaBridge | 188:bcfe06ba3d64 | 99 | // Also clear and disable interrupts by NVIC |
AnnaBridge | 188:bcfe06ba3d64 | 100 | NVIC_ClearPendingIRQ(INTTB0_IRQn); |
AnnaBridge | 188:bcfe06ba3d64 | 101 | NVIC_DisableIRQ(INTTB0_IRQn); |
AnnaBridge | 184:08ed48f1de7f | 102 | } |
AnnaBridge | 184:08ed48f1de7f | 103 | |
AnnaBridge | 184:08ed48f1de7f | 104 | void us_ticker_clear_interrupt(void) |
AnnaBridge | 184:08ed48f1de7f | 105 | { |
AnnaBridge | 188:bcfe06ba3d64 | 106 | NVIC_ClearPendingIRQ(INTTB0_IRQn); |
AnnaBridge | 184:08ed48f1de7f | 107 | } |
AnnaBridge | 188:bcfe06ba3d64 | 108 | |
AnnaBridge | 188:bcfe06ba3d64 | 109 | void us_ticker_free(void) |
AnnaBridge | 188:bcfe06ba3d64 | 110 | { |
AnnaBridge | 188:bcfe06ba3d64 | 111 | TMRB_SetINTMask(TSB_TB0, TMRB_MASK_MATCH_LEADING_INT | TMRB_MASK_MATCH_TRAILING_INT | TMRB_MASK_OVERFLOW_INT); |
AnnaBridge | 188:bcfe06ba3d64 | 112 | NVIC_ClearPendingIRQ(INTTB0_IRQn); |
AnnaBridge | 188:bcfe06ba3d64 | 113 | NVIC_DisableIRQ(INTTB0_IRQn); |
AnnaBridge | 188:bcfe06ba3d64 | 114 | TMRB_SetRunState(TSB_TB0, TMRB_STOP); |
AnnaBridge | 188:bcfe06ba3d64 | 115 | TMRB_Disable(TSB_TB0); |
AnnaBridge | 188:bcfe06ba3d64 | 116 | us_ticker_inited = false; |
AnnaBridge | 188:bcfe06ba3d64 | 117 | } |