mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_TOSHIBA/TARGET_TMPM066/us_ticker.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:7d866c31b3c5 1 /* mbed Microcontroller Library
AnnaBridge 188:bcfe06ba3d64 2 * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved
AnnaBridge 172:7d866c31b3c5 3 *
AnnaBridge 172:7d866c31b3c5 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 172:7d866c31b3c5 5 * you may not use this file except in compliance with the License.
AnnaBridge 172:7d866c31b3c5 6 * You may obtain a copy of the License at
AnnaBridge 172:7d866c31b3c5 7 *
AnnaBridge 172:7d866c31b3c5 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 172:7d866c31b3c5 9 *
AnnaBridge 172:7d866c31b3c5 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 172:7d866c31b3c5 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 172:7d866c31b3c5 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 172:7d866c31b3c5 13 * See the License for the specific language governing permissions and
AnnaBridge 172:7d866c31b3c5 14 * limitations under the License.
AnnaBridge 172:7d866c31b3c5 15 */
AnnaBridge 188:bcfe06ba3d64 16 #include <stdbool.h>
AnnaBridge 172:7d866c31b3c5 17 #include "us_ticker_api.h"
AnnaBridge 188:bcfe06ba3d64 18 #include "tmpm066_tmrb.h"
AnnaBridge 188:bcfe06ba3d64 19 #include "tmpm066_intifsd.h"
AnnaBridge 172:7d866c31b3c5 20
AnnaBridge 188:bcfe06ba3d64 21 #define MAX_TICK_16_BIT 0xFFFF
AnnaBridge 172:7d866c31b3c5 22
AnnaBridge 188:bcfe06ba3d64 23 static bool us_ticker_inited = false; // Is ticker initialized yet?
AnnaBridge 188:bcfe06ba3d64 24
AnnaBridge 188:bcfe06ba3d64 25 void INTTB7_IRQHandler(void)
AnnaBridge 172:7d866c31b3c5 26 {
AnnaBridge 188:bcfe06ba3d64 27 us_ticker_irq_handler();
AnnaBridge 172:7d866c31b3c5 28 }
AnnaBridge 172:7d866c31b3c5 29
AnnaBridge 188:bcfe06ba3d64 30 const ticker_info_t* us_ticker_get_info()
AnnaBridge 172:7d866c31b3c5 31 {
AnnaBridge 188:bcfe06ba3d64 32 static const ticker_info_t info = {
AnnaBridge 188:bcfe06ba3d64 33 3000000, // 3MHz,
AnnaBridge 188:bcfe06ba3d64 34 16 // 16 bit counter
AnnaBridge 188:bcfe06ba3d64 35 };
AnnaBridge 188:bcfe06ba3d64 36 return &info;
AnnaBridge 172:7d866c31b3c5 37 }
AnnaBridge 172:7d866c31b3c5 38
AnnaBridge 172:7d866c31b3c5 39 // initialize us_ticker
AnnaBridge 172:7d866c31b3c5 40 void us_ticker_init(void)
AnnaBridge 172:7d866c31b3c5 41 {
AnnaBridge 188:bcfe06ba3d64 42 TMRB_InitTypeDef m_tmrb0;
AnnaBridge 188:bcfe06ba3d64 43
AnnaBridge 172:7d866c31b3c5 44 if (us_ticker_inited) {
AnnaBridge 188:bcfe06ba3d64 45 us_ticker_disable_interrupt();
AnnaBridge 172:7d866c31b3c5 46 return;
AnnaBridge 172:7d866c31b3c5 47 }
AnnaBridge 188:bcfe06ba3d64 48 us_ticker_inited = true;
AnnaBridge 172:7d866c31b3c5 49
AnnaBridge 188:bcfe06ba3d64 50 // TSB_TB7 using free-run
AnnaBridge 188:bcfe06ba3d64 51 m_tmrb0.Mode = TMRB_INTERVAL_TIMER;
AnnaBridge 188:bcfe06ba3d64 52 m_tmrb0.ClkDiv = TMRB_CLK_DIV_8;
AnnaBridge 188:bcfe06ba3d64 53 m_tmrb0.UpCntCtrl = TMRB_FREE_RUN;
AnnaBridge 188:bcfe06ba3d64 54 m_tmrb0.TrailingTiming = MAX_TICK_16_BIT;
AnnaBridge 188:bcfe06ba3d64 55 m_tmrb0.LeadingTiming = MAX_TICK_16_BIT;
AnnaBridge 188:bcfe06ba3d64 56
AnnaBridge 188:bcfe06ba3d64 57 // Enable channel 0
AnnaBridge 188:bcfe06ba3d64 58 TMRB_Enable(TSB_TB7);
AnnaBridge 172:7d866c31b3c5 59 // Stops and clear count operation
AnnaBridge 188:bcfe06ba3d64 60 TMRB_SetRunState(TSB_TB7, TMRB_STOP);
AnnaBridge 188:bcfe06ba3d64 61 // Mask All interrupts
AnnaBridge 188:bcfe06ba3d64 62 TMRB_SetINTMask(TSB_TB7, TMRB_MASK_MATCH_LEADINGTIMING_INT | TMRB_MASK_MATCH_TRAILINGTIMING_INT | TMRB_MASK_OVERFLOW_INT);
AnnaBridge 188:bcfe06ba3d64 63 // Initialize timer
AnnaBridge 188:bcfe06ba3d64 64 TMRB_Init(TSB_TB7, &m_tmrb0);
AnnaBridge 188:bcfe06ba3d64 65 // Starts TSB_TB7
AnnaBridge 188:bcfe06ba3d64 66 TMRB_SetRunState(TSB_TB7, TMRB_RUN);
AnnaBridge 172:7d866c31b3c5 67 }
AnnaBridge 172:7d866c31b3c5 68
AnnaBridge 172:7d866c31b3c5 69 uint32_t us_ticker_read(void)
AnnaBridge 172:7d866c31b3c5 70 {
AnnaBridge 172:7d866c31b3c5 71 uint32_t ret_val = 0;
AnnaBridge 172:7d866c31b3c5 72
AnnaBridge 172:7d866c31b3c5 73 if (!us_ticker_inited) {
AnnaBridge 172:7d866c31b3c5 74 us_ticker_init();
AnnaBridge 172:7d866c31b3c5 75 }
AnnaBridge 172:7d866c31b3c5 76
AnnaBridge 188:bcfe06ba3d64 77 ret_val = (uint32_t)TMRB_GetUpCntValue(TSB_TB7);
AnnaBridge 172:7d866c31b3c5 78
AnnaBridge 172:7d866c31b3c5 79 return ret_val;
AnnaBridge 172:7d866c31b3c5 80 }
AnnaBridge 172:7d866c31b3c5 81
AnnaBridge 172:7d866c31b3c5 82 void us_ticker_set_interrupt(timestamp_t timestamp)
AnnaBridge 172:7d866c31b3c5 83 {
AnnaBridge 188:bcfe06ba3d64 84 NVIC_DisableIRQ(INTTB7_IRQn);
AnnaBridge 188:bcfe06ba3d64 85 NVIC_ClearPendingIRQ(INTTB7_IRQn);
AnnaBridge 188:bcfe06ba3d64 86 TMRB_ChangeTrailingTiming(TSB_TB7, timestamp);
AnnaBridge 188:bcfe06ba3d64 87 //Mask all Interrupts except trailing edge interrupt
AnnaBridge 188:bcfe06ba3d64 88 TMRB_SetINTMask(TSB_TB7, TMRB_MASK_MATCH_LEADINGTIMING_INT | TMRB_MASK_OVERFLOW_INT);
AnnaBridge 188:bcfe06ba3d64 89 NVIC_EnableIRQ(INTTB7_IRQn);
AnnaBridge 172:7d866c31b3c5 90 }
AnnaBridge 172:7d866c31b3c5 91
AnnaBridge 172:7d866c31b3c5 92 void us_ticker_fire_interrupt(void)
AnnaBridge 172:7d866c31b3c5 93 {
AnnaBridge 188:bcfe06ba3d64 94 NVIC_SetPendingIRQ(INTTB7_IRQn);
AnnaBridge 188:bcfe06ba3d64 95 NVIC_EnableIRQ(INTTB7_IRQn);
AnnaBridge 172:7d866c31b3c5 96 }
AnnaBridge 172:7d866c31b3c5 97
AnnaBridge 172:7d866c31b3c5 98 void us_ticker_disable_interrupt(void)
AnnaBridge 172:7d866c31b3c5 99 {
AnnaBridge 188:bcfe06ba3d64 100 // Mask All interrupts
AnnaBridge 188:bcfe06ba3d64 101 TMRB_SetINTMask(TSB_TB7, TMRB_MASK_MATCH_LEADINGTIMING_INT | TMRB_MASK_MATCH_TRAILINGTIMING_INT | TMRB_MASK_OVERFLOW_INT);
AnnaBridge 188:bcfe06ba3d64 102 // Also clear and disable interrupts by NVIC
AnnaBridge 188:bcfe06ba3d64 103 NVIC_ClearPendingIRQ(INTTB7_IRQn);
AnnaBridge 188:bcfe06ba3d64 104 NVIC_DisableIRQ(INTTB7_IRQn);
AnnaBridge 172:7d866c31b3c5 105 }
AnnaBridge 172:7d866c31b3c5 106
AnnaBridge 172:7d866c31b3c5 107 void us_ticker_clear_interrupt(void)
AnnaBridge 172:7d866c31b3c5 108 {
AnnaBridge 188:bcfe06ba3d64 109 INTIFSD_ClearINTReq(INTIFSD_INT_SRC_TMRB_7_MDOVF);
AnnaBridge 188:bcfe06ba3d64 110 NVIC_ClearPendingIRQ(INTTB7_IRQn);
AnnaBridge 172:7d866c31b3c5 111 }
AnnaBridge 188:bcfe06ba3d64 112
AnnaBridge 188:bcfe06ba3d64 113 void us_ticker_free(void)
AnnaBridge 188:bcfe06ba3d64 114 {
AnnaBridge 188:bcfe06ba3d64 115 TMRB_SetINTMask(TSB_TB7, TMRB_MASK_MATCH_LEADINGTIMING_INT | TMRB_MASK_MATCH_TRAILINGTIMING_INT | TMRB_MASK_OVERFLOW_INT);
AnnaBridge 188:bcfe06ba3d64 116 NVIC_ClearPendingIRQ(INTTB7_IRQn);
AnnaBridge 188:bcfe06ba3d64 117 NVIC_DisableIRQ(INTTB7_IRQn);
AnnaBridge 188:bcfe06ba3d64 118 TMRB_SetRunState(TSB_TB7, TMRB_STOP);
AnnaBridge 188:bcfe06ba3d64 119 TMRB_Disable(TSB_TB7);
AnnaBridge 188:bcfe06ba3d64 120 }