mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/efm32gg11b_trng.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 187:0387e8f68319 1 /**************************************************************************//**
AnnaBridge 187:0387e8f68319 2 * @file efm32gg11b_trng.h
AnnaBridge 187:0387e8f68319 3 * @brief EFM32GG11B_TRNG register and bit field definitions
AnnaBridge 187:0387e8f68319 4 * @version 5.3.2
AnnaBridge 187:0387e8f68319 5 ******************************************************************************
AnnaBridge 187:0387e8f68319 6 * # License
AnnaBridge 187:0387e8f68319 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 187:0387e8f68319 8 ******************************************************************************
AnnaBridge 187:0387e8f68319 9 *
AnnaBridge 187:0387e8f68319 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 187:0387e8f68319 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 187:0387e8f68319 12 * freely, subject to the following restrictions:
AnnaBridge 187:0387e8f68319 13 *
AnnaBridge 187:0387e8f68319 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 187:0387e8f68319 15 * claim that you wrote the original software.@n
AnnaBridge 187:0387e8f68319 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 187:0387e8f68319 17 * misrepresented as being the original software.@n
AnnaBridge 187:0387e8f68319 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 187:0387e8f68319 19 *
AnnaBridge 187:0387e8f68319 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
AnnaBridge 187:0387e8f68319 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
AnnaBridge 187:0387e8f68319 22 * providing the Software "AS IS", with no express or implied warranties of any
AnnaBridge 187:0387e8f68319 23 * kind, including, but not limited to, any implied warranties of
AnnaBridge 187:0387e8f68319 24 * merchantability or fitness for any particular purpose or warranties against
AnnaBridge 187:0387e8f68319 25 * infringement of any proprietary rights of a third party.
AnnaBridge 187:0387e8f68319 26 *
AnnaBridge 187:0387e8f68319 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
AnnaBridge 187:0387e8f68319 28 * incidental, or special damages, or any other relief, or for any claim by
AnnaBridge 187:0387e8f68319 29 * any third party, arising from your use of this Software.
AnnaBridge 187:0387e8f68319 30 *
AnnaBridge 187:0387e8f68319 31 *****************************************************************************/
AnnaBridge 187:0387e8f68319 32
AnnaBridge 187:0387e8f68319 33 #if defined(__ICCARM__)
AnnaBridge 187:0387e8f68319 34 #pragma system_include /* Treat file as system include file. */
AnnaBridge 187:0387e8f68319 35 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
AnnaBridge 187:0387e8f68319 36 #pragma clang system_header /* Treat file as system include file. */
AnnaBridge 187:0387e8f68319 37 #endif
AnnaBridge 187:0387e8f68319 38
AnnaBridge 187:0387e8f68319 39 /**************************************************************************//**
AnnaBridge 187:0387e8f68319 40 * @addtogroup Parts
AnnaBridge 187:0387e8f68319 41 * @{
AnnaBridge 187:0387e8f68319 42 ******************************************************************************/
AnnaBridge 187:0387e8f68319 43 /**************************************************************************//**
AnnaBridge 187:0387e8f68319 44 * @defgroup EFM32GG11B_TRNG TRNG
AnnaBridge 187:0387e8f68319 45 * @{
AnnaBridge 187:0387e8f68319 46 * @brief EFM32GG11B_TRNG Register Declaration
AnnaBridge 187:0387e8f68319 47 *****************************************************************************/
AnnaBridge 187:0387e8f68319 48 /** TRNG Register Declaration */
AnnaBridge 187:0387e8f68319 49 typedef struct {
AnnaBridge 187:0387e8f68319 50 __IOM uint32_t CONTROL; /**< Main Control Register */
AnnaBridge 187:0387e8f68319 51 __IM uint32_t FIFOLEVEL; /**< FIFO Level Register */
AnnaBridge 187:0387e8f68319 52 uint32_t RESERVED0[1]; /**< Reserved for future use **/
AnnaBridge 187:0387e8f68319 53 __IM uint32_t FIFODEPTH; /**< FIFO Depth Register */
AnnaBridge 187:0387e8f68319 54 __IOM uint32_t KEY0; /**< Key Register 0 */
AnnaBridge 187:0387e8f68319 55 __IOM uint32_t KEY1; /**< Key Register 1 */
AnnaBridge 187:0387e8f68319 56 __IOM uint32_t KEY2; /**< Key Register 2 */
AnnaBridge 187:0387e8f68319 57 __IOM uint32_t KEY3; /**< Key Register 3 */
AnnaBridge 187:0387e8f68319 58 __IOM uint32_t TESTDATA; /**< Test Data Register */
AnnaBridge 187:0387e8f68319 59
AnnaBridge 187:0387e8f68319 60 uint32_t RESERVED1[3]; /**< Reserved for future use **/
AnnaBridge 187:0387e8f68319 61 __IOM uint32_t STATUS; /**< Status Register */
AnnaBridge 187:0387e8f68319 62 __IOM uint32_t INITWAITVAL; /**< Initial Wait Counter */
AnnaBridge 187:0387e8f68319 63 uint32_t RESERVED2[50]; /**< Reserved for future use **/
AnnaBridge 187:0387e8f68319 64 __IM uint32_t FIFO; /**< FIFO Data */
AnnaBridge 187:0387e8f68319 65 } TRNG_TypeDef; /** @} */
AnnaBridge 187:0387e8f68319 66
AnnaBridge 187:0387e8f68319 67 /**************************************************************************//**
AnnaBridge 187:0387e8f68319 68 * @addtogroup EFM32GG11B_TRNG
AnnaBridge 187:0387e8f68319 69 * @{
AnnaBridge 187:0387e8f68319 70 * @defgroup EFM32GG11B_TRNG_BitFields TRNG Bit Fields
AnnaBridge 187:0387e8f68319 71 * @{
AnnaBridge 187:0387e8f68319 72 *****************************************************************************/
AnnaBridge 187:0387e8f68319 73
AnnaBridge 187:0387e8f68319 74 /* Bit fields for TRNG CONTROL */
AnnaBridge 187:0387e8f68319 75 #define _TRNG_CONTROL_RESETVALUE 0x00000000UL /**< Default value for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 76 #define _TRNG_CONTROL_MASK 0x00003FFDUL /**< Mask for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 77 #define TRNG_CONTROL_ENABLE (0x1UL << 0) /**< TRNG Module Enable */
AnnaBridge 187:0387e8f68319 78 #define _TRNG_CONTROL_ENABLE_SHIFT 0 /**< Shift value for TRNG_ENABLE */
AnnaBridge 187:0387e8f68319 79 #define _TRNG_CONTROL_ENABLE_MASK 0x1UL /**< Bit mask for TRNG_ENABLE */
AnnaBridge 187:0387e8f68319 80 #define _TRNG_CONTROL_ENABLE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 81 #define _TRNG_CONTROL_ENABLE_DISABLED 0x00000000UL /**< Mode DISABLED for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 82 #define _TRNG_CONTROL_ENABLE_ENABLED 0x00000001UL /**< Mode ENABLED for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 83 #define TRNG_CONTROL_ENABLE_DEFAULT (_TRNG_CONTROL_ENABLE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 84 #define TRNG_CONTROL_ENABLE_DISABLED (_TRNG_CONTROL_ENABLE_DISABLED << 0) /**< Shifted mode DISABLED for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 85 #define TRNG_CONTROL_ENABLE_ENABLED (_TRNG_CONTROL_ENABLE_ENABLED << 0) /**< Shifted mode ENABLED for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 86 #define TRNG_CONTROL_TESTEN (0x1UL << 2) /**< Test Enable */
AnnaBridge 187:0387e8f68319 87 #define _TRNG_CONTROL_TESTEN_SHIFT 2 /**< Shift value for TRNG_TESTEN */
AnnaBridge 187:0387e8f68319 88 #define _TRNG_CONTROL_TESTEN_MASK 0x4UL /**< Bit mask for TRNG_TESTEN */
AnnaBridge 187:0387e8f68319 89 #define _TRNG_CONTROL_TESTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 90 #define _TRNG_CONTROL_TESTEN_NOISE 0x00000000UL /**< Mode NOISE for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 91 #define _TRNG_CONTROL_TESTEN_TESTDATA 0x00000001UL /**< Mode TESTDATA for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 92 #define TRNG_CONTROL_TESTEN_DEFAULT (_TRNG_CONTROL_TESTEN_DEFAULT << 2) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 93 #define TRNG_CONTROL_TESTEN_NOISE (_TRNG_CONTROL_TESTEN_NOISE << 2) /**< Shifted mode NOISE for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 94 #define TRNG_CONTROL_TESTEN_TESTDATA (_TRNG_CONTROL_TESTEN_TESTDATA << 2) /**< Shifted mode TESTDATA for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 95 #define TRNG_CONTROL_CONDBYPASS (0x1UL << 3) /**< Conditioning Bypass */
AnnaBridge 187:0387e8f68319 96 #define _TRNG_CONTROL_CONDBYPASS_SHIFT 3 /**< Shift value for TRNG_CONDBYPASS */
AnnaBridge 187:0387e8f68319 97 #define _TRNG_CONTROL_CONDBYPASS_MASK 0x8UL /**< Bit mask for TRNG_CONDBYPASS */
AnnaBridge 187:0387e8f68319 98 #define _TRNG_CONTROL_CONDBYPASS_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 99 #define _TRNG_CONTROL_CONDBYPASS_NORMAL 0x00000000UL /**< Mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 100 #define _TRNG_CONTROL_CONDBYPASS_BYPASS 0x00000001UL /**< Mode BYPASS for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 101 #define TRNG_CONTROL_CONDBYPASS_DEFAULT (_TRNG_CONTROL_CONDBYPASS_DEFAULT << 3) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 102 #define TRNG_CONTROL_CONDBYPASS_NORMAL (_TRNG_CONTROL_CONDBYPASS_NORMAL << 3) /**< Shifted mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 103 #define TRNG_CONTROL_CONDBYPASS_BYPASS (_TRNG_CONTROL_CONDBYPASS_BYPASS << 3) /**< Shifted mode BYPASS for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 104 #define TRNG_CONTROL_REPCOUNTIEN (0x1UL << 4) /**< Interrupt enable for Repetition Count Test failure */
AnnaBridge 187:0387e8f68319 105 #define _TRNG_CONTROL_REPCOUNTIEN_SHIFT 4 /**< Shift value for TRNG_REPCOUNTIEN */
AnnaBridge 187:0387e8f68319 106 #define _TRNG_CONTROL_REPCOUNTIEN_MASK 0x10UL /**< Bit mask for TRNG_REPCOUNTIEN */
AnnaBridge 187:0387e8f68319 107 #define _TRNG_CONTROL_REPCOUNTIEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 108 #define TRNG_CONTROL_REPCOUNTIEN_DEFAULT (_TRNG_CONTROL_REPCOUNTIEN_DEFAULT << 4) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 109 #define TRNG_CONTROL_APT64IEN (0x1UL << 5) /**< Interrupt enable for Adaptive Proportion Test failure (64-sample window) */
AnnaBridge 187:0387e8f68319 110 #define _TRNG_CONTROL_APT64IEN_SHIFT 5 /**< Shift value for TRNG_APT64IEN */
AnnaBridge 187:0387e8f68319 111 #define _TRNG_CONTROL_APT64IEN_MASK 0x20UL /**< Bit mask for TRNG_APT64IEN */
AnnaBridge 187:0387e8f68319 112 #define _TRNG_CONTROL_APT64IEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 113 #define TRNG_CONTROL_APT64IEN_DEFAULT (_TRNG_CONTROL_APT64IEN_DEFAULT << 5) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 114 #define TRNG_CONTROL_APT4096IEN (0x1UL << 6) /**< Interrupt enable for Adaptive Proportion Test failure (4096-sample window) */
AnnaBridge 187:0387e8f68319 115 #define _TRNG_CONTROL_APT4096IEN_SHIFT 6 /**< Shift value for TRNG_APT4096IEN */
AnnaBridge 187:0387e8f68319 116 #define _TRNG_CONTROL_APT4096IEN_MASK 0x40UL /**< Bit mask for TRNG_APT4096IEN */
AnnaBridge 187:0387e8f68319 117 #define _TRNG_CONTROL_APT4096IEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 118 #define TRNG_CONTROL_APT4096IEN_DEFAULT (_TRNG_CONTROL_APT4096IEN_DEFAULT << 6) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 119 #define TRNG_CONTROL_FULLIEN (0x1UL << 7) /**< Interrupt enable for FIFO full */
AnnaBridge 187:0387e8f68319 120 #define _TRNG_CONTROL_FULLIEN_SHIFT 7 /**< Shift value for TRNG_FULLIEN */
AnnaBridge 187:0387e8f68319 121 #define _TRNG_CONTROL_FULLIEN_MASK 0x80UL /**< Bit mask for TRNG_FULLIEN */
AnnaBridge 187:0387e8f68319 122 #define _TRNG_CONTROL_FULLIEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 123 #define TRNG_CONTROL_FULLIEN_DEFAULT (_TRNG_CONTROL_FULLIEN_DEFAULT << 7) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 124 #define TRNG_CONTROL_SOFTRESET (0x1UL << 8) /**< Software Reset */
AnnaBridge 187:0387e8f68319 125 #define _TRNG_CONTROL_SOFTRESET_SHIFT 8 /**< Shift value for TRNG_SOFTRESET */
AnnaBridge 187:0387e8f68319 126 #define _TRNG_CONTROL_SOFTRESET_MASK 0x100UL /**< Bit mask for TRNG_SOFTRESET */
AnnaBridge 187:0387e8f68319 127 #define _TRNG_CONTROL_SOFTRESET_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 128 #define _TRNG_CONTROL_SOFTRESET_NORMAL 0x00000000UL /**< Mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 129 #define _TRNG_CONTROL_SOFTRESET_RESET 0x00000001UL /**< Mode RESET for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 130 #define TRNG_CONTROL_SOFTRESET_DEFAULT (_TRNG_CONTROL_SOFTRESET_DEFAULT << 8) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 131 #define TRNG_CONTROL_SOFTRESET_NORMAL (_TRNG_CONTROL_SOFTRESET_NORMAL << 8) /**< Shifted mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 132 #define TRNG_CONTROL_SOFTRESET_RESET (_TRNG_CONTROL_SOFTRESET_RESET << 8) /**< Shifted mode RESET for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 133 #define TRNG_CONTROL_PREIEN (0x1UL << 9) /**< Interrupt enable for AIS31 preliminary noise alarm */
AnnaBridge 187:0387e8f68319 134 #define _TRNG_CONTROL_PREIEN_SHIFT 9 /**< Shift value for TRNG_PREIEN */
AnnaBridge 187:0387e8f68319 135 #define _TRNG_CONTROL_PREIEN_MASK 0x200UL /**< Bit mask for TRNG_PREIEN */
AnnaBridge 187:0387e8f68319 136 #define _TRNG_CONTROL_PREIEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 137 #define TRNG_CONTROL_PREIEN_DEFAULT (_TRNG_CONTROL_PREIEN_DEFAULT << 9) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 138 #define TRNG_CONTROL_ALMIEN (0x1UL << 10) /**< Interrupt enable for AIS31 noise alarm */
AnnaBridge 187:0387e8f68319 139 #define _TRNG_CONTROL_ALMIEN_SHIFT 10 /**< Shift value for TRNG_ALMIEN */
AnnaBridge 187:0387e8f68319 140 #define _TRNG_CONTROL_ALMIEN_MASK 0x400UL /**< Bit mask for TRNG_ALMIEN */
AnnaBridge 187:0387e8f68319 141 #define _TRNG_CONTROL_ALMIEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 142 #define TRNG_CONTROL_ALMIEN_DEFAULT (_TRNG_CONTROL_ALMIEN_DEFAULT << 10) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 143 #define TRNG_CONTROL_FORCERUN (0x1UL << 11) /**< Oscillator Force Run */
AnnaBridge 187:0387e8f68319 144 #define _TRNG_CONTROL_FORCERUN_SHIFT 11 /**< Shift value for TRNG_FORCERUN */
AnnaBridge 187:0387e8f68319 145 #define _TRNG_CONTROL_FORCERUN_MASK 0x800UL /**< Bit mask for TRNG_FORCERUN */
AnnaBridge 187:0387e8f68319 146 #define _TRNG_CONTROL_FORCERUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 147 #define _TRNG_CONTROL_FORCERUN_NORMAL 0x00000000UL /**< Mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 148 #define _TRNG_CONTROL_FORCERUN_RUN 0x00000001UL /**< Mode RUN for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 149 #define TRNG_CONTROL_FORCERUN_DEFAULT (_TRNG_CONTROL_FORCERUN_DEFAULT << 11) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 150 #define TRNG_CONTROL_FORCERUN_NORMAL (_TRNG_CONTROL_FORCERUN_NORMAL << 11) /**< Shifted mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 151 #define TRNG_CONTROL_FORCERUN_RUN (_TRNG_CONTROL_FORCERUN_RUN << 11) /**< Shifted mode RUN for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 152 #define TRNG_CONTROL_BYPNIST (0x1UL << 12) /**< NIST Start-up Test Bypass. */
AnnaBridge 187:0387e8f68319 153 #define _TRNG_CONTROL_BYPNIST_SHIFT 12 /**< Shift value for TRNG_BYPNIST */
AnnaBridge 187:0387e8f68319 154 #define _TRNG_CONTROL_BYPNIST_MASK 0x1000UL /**< Bit mask for TRNG_BYPNIST */
AnnaBridge 187:0387e8f68319 155 #define _TRNG_CONTROL_BYPNIST_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 156 #define _TRNG_CONTROL_BYPNIST_NORMAL 0x00000000UL /**< Mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 157 #define _TRNG_CONTROL_BYPNIST_BYPASS 0x00000001UL /**< Mode BYPASS for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 158 #define TRNG_CONTROL_BYPNIST_DEFAULT (_TRNG_CONTROL_BYPNIST_DEFAULT << 12) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 159 #define TRNG_CONTROL_BYPNIST_NORMAL (_TRNG_CONTROL_BYPNIST_NORMAL << 12) /**< Shifted mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 160 #define TRNG_CONTROL_BYPNIST_BYPASS (_TRNG_CONTROL_BYPNIST_BYPASS << 12) /**< Shifted mode BYPASS for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 161 #define TRNG_CONTROL_BYPAIS31 (0x1UL << 13) /**< AIS31 Start-up Test Bypass. */
AnnaBridge 187:0387e8f68319 162 #define _TRNG_CONTROL_BYPAIS31_SHIFT 13 /**< Shift value for TRNG_BYPAIS31 */
AnnaBridge 187:0387e8f68319 163 #define _TRNG_CONTROL_BYPAIS31_MASK 0x2000UL /**< Bit mask for TRNG_BYPAIS31 */
AnnaBridge 187:0387e8f68319 164 #define _TRNG_CONTROL_BYPAIS31_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 165 #define _TRNG_CONTROL_BYPAIS31_NORMAL 0x00000000UL /**< Mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 166 #define _TRNG_CONTROL_BYPAIS31_BYPASS 0x00000001UL /**< Mode BYPASS for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 167 #define TRNG_CONTROL_BYPAIS31_DEFAULT (_TRNG_CONTROL_BYPAIS31_DEFAULT << 13) /**< Shifted mode DEFAULT for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 168 #define TRNG_CONTROL_BYPAIS31_NORMAL (_TRNG_CONTROL_BYPAIS31_NORMAL << 13) /**< Shifted mode NORMAL for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 169 #define TRNG_CONTROL_BYPAIS31_BYPASS (_TRNG_CONTROL_BYPAIS31_BYPASS << 13) /**< Shifted mode BYPASS for TRNG_CONTROL */
AnnaBridge 187:0387e8f68319 170
AnnaBridge 187:0387e8f68319 171 /* Bit fields for TRNG FIFOLEVEL */
AnnaBridge 187:0387e8f68319 172 #define _TRNG_FIFOLEVEL_RESETVALUE 0x00000000UL /**< Default value for TRNG_FIFOLEVEL */
AnnaBridge 187:0387e8f68319 173 #define _TRNG_FIFOLEVEL_MASK 0xFFFFFFFFUL /**< Mask for TRNG_FIFOLEVEL */
AnnaBridge 187:0387e8f68319 174 #define _TRNG_FIFOLEVEL_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 175 #define _TRNG_FIFOLEVEL_VALUE_MASK 0xFFFFFFFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 176 #define _TRNG_FIFOLEVEL_VALUE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_FIFOLEVEL */
AnnaBridge 187:0387e8f68319 177 #define TRNG_FIFOLEVEL_VALUE_DEFAULT (_TRNG_FIFOLEVEL_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_FIFOLEVEL */
AnnaBridge 187:0387e8f68319 178
AnnaBridge 187:0387e8f68319 179 /* Bit fields for TRNG FIFODEPTH */
AnnaBridge 187:0387e8f68319 180 #define _TRNG_FIFODEPTH_RESETVALUE 0x00000040UL /**< Default value for TRNG_FIFODEPTH */
AnnaBridge 187:0387e8f68319 181 #define _TRNG_FIFODEPTH_MASK 0xFFFFFFFFUL /**< Mask for TRNG_FIFODEPTH */
AnnaBridge 187:0387e8f68319 182 #define _TRNG_FIFODEPTH_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 183 #define _TRNG_FIFODEPTH_VALUE_MASK 0xFFFFFFFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 184 #define _TRNG_FIFODEPTH_VALUE_DEFAULT 0x00000040UL /**< Mode DEFAULT for TRNG_FIFODEPTH */
AnnaBridge 187:0387e8f68319 185 #define TRNG_FIFODEPTH_VALUE_DEFAULT (_TRNG_FIFODEPTH_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_FIFODEPTH */
AnnaBridge 187:0387e8f68319 186
AnnaBridge 187:0387e8f68319 187 /* Bit fields for TRNG KEY0 */
AnnaBridge 187:0387e8f68319 188 #define _TRNG_KEY0_RESETVALUE 0x00000000UL /**< Default value for TRNG_KEY0 */
AnnaBridge 187:0387e8f68319 189 #define _TRNG_KEY0_MASK 0xFFFFFFFFUL /**< Mask for TRNG_KEY0 */
AnnaBridge 187:0387e8f68319 190 #define _TRNG_KEY0_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 191 #define _TRNG_KEY0_VALUE_MASK 0xFFFFFFFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 192 #define _TRNG_KEY0_VALUE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_KEY0 */
AnnaBridge 187:0387e8f68319 193 #define TRNG_KEY0_VALUE_DEFAULT (_TRNG_KEY0_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_KEY0 */
AnnaBridge 187:0387e8f68319 194
AnnaBridge 187:0387e8f68319 195 /* Bit fields for TRNG KEY1 */
AnnaBridge 187:0387e8f68319 196 #define _TRNG_KEY1_RESETVALUE 0x00000000UL /**< Default value for TRNG_KEY1 */
AnnaBridge 187:0387e8f68319 197 #define _TRNG_KEY1_MASK 0xFFFFFFFFUL /**< Mask for TRNG_KEY1 */
AnnaBridge 187:0387e8f68319 198 #define _TRNG_KEY1_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 199 #define _TRNG_KEY1_VALUE_MASK 0xFFFFFFFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 200 #define _TRNG_KEY1_VALUE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_KEY1 */
AnnaBridge 187:0387e8f68319 201 #define TRNG_KEY1_VALUE_DEFAULT (_TRNG_KEY1_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_KEY1 */
AnnaBridge 187:0387e8f68319 202
AnnaBridge 187:0387e8f68319 203 /* Bit fields for TRNG KEY2 */
AnnaBridge 187:0387e8f68319 204 #define _TRNG_KEY2_RESETVALUE 0x00000000UL /**< Default value for TRNG_KEY2 */
AnnaBridge 187:0387e8f68319 205 #define _TRNG_KEY2_MASK 0xFFFFFFFFUL /**< Mask for TRNG_KEY2 */
AnnaBridge 187:0387e8f68319 206 #define _TRNG_KEY2_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 207 #define _TRNG_KEY2_VALUE_MASK 0xFFFFFFFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 208 #define _TRNG_KEY2_VALUE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_KEY2 */
AnnaBridge 187:0387e8f68319 209 #define TRNG_KEY2_VALUE_DEFAULT (_TRNG_KEY2_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_KEY2 */
AnnaBridge 187:0387e8f68319 210
AnnaBridge 187:0387e8f68319 211 /* Bit fields for TRNG KEY3 */
AnnaBridge 187:0387e8f68319 212 #define _TRNG_KEY3_RESETVALUE 0x00000000UL /**< Default value for TRNG_KEY3 */
AnnaBridge 187:0387e8f68319 213 #define _TRNG_KEY3_MASK 0xFFFFFFFFUL /**< Mask for TRNG_KEY3 */
AnnaBridge 187:0387e8f68319 214 #define _TRNG_KEY3_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 215 #define _TRNG_KEY3_VALUE_MASK 0xFFFFFFFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 216 #define _TRNG_KEY3_VALUE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_KEY3 */
AnnaBridge 187:0387e8f68319 217 #define TRNG_KEY3_VALUE_DEFAULT (_TRNG_KEY3_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_KEY3 */
AnnaBridge 187:0387e8f68319 218
AnnaBridge 187:0387e8f68319 219 /* Bit fields for TRNG TESTDATA */
AnnaBridge 187:0387e8f68319 220 #define _TRNG_TESTDATA_RESETVALUE 0x00000000UL /**< Default value for TRNG_TESTDATA */
AnnaBridge 187:0387e8f68319 221 #define _TRNG_TESTDATA_MASK 0xFFFFFFFFUL /**< Mask for TRNG_TESTDATA */
AnnaBridge 187:0387e8f68319 222 #define _TRNG_TESTDATA_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 223 #define _TRNG_TESTDATA_VALUE_MASK 0xFFFFFFFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 224 #define _TRNG_TESTDATA_VALUE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_TESTDATA */
AnnaBridge 187:0387e8f68319 225 #define TRNG_TESTDATA_VALUE_DEFAULT (_TRNG_TESTDATA_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_TESTDATA */
AnnaBridge 187:0387e8f68319 226
AnnaBridge 187:0387e8f68319 227 /* Bit fields for TRNG STATUS */
AnnaBridge 187:0387e8f68319 228 #define _TRNG_STATUS_RESETVALUE 0x00000000UL /**< Default value for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 229 #define _TRNG_STATUS_MASK 0x000003F1UL /**< Mask for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 230 #define TRNG_STATUS_TESTDATABUSY (0x1UL << 0) /**< Test Data Busy */
AnnaBridge 187:0387e8f68319 231 #define _TRNG_STATUS_TESTDATABUSY_SHIFT 0 /**< Shift value for TRNG_TESTDATABUSY */
AnnaBridge 187:0387e8f68319 232 #define _TRNG_STATUS_TESTDATABUSY_MASK 0x1UL /**< Bit mask for TRNG_TESTDATABUSY */
AnnaBridge 187:0387e8f68319 233 #define _TRNG_STATUS_TESTDATABUSY_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 234 #define _TRNG_STATUS_TESTDATABUSY_IDLE 0x00000000UL /**< Mode IDLE for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 235 #define _TRNG_STATUS_TESTDATABUSY_BUSY 0x00000001UL /**< Mode BUSY for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 236 #define TRNG_STATUS_TESTDATABUSY_DEFAULT (_TRNG_STATUS_TESTDATABUSY_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 237 #define TRNG_STATUS_TESTDATABUSY_IDLE (_TRNG_STATUS_TESTDATABUSY_IDLE << 0) /**< Shifted mode IDLE for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 238 #define TRNG_STATUS_TESTDATABUSY_BUSY (_TRNG_STATUS_TESTDATABUSY_BUSY << 0) /**< Shifted mode BUSY for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 239 #define TRNG_STATUS_REPCOUNTIF (0x1UL << 4) /**< Repetition Count Test interrupt status */
AnnaBridge 187:0387e8f68319 240 #define _TRNG_STATUS_REPCOUNTIF_SHIFT 4 /**< Shift value for TRNG_REPCOUNTIF */
AnnaBridge 187:0387e8f68319 241 #define _TRNG_STATUS_REPCOUNTIF_MASK 0x10UL /**< Bit mask for TRNG_REPCOUNTIF */
AnnaBridge 187:0387e8f68319 242 #define _TRNG_STATUS_REPCOUNTIF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 243 #define TRNG_STATUS_REPCOUNTIF_DEFAULT (_TRNG_STATUS_REPCOUNTIF_DEFAULT << 4) /**< Shifted mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 244 #define TRNG_STATUS_APT64IF (0x1UL << 5) /**< Adaptive Proportion test failure (64-sample window) interrupt status */
AnnaBridge 187:0387e8f68319 245 #define _TRNG_STATUS_APT64IF_SHIFT 5 /**< Shift value for TRNG_APT64IF */
AnnaBridge 187:0387e8f68319 246 #define _TRNG_STATUS_APT64IF_MASK 0x20UL /**< Bit mask for TRNG_APT64IF */
AnnaBridge 187:0387e8f68319 247 #define _TRNG_STATUS_APT64IF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 248 #define TRNG_STATUS_APT64IF_DEFAULT (_TRNG_STATUS_APT64IF_DEFAULT << 5) /**< Shifted mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 249 #define TRNG_STATUS_APT4096IF (0x1UL << 6) /**< Adaptive Proportion test failure (4096-sample window) interrupt status */
AnnaBridge 187:0387e8f68319 250 #define _TRNG_STATUS_APT4096IF_SHIFT 6 /**< Shift value for TRNG_APT4096IF */
AnnaBridge 187:0387e8f68319 251 #define _TRNG_STATUS_APT4096IF_MASK 0x40UL /**< Bit mask for TRNG_APT4096IF */
AnnaBridge 187:0387e8f68319 252 #define _TRNG_STATUS_APT4096IF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 253 #define TRNG_STATUS_APT4096IF_DEFAULT (_TRNG_STATUS_APT4096IF_DEFAULT << 6) /**< Shifted mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 254 #define TRNG_STATUS_FULLIF (0x1UL << 7) /**< FIFO full interrupt status */
AnnaBridge 187:0387e8f68319 255 #define _TRNG_STATUS_FULLIF_SHIFT 7 /**< Shift value for TRNG_FULLIF */
AnnaBridge 187:0387e8f68319 256 #define _TRNG_STATUS_FULLIF_MASK 0x80UL /**< Bit mask for TRNG_FULLIF */
AnnaBridge 187:0387e8f68319 257 #define _TRNG_STATUS_FULLIF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 258 #define TRNG_STATUS_FULLIF_DEFAULT (_TRNG_STATUS_FULLIF_DEFAULT << 7) /**< Shifted mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 259 #define TRNG_STATUS_PREIF (0x1UL << 8) /**< AIS31 Preliminary Noise Alarm interrupt status */
AnnaBridge 187:0387e8f68319 260 #define _TRNG_STATUS_PREIF_SHIFT 8 /**< Shift value for TRNG_PREIF */
AnnaBridge 187:0387e8f68319 261 #define _TRNG_STATUS_PREIF_MASK 0x100UL /**< Bit mask for TRNG_PREIF */
AnnaBridge 187:0387e8f68319 262 #define _TRNG_STATUS_PREIF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 263 #define TRNG_STATUS_PREIF_DEFAULT (_TRNG_STATUS_PREIF_DEFAULT << 8) /**< Shifted mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 264 #define TRNG_STATUS_ALMIF (0x1UL << 9) /**< AIS31 Noise Alarm interrupt status */
AnnaBridge 187:0387e8f68319 265 #define _TRNG_STATUS_ALMIF_SHIFT 9 /**< Shift value for TRNG_ALMIF */
AnnaBridge 187:0387e8f68319 266 #define _TRNG_STATUS_ALMIF_MASK 0x200UL /**< Bit mask for TRNG_ALMIF */
AnnaBridge 187:0387e8f68319 267 #define _TRNG_STATUS_ALMIF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 268 #define TRNG_STATUS_ALMIF_DEFAULT (_TRNG_STATUS_ALMIF_DEFAULT << 9) /**< Shifted mode DEFAULT for TRNG_STATUS */
AnnaBridge 187:0387e8f68319 269
AnnaBridge 187:0387e8f68319 270 /* Bit fields for TRNG INITWAITVAL */
AnnaBridge 187:0387e8f68319 271 #define _TRNG_INITWAITVAL_RESETVALUE 0x000000FFUL /**< Default value for TRNG_INITWAITVAL */
AnnaBridge 187:0387e8f68319 272 #define _TRNG_INITWAITVAL_MASK 0x000000FFUL /**< Mask for TRNG_INITWAITVAL */
AnnaBridge 187:0387e8f68319 273 #define _TRNG_INITWAITVAL_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 274 #define _TRNG_INITWAITVAL_VALUE_MASK 0xFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 275 #define _TRNG_INITWAITVAL_VALUE_DEFAULT 0x000000FFUL /**< Mode DEFAULT for TRNG_INITWAITVAL */
AnnaBridge 187:0387e8f68319 276 #define TRNG_INITWAITVAL_VALUE_DEFAULT (_TRNG_INITWAITVAL_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_INITWAITVAL */
AnnaBridge 187:0387e8f68319 277
AnnaBridge 187:0387e8f68319 278 /* Bit fields for TRNG FIFO */
AnnaBridge 187:0387e8f68319 279 #define _TRNG_FIFO_RESETVALUE 0x00000000UL /**< Default value for TRNG_FIFO */
AnnaBridge 187:0387e8f68319 280 #define _TRNG_FIFO_MASK 0xFFFFFFFFUL /**< Mask for TRNG_FIFO */
AnnaBridge 187:0387e8f68319 281 #define _TRNG_FIFO_VALUE_SHIFT 0 /**< Shift value for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 282 #define _TRNG_FIFO_VALUE_MASK 0xFFFFFFFFUL /**< Bit mask for TRNG_VALUE */
AnnaBridge 187:0387e8f68319 283 #define _TRNG_FIFO_VALUE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TRNG_FIFO */
AnnaBridge 187:0387e8f68319 284 #define TRNG_FIFO_VALUE_DEFAULT (_TRNG_FIFO_VALUE_DEFAULT << 0) /**< Shifted mode DEFAULT for TRNG_FIFO */
AnnaBridge 187:0387e8f68319 285
AnnaBridge 187:0387e8f68319 286 /** @} */
AnnaBridge 187:0387e8f68319 287 /** @} End of group EFM32GG11B_TRNG */
AnnaBridge 187:0387e8f68319 288 /** @} End of group Parts */