mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/efm32gg11b_leuart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 187:0387e8f68319 1 /**************************************************************************//**
AnnaBridge 187:0387e8f68319 2 * @file efm32gg11b_leuart.h
AnnaBridge 187:0387e8f68319 3 * @brief EFM32GG11B_LEUART register and bit field definitions
AnnaBridge 187:0387e8f68319 4 * @version 5.3.2
AnnaBridge 187:0387e8f68319 5 ******************************************************************************
AnnaBridge 187:0387e8f68319 6 * # License
AnnaBridge 187:0387e8f68319 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 187:0387e8f68319 8 ******************************************************************************
AnnaBridge 187:0387e8f68319 9 *
AnnaBridge 187:0387e8f68319 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 187:0387e8f68319 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 187:0387e8f68319 12 * freely, subject to the following restrictions:
AnnaBridge 187:0387e8f68319 13 *
AnnaBridge 187:0387e8f68319 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 187:0387e8f68319 15 * claim that you wrote the original software.@n
AnnaBridge 187:0387e8f68319 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 187:0387e8f68319 17 * misrepresented as being the original software.@n
AnnaBridge 187:0387e8f68319 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 187:0387e8f68319 19 *
AnnaBridge 187:0387e8f68319 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
AnnaBridge 187:0387e8f68319 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
AnnaBridge 187:0387e8f68319 22 * providing the Software "AS IS", with no express or implied warranties of any
AnnaBridge 187:0387e8f68319 23 * kind, including, but not limited to, any implied warranties of
AnnaBridge 187:0387e8f68319 24 * merchantability or fitness for any particular purpose or warranties against
AnnaBridge 187:0387e8f68319 25 * infringement of any proprietary rights of a third party.
AnnaBridge 187:0387e8f68319 26 *
AnnaBridge 187:0387e8f68319 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
AnnaBridge 187:0387e8f68319 28 * incidental, or special damages, or any other relief, or for any claim by
AnnaBridge 187:0387e8f68319 29 * any third party, arising from your use of this Software.
AnnaBridge 187:0387e8f68319 30 *
AnnaBridge 187:0387e8f68319 31 *****************************************************************************/
AnnaBridge 187:0387e8f68319 32
AnnaBridge 187:0387e8f68319 33 #if defined(__ICCARM__)
AnnaBridge 187:0387e8f68319 34 #pragma system_include /* Treat file as system include file. */
AnnaBridge 187:0387e8f68319 35 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
AnnaBridge 187:0387e8f68319 36 #pragma clang system_header /* Treat file as system include file. */
AnnaBridge 187:0387e8f68319 37 #endif
AnnaBridge 187:0387e8f68319 38
AnnaBridge 187:0387e8f68319 39 /**************************************************************************//**
AnnaBridge 187:0387e8f68319 40 * @addtogroup Parts
AnnaBridge 187:0387e8f68319 41 * @{
AnnaBridge 187:0387e8f68319 42 ******************************************************************************/
AnnaBridge 187:0387e8f68319 43 /**************************************************************************//**
AnnaBridge 187:0387e8f68319 44 * @defgroup EFM32GG11B_LEUART LEUART
AnnaBridge 187:0387e8f68319 45 * @{
AnnaBridge 187:0387e8f68319 46 * @brief EFM32GG11B_LEUART Register Declaration
AnnaBridge 187:0387e8f68319 47 *****************************************************************************/
AnnaBridge 187:0387e8f68319 48 /** LEUART Register Declaration */
AnnaBridge 187:0387e8f68319 49 typedef struct {
AnnaBridge 187:0387e8f68319 50 __IOM uint32_t CTRL; /**< Control Register */
AnnaBridge 187:0387e8f68319 51 __IOM uint32_t CMD; /**< Command Register */
AnnaBridge 187:0387e8f68319 52 __IM uint32_t STATUS; /**< Status Register */
AnnaBridge 187:0387e8f68319 53 __IOM uint32_t CLKDIV; /**< Clock Control Register */
AnnaBridge 187:0387e8f68319 54 __IOM uint32_t STARTFRAME; /**< Start Frame Register */
AnnaBridge 187:0387e8f68319 55 __IOM uint32_t SIGFRAME; /**< Signal Frame Register */
AnnaBridge 187:0387e8f68319 56 __IM uint32_t RXDATAX; /**< Receive Buffer Data Extended Register */
AnnaBridge 187:0387e8f68319 57 __IM uint32_t RXDATA; /**< Receive Buffer Data Register */
AnnaBridge 187:0387e8f68319 58 __IM uint32_t RXDATAXP; /**< Receive Buffer Data Extended Peek Register */
AnnaBridge 187:0387e8f68319 59 __IOM uint32_t TXDATAX; /**< Transmit Buffer Data Extended Register */
AnnaBridge 187:0387e8f68319 60 __IOM uint32_t TXDATA; /**< Transmit Buffer Data Register */
AnnaBridge 187:0387e8f68319 61 __IM uint32_t IF; /**< Interrupt Flag Register */
AnnaBridge 187:0387e8f68319 62 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */
AnnaBridge 187:0387e8f68319 63 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */
AnnaBridge 187:0387e8f68319 64 __IOM uint32_t IEN; /**< Interrupt Enable Register */
AnnaBridge 187:0387e8f68319 65 __IOM uint32_t PULSECTRL; /**< Pulse Control Register */
AnnaBridge 187:0387e8f68319 66
AnnaBridge 187:0387e8f68319 67 __IOM uint32_t FREEZE; /**< Freeze Register */
AnnaBridge 187:0387e8f68319 68 __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
AnnaBridge 187:0387e8f68319 69
AnnaBridge 187:0387e8f68319 70 uint32_t RESERVED0[3]; /**< Reserved for future use **/
AnnaBridge 187:0387e8f68319 71 __IOM uint32_t ROUTEPEN; /**< I/O Routing Pin Enable Register */
AnnaBridge 187:0387e8f68319 72 __IOM uint32_t ROUTELOC0; /**< I/O Routing Location Register */
AnnaBridge 187:0387e8f68319 73 uint32_t RESERVED1[2]; /**< Reserved for future use **/
AnnaBridge 187:0387e8f68319 74 __IOM uint32_t INPUT; /**< LEUART Input Register */
AnnaBridge 187:0387e8f68319 75 } LEUART_TypeDef; /** @} */
AnnaBridge 187:0387e8f68319 76
AnnaBridge 187:0387e8f68319 77 /**************************************************************************//**
AnnaBridge 187:0387e8f68319 78 * @addtogroup EFM32GG11B_LEUART
AnnaBridge 187:0387e8f68319 79 * @{
AnnaBridge 187:0387e8f68319 80 * @defgroup EFM32GG11B_LEUART_BitFields LEUART Bit Fields
AnnaBridge 187:0387e8f68319 81 * @{
AnnaBridge 187:0387e8f68319 82 *****************************************************************************/
AnnaBridge 187:0387e8f68319 83
AnnaBridge 187:0387e8f68319 84 /* Bit fields for LEUART CTRL */
AnnaBridge 187:0387e8f68319 85 #define _LEUART_CTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 86 #define _LEUART_CTRL_MASK 0x0000FFFFUL /**< Mask for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 87 #define LEUART_CTRL_AUTOTRI (0x1UL << 0) /**< Automatic Transmitter Tristate */
AnnaBridge 187:0387e8f68319 88 #define _LEUART_CTRL_AUTOTRI_SHIFT 0 /**< Shift value for LEUART_AUTOTRI */
AnnaBridge 187:0387e8f68319 89 #define _LEUART_CTRL_AUTOTRI_MASK 0x1UL /**< Bit mask for LEUART_AUTOTRI */
AnnaBridge 187:0387e8f68319 90 #define _LEUART_CTRL_AUTOTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 91 #define LEUART_CTRL_AUTOTRI_DEFAULT (_LEUART_CTRL_AUTOTRI_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 92 #define LEUART_CTRL_DATABITS (0x1UL << 1) /**< Data-Bit Mode */
AnnaBridge 187:0387e8f68319 93 #define _LEUART_CTRL_DATABITS_SHIFT 1 /**< Shift value for LEUART_DATABITS */
AnnaBridge 187:0387e8f68319 94 #define _LEUART_CTRL_DATABITS_MASK 0x2UL /**< Bit mask for LEUART_DATABITS */
AnnaBridge 187:0387e8f68319 95 #define _LEUART_CTRL_DATABITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 96 #define _LEUART_CTRL_DATABITS_EIGHT 0x00000000UL /**< Mode EIGHT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 97 #define _LEUART_CTRL_DATABITS_NINE 0x00000001UL /**< Mode NINE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 98 #define LEUART_CTRL_DATABITS_DEFAULT (_LEUART_CTRL_DATABITS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 99 #define LEUART_CTRL_DATABITS_EIGHT (_LEUART_CTRL_DATABITS_EIGHT << 1) /**< Shifted mode EIGHT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 100 #define LEUART_CTRL_DATABITS_NINE (_LEUART_CTRL_DATABITS_NINE << 1) /**< Shifted mode NINE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 101 #define _LEUART_CTRL_PARITY_SHIFT 2 /**< Shift value for LEUART_PARITY */
AnnaBridge 187:0387e8f68319 102 #define _LEUART_CTRL_PARITY_MASK 0xCUL /**< Bit mask for LEUART_PARITY */
AnnaBridge 187:0387e8f68319 103 #define _LEUART_CTRL_PARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 104 #define _LEUART_CTRL_PARITY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 105 #define _LEUART_CTRL_PARITY_EVEN 0x00000002UL /**< Mode EVEN for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 106 #define _LEUART_CTRL_PARITY_ODD 0x00000003UL /**< Mode ODD for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 107 #define LEUART_CTRL_PARITY_DEFAULT (_LEUART_CTRL_PARITY_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 108 #define LEUART_CTRL_PARITY_NONE (_LEUART_CTRL_PARITY_NONE << 2) /**< Shifted mode NONE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 109 #define LEUART_CTRL_PARITY_EVEN (_LEUART_CTRL_PARITY_EVEN << 2) /**< Shifted mode EVEN for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 110 #define LEUART_CTRL_PARITY_ODD (_LEUART_CTRL_PARITY_ODD << 2) /**< Shifted mode ODD for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 111 #define LEUART_CTRL_STOPBITS (0x1UL << 4) /**< Stop-Bit Mode */
AnnaBridge 187:0387e8f68319 112 #define _LEUART_CTRL_STOPBITS_SHIFT 4 /**< Shift value for LEUART_STOPBITS */
AnnaBridge 187:0387e8f68319 113 #define _LEUART_CTRL_STOPBITS_MASK 0x10UL /**< Bit mask for LEUART_STOPBITS */
AnnaBridge 187:0387e8f68319 114 #define _LEUART_CTRL_STOPBITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 115 #define _LEUART_CTRL_STOPBITS_ONE 0x00000000UL /**< Mode ONE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 116 #define _LEUART_CTRL_STOPBITS_TWO 0x00000001UL /**< Mode TWO for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 117 #define LEUART_CTRL_STOPBITS_DEFAULT (_LEUART_CTRL_STOPBITS_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 118 #define LEUART_CTRL_STOPBITS_ONE (_LEUART_CTRL_STOPBITS_ONE << 4) /**< Shifted mode ONE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 119 #define LEUART_CTRL_STOPBITS_TWO (_LEUART_CTRL_STOPBITS_TWO << 4) /**< Shifted mode TWO for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 120 #define LEUART_CTRL_INV (0x1UL << 5) /**< Invert Input And Output */
AnnaBridge 187:0387e8f68319 121 #define _LEUART_CTRL_INV_SHIFT 5 /**< Shift value for LEUART_INV */
AnnaBridge 187:0387e8f68319 122 #define _LEUART_CTRL_INV_MASK 0x20UL /**< Bit mask for LEUART_INV */
AnnaBridge 187:0387e8f68319 123 #define _LEUART_CTRL_INV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 124 #define LEUART_CTRL_INV_DEFAULT (_LEUART_CTRL_INV_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 125 #define LEUART_CTRL_ERRSDMA (0x1UL << 6) /**< Clear RX DMA On Error */
AnnaBridge 187:0387e8f68319 126 #define _LEUART_CTRL_ERRSDMA_SHIFT 6 /**< Shift value for LEUART_ERRSDMA */
AnnaBridge 187:0387e8f68319 127 #define _LEUART_CTRL_ERRSDMA_MASK 0x40UL /**< Bit mask for LEUART_ERRSDMA */
AnnaBridge 187:0387e8f68319 128 #define _LEUART_CTRL_ERRSDMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 129 #define LEUART_CTRL_ERRSDMA_DEFAULT (_LEUART_CTRL_ERRSDMA_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 130 #define LEUART_CTRL_LOOPBK (0x1UL << 7) /**< Loopback Enable */
AnnaBridge 187:0387e8f68319 131 #define _LEUART_CTRL_LOOPBK_SHIFT 7 /**< Shift value for LEUART_LOOPBK */
AnnaBridge 187:0387e8f68319 132 #define _LEUART_CTRL_LOOPBK_MASK 0x80UL /**< Bit mask for LEUART_LOOPBK */
AnnaBridge 187:0387e8f68319 133 #define _LEUART_CTRL_LOOPBK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 134 #define LEUART_CTRL_LOOPBK_DEFAULT (_LEUART_CTRL_LOOPBK_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 135 #define LEUART_CTRL_SFUBRX (0x1UL << 8) /**< Start-Frame UnBlock RX */
AnnaBridge 187:0387e8f68319 136 #define _LEUART_CTRL_SFUBRX_SHIFT 8 /**< Shift value for LEUART_SFUBRX */
AnnaBridge 187:0387e8f68319 137 #define _LEUART_CTRL_SFUBRX_MASK 0x100UL /**< Bit mask for LEUART_SFUBRX */
AnnaBridge 187:0387e8f68319 138 #define _LEUART_CTRL_SFUBRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 139 #define LEUART_CTRL_SFUBRX_DEFAULT (_LEUART_CTRL_SFUBRX_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 140 #define LEUART_CTRL_MPM (0x1UL << 9) /**< Multi-Processor Mode */
AnnaBridge 187:0387e8f68319 141 #define _LEUART_CTRL_MPM_SHIFT 9 /**< Shift value for LEUART_MPM */
AnnaBridge 187:0387e8f68319 142 #define _LEUART_CTRL_MPM_MASK 0x200UL /**< Bit mask for LEUART_MPM */
AnnaBridge 187:0387e8f68319 143 #define _LEUART_CTRL_MPM_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 144 #define LEUART_CTRL_MPM_DEFAULT (_LEUART_CTRL_MPM_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 145 #define LEUART_CTRL_MPAB (0x1UL << 10) /**< Multi-Processor Address-Bit */
AnnaBridge 187:0387e8f68319 146 #define _LEUART_CTRL_MPAB_SHIFT 10 /**< Shift value for LEUART_MPAB */
AnnaBridge 187:0387e8f68319 147 #define _LEUART_CTRL_MPAB_MASK 0x400UL /**< Bit mask for LEUART_MPAB */
AnnaBridge 187:0387e8f68319 148 #define _LEUART_CTRL_MPAB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 149 #define LEUART_CTRL_MPAB_DEFAULT (_LEUART_CTRL_MPAB_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 150 #define LEUART_CTRL_BIT8DV (0x1UL << 11) /**< Bit 8 Default Value */
AnnaBridge 187:0387e8f68319 151 #define _LEUART_CTRL_BIT8DV_SHIFT 11 /**< Shift value for LEUART_BIT8DV */
AnnaBridge 187:0387e8f68319 152 #define _LEUART_CTRL_BIT8DV_MASK 0x800UL /**< Bit mask for LEUART_BIT8DV */
AnnaBridge 187:0387e8f68319 153 #define _LEUART_CTRL_BIT8DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 154 #define LEUART_CTRL_BIT8DV_DEFAULT (_LEUART_CTRL_BIT8DV_DEFAULT << 11) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 155 #define LEUART_CTRL_RXDMAWU (0x1UL << 12) /**< RX DMA Wakeup */
AnnaBridge 187:0387e8f68319 156 #define _LEUART_CTRL_RXDMAWU_SHIFT 12 /**< Shift value for LEUART_RXDMAWU */
AnnaBridge 187:0387e8f68319 157 #define _LEUART_CTRL_RXDMAWU_MASK 0x1000UL /**< Bit mask for LEUART_RXDMAWU */
AnnaBridge 187:0387e8f68319 158 #define _LEUART_CTRL_RXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 159 #define LEUART_CTRL_RXDMAWU_DEFAULT (_LEUART_CTRL_RXDMAWU_DEFAULT << 12) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 160 #define LEUART_CTRL_TXDMAWU (0x1UL << 13) /**< TX DMA Wakeup */
AnnaBridge 187:0387e8f68319 161 #define _LEUART_CTRL_TXDMAWU_SHIFT 13 /**< Shift value for LEUART_TXDMAWU */
AnnaBridge 187:0387e8f68319 162 #define _LEUART_CTRL_TXDMAWU_MASK 0x2000UL /**< Bit mask for LEUART_TXDMAWU */
AnnaBridge 187:0387e8f68319 163 #define _LEUART_CTRL_TXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 164 #define LEUART_CTRL_TXDMAWU_DEFAULT (_LEUART_CTRL_TXDMAWU_DEFAULT << 13) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 165 #define _LEUART_CTRL_TXDELAY_SHIFT 14 /**< Shift value for LEUART_TXDELAY */
AnnaBridge 187:0387e8f68319 166 #define _LEUART_CTRL_TXDELAY_MASK 0xC000UL /**< Bit mask for LEUART_TXDELAY */
AnnaBridge 187:0387e8f68319 167 #define _LEUART_CTRL_TXDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 168 #define _LEUART_CTRL_TXDELAY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 169 #define _LEUART_CTRL_TXDELAY_SINGLE 0x00000001UL /**< Mode SINGLE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 170 #define _LEUART_CTRL_TXDELAY_DOUBLE 0x00000002UL /**< Mode DOUBLE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 171 #define _LEUART_CTRL_TXDELAY_TRIPLE 0x00000003UL /**< Mode TRIPLE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 172 #define LEUART_CTRL_TXDELAY_DEFAULT (_LEUART_CTRL_TXDELAY_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 173 #define LEUART_CTRL_TXDELAY_NONE (_LEUART_CTRL_TXDELAY_NONE << 14) /**< Shifted mode NONE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 174 #define LEUART_CTRL_TXDELAY_SINGLE (_LEUART_CTRL_TXDELAY_SINGLE << 14) /**< Shifted mode SINGLE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 175 #define LEUART_CTRL_TXDELAY_DOUBLE (_LEUART_CTRL_TXDELAY_DOUBLE << 14) /**< Shifted mode DOUBLE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 176 #define LEUART_CTRL_TXDELAY_TRIPLE (_LEUART_CTRL_TXDELAY_TRIPLE << 14) /**< Shifted mode TRIPLE for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 177
AnnaBridge 187:0387e8f68319 178 /* Bit fields for LEUART CMD */
AnnaBridge 187:0387e8f68319 179 #define _LEUART_CMD_RESETVALUE 0x00000000UL /**< Default value for LEUART_CMD */
AnnaBridge 187:0387e8f68319 180 #define _LEUART_CMD_MASK 0x000000FFUL /**< Mask for LEUART_CMD */
AnnaBridge 187:0387e8f68319 181 #define LEUART_CMD_RXEN (0x1UL << 0) /**< Receiver Enable */
AnnaBridge 187:0387e8f68319 182 #define _LEUART_CMD_RXEN_SHIFT 0 /**< Shift value for LEUART_RXEN */
AnnaBridge 187:0387e8f68319 183 #define _LEUART_CMD_RXEN_MASK 0x1UL /**< Bit mask for LEUART_RXEN */
AnnaBridge 187:0387e8f68319 184 #define _LEUART_CMD_RXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 185 #define LEUART_CMD_RXEN_DEFAULT (_LEUART_CMD_RXEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 186 #define LEUART_CMD_RXDIS (0x1UL << 1) /**< Receiver Disable */
AnnaBridge 187:0387e8f68319 187 #define _LEUART_CMD_RXDIS_SHIFT 1 /**< Shift value for LEUART_RXDIS */
AnnaBridge 187:0387e8f68319 188 #define _LEUART_CMD_RXDIS_MASK 0x2UL /**< Bit mask for LEUART_RXDIS */
AnnaBridge 187:0387e8f68319 189 #define _LEUART_CMD_RXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 190 #define LEUART_CMD_RXDIS_DEFAULT (_LEUART_CMD_RXDIS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 191 #define LEUART_CMD_TXEN (0x1UL << 2) /**< Transmitter Enable */
AnnaBridge 187:0387e8f68319 192 #define _LEUART_CMD_TXEN_SHIFT 2 /**< Shift value for LEUART_TXEN */
AnnaBridge 187:0387e8f68319 193 #define _LEUART_CMD_TXEN_MASK 0x4UL /**< Bit mask for LEUART_TXEN */
AnnaBridge 187:0387e8f68319 194 #define _LEUART_CMD_TXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 195 #define LEUART_CMD_TXEN_DEFAULT (_LEUART_CMD_TXEN_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 196 #define LEUART_CMD_TXDIS (0x1UL << 3) /**< Transmitter Disable */
AnnaBridge 187:0387e8f68319 197 #define _LEUART_CMD_TXDIS_SHIFT 3 /**< Shift value for LEUART_TXDIS */
AnnaBridge 187:0387e8f68319 198 #define _LEUART_CMD_TXDIS_MASK 0x8UL /**< Bit mask for LEUART_TXDIS */
AnnaBridge 187:0387e8f68319 199 #define _LEUART_CMD_TXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 200 #define LEUART_CMD_TXDIS_DEFAULT (_LEUART_CMD_TXDIS_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 201 #define LEUART_CMD_RXBLOCKEN (0x1UL << 4) /**< Receiver Block Enable */
AnnaBridge 187:0387e8f68319 202 #define _LEUART_CMD_RXBLOCKEN_SHIFT 4 /**< Shift value for LEUART_RXBLOCKEN */
AnnaBridge 187:0387e8f68319 203 #define _LEUART_CMD_RXBLOCKEN_MASK 0x10UL /**< Bit mask for LEUART_RXBLOCKEN */
AnnaBridge 187:0387e8f68319 204 #define _LEUART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 205 #define LEUART_CMD_RXBLOCKEN_DEFAULT (_LEUART_CMD_RXBLOCKEN_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 206 #define LEUART_CMD_RXBLOCKDIS (0x1UL << 5) /**< Receiver Block Disable */
AnnaBridge 187:0387e8f68319 207 #define _LEUART_CMD_RXBLOCKDIS_SHIFT 5 /**< Shift value for LEUART_RXBLOCKDIS */
AnnaBridge 187:0387e8f68319 208 #define _LEUART_CMD_RXBLOCKDIS_MASK 0x20UL /**< Bit mask for LEUART_RXBLOCKDIS */
AnnaBridge 187:0387e8f68319 209 #define _LEUART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 210 #define LEUART_CMD_RXBLOCKDIS_DEFAULT (_LEUART_CMD_RXBLOCKDIS_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 211 #define LEUART_CMD_CLEARTX (0x1UL << 6) /**< Clear TX */
AnnaBridge 187:0387e8f68319 212 #define _LEUART_CMD_CLEARTX_SHIFT 6 /**< Shift value for LEUART_CLEARTX */
AnnaBridge 187:0387e8f68319 213 #define _LEUART_CMD_CLEARTX_MASK 0x40UL /**< Bit mask for LEUART_CLEARTX */
AnnaBridge 187:0387e8f68319 214 #define _LEUART_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 215 #define LEUART_CMD_CLEARTX_DEFAULT (_LEUART_CMD_CLEARTX_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 216 #define LEUART_CMD_CLEARRX (0x1UL << 7) /**< Clear RX */
AnnaBridge 187:0387e8f68319 217 #define _LEUART_CMD_CLEARRX_SHIFT 7 /**< Shift value for LEUART_CLEARRX */
AnnaBridge 187:0387e8f68319 218 #define _LEUART_CMD_CLEARRX_MASK 0x80UL /**< Bit mask for LEUART_CLEARRX */
AnnaBridge 187:0387e8f68319 219 #define _LEUART_CMD_CLEARRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 220 #define LEUART_CMD_CLEARRX_DEFAULT (_LEUART_CMD_CLEARRX_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_CMD */
AnnaBridge 187:0387e8f68319 221
AnnaBridge 187:0387e8f68319 222 /* Bit fields for LEUART STATUS */
AnnaBridge 187:0387e8f68319 223 #define _LEUART_STATUS_RESETVALUE 0x00000050UL /**< Default value for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 224 #define _LEUART_STATUS_MASK 0x0000007FUL /**< Mask for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 225 #define LEUART_STATUS_RXENS (0x1UL << 0) /**< Receiver Enable Status */
AnnaBridge 187:0387e8f68319 226 #define _LEUART_STATUS_RXENS_SHIFT 0 /**< Shift value for LEUART_RXENS */
AnnaBridge 187:0387e8f68319 227 #define _LEUART_STATUS_RXENS_MASK 0x1UL /**< Bit mask for LEUART_RXENS */
AnnaBridge 187:0387e8f68319 228 #define _LEUART_STATUS_RXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 229 #define LEUART_STATUS_RXENS_DEFAULT (_LEUART_STATUS_RXENS_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 230 #define LEUART_STATUS_TXENS (0x1UL << 1) /**< Transmitter Enable Status */
AnnaBridge 187:0387e8f68319 231 #define _LEUART_STATUS_TXENS_SHIFT 1 /**< Shift value for LEUART_TXENS */
AnnaBridge 187:0387e8f68319 232 #define _LEUART_STATUS_TXENS_MASK 0x2UL /**< Bit mask for LEUART_TXENS */
AnnaBridge 187:0387e8f68319 233 #define _LEUART_STATUS_TXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 234 #define LEUART_STATUS_TXENS_DEFAULT (_LEUART_STATUS_TXENS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 235 #define LEUART_STATUS_RXBLOCK (0x1UL << 2) /**< Block Incoming Data */
AnnaBridge 187:0387e8f68319 236 #define _LEUART_STATUS_RXBLOCK_SHIFT 2 /**< Shift value for LEUART_RXBLOCK */
AnnaBridge 187:0387e8f68319 237 #define _LEUART_STATUS_RXBLOCK_MASK 0x4UL /**< Bit mask for LEUART_RXBLOCK */
AnnaBridge 187:0387e8f68319 238 #define _LEUART_STATUS_RXBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 239 #define LEUART_STATUS_RXBLOCK_DEFAULT (_LEUART_STATUS_RXBLOCK_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 240 #define LEUART_STATUS_TXC (0x1UL << 3) /**< TX Complete */
AnnaBridge 187:0387e8f68319 241 #define _LEUART_STATUS_TXC_SHIFT 3 /**< Shift value for LEUART_TXC */
AnnaBridge 187:0387e8f68319 242 #define _LEUART_STATUS_TXC_MASK 0x8UL /**< Bit mask for LEUART_TXC */
AnnaBridge 187:0387e8f68319 243 #define _LEUART_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 244 #define LEUART_STATUS_TXC_DEFAULT (_LEUART_STATUS_TXC_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 245 #define LEUART_STATUS_TXBL (0x1UL << 4) /**< TX Buffer Level */
AnnaBridge 187:0387e8f68319 246 #define _LEUART_STATUS_TXBL_SHIFT 4 /**< Shift value for LEUART_TXBL */
AnnaBridge 187:0387e8f68319 247 #define _LEUART_STATUS_TXBL_MASK 0x10UL /**< Bit mask for LEUART_TXBL */
AnnaBridge 187:0387e8f68319 248 #define _LEUART_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 249 #define LEUART_STATUS_TXBL_DEFAULT (_LEUART_STATUS_TXBL_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 250 #define LEUART_STATUS_RXDATAV (0x1UL << 5) /**< RX Data Valid */
AnnaBridge 187:0387e8f68319 251 #define _LEUART_STATUS_RXDATAV_SHIFT 5 /**< Shift value for LEUART_RXDATAV */
AnnaBridge 187:0387e8f68319 252 #define _LEUART_STATUS_RXDATAV_MASK 0x20UL /**< Bit mask for LEUART_RXDATAV */
AnnaBridge 187:0387e8f68319 253 #define _LEUART_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 254 #define LEUART_STATUS_RXDATAV_DEFAULT (_LEUART_STATUS_RXDATAV_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 255 #define LEUART_STATUS_TXIDLE (0x1UL << 6) /**< TX Idle */
AnnaBridge 187:0387e8f68319 256 #define _LEUART_STATUS_TXIDLE_SHIFT 6 /**< Shift value for LEUART_TXIDLE */
AnnaBridge 187:0387e8f68319 257 #define _LEUART_STATUS_TXIDLE_MASK 0x40UL /**< Bit mask for LEUART_TXIDLE */
AnnaBridge 187:0387e8f68319 258 #define _LEUART_STATUS_TXIDLE_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 259 #define LEUART_STATUS_TXIDLE_DEFAULT (_LEUART_STATUS_TXIDLE_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_STATUS */
AnnaBridge 187:0387e8f68319 260
AnnaBridge 187:0387e8f68319 261 /* Bit fields for LEUART CLKDIV */
AnnaBridge 187:0387e8f68319 262 #define _LEUART_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for LEUART_CLKDIV */
AnnaBridge 187:0387e8f68319 263 #define _LEUART_CLKDIV_MASK 0x0001FFF8UL /**< Mask for LEUART_CLKDIV */
AnnaBridge 187:0387e8f68319 264 #define _LEUART_CLKDIV_DIV_SHIFT 3 /**< Shift value for LEUART_DIV */
AnnaBridge 187:0387e8f68319 265 #define _LEUART_CLKDIV_DIV_MASK 0x1FFF8UL /**< Bit mask for LEUART_DIV */
AnnaBridge 187:0387e8f68319 266 #define _LEUART_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CLKDIV */
AnnaBridge 187:0387e8f68319 267 #define LEUART_CLKDIV_DIV_DEFAULT (_LEUART_CLKDIV_DIV_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_CLKDIV */
AnnaBridge 187:0387e8f68319 268
AnnaBridge 187:0387e8f68319 269 /* Bit fields for LEUART STARTFRAME */
AnnaBridge 187:0387e8f68319 270 #define _LEUART_STARTFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_STARTFRAME */
AnnaBridge 187:0387e8f68319 271 #define _LEUART_STARTFRAME_MASK 0x000001FFUL /**< Mask for LEUART_STARTFRAME */
AnnaBridge 187:0387e8f68319 272 #define _LEUART_STARTFRAME_STARTFRAME_SHIFT 0 /**< Shift value for LEUART_STARTFRAME */
AnnaBridge 187:0387e8f68319 273 #define _LEUART_STARTFRAME_STARTFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_STARTFRAME */
AnnaBridge 187:0387e8f68319 274 #define _LEUART_STARTFRAME_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STARTFRAME */
AnnaBridge 187:0387e8f68319 275 #define LEUART_STARTFRAME_STARTFRAME_DEFAULT (_LEUART_STARTFRAME_STARTFRAME_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_STARTFRAME */
AnnaBridge 187:0387e8f68319 276
AnnaBridge 187:0387e8f68319 277 /* Bit fields for LEUART SIGFRAME */
AnnaBridge 187:0387e8f68319 278 #define _LEUART_SIGFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_SIGFRAME */
AnnaBridge 187:0387e8f68319 279 #define _LEUART_SIGFRAME_MASK 0x000001FFUL /**< Mask for LEUART_SIGFRAME */
AnnaBridge 187:0387e8f68319 280 #define _LEUART_SIGFRAME_SIGFRAME_SHIFT 0 /**< Shift value for LEUART_SIGFRAME */
AnnaBridge 187:0387e8f68319 281 #define _LEUART_SIGFRAME_SIGFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_SIGFRAME */
AnnaBridge 187:0387e8f68319 282 #define _LEUART_SIGFRAME_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SIGFRAME */
AnnaBridge 187:0387e8f68319 283 #define LEUART_SIGFRAME_SIGFRAME_DEFAULT (_LEUART_SIGFRAME_SIGFRAME_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_SIGFRAME */
AnnaBridge 187:0387e8f68319 284
AnnaBridge 187:0387e8f68319 285 /* Bit fields for LEUART RXDATAX */
AnnaBridge 187:0387e8f68319 286 #define _LEUART_RXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAX */
AnnaBridge 187:0387e8f68319 287 #define _LEUART_RXDATAX_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAX */
AnnaBridge 187:0387e8f68319 288 #define _LEUART_RXDATAX_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
AnnaBridge 187:0387e8f68319 289 #define _LEUART_RXDATAX_RXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATA */
AnnaBridge 187:0387e8f68319 290 #define _LEUART_RXDATAX_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
AnnaBridge 187:0387e8f68319 291 #define LEUART_RXDATAX_RXDATA_DEFAULT (_LEUART_RXDATAX_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
AnnaBridge 187:0387e8f68319 292 #define LEUART_RXDATAX_PERR (0x1UL << 14) /**< Receive Data Parity Error */
AnnaBridge 187:0387e8f68319 293 #define _LEUART_RXDATAX_PERR_SHIFT 14 /**< Shift value for LEUART_PERR */
AnnaBridge 187:0387e8f68319 294 #define _LEUART_RXDATAX_PERR_MASK 0x4000UL /**< Bit mask for LEUART_PERR */
AnnaBridge 187:0387e8f68319 295 #define _LEUART_RXDATAX_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
AnnaBridge 187:0387e8f68319 296 #define LEUART_RXDATAX_PERR_DEFAULT (_LEUART_RXDATAX_PERR_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
AnnaBridge 187:0387e8f68319 297 #define LEUART_RXDATAX_FERR (0x1UL << 15) /**< Receive Data Framing Error */
AnnaBridge 187:0387e8f68319 298 #define _LEUART_RXDATAX_FERR_SHIFT 15 /**< Shift value for LEUART_FERR */
AnnaBridge 187:0387e8f68319 299 #define _LEUART_RXDATAX_FERR_MASK 0x8000UL /**< Bit mask for LEUART_FERR */
AnnaBridge 187:0387e8f68319 300 #define _LEUART_RXDATAX_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
AnnaBridge 187:0387e8f68319 301 #define LEUART_RXDATAX_FERR_DEFAULT (_LEUART_RXDATAX_FERR_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
AnnaBridge 187:0387e8f68319 302
AnnaBridge 187:0387e8f68319 303 /* Bit fields for LEUART RXDATA */
AnnaBridge 187:0387e8f68319 304 #define _LEUART_RXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATA */
AnnaBridge 187:0387e8f68319 305 #define _LEUART_RXDATA_MASK 0x000000FFUL /**< Mask for LEUART_RXDATA */
AnnaBridge 187:0387e8f68319 306 #define _LEUART_RXDATA_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
AnnaBridge 187:0387e8f68319 307 #define _LEUART_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for LEUART_RXDATA */
AnnaBridge 187:0387e8f68319 308 #define _LEUART_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATA */
AnnaBridge 187:0387e8f68319 309 #define LEUART_RXDATA_RXDATA_DEFAULT (_LEUART_RXDATA_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATA */
AnnaBridge 187:0387e8f68319 310
AnnaBridge 187:0387e8f68319 311 /* Bit fields for LEUART RXDATAXP */
AnnaBridge 187:0387e8f68319 312 #define _LEUART_RXDATAXP_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAXP */
AnnaBridge 187:0387e8f68319 313 #define _LEUART_RXDATAXP_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAXP */
AnnaBridge 187:0387e8f68319 314 #define _LEUART_RXDATAXP_RXDATAP_SHIFT 0 /**< Shift value for LEUART_RXDATAP */
AnnaBridge 187:0387e8f68319 315 #define _LEUART_RXDATAXP_RXDATAP_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATAP */
AnnaBridge 187:0387e8f68319 316 #define _LEUART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
AnnaBridge 187:0387e8f68319 317 #define LEUART_RXDATAXP_RXDATAP_DEFAULT (_LEUART_RXDATAXP_RXDATAP_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
AnnaBridge 187:0387e8f68319 318 #define LEUART_RXDATAXP_PERRP (0x1UL << 14) /**< Receive Data Parity Error Peek */
AnnaBridge 187:0387e8f68319 319 #define _LEUART_RXDATAXP_PERRP_SHIFT 14 /**< Shift value for LEUART_PERRP */
AnnaBridge 187:0387e8f68319 320 #define _LEUART_RXDATAXP_PERRP_MASK 0x4000UL /**< Bit mask for LEUART_PERRP */
AnnaBridge 187:0387e8f68319 321 #define _LEUART_RXDATAXP_PERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
AnnaBridge 187:0387e8f68319 322 #define LEUART_RXDATAXP_PERRP_DEFAULT (_LEUART_RXDATAXP_PERRP_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
AnnaBridge 187:0387e8f68319 323 #define LEUART_RXDATAXP_FERRP (0x1UL << 15) /**< Receive Data Framing Error Peek */
AnnaBridge 187:0387e8f68319 324 #define _LEUART_RXDATAXP_FERRP_SHIFT 15 /**< Shift value for LEUART_FERRP */
AnnaBridge 187:0387e8f68319 325 #define _LEUART_RXDATAXP_FERRP_MASK 0x8000UL /**< Bit mask for LEUART_FERRP */
AnnaBridge 187:0387e8f68319 326 #define _LEUART_RXDATAXP_FERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
AnnaBridge 187:0387e8f68319 327 #define LEUART_RXDATAXP_FERRP_DEFAULT (_LEUART_RXDATAXP_FERRP_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
AnnaBridge 187:0387e8f68319 328
AnnaBridge 187:0387e8f68319 329 /* Bit fields for LEUART TXDATAX */
AnnaBridge 187:0387e8f68319 330 #define _LEUART_TXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 331 #define _LEUART_TXDATAX_MASK 0x0000E1FFUL /**< Mask for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 332 #define _LEUART_TXDATAX_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 333 #define _LEUART_TXDATAX_TXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 334 #define _LEUART_TXDATAX_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 335 #define LEUART_TXDATAX_TXDATA_DEFAULT (_LEUART_TXDATAX_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 336 #define LEUART_TXDATAX_TXBREAK (0x1UL << 13) /**< Transmit Data As Break */
AnnaBridge 187:0387e8f68319 337 #define _LEUART_TXDATAX_TXBREAK_SHIFT 13 /**< Shift value for LEUART_TXBREAK */
AnnaBridge 187:0387e8f68319 338 #define _LEUART_TXDATAX_TXBREAK_MASK 0x2000UL /**< Bit mask for LEUART_TXBREAK */
AnnaBridge 187:0387e8f68319 339 #define _LEUART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 340 #define LEUART_TXDATAX_TXBREAK_DEFAULT (_LEUART_TXDATAX_TXBREAK_DEFAULT << 13) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 341 #define LEUART_TXDATAX_TXDISAT (0x1UL << 14) /**< Disable TX After Transmission */
AnnaBridge 187:0387e8f68319 342 #define _LEUART_TXDATAX_TXDISAT_SHIFT 14 /**< Shift value for LEUART_TXDISAT */
AnnaBridge 187:0387e8f68319 343 #define _LEUART_TXDATAX_TXDISAT_MASK 0x4000UL /**< Bit mask for LEUART_TXDISAT */
AnnaBridge 187:0387e8f68319 344 #define _LEUART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 345 #define LEUART_TXDATAX_TXDISAT_DEFAULT (_LEUART_TXDATAX_TXDISAT_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 346 #define LEUART_TXDATAX_RXENAT (0x1UL << 15) /**< Enable RX After Transmission */
AnnaBridge 187:0387e8f68319 347 #define _LEUART_TXDATAX_RXENAT_SHIFT 15 /**< Shift value for LEUART_RXENAT */
AnnaBridge 187:0387e8f68319 348 #define _LEUART_TXDATAX_RXENAT_MASK 0x8000UL /**< Bit mask for LEUART_RXENAT */
AnnaBridge 187:0387e8f68319 349 #define _LEUART_TXDATAX_RXENAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 350 #define LEUART_TXDATAX_RXENAT_DEFAULT (_LEUART_TXDATAX_RXENAT_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 351
AnnaBridge 187:0387e8f68319 352 /* Bit fields for LEUART TXDATA */
AnnaBridge 187:0387e8f68319 353 #define _LEUART_TXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 354 #define _LEUART_TXDATA_MASK 0x000000FFUL /**< Mask for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 355 #define _LEUART_TXDATA_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 356 #define _LEUART_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 357 #define _LEUART_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 358 #define LEUART_TXDATA_TXDATA_DEFAULT (_LEUART_TXDATA_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 359
AnnaBridge 187:0387e8f68319 360 /* Bit fields for LEUART IF */
AnnaBridge 187:0387e8f68319 361 #define _LEUART_IF_RESETVALUE 0x00000002UL /**< Default value for LEUART_IF */
AnnaBridge 187:0387e8f68319 362 #define _LEUART_IF_MASK 0x000007FFUL /**< Mask for LEUART_IF */
AnnaBridge 187:0387e8f68319 363 #define LEUART_IF_TXC (0x1UL << 0) /**< TX Complete Interrupt Flag */
AnnaBridge 187:0387e8f68319 364 #define _LEUART_IF_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
AnnaBridge 187:0387e8f68319 365 #define _LEUART_IF_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
AnnaBridge 187:0387e8f68319 366 #define _LEUART_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 367 #define LEUART_IF_TXC_DEFAULT (_LEUART_IF_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 368 #define LEUART_IF_TXBL (0x1UL << 1) /**< TX Buffer Level Interrupt Flag */
AnnaBridge 187:0387e8f68319 369 #define _LEUART_IF_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
AnnaBridge 187:0387e8f68319 370 #define _LEUART_IF_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
AnnaBridge 187:0387e8f68319 371 #define _LEUART_IF_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 372 #define LEUART_IF_TXBL_DEFAULT (_LEUART_IF_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 373 #define LEUART_IF_RXDATAV (0x1UL << 2) /**< RX Data Valid Interrupt Flag */
AnnaBridge 187:0387e8f68319 374 #define _LEUART_IF_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
AnnaBridge 187:0387e8f68319 375 #define _LEUART_IF_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
AnnaBridge 187:0387e8f68319 376 #define _LEUART_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 377 #define LEUART_IF_RXDATAV_DEFAULT (_LEUART_IF_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 378 #define LEUART_IF_RXOF (0x1UL << 3) /**< RX Overflow Interrupt Flag */
AnnaBridge 187:0387e8f68319 379 #define _LEUART_IF_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
AnnaBridge 187:0387e8f68319 380 #define _LEUART_IF_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
AnnaBridge 187:0387e8f68319 381 #define _LEUART_IF_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 382 #define LEUART_IF_RXOF_DEFAULT (_LEUART_IF_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 383 #define LEUART_IF_RXUF (0x1UL << 4) /**< RX Underflow Interrupt Flag */
AnnaBridge 187:0387e8f68319 384 #define _LEUART_IF_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
AnnaBridge 187:0387e8f68319 385 #define _LEUART_IF_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
AnnaBridge 187:0387e8f68319 386 #define _LEUART_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 387 #define LEUART_IF_RXUF_DEFAULT (_LEUART_IF_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 388 #define LEUART_IF_TXOF (0x1UL << 5) /**< TX Overflow Interrupt Flag */
AnnaBridge 187:0387e8f68319 389 #define _LEUART_IF_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
AnnaBridge 187:0387e8f68319 390 #define _LEUART_IF_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
AnnaBridge 187:0387e8f68319 391 #define _LEUART_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 392 #define LEUART_IF_TXOF_DEFAULT (_LEUART_IF_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 393 #define LEUART_IF_PERR (0x1UL << 6) /**< Parity Error Interrupt Flag */
AnnaBridge 187:0387e8f68319 394 #define _LEUART_IF_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
AnnaBridge 187:0387e8f68319 395 #define _LEUART_IF_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
AnnaBridge 187:0387e8f68319 396 #define _LEUART_IF_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 397 #define LEUART_IF_PERR_DEFAULT (_LEUART_IF_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 398 #define LEUART_IF_FERR (0x1UL << 7) /**< Framing Error Interrupt Flag */
AnnaBridge 187:0387e8f68319 399 #define _LEUART_IF_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
AnnaBridge 187:0387e8f68319 400 #define _LEUART_IF_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
AnnaBridge 187:0387e8f68319 401 #define _LEUART_IF_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 402 #define LEUART_IF_FERR_DEFAULT (_LEUART_IF_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 403 #define LEUART_IF_MPAF (0x1UL << 8) /**< Multi-Processor Address Frame Interrupt Flag */
AnnaBridge 187:0387e8f68319 404 #define _LEUART_IF_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
AnnaBridge 187:0387e8f68319 405 #define _LEUART_IF_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
AnnaBridge 187:0387e8f68319 406 #define _LEUART_IF_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 407 #define LEUART_IF_MPAF_DEFAULT (_LEUART_IF_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 408 #define LEUART_IF_STARTF (0x1UL << 9) /**< Start Frame Interrupt Flag */
AnnaBridge 187:0387e8f68319 409 #define _LEUART_IF_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
AnnaBridge 187:0387e8f68319 410 #define _LEUART_IF_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
AnnaBridge 187:0387e8f68319 411 #define _LEUART_IF_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 412 #define LEUART_IF_STARTF_DEFAULT (_LEUART_IF_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 413 #define LEUART_IF_SIGF (0x1UL << 10) /**< Signal Frame Interrupt Flag */
AnnaBridge 187:0387e8f68319 414 #define _LEUART_IF_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
AnnaBridge 187:0387e8f68319 415 #define _LEUART_IF_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
AnnaBridge 187:0387e8f68319 416 #define _LEUART_IF_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 417 #define LEUART_IF_SIGF_DEFAULT (_LEUART_IF_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IF */
AnnaBridge 187:0387e8f68319 418
AnnaBridge 187:0387e8f68319 419 /* Bit fields for LEUART IFS */
AnnaBridge 187:0387e8f68319 420 #define _LEUART_IFS_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFS */
AnnaBridge 187:0387e8f68319 421 #define _LEUART_IFS_MASK 0x000007F9UL /**< Mask for LEUART_IFS */
AnnaBridge 187:0387e8f68319 422 #define LEUART_IFS_TXC (0x1UL << 0) /**< Set TXC Interrupt Flag */
AnnaBridge 187:0387e8f68319 423 #define _LEUART_IFS_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
AnnaBridge 187:0387e8f68319 424 #define _LEUART_IFS_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
AnnaBridge 187:0387e8f68319 425 #define _LEUART_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 426 #define LEUART_IFS_TXC_DEFAULT (_LEUART_IFS_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 427 #define LEUART_IFS_RXOF (0x1UL << 3) /**< Set RXOF Interrupt Flag */
AnnaBridge 187:0387e8f68319 428 #define _LEUART_IFS_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
AnnaBridge 187:0387e8f68319 429 #define _LEUART_IFS_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
AnnaBridge 187:0387e8f68319 430 #define _LEUART_IFS_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 431 #define LEUART_IFS_RXOF_DEFAULT (_LEUART_IFS_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 432 #define LEUART_IFS_RXUF (0x1UL << 4) /**< Set RXUF Interrupt Flag */
AnnaBridge 187:0387e8f68319 433 #define _LEUART_IFS_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
AnnaBridge 187:0387e8f68319 434 #define _LEUART_IFS_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
AnnaBridge 187:0387e8f68319 435 #define _LEUART_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 436 #define LEUART_IFS_RXUF_DEFAULT (_LEUART_IFS_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 437 #define LEUART_IFS_TXOF (0x1UL << 5) /**< Set TXOF Interrupt Flag */
AnnaBridge 187:0387e8f68319 438 #define _LEUART_IFS_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
AnnaBridge 187:0387e8f68319 439 #define _LEUART_IFS_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
AnnaBridge 187:0387e8f68319 440 #define _LEUART_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 441 #define LEUART_IFS_TXOF_DEFAULT (_LEUART_IFS_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 442 #define LEUART_IFS_PERR (0x1UL << 6) /**< Set PERR Interrupt Flag */
AnnaBridge 187:0387e8f68319 443 #define _LEUART_IFS_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
AnnaBridge 187:0387e8f68319 444 #define _LEUART_IFS_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
AnnaBridge 187:0387e8f68319 445 #define _LEUART_IFS_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 446 #define LEUART_IFS_PERR_DEFAULT (_LEUART_IFS_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 447 #define LEUART_IFS_FERR (0x1UL << 7) /**< Set FERR Interrupt Flag */
AnnaBridge 187:0387e8f68319 448 #define _LEUART_IFS_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
AnnaBridge 187:0387e8f68319 449 #define _LEUART_IFS_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
AnnaBridge 187:0387e8f68319 450 #define _LEUART_IFS_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 451 #define LEUART_IFS_FERR_DEFAULT (_LEUART_IFS_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 452 #define LEUART_IFS_MPAF (0x1UL << 8) /**< Set MPAF Interrupt Flag */
AnnaBridge 187:0387e8f68319 453 #define _LEUART_IFS_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
AnnaBridge 187:0387e8f68319 454 #define _LEUART_IFS_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
AnnaBridge 187:0387e8f68319 455 #define _LEUART_IFS_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 456 #define LEUART_IFS_MPAF_DEFAULT (_LEUART_IFS_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 457 #define LEUART_IFS_STARTF (0x1UL << 9) /**< Set STARTF Interrupt Flag */
AnnaBridge 187:0387e8f68319 458 #define _LEUART_IFS_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
AnnaBridge 187:0387e8f68319 459 #define _LEUART_IFS_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
AnnaBridge 187:0387e8f68319 460 #define _LEUART_IFS_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 461 #define LEUART_IFS_STARTF_DEFAULT (_LEUART_IFS_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 462 #define LEUART_IFS_SIGF (0x1UL << 10) /**< Set SIGF Interrupt Flag */
AnnaBridge 187:0387e8f68319 463 #define _LEUART_IFS_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
AnnaBridge 187:0387e8f68319 464 #define _LEUART_IFS_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
AnnaBridge 187:0387e8f68319 465 #define _LEUART_IFS_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 466 #define LEUART_IFS_SIGF_DEFAULT (_LEUART_IFS_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IFS */
AnnaBridge 187:0387e8f68319 467
AnnaBridge 187:0387e8f68319 468 /* Bit fields for LEUART IFC */
AnnaBridge 187:0387e8f68319 469 #define _LEUART_IFC_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFC */
AnnaBridge 187:0387e8f68319 470 #define _LEUART_IFC_MASK 0x000007F9UL /**< Mask for LEUART_IFC */
AnnaBridge 187:0387e8f68319 471 #define LEUART_IFC_TXC (0x1UL << 0) /**< Clear TXC Interrupt Flag */
AnnaBridge 187:0387e8f68319 472 #define _LEUART_IFC_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
AnnaBridge 187:0387e8f68319 473 #define _LEUART_IFC_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
AnnaBridge 187:0387e8f68319 474 #define _LEUART_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 475 #define LEUART_IFC_TXC_DEFAULT (_LEUART_IFC_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 476 #define LEUART_IFC_RXOF (0x1UL << 3) /**< Clear RXOF Interrupt Flag */
AnnaBridge 187:0387e8f68319 477 #define _LEUART_IFC_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
AnnaBridge 187:0387e8f68319 478 #define _LEUART_IFC_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
AnnaBridge 187:0387e8f68319 479 #define _LEUART_IFC_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 480 #define LEUART_IFC_RXOF_DEFAULT (_LEUART_IFC_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 481 #define LEUART_IFC_RXUF (0x1UL << 4) /**< Clear RXUF Interrupt Flag */
AnnaBridge 187:0387e8f68319 482 #define _LEUART_IFC_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
AnnaBridge 187:0387e8f68319 483 #define _LEUART_IFC_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
AnnaBridge 187:0387e8f68319 484 #define _LEUART_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 485 #define LEUART_IFC_RXUF_DEFAULT (_LEUART_IFC_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 486 #define LEUART_IFC_TXOF (0x1UL << 5) /**< Clear TXOF Interrupt Flag */
AnnaBridge 187:0387e8f68319 487 #define _LEUART_IFC_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
AnnaBridge 187:0387e8f68319 488 #define _LEUART_IFC_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
AnnaBridge 187:0387e8f68319 489 #define _LEUART_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 490 #define LEUART_IFC_TXOF_DEFAULT (_LEUART_IFC_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 491 #define LEUART_IFC_PERR (0x1UL << 6) /**< Clear PERR Interrupt Flag */
AnnaBridge 187:0387e8f68319 492 #define _LEUART_IFC_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
AnnaBridge 187:0387e8f68319 493 #define _LEUART_IFC_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
AnnaBridge 187:0387e8f68319 494 #define _LEUART_IFC_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 495 #define LEUART_IFC_PERR_DEFAULT (_LEUART_IFC_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 496 #define LEUART_IFC_FERR (0x1UL << 7) /**< Clear FERR Interrupt Flag */
AnnaBridge 187:0387e8f68319 497 #define _LEUART_IFC_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
AnnaBridge 187:0387e8f68319 498 #define _LEUART_IFC_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
AnnaBridge 187:0387e8f68319 499 #define _LEUART_IFC_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 500 #define LEUART_IFC_FERR_DEFAULT (_LEUART_IFC_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 501 #define LEUART_IFC_MPAF (0x1UL << 8) /**< Clear MPAF Interrupt Flag */
AnnaBridge 187:0387e8f68319 502 #define _LEUART_IFC_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
AnnaBridge 187:0387e8f68319 503 #define _LEUART_IFC_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
AnnaBridge 187:0387e8f68319 504 #define _LEUART_IFC_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 505 #define LEUART_IFC_MPAF_DEFAULT (_LEUART_IFC_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 506 #define LEUART_IFC_STARTF (0x1UL << 9) /**< Clear STARTF Interrupt Flag */
AnnaBridge 187:0387e8f68319 507 #define _LEUART_IFC_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
AnnaBridge 187:0387e8f68319 508 #define _LEUART_IFC_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
AnnaBridge 187:0387e8f68319 509 #define _LEUART_IFC_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 510 #define LEUART_IFC_STARTF_DEFAULT (_LEUART_IFC_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 511 #define LEUART_IFC_SIGF (0x1UL << 10) /**< Clear SIGF Interrupt Flag */
AnnaBridge 187:0387e8f68319 512 #define _LEUART_IFC_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
AnnaBridge 187:0387e8f68319 513 #define _LEUART_IFC_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
AnnaBridge 187:0387e8f68319 514 #define _LEUART_IFC_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 515 #define LEUART_IFC_SIGF_DEFAULT (_LEUART_IFC_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IFC */
AnnaBridge 187:0387e8f68319 516
AnnaBridge 187:0387e8f68319 517 /* Bit fields for LEUART IEN */
AnnaBridge 187:0387e8f68319 518 #define _LEUART_IEN_RESETVALUE 0x00000000UL /**< Default value for LEUART_IEN */
AnnaBridge 187:0387e8f68319 519 #define _LEUART_IEN_MASK 0x000007FFUL /**< Mask for LEUART_IEN */
AnnaBridge 187:0387e8f68319 520 #define LEUART_IEN_TXC (0x1UL << 0) /**< TXC Interrupt Enable */
AnnaBridge 187:0387e8f68319 521 #define _LEUART_IEN_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
AnnaBridge 187:0387e8f68319 522 #define _LEUART_IEN_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
AnnaBridge 187:0387e8f68319 523 #define _LEUART_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 524 #define LEUART_IEN_TXC_DEFAULT (_LEUART_IEN_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 525 #define LEUART_IEN_TXBL (0x1UL << 1) /**< TXBL Interrupt Enable */
AnnaBridge 187:0387e8f68319 526 #define _LEUART_IEN_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
AnnaBridge 187:0387e8f68319 527 #define _LEUART_IEN_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
AnnaBridge 187:0387e8f68319 528 #define _LEUART_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 529 #define LEUART_IEN_TXBL_DEFAULT (_LEUART_IEN_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 530 #define LEUART_IEN_RXDATAV (0x1UL << 2) /**< RXDATAV Interrupt Enable */
AnnaBridge 187:0387e8f68319 531 #define _LEUART_IEN_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
AnnaBridge 187:0387e8f68319 532 #define _LEUART_IEN_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
AnnaBridge 187:0387e8f68319 533 #define _LEUART_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 534 #define LEUART_IEN_RXDATAV_DEFAULT (_LEUART_IEN_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 535 #define LEUART_IEN_RXOF (0x1UL << 3) /**< RXOF Interrupt Enable */
AnnaBridge 187:0387e8f68319 536 #define _LEUART_IEN_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
AnnaBridge 187:0387e8f68319 537 #define _LEUART_IEN_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
AnnaBridge 187:0387e8f68319 538 #define _LEUART_IEN_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 539 #define LEUART_IEN_RXOF_DEFAULT (_LEUART_IEN_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 540 #define LEUART_IEN_RXUF (0x1UL << 4) /**< RXUF Interrupt Enable */
AnnaBridge 187:0387e8f68319 541 #define _LEUART_IEN_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
AnnaBridge 187:0387e8f68319 542 #define _LEUART_IEN_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
AnnaBridge 187:0387e8f68319 543 #define _LEUART_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 544 #define LEUART_IEN_RXUF_DEFAULT (_LEUART_IEN_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 545 #define LEUART_IEN_TXOF (0x1UL << 5) /**< TXOF Interrupt Enable */
AnnaBridge 187:0387e8f68319 546 #define _LEUART_IEN_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
AnnaBridge 187:0387e8f68319 547 #define _LEUART_IEN_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
AnnaBridge 187:0387e8f68319 548 #define _LEUART_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 549 #define LEUART_IEN_TXOF_DEFAULT (_LEUART_IEN_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 550 #define LEUART_IEN_PERR (0x1UL << 6) /**< PERR Interrupt Enable */
AnnaBridge 187:0387e8f68319 551 #define _LEUART_IEN_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
AnnaBridge 187:0387e8f68319 552 #define _LEUART_IEN_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
AnnaBridge 187:0387e8f68319 553 #define _LEUART_IEN_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 554 #define LEUART_IEN_PERR_DEFAULT (_LEUART_IEN_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 555 #define LEUART_IEN_FERR (0x1UL << 7) /**< FERR Interrupt Enable */
AnnaBridge 187:0387e8f68319 556 #define _LEUART_IEN_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
AnnaBridge 187:0387e8f68319 557 #define _LEUART_IEN_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
AnnaBridge 187:0387e8f68319 558 #define _LEUART_IEN_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 559 #define LEUART_IEN_FERR_DEFAULT (_LEUART_IEN_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 560 #define LEUART_IEN_MPAF (0x1UL << 8) /**< MPAF Interrupt Enable */
AnnaBridge 187:0387e8f68319 561 #define _LEUART_IEN_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
AnnaBridge 187:0387e8f68319 562 #define _LEUART_IEN_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
AnnaBridge 187:0387e8f68319 563 #define _LEUART_IEN_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 564 #define LEUART_IEN_MPAF_DEFAULT (_LEUART_IEN_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 565 #define LEUART_IEN_STARTF (0x1UL << 9) /**< STARTF Interrupt Enable */
AnnaBridge 187:0387e8f68319 566 #define _LEUART_IEN_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
AnnaBridge 187:0387e8f68319 567 #define _LEUART_IEN_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
AnnaBridge 187:0387e8f68319 568 #define _LEUART_IEN_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 569 #define LEUART_IEN_STARTF_DEFAULT (_LEUART_IEN_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 570 #define LEUART_IEN_SIGF (0x1UL << 10) /**< SIGF Interrupt Enable */
AnnaBridge 187:0387e8f68319 571 #define _LEUART_IEN_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
AnnaBridge 187:0387e8f68319 572 #define _LEUART_IEN_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
AnnaBridge 187:0387e8f68319 573 #define _LEUART_IEN_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 574 #define LEUART_IEN_SIGF_DEFAULT (_LEUART_IEN_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IEN */
AnnaBridge 187:0387e8f68319 575
AnnaBridge 187:0387e8f68319 576 /* Bit fields for LEUART PULSECTRL */
AnnaBridge 187:0387e8f68319 577 #define _LEUART_PULSECTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 578 #define _LEUART_PULSECTRL_MASK 0x0000003FUL /**< Mask for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 579 #define _LEUART_PULSECTRL_PULSEW_SHIFT 0 /**< Shift value for LEUART_PULSEW */
AnnaBridge 187:0387e8f68319 580 #define _LEUART_PULSECTRL_PULSEW_MASK 0xFUL /**< Bit mask for LEUART_PULSEW */
AnnaBridge 187:0387e8f68319 581 #define _LEUART_PULSECTRL_PULSEW_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 582 #define LEUART_PULSECTRL_PULSEW_DEFAULT (_LEUART_PULSECTRL_PULSEW_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 583 #define LEUART_PULSECTRL_PULSEEN (0x1UL << 4) /**< Pulse Generator/Extender Enable */
AnnaBridge 187:0387e8f68319 584 #define _LEUART_PULSECTRL_PULSEEN_SHIFT 4 /**< Shift value for LEUART_PULSEEN */
AnnaBridge 187:0387e8f68319 585 #define _LEUART_PULSECTRL_PULSEEN_MASK 0x10UL /**< Bit mask for LEUART_PULSEEN */
AnnaBridge 187:0387e8f68319 586 #define _LEUART_PULSECTRL_PULSEEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 587 #define LEUART_PULSECTRL_PULSEEN_DEFAULT (_LEUART_PULSECTRL_PULSEEN_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 588 #define LEUART_PULSECTRL_PULSEFILT (0x1UL << 5) /**< Pulse Filter */
AnnaBridge 187:0387e8f68319 589 #define _LEUART_PULSECTRL_PULSEFILT_SHIFT 5 /**< Shift value for LEUART_PULSEFILT */
AnnaBridge 187:0387e8f68319 590 #define _LEUART_PULSECTRL_PULSEFILT_MASK 0x20UL /**< Bit mask for LEUART_PULSEFILT */
AnnaBridge 187:0387e8f68319 591 #define _LEUART_PULSECTRL_PULSEFILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 592 #define LEUART_PULSECTRL_PULSEFILT_DEFAULT (_LEUART_PULSECTRL_PULSEFILT_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 593
AnnaBridge 187:0387e8f68319 594 /* Bit fields for LEUART FREEZE */
AnnaBridge 187:0387e8f68319 595 #define _LEUART_FREEZE_RESETVALUE 0x00000000UL /**< Default value for LEUART_FREEZE */
AnnaBridge 187:0387e8f68319 596 #define _LEUART_FREEZE_MASK 0x00000001UL /**< Mask for LEUART_FREEZE */
AnnaBridge 187:0387e8f68319 597 #define LEUART_FREEZE_REGFREEZE (0x1UL << 0) /**< Register Update Freeze */
AnnaBridge 187:0387e8f68319 598 #define _LEUART_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for LEUART_REGFREEZE */
AnnaBridge 187:0387e8f68319 599 #define _LEUART_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for LEUART_REGFREEZE */
AnnaBridge 187:0387e8f68319 600 #define _LEUART_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_FREEZE */
AnnaBridge 187:0387e8f68319 601 #define _LEUART_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for LEUART_FREEZE */
AnnaBridge 187:0387e8f68319 602 #define _LEUART_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for LEUART_FREEZE */
AnnaBridge 187:0387e8f68319 603 #define LEUART_FREEZE_REGFREEZE_DEFAULT (_LEUART_FREEZE_REGFREEZE_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_FREEZE */
AnnaBridge 187:0387e8f68319 604 #define LEUART_FREEZE_REGFREEZE_UPDATE (_LEUART_FREEZE_REGFREEZE_UPDATE << 0) /**< Shifted mode UPDATE for LEUART_FREEZE */
AnnaBridge 187:0387e8f68319 605 #define LEUART_FREEZE_REGFREEZE_FREEZE (_LEUART_FREEZE_REGFREEZE_FREEZE << 0) /**< Shifted mode FREEZE for LEUART_FREEZE */
AnnaBridge 187:0387e8f68319 606
AnnaBridge 187:0387e8f68319 607 /* Bit fields for LEUART SYNCBUSY */
AnnaBridge 187:0387e8f68319 608 #define _LEUART_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 609 #define _LEUART_SYNCBUSY_MASK 0x000000FFUL /**< Mask for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 610 #define LEUART_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
AnnaBridge 187:0387e8f68319 611 #define _LEUART_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 612 #define _LEUART_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for LEUART_CTRL */
AnnaBridge 187:0387e8f68319 613 #define _LEUART_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 614 #define LEUART_SYNCBUSY_CTRL_DEFAULT (_LEUART_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 615 #define LEUART_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */
AnnaBridge 187:0387e8f68319 616 #define _LEUART_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for LEUART_CMD */
AnnaBridge 187:0387e8f68319 617 #define _LEUART_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for LEUART_CMD */
AnnaBridge 187:0387e8f68319 618 #define _LEUART_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 619 #define LEUART_SYNCBUSY_CMD_DEFAULT (_LEUART_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 620 #define LEUART_SYNCBUSY_CLKDIV (0x1UL << 2) /**< CLKDIV Register Busy */
AnnaBridge 187:0387e8f68319 621 #define _LEUART_SYNCBUSY_CLKDIV_SHIFT 2 /**< Shift value for LEUART_CLKDIV */
AnnaBridge 187:0387e8f68319 622 #define _LEUART_SYNCBUSY_CLKDIV_MASK 0x4UL /**< Bit mask for LEUART_CLKDIV */
AnnaBridge 187:0387e8f68319 623 #define _LEUART_SYNCBUSY_CLKDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 624 #define LEUART_SYNCBUSY_CLKDIV_DEFAULT (_LEUART_SYNCBUSY_CLKDIV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 625 #define LEUART_SYNCBUSY_STARTFRAME (0x1UL << 3) /**< STARTFRAME Register Busy */
AnnaBridge 187:0387e8f68319 626 #define _LEUART_SYNCBUSY_STARTFRAME_SHIFT 3 /**< Shift value for LEUART_STARTFRAME */
AnnaBridge 187:0387e8f68319 627 #define _LEUART_SYNCBUSY_STARTFRAME_MASK 0x8UL /**< Bit mask for LEUART_STARTFRAME */
AnnaBridge 187:0387e8f68319 628 #define _LEUART_SYNCBUSY_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 629 #define LEUART_SYNCBUSY_STARTFRAME_DEFAULT (_LEUART_SYNCBUSY_STARTFRAME_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 630 #define LEUART_SYNCBUSY_SIGFRAME (0x1UL << 4) /**< SIGFRAME Register Busy */
AnnaBridge 187:0387e8f68319 631 #define _LEUART_SYNCBUSY_SIGFRAME_SHIFT 4 /**< Shift value for LEUART_SIGFRAME */
AnnaBridge 187:0387e8f68319 632 #define _LEUART_SYNCBUSY_SIGFRAME_MASK 0x10UL /**< Bit mask for LEUART_SIGFRAME */
AnnaBridge 187:0387e8f68319 633 #define _LEUART_SYNCBUSY_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 634 #define LEUART_SYNCBUSY_SIGFRAME_DEFAULT (_LEUART_SYNCBUSY_SIGFRAME_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 635 #define LEUART_SYNCBUSY_TXDATAX (0x1UL << 5) /**< TXDATAX Register Busy */
AnnaBridge 187:0387e8f68319 636 #define _LEUART_SYNCBUSY_TXDATAX_SHIFT 5 /**< Shift value for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 637 #define _LEUART_SYNCBUSY_TXDATAX_MASK 0x20UL /**< Bit mask for LEUART_TXDATAX */
AnnaBridge 187:0387e8f68319 638 #define _LEUART_SYNCBUSY_TXDATAX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 639 #define LEUART_SYNCBUSY_TXDATAX_DEFAULT (_LEUART_SYNCBUSY_TXDATAX_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 640 #define LEUART_SYNCBUSY_TXDATA (0x1UL << 6) /**< TXDATA Register Busy */
AnnaBridge 187:0387e8f68319 641 #define _LEUART_SYNCBUSY_TXDATA_SHIFT 6 /**< Shift value for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 642 #define _LEUART_SYNCBUSY_TXDATA_MASK 0x40UL /**< Bit mask for LEUART_TXDATA */
AnnaBridge 187:0387e8f68319 643 #define _LEUART_SYNCBUSY_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 644 #define LEUART_SYNCBUSY_TXDATA_DEFAULT (_LEUART_SYNCBUSY_TXDATA_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 645 #define LEUART_SYNCBUSY_PULSECTRL (0x1UL << 7) /**< PULSECTRL Register Busy */
AnnaBridge 187:0387e8f68319 646 #define _LEUART_SYNCBUSY_PULSECTRL_SHIFT 7 /**< Shift value for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 647 #define _LEUART_SYNCBUSY_PULSECTRL_MASK 0x80UL /**< Bit mask for LEUART_PULSECTRL */
AnnaBridge 187:0387e8f68319 648 #define _LEUART_SYNCBUSY_PULSECTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 649 #define LEUART_SYNCBUSY_PULSECTRL_DEFAULT (_LEUART_SYNCBUSY_PULSECTRL_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
AnnaBridge 187:0387e8f68319 650
AnnaBridge 187:0387e8f68319 651 /* Bit fields for LEUART ROUTEPEN */
AnnaBridge 187:0387e8f68319 652 #define _LEUART_ROUTEPEN_RESETVALUE 0x00000000UL /**< Default value for LEUART_ROUTEPEN */
AnnaBridge 187:0387e8f68319 653 #define _LEUART_ROUTEPEN_MASK 0x00000003UL /**< Mask for LEUART_ROUTEPEN */
AnnaBridge 187:0387e8f68319 654 #define LEUART_ROUTEPEN_RXPEN (0x1UL << 0) /**< RX Pin Enable */
AnnaBridge 187:0387e8f68319 655 #define _LEUART_ROUTEPEN_RXPEN_SHIFT 0 /**< Shift value for LEUART_RXPEN */
AnnaBridge 187:0387e8f68319 656 #define _LEUART_ROUTEPEN_RXPEN_MASK 0x1UL /**< Bit mask for LEUART_RXPEN */
AnnaBridge 187:0387e8f68319 657 #define _LEUART_ROUTEPEN_RXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTEPEN */
AnnaBridge 187:0387e8f68319 658 #define LEUART_ROUTEPEN_RXPEN_DEFAULT (_LEUART_ROUTEPEN_RXPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_ROUTEPEN */
AnnaBridge 187:0387e8f68319 659 #define LEUART_ROUTEPEN_TXPEN (0x1UL << 1) /**< TX Pin Enable */
AnnaBridge 187:0387e8f68319 660 #define _LEUART_ROUTEPEN_TXPEN_SHIFT 1 /**< Shift value for LEUART_TXPEN */
AnnaBridge 187:0387e8f68319 661 #define _LEUART_ROUTEPEN_TXPEN_MASK 0x2UL /**< Bit mask for LEUART_TXPEN */
AnnaBridge 187:0387e8f68319 662 #define _LEUART_ROUTEPEN_TXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTEPEN */
AnnaBridge 187:0387e8f68319 663 #define LEUART_ROUTEPEN_TXPEN_DEFAULT (_LEUART_ROUTEPEN_TXPEN_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_ROUTEPEN */
AnnaBridge 187:0387e8f68319 664
AnnaBridge 187:0387e8f68319 665 /* Bit fields for LEUART ROUTELOC0 */
AnnaBridge 187:0387e8f68319 666 #define _LEUART_ROUTELOC0_RESETVALUE 0x00000000UL /**< Default value for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 667 #define _LEUART_ROUTELOC0_MASK 0x00000707UL /**< Mask for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 668 #define _LEUART_ROUTELOC0_RXLOC_SHIFT 0 /**< Shift value for LEUART_RXLOC */
AnnaBridge 187:0387e8f68319 669 #define _LEUART_ROUTELOC0_RXLOC_MASK 0x7UL /**< Bit mask for LEUART_RXLOC */
AnnaBridge 187:0387e8f68319 670 #define _LEUART_ROUTELOC0_RXLOC_LOC0 0x00000000UL /**< Mode LOC0 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 671 #define _LEUART_ROUTELOC0_RXLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 672 #define _LEUART_ROUTELOC0_RXLOC_LOC1 0x00000001UL /**< Mode LOC1 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 673 #define _LEUART_ROUTELOC0_RXLOC_LOC2 0x00000002UL /**< Mode LOC2 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 674 #define _LEUART_ROUTELOC0_RXLOC_LOC3 0x00000003UL /**< Mode LOC3 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 675 #define _LEUART_ROUTELOC0_RXLOC_LOC4 0x00000004UL /**< Mode LOC4 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 676 #define _LEUART_ROUTELOC0_RXLOC_LOC5 0x00000005UL /**< Mode LOC5 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 677 #define LEUART_ROUTELOC0_RXLOC_LOC0 (_LEUART_ROUTELOC0_RXLOC_LOC0 << 0) /**< Shifted mode LOC0 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 678 #define LEUART_ROUTELOC0_RXLOC_DEFAULT (_LEUART_ROUTELOC0_RXLOC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 679 #define LEUART_ROUTELOC0_RXLOC_LOC1 (_LEUART_ROUTELOC0_RXLOC_LOC1 << 0) /**< Shifted mode LOC1 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 680 #define LEUART_ROUTELOC0_RXLOC_LOC2 (_LEUART_ROUTELOC0_RXLOC_LOC2 << 0) /**< Shifted mode LOC2 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 681 #define LEUART_ROUTELOC0_RXLOC_LOC3 (_LEUART_ROUTELOC0_RXLOC_LOC3 << 0) /**< Shifted mode LOC3 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 682 #define LEUART_ROUTELOC0_RXLOC_LOC4 (_LEUART_ROUTELOC0_RXLOC_LOC4 << 0) /**< Shifted mode LOC4 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 683 #define LEUART_ROUTELOC0_RXLOC_LOC5 (_LEUART_ROUTELOC0_RXLOC_LOC5 << 0) /**< Shifted mode LOC5 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 684 #define _LEUART_ROUTELOC0_TXLOC_SHIFT 8 /**< Shift value for LEUART_TXLOC */
AnnaBridge 187:0387e8f68319 685 #define _LEUART_ROUTELOC0_TXLOC_MASK 0x700UL /**< Bit mask for LEUART_TXLOC */
AnnaBridge 187:0387e8f68319 686 #define _LEUART_ROUTELOC0_TXLOC_LOC0 0x00000000UL /**< Mode LOC0 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 687 #define _LEUART_ROUTELOC0_TXLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 688 #define _LEUART_ROUTELOC0_TXLOC_LOC1 0x00000001UL /**< Mode LOC1 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 689 #define _LEUART_ROUTELOC0_TXLOC_LOC2 0x00000002UL /**< Mode LOC2 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 690 #define _LEUART_ROUTELOC0_TXLOC_LOC3 0x00000003UL /**< Mode LOC3 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 691 #define _LEUART_ROUTELOC0_TXLOC_LOC4 0x00000004UL /**< Mode LOC4 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 692 #define _LEUART_ROUTELOC0_TXLOC_LOC5 0x00000005UL /**< Mode LOC5 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 693 #define LEUART_ROUTELOC0_TXLOC_LOC0 (_LEUART_ROUTELOC0_TXLOC_LOC0 << 8) /**< Shifted mode LOC0 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 694 #define LEUART_ROUTELOC0_TXLOC_DEFAULT (_LEUART_ROUTELOC0_TXLOC_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 695 #define LEUART_ROUTELOC0_TXLOC_LOC1 (_LEUART_ROUTELOC0_TXLOC_LOC1 << 8) /**< Shifted mode LOC1 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 696 #define LEUART_ROUTELOC0_TXLOC_LOC2 (_LEUART_ROUTELOC0_TXLOC_LOC2 << 8) /**< Shifted mode LOC2 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 697 #define LEUART_ROUTELOC0_TXLOC_LOC3 (_LEUART_ROUTELOC0_TXLOC_LOC3 << 8) /**< Shifted mode LOC3 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 698 #define LEUART_ROUTELOC0_TXLOC_LOC4 (_LEUART_ROUTELOC0_TXLOC_LOC4 << 8) /**< Shifted mode LOC4 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 699 #define LEUART_ROUTELOC0_TXLOC_LOC5 (_LEUART_ROUTELOC0_TXLOC_LOC5 << 8) /**< Shifted mode LOC5 for LEUART_ROUTELOC0 */
AnnaBridge 187:0387e8f68319 700
AnnaBridge 187:0387e8f68319 701 /* Bit fields for LEUART INPUT */
AnnaBridge 187:0387e8f68319 702 #define _LEUART_INPUT_RESETVALUE 0x00000000UL /**< Default value for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 703 #define _LEUART_INPUT_MASK 0x0000003FUL /**< Mask for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 704 #define _LEUART_INPUT_RXPRSSEL_SHIFT 0 /**< Shift value for LEUART_RXPRSSEL */
AnnaBridge 187:0387e8f68319 705 #define _LEUART_INPUT_RXPRSSEL_MASK 0x1FUL /**< Bit mask for LEUART_RXPRSSEL */
AnnaBridge 187:0387e8f68319 706 #define _LEUART_INPUT_RXPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 707 #define _LEUART_INPUT_RXPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 708 #define _LEUART_INPUT_RXPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 709 #define _LEUART_INPUT_RXPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 710 #define _LEUART_INPUT_RXPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 711 #define _LEUART_INPUT_RXPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 712 #define _LEUART_INPUT_RXPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 713 #define _LEUART_INPUT_RXPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 714 #define _LEUART_INPUT_RXPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 715 #define _LEUART_INPUT_RXPRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 716 #define _LEUART_INPUT_RXPRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 717 #define _LEUART_INPUT_RXPRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 718 #define _LEUART_INPUT_RXPRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 719 #define _LEUART_INPUT_RXPRSSEL_PRSCH12 0x0000000CUL /**< Mode PRSCH12 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 720 #define _LEUART_INPUT_RXPRSSEL_PRSCH13 0x0000000DUL /**< Mode PRSCH13 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 721 #define _LEUART_INPUT_RXPRSSEL_PRSCH14 0x0000000EUL /**< Mode PRSCH14 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 722 #define _LEUART_INPUT_RXPRSSEL_PRSCH15 0x0000000FUL /**< Mode PRSCH15 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 723 #define _LEUART_INPUT_RXPRSSEL_PRSCH16 0x00000010UL /**< Mode PRSCH16 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 724 #define _LEUART_INPUT_RXPRSSEL_PRSCH17 0x00000011UL /**< Mode PRSCH17 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 725 #define _LEUART_INPUT_RXPRSSEL_PRSCH18 0x00000012UL /**< Mode PRSCH18 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 726 #define _LEUART_INPUT_RXPRSSEL_PRSCH19 0x00000013UL /**< Mode PRSCH19 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 727 #define _LEUART_INPUT_RXPRSSEL_PRSCH20 0x00000014UL /**< Mode PRSCH20 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 728 #define _LEUART_INPUT_RXPRSSEL_PRSCH21 0x00000015UL /**< Mode PRSCH21 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 729 #define _LEUART_INPUT_RXPRSSEL_PRSCH22 0x00000016UL /**< Mode PRSCH22 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 730 #define _LEUART_INPUT_RXPRSSEL_PRSCH23 0x00000017UL /**< Mode PRSCH23 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 731 #define LEUART_INPUT_RXPRSSEL_DEFAULT (_LEUART_INPUT_RXPRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 732 #define LEUART_INPUT_RXPRSSEL_PRSCH0 (_LEUART_INPUT_RXPRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 733 #define LEUART_INPUT_RXPRSSEL_PRSCH1 (_LEUART_INPUT_RXPRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 734 #define LEUART_INPUT_RXPRSSEL_PRSCH2 (_LEUART_INPUT_RXPRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 735 #define LEUART_INPUT_RXPRSSEL_PRSCH3 (_LEUART_INPUT_RXPRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 736 #define LEUART_INPUT_RXPRSSEL_PRSCH4 (_LEUART_INPUT_RXPRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 737 #define LEUART_INPUT_RXPRSSEL_PRSCH5 (_LEUART_INPUT_RXPRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 738 #define LEUART_INPUT_RXPRSSEL_PRSCH6 (_LEUART_INPUT_RXPRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 739 #define LEUART_INPUT_RXPRSSEL_PRSCH7 (_LEUART_INPUT_RXPRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 740 #define LEUART_INPUT_RXPRSSEL_PRSCH8 (_LEUART_INPUT_RXPRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 741 #define LEUART_INPUT_RXPRSSEL_PRSCH9 (_LEUART_INPUT_RXPRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 742 #define LEUART_INPUT_RXPRSSEL_PRSCH10 (_LEUART_INPUT_RXPRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 743 #define LEUART_INPUT_RXPRSSEL_PRSCH11 (_LEUART_INPUT_RXPRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 744 #define LEUART_INPUT_RXPRSSEL_PRSCH12 (_LEUART_INPUT_RXPRSSEL_PRSCH12 << 0) /**< Shifted mode PRSCH12 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 745 #define LEUART_INPUT_RXPRSSEL_PRSCH13 (_LEUART_INPUT_RXPRSSEL_PRSCH13 << 0) /**< Shifted mode PRSCH13 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 746 #define LEUART_INPUT_RXPRSSEL_PRSCH14 (_LEUART_INPUT_RXPRSSEL_PRSCH14 << 0) /**< Shifted mode PRSCH14 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 747 #define LEUART_INPUT_RXPRSSEL_PRSCH15 (_LEUART_INPUT_RXPRSSEL_PRSCH15 << 0) /**< Shifted mode PRSCH15 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 748 #define LEUART_INPUT_RXPRSSEL_PRSCH16 (_LEUART_INPUT_RXPRSSEL_PRSCH16 << 0) /**< Shifted mode PRSCH16 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 749 #define LEUART_INPUT_RXPRSSEL_PRSCH17 (_LEUART_INPUT_RXPRSSEL_PRSCH17 << 0) /**< Shifted mode PRSCH17 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 750 #define LEUART_INPUT_RXPRSSEL_PRSCH18 (_LEUART_INPUT_RXPRSSEL_PRSCH18 << 0) /**< Shifted mode PRSCH18 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 751 #define LEUART_INPUT_RXPRSSEL_PRSCH19 (_LEUART_INPUT_RXPRSSEL_PRSCH19 << 0) /**< Shifted mode PRSCH19 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 752 #define LEUART_INPUT_RXPRSSEL_PRSCH20 (_LEUART_INPUT_RXPRSSEL_PRSCH20 << 0) /**< Shifted mode PRSCH20 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 753 #define LEUART_INPUT_RXPRSSEL_PRSCH21 (_LEUART_INPUT_RXPRSSEL_PRSCH21 << 0) /**< Shifted mode PRSCH21 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 754 #define LEUART_INPUT_RXPRSSEL_PRSCH22 (_LEUART_INPUT_RXPRSSEL_PRSCH22 << 0) /**< Shifted mode PRSCH22 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 755 #define LEUART_INPUT_RXPRSSEL_PRSCH23 (_LEUART_INPUT_RXPRSSEL_PRSCH23 << 0) /**< Shifted mode PRSCH23 for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 756 #define LEUART_INPUT_RXPRS (0x1UL << 5) /**< PRS RX Enable */
AnnaBridge 187:0387e8f68319 757 #define _LEUART_INPUT_RXPRS_SHIFT 5 /**< Shift value for LEUART_RXPRS */
AnnaBridge 187:0387e8f68319 758 #define _LEUART_INPUT_RXPRS_MASK 0x20UL /**< Bit mask for LEUART_RXPRS */
AnnaBridge 187:0387e8f68319 759 #define _LEUART_INPUT_RXPRS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 760 #define LEUART_INPUT_RXPRS_DEFAULT (_LEUART_INPUT_RXPRS_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_INPUT */
AnnaBridge 187:0387e8f68319 761
AnnaBridge 187:0387e8f68319 762 /** @} */
AnnaBridge 187:0387e8f68319 763 /** @} End of group EFM32GG11B_LEUART */
AnnaBridge 187:0387e8f68319 764 /** @} End of group Parts */