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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2c.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_hal_i2c.h
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @brief Header file of I2C HAL module.
<> 149:156823d33999 6 ******************************************************************************
<> 149:156823d33999 7 * @attention
<> 149:156823d33999 8 *
AnnaBridge 184:08ed48f1de7f 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 12 * are permitted provided that the following conditions are met:
<> 149:156823d33999 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 14 * this list of conditions and the following disclaimer.
<> 149:156823d33999 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 16 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 17 * and/or other materials provided with the distribution.
<> 149:156823d33999 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 19 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 20 * without specific prior written permission.
<> 149:156823d33999 21 *
<> 149:156823d33999 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 32 *
<> 149:156823d33999 33 ******************************************************************************
<> 149:156823d33999 34 */
<> 149:156823d33999 35
<> 149:156823d33999 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 149:156823d33999 37 #ifndef __STM32L1xx_HAL_I2C_H
<> 149:156823d33999 38 #define __STM32L1xx_HAL_I2C_H
<> 149:156823d33999 39
<> 149:156823d33999 40 #ifdef __cplusplus
<> 149:156823d33999 41 extern "C" {
<> 149:156823d33999 42 #endif
<> 149:156823d33999 43
<> 149:156823d33999 44 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 45 #include "stm32l1xx_hal_def.h"
<> 149:156823d33999 46
<> 149:156823d33999 47 /** @addtogroup STM32L1xx_HAL_Driver
<> 149:156823d33999 48 * @{
<> 149:156823d33999 49 */
<> 149:156823d33999 50
<> 149:156823d33999 51 /** @addtogroup I2C
<> 149:156823d33999 52 * @{
<> 149:156823d33999 53 */
<> 149:156823d33999 54
<> 149:156823d33999 55 /* Exported types ------------------------------------------------------------*/
<> 149:156823d33999 56 /** @defgroup I2C_Exported_Types I2C Exported Types
<> 149:156823d33999 57 * @{
<> 149:156823d33999 58 */
<> 149:156823d33999 59
<> 149:156823d33999 60 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
<> 149:156823d33999 61 * @brief I2C Configuration Structure definition
<> 149:156823d33999 62 * @{
<> 149:156823d33999 63 */
<> 149:156823d33999 64 typedef struct
<> 149:156823d33999 65 {
<> 149:156823d33999 66 uint32_t ClockSpeed; /*!< Specifies the clock frequency.
<> 149:156823d33999 67 This parameter must be set to a value lower than 400kHz */
<> 149:156823d33999 68
<> 149:156823d33999 69 uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
<> 149:156823d33999 70 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
<> 149:156823d33999 71
<> 149:156823d33999 72 uint32_t OwnAddress1; /*!< Specifies the first device own address.
<> 149:156823d33999 73 This parameter can be a 7-bit or 10-bit address. */
<> 149:156823d33999 74
<> 149:156823d33999 75 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
<> 149:156823d33999 76 This parameter can be a value of @ref I2C_addressing_mode */
<> 149:156823d33999 77
<> 149:156823d33999 78 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
<> 149:156823d33999 79 This parameter can be a value of @ref I2C_dual_addressing_mode */
<> 149:156823d33999 80
<> 149:156823d33999 81 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
<> 149:156823d33999 82 This parameter can be a 7-bit address. */
<> 149:156823d33999 83
<> 149:156823d33999 84 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
<> 149:156823d33999 85 This parameter can be a value of @ref I2C_general_call_addressing_mode */
<> 149:156823d33999 86
<> 149:156823d33999 87 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
<> 149:156823d33999 88 This parameter can be a value of @ref I2C_nostretch_mode */
<> 149:156823d33999 89
<> 149:156823d33999 90 }I2C_InitTypeDef;
<> 149:156823d33999 91
<> 149:156823d33999 92 /**
<> 149:156823d33999 93 * @}
<> 149:156823d33999 94 */
<> 149:156823d33999 95
<> 149:156823d33999 96 /** @defgroup HAL_state_structure_definition HAL state structure definition
<> 149:156823d33999 97 * @brief HAL State structure definition
<> 149:156823d33999 98 * @note HAL I2C State value coding follow below described bitmap :
<> 149:156823d33999 99 * b7-b6 Error information
<> 149:156823d33999 100 * 00 : No Error
<> 149:156823d33999 101 * 01 : Abort (Abort user request on going)
<> 149:156823d33999 102 * 10 : Timeout
<> 149:156823d33999 103 * 11 : Error
<> 149:156823d33999 104 * b5 IP initilisation status
<> 149:156823d33999 105 * 0 : Reset (IP not initialized)
<> 149:156823d33999 106 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)
<> 149:156823d33999 107 * b4 (not used)
<> 149:156823d33999 108 * x : Should be set to 0
<> 149:156823d33999 109 * b3
<> 149:156823d33999 110 * 0 : Ready or Busy (No Listen mode ongoing)
<> 149:156823d33999 111 * 1 : Listen (IP in Address Listen Mode)
<> 149:156823d33999 112 * b2 Intrinsic process state
<> 149:156823d33999 113 * 0 : Ready
<> 149:156823d33999 114 * 1 : Busy (IP busy with some configuration or internal operations)
<> 149:156823d33999 115 * b1 Rx state
<> 149:156823d33999 116 * 0 : Ready (no Rx operation ongoing)
<> 149:156823d33999 117 * 1 : Busy (Rx operation ongoing)
<> 149:156823d33999 118 * b0 Tx state
<> 149:156823d33999 119 * 0 : Ready (no Tx operation ongoing)
<> 149:156823d33999 120 * 1 : Busy (Tx operation ongoing)
<> 149:156823d33999 121 * @{
<> 149:156823d33999 122 */
<> 149:156823d33999 123 typedef enum
<> 149:156823d33999 124 {
<> 149:156823d33999 125 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
<> 149:156823d33999 126 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
<> 149:156823d33999 127 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
<> 149:156823d33999 128 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
<> 149:156823d33999 129 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
<> 149:156823d33999 130 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
<> 149:156823d33999 131 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
<> 149:156823d33999 132 process is ongoing */
<> 149:156823d33999 133 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
<> 149:156823d33999 134 process is ongoing */
<> 149:156823d33999 135 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
<> 149:156823d33999 136 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
<> 149:156823d33999 137 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
<> 149:156823d33999 138
<> 149:156823d33999 139 }HAL_I2C_StateTypeDef;
<> 149:156823d33999 140
<> 149:156823d33999 141 /**
<> 149:156823d33999 142 * @}
<> 149:156823d33999 143 */
<> 149:156823d33999 144
<> 149:156823d33999 145 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
<> 149:156823d33999 146 * @brief HAL Mode structure definition
<> 149:156823d33999 147 * @note HAL I2C Mode value coding follow below described bitmap :
<> 149:156823d33999 148 * b7 (not used)
<> 149:156823d33999 149 * x : Should be set to 0
<> 149:156823d33999 150 * b6
<> 149:156823d33999 151 * 0 : None
<> 149:156823d33999 152 * 1 : Memory (HAL I2C communication is in Memory Mode)
<> 149:156823d33999 153 * b5
<> 149:156823d33999 154 * 0 : None
<> 149:156823d33999 155 * 1 : Slave (HAL I2C communication is in Slave Mode)
<> 149:156823d33999 156 * b4
<> 149:156823d33999 157 * 0 : None
<> 149:156823d33999 158 * 1 : Master (HAL I2C communication is in Master Mode)
<> 149:156823d33999 159 * b3-b2-b1-b0 (not used)
<> 149:156823d33999 160 * xxxx : Should be set to 0000
<> 149:156823d33999 161 * @{
<> 149:156823d33999 162 */
<> 149:156823d33999 163 typedef enum
<> 149:156823d33999 164 {
<> 149:156823d33999 165 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
<> 149:156823d33999 166 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
<> 149:156823d33999 167 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
<> 149:156823d33999 168 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
<> 149:156823d33999 169
<> 149:156823d33999 170 }HAL_I2C_ModeTypeDef;
<> 149:156823d33999 171
<> 149:156823d33999 172 /**
<> 149:156823d33999 173 * @}
<> 149:156823d33999 174 */
<> 149:156823d33999 175
<> 149:156823d33999 176 /** @defgroup I2C_Error_Code_definition I2C Error Code definition
<> 149:156823d33999 177 * @brief I2C Error Code definition
<> 149:156823d33999 178 * @{
<> 149:156823d33999 179 */
AnnaBridge 184:08ed48f1de7f 180 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
AnnaBridge 184:08ed48f1de7f 181 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
AnnaBridge 184:08ed48f1de7f 182 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
AnnaBridge 184:08ed48f1de7f 183 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< AF error */
AnnaBridge 184:08ed48f1de7f 184 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
AnnaBridge 184:08ed48f1de7f 185 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
AnnaBridge 184:08ed48f1de7f 186 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout Error */
<> 149:156823d33999 187 /**
<> 149:156823d33999 188 * @}
<> 149:156823d33999 189 */
<> 149:156823d33999 190
<> 149:156823d33999 191 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
<> 149:156823d33999 192 * @brief I2C handle Structure definition
<> 149:156823d33999 193 * @{
<> 149:156823d33999 194 */
<> 149:156823d33999 195 typedef struct
<> 149:156823d33999 196 {
<> 149:156823d33999 197 I2C_TypeDef *Instance; /*!< I2C registers base address */
<> 149:156823d33999 198
<> 149:156823d33999 199 I2C_InitTypeDef Init; /*!< I2C communication parameters */
<> 149:156823d33999 200
<> 149:156823d33999 201 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
<> 149:156823d33999 202
<> 149:156823d33999 203 uint16_t XferSize; /*!< I2C transfer size */
<> 149:156823d33999 204
<> 149:156823d33999 205 __IO uint16_t XferCount; /*!< I2C transfer counter */
<> 149:156823d33999 206
<> 149:156823d33999 207 __IO uint32_t XferOptions; /*!< I2C transfer options */
<> 149:156823d33999 208
<> 149:156823d33999 209 __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode
<> 149:156823d33999 210 context for internal usage */
<> 149:156823d33999 211
<> 149:156823d33999 212 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
<> 149:156823d33999 213
<> 149:156823d33999 214 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
<> 149:156823d33999 215
<> 149:156823d33999 216 HAL_LockTypeDef Lock; /*!< I2C locking object */
<> 149:156823d33999 217
<> 149:156823d33999 218 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
<> 149:156823d33999 219
<> 149:156823d33999 220 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
<> 149:156823d33999 221
<> 149:156823d33999 222 __IO uint32_t ErrorCode; /*!< I2C Error code */
<> 149:156823d33999 223
<> 149:156823d33999 224 __IO uint32_t Devaddress; /*!< I2C Target device address */
<> 149:156823d33999 225
<> 149:156823d33999 226 __IO uint32_t Memaddress; /*!< I2C Target memory address */
<> 149:156823d33999 227
<> 149:156823d33999 228 __IO uint32_t MemaddSize; /*!< I2C Target memory address size */
<> 149:156823d33999 229
<> 149:156823d33999 230 __IO uint32_t EventCount; /*!< I2C Event counter */
<> 149:156823d33999 231
<> 149:156823d33999 232 }I2C_HandleTypeDef;
<> 149:156823d33999 233
<> 149:156823d33999 234 /**
<> 149:156823d33999 235 * @}
<> 149:156823d33999 236 */
<> 149:156823d33999 237
<> 149:156823d33999 238 /**
<> 149:156823d33999 239 * @}
<> 149:156823d33999 240 */
<> 149:156823d33999 241 /* Exported constants --------------------------------------------------------*/
<> 149:156823d33999 242 /** @defgroup I2C_Exported_Constants I2C Exported Constants
<> 149:156823d33999 243 * @{
<> 149:156823d33999 244 */
<> 149:156823d33999 245
<> 149:156823d33999 246 /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
<> 149:156823d33999 247 * @{
<> 149:156823d33999 248 */
AnnaBridge 184:08ed48f1de7f 249 #define I2C_DUTYCYCLE_2 (0x00000000U)
<> 149:156823d33999 250 #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
<> 149:156823d33999 251 /**
<> 149:156823d33999 252 * @}
<> 149:156823d33999 253 */
<> 149:156823d33999 254
<> 149:156823d33999 255 /** @defgroup I2C_addressing_mode I2C addressing mode
<> 149:156823d33999 256 * @{
<> 149:156823d33999 257 */
AnnaBridge 184:08ed48f1de7f 258 #define I2C_ADDRESSINGMODE_7BIT (0x00004000U)
AnnaBridge 184:08ed48f1de7f 259 #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | (0x00004000U))
<> 149:156823d33999 260 /**
<> 149:156823d33999 261 * @}
<> 149:156823d33999 262 */
<> 149:156823d33999 263
<> 149:156823d33999 264 /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
<> 149:156823d33999 265 * @{
<> 149:156823d33999 266 */
AnnaBridge 184:08ed48f1de7f 267 #define I2C_DUALADDRESS_DISABLE (0x00000000U)
<> 149:156823d33999 268 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
<> 149:156823d33999 269 /**
<> 149:156823d33999 270 * @}
<> 149:156823d33999 271 */
<> 149:156823d33999 272
<> 149:156823d33999 273 /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
<> 149:156823d33999 274 * @{
<> 149:156823d33999 275 */
AnnaBridge 184:08ed48f1de7f 276 #define I2C_GENERALCALL_DISABLE (0x00000000U)
<> 149:156823d33999 277 #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
<> 149:156823d33999 278 /**
<> 149:156823d33999 279 * @}
<> 149:156823d33999 280 */
<> 149:156823d33999 281
<> 149:156823d33999 282 /** @defgroup I2C_nostretch_mode I2C nostretch mode
<> 149:156823d33999 283 * @{
<> 149:156823d33999 284 */
AnnaBridge 184:08ed48f1de7f 285 #define I2C_NOSTRETCH_DISABLE (0x00000000U)
<> 149:156823d33999 286 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
<> 149:156823d33999 287 /**
<> 149:156823d33999 288 * @}
<> 149:156823d33999 289 */
<> 149:156823d33999 290
<> 149:156823d33999 291 /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
<> 149:156823d33999 292 * @{
<> 149:156823d33999 293 */
AnnaBridge 184:08ed48f1de7f 294 #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
AnnaBridge 184:08ed48f1de7f 295 #define I2C_MEMADD_SIZE_16BIT (0x00000010U)
<> 149:156823d33999 296 /**
<> 149:156823d33999 297 * @}
<> 149:156823d33999 298 */
<> 149:156823d33999 299
<> 149:156823d33999 300 /** @defgroup I2C_XferDirection_definition I2C XferDirection definition Master Point of View
<> 149:156823d33999 301 * @{
<> 149:156823d33999 302 */
AnnaBridge 184:08ed48f1de7f 303 #define I2C_DIRECTION_RECEIVE (0x00000000U)
AnnaBridge 184:08ed48f1de7f 304 #define I2C_DIRECTION_TRANSMIT (0x00000001U)
<> 149:156823d33999 305 /**
<> 149:156823d33999 306 * @}
<> 149:156823d33999 307 */
<> 149:156823d33999 308
<> 149:156823d33999 309 /** @defgroup I2C_XferOptions_definition I2C XferOptions definition
<> 149:156823d33999 310 * @{
<> 149:156823d33999 311 */
AnnaBridge 184:08ed48f1de7f 312 #define I2C_FIRST_FRAME (0x00000001U)
AnnaBridge 184:08ed48f1de7f 313 #define I2C_NEXT_FRAME (0x00000002U)
AnnaBridge 184:08ed48f1de7f 314 #define I2C_FIRST_AND_LAST_FRAME (0x00000004U)
AnnaBridge 184:08ed48f1de7f 315 #define I2C_LAST_FRAME (0x00000008U)
<> 149:156823d33999 316 /**
<> 149:156823d33999 317 * @}
<> 149:156823d33999 318 */
<> 149:156823d33999 319
<> 149:156823d33999 320 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
<> 149:156823d33999 321 * @brief I2C Interrupt definition
<> 149:156823d33999 322 * Elements values convention: 0xXXXXXXXX
<> 149:156823d33999 323 * - XXXXXXXX : Interrupt control mask
<> 149:156823d33999 324 * @{
<> 149:156823d33999 325 */
<> 149:156823d33999 326 #define I2C_IT_BUF I2C_CR2_ITBUFEN
<> 149:156823d33999 327 #define I2C_IT_EVT I2C_CR2_ITEVTEN
<> 149:156823d33999 328 #define I2C_IT_ERR I2C_CR2_ITERREN
<> 149:156823d33999 329 /**
<> 149:156823d33999 330 * @}
<> 149:156823d33999 331 */
<> 149:156823d33999 332
<> 149:156823d33999 333 /** @defgroup I2C_Flag_definition I2C Flag definition
<> 149:156823d33999 334 * @{
<> 149:156823d33999 335 */
<> 149:156823d33999 336 #define I2C_FLAG_OVR ((uint32_t)(1U << 16U | I2C_SR1_OVR))
<> 149:156823d33999 337 #define I2C_FLAG_AF ((uint32_t)(1U << 16U | I2C_SR1_AF))
<> 149:156823d33999 338 #define I2C_FLAG_ARLO ((uint32_t)(1U << 16U | I2C_SR1_ARLO))
<> 149:156823d33999 339 #define I2C_FLAG_BERR ((uint32_t)(1U << 16U | I2C_SR1_BERR))
<> 149:156823d33999 340 #define I2C_FLAG_TXE ((uint32_t)(1U << 16U | I2C_SR1_TXE))
<> 149:156823d33999 341 #define I2C_FLAG_RXNE ((uint32_t)(1U << 16U | I2C_SR1_RXNE))
<> 149:156823d33999 342 #define I2C_FLAG_STOPF ((uint32_t)(1U << 16U | I2C_SR1_STOPF))
<> 149:156823d33999 343 #define I2C_FLAG_ADD10 ((uint32_t)(1U << 16U | I2C_SR1_ADD10))
<> 149:156823d33999 344 #define I2C_FLAG_BTF ((uint32_t)(1U << 16U | I2C_SR1_BTF))
<> 149:156823d33999 345 #define I2C_FLAG_ADDR ((uint32_t)(1U << 16U | I2C_SR1_ADDR))
<> 149:156823d33999 346 #define I2C_FLAG_SB ((uint32_t)(1U << 16U | I2C_SR1_SB))
<> 149:156823d33999 347 #define I2C_FLAG_DUALF ((uint32_t)(2U << 16U | I2C_SR2_DUALF))
<> 149:156823d33999 348 #define I2C_FLAG_GENCALL ((uint32_t)(2U << 16U | I2C_SR2_GENCALL))
<> 149:156823d33999 349 #define I2C_FLAG_TRA ((uint32_t)(2U << 16U | I2C_SR2_TRA))
<> 149:156823d33999 350 #define I2C_FLAG_BUSY ((uint32_t)(2U << 16U | I2C_SR2_BUSY))
<> 149:156823d33999 351 #define I2C_FLAG_MSL ((uint32_t)(2U << 16U | I2C_SR2_MSL))
<> 149:156823d33999 352 /**
<> 149:156823d33999 353 * @}
<> 149:156823d33999 354 */
<> 149:156823d33999 355
<> 149:156823d33999 356 /**
<> 149:156823d33999 357 * @}
<> 149:156823d33999 358 */
<> 149:156823d33999 359
<> 149:156823d33999 360 /* Exported macros -----------------------------------------------------------*/
<> 149:156823d33999 361 /** @defgroup I2C_Exported_Macros I2C Exported Macros
<> 149:156823d33999 362 * @{
<> 149:156823d33999 363 */
<> 149:156823d33999 364
<> 149:156823d33999 365 /** @brief Reset I2C handle state.
<> 149:156823d33999 366 * @param __HANDLE__ specifies the I2C Handle.
<> 149:156823d33999 367 * @retval None
<> 149:156823d33999 368 */
<> 149:156823d33999 369 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
<> 149:156823d33999 370
<> 149:156823d33999 371 /** @brief Enable the specified I2C interrupt.
<> 149:156823d33999 372 * @param __HANDLE__ specifies the I2C Handle.
<> 149:156823d33999 373 * @param __INTERRUPT__: specifies the interrupt source to enable.
<> 149:156823d33999 374 * This parameter can be one of the following values:
<> 149:156823d33999 375 * @arg I2C_IT_BUF: Buffer interrupt enable
<> 149:156823d33999 376 * @arg I2C_IT_EVT: Event interrupt enable
<> 149:156823d33999 377 * @arg I2C_IT_ERR: Error interrupt enable
<> 149:156823d33999 378 * @retval None
<> 149:156823d33999 379 */
<> 149:156823d33999 380 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
<> 149:156823d33999 381
<> 149:156823d33999 382 /** @brief Disable the specified I2C interrupt.
<> 149:156823d33999 383 * @param __HANDLE__ specifies the I2C Handle.
<> 149:156823d33999 384 * @param __INTERRUPT__: specifies the interrupt source to disable.
<> 149:156823d33999 385 * This parameter can be one of the following values:
<> 149:156823d33999 386 * @arg I2C_IT_BUF: Buffer interrupt enable
<> 149:156823d33999 387 * @arg I2C_IT_EVT: Event interrupt enable
<> 149:156823d33999 388 * @arg I2C_IT_ERR: Error interrupt enable
<> 149:156823d33999 389 *
<> 149:156823d33999 390 * @retval None
<> 149:156823d33999 391 */
<> 149:156823d33999 392 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
<> 149:156823d33999 393
<> 149:156823d33999 394 /** @brief Check whether the specified I2C interrupt source is enabled or not.
<> 149:156823d33999 395 * @param __HANDLE__ specifies the I2C Handle.
<> 149:156823d33999 396 * @param __INTERRUPT__: specifies the I2C interrupt source to check.
<> 149:156823d33999 397 * This parameter can be one of the following values:
<> 149:156823d33999 398 * @arg I2C_IT_BUF: Buffer interrupt enable
<> 149:156823d33999 399 * @arg I2C_IT_EVT: Event interrupt enable
<> 149:156823d33999 400 * @arg I2C_IT_ERR: Error interrupt enable
<> 149:156823d33999 401 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
<> 149:156823d33999 402 */
<> 149:156823d33999 403 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
<> 149:156823d33999 404
<> 149:156823d33999 405 /** @brief Check whether the specified I2C flag is set or not.
<> 149:156823d33999 406 * @param __HANDLE__ specifies the I2C Handle.
<> 149:156823d33999 407 * @param __FLAG__ specifies the flag to check.
<> 149:156823d33999 408 * This parameter can be one of the following values:
<> 149:156823d33999 409 * @arg I2C_FLAG_OVR: Overrun/Underrun flag
<> 149:156823d33999 410 * @arg I2C_FLAG_AF: Acknowledge failure flag
<> 149:156823d33999 411 * @arg I2C_FLAG_ARLO: Arbitration lost flag
<> 149:156823d33999 412 * @arg I2C_FLAG_BERR: Bus error flag
<> 149:156823d33999 413 * @arg I2C_FLAG_TXE: Data register empty flag
<> 149:156823d33999 414 * @arg I2C_FLAG_RXNE: Data register not empty flag
<> 149:156823d33999 415 * @arg I2C_FLAG_STOPF: Stop detection flag
<> 149:156823d33999 416 * @arg I2C_FLAG_ADD10: 10-bit header sent flag
<> 149:156823d33999 417 * @arg I2C_FLAG_BTF: Byte transfer finished flag
<> 149:156823d33999 418 * @arg I2C_FLAG_ADDR: Address sent flag
<> 149:156823d33999 419 * Address matched flag
<> 149:156823d33999 420 * @arg I2C_FLAG_SB: Start bit flag
<> 149:156823d33999 421 * @arg I2C_FLAG_DUALF: Dual flag
<> 149:156823d33999 422 * @arg I2C_FLAG_GENCALL: General call header flag
<> 149:156823d33999 423 * @arg I2C_FLAG_TRA: Transmitter/Receiver flag
<> 149:156823d33999 424 * @arg I2C_FLAG_BUSY: Bus busy flag
<> 149:156823d33999 425 * @arg I2C_FLAG_MSL: Master/Slave flag
<> 149:156823d33999 426 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 149:156823d33999 427 */
<> 149:156823d33999 428 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?(((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET): \
<> 149:156823d33999 429 (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
<> 149:156823d33999 430
<> 149:156823d33999 431 /** @brief Clear the I2C pending flags which are cleared by writing 0 in a specific bit.
<> 149:156823d33999 432 * @param __HANDLE__ specifies the I2C Handle.
<> 149:156823d33999 433 * @param __FLAG__ specifies the flag to clear.
<> 149:156823d33999 434 * This parameter can be any combination of the following values:
<> 149:156823d33999 435 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
<> 149:156823d33999 436 * @arg I2C_FLAG_AF: Acknowledge failure flag
<> 149:156823d33999 437 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
<> 149:156823d33999 438 * @arg I2C_FLAG_BERR: Bus error flag
<> 149:156823d33999 439 * @retval None
<> 149:156823d33999 440 */
<> 149:156823d33999 441 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
<> 149:156823d33999 442
<> 149:156823d33999 443 /** @brief Clears the I2C ADDR pending flag.
<> 149:156823d33999 444 * @param __HANDLE__: specifies the I2C Handle.
<> 149:156823d33999 445 * @retval None
<> 149:156823d33999 446 */
<> 149:156823d33999 447 #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
<> 149:156823d33999 448 do{ \
<> 149:156823d33999 449 __IO uint32_t tmpreg = 0x00U; \
<> 149:156823d33999 450 tmpreg = (__HANDLE__)->Instance->SR1; \
<> 149:156823d33999 451 tmpreg = (__HANDLE__)->Instance->SR2; \
<> 149:156823d33999 452 UNUSED(tmpreg); \
<> 149:156823d33999 453 }while(0)
<> 149:156823d33999 454
<> 149:156823d33999 455 /** @brief Clears the I2C STOPF pending flag.
<> 149:156823d33999 456 * @param __HANDLE__: specifies the I2C Handle.
<> 149:156823d33999 457 * @retval None
<> 149:156823d33999 458 */
<> 149:156823d33999 459 #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \
<> 149:156823d33999 460 do{ \
<> 149:156823d33999 461 __IO uint32_t tmpreg = 0x00U; \
<> 149:156823d33999 462 tmpreg = (__HANDLE__)->Instance->SR1; \
<> 149:156823d33999 463 SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \
<> 149:156823d33999 464 UNUSED(tmpreg); \
<> 149:156823d33999 465 }while(0)
<> 149:156823d33999 466
<> 149:156823d33999 467 /** @brief Enable the I2C peripheral.
<> 149:156823d33999 468 * @param __HANDLE__: specifies the I2C Handle.
<> 149:156823d33999 469 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
<> 149:156823d33999 470 * @retval None
<> 149:156823d33999 471 */
<> 149:156823d33999 472 #define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
<> 149:156823d33999 473
<> 149:156823d33999 474 /** @brief Disable the I2C peripheral.
<> 149:156823d33999 475 * @param __HANDLE__: specifies the I2C Handle.
<> 149:156823d33999 476 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
<> 149:156823d33999 477 * @retval None
<> 149:156823d33999 478 */
<> 149:156823d33999 479 #define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
<> 149:156823d33999 480
<> 149:156823d33999 481 /**
<> 149:156823d33999 482 * @}
<> 149:156823d33999 483 */
<> 149:156823d33999 484
<> 149:156823d33999 485 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 486 /** @addtogroup I2C_Exported_Functions
<> 149:156823d33999 487 * @{
<> 149:156823d33999 488 */
<> 149:156823d33999 489
<> 149:156823d33999 490 /** @addtogroup I2C_Exported_Functions_Group1
<> 149:156823d33999 491 * @{
<> 149:156823d33999 492 */
<> 149:156823d33999 493 /* Initialization and de-initialization functions******************************/
<> 149:156823d33999 494 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 495 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 496 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 497 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 498
<> 149:156823d33999 499 /**
<> 149:156823d33999 500 * @}
<> 149:156823d33999 501 */
<> 149:156823d33999 502
<> 149:156823d33999 503 /** @addtogroup I2C_Exported_Functions_Group2
<> 149:156823d33999 504 * @{
<> 149:156823d33999 505 */
<> 149:156823d33999 506 /* IO operation functions ****************************************************/
<> 149:156823d33999 507 /******* Blocking mode: Polling */
<> 149:156823d33999 508 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 509 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 510 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 511 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 512 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 513 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 514 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
<> 149:156823d33999 515
<> 149:156823d33999 516 /******* Non-Blocking mode: Interrupt */
<> 149:156823d33999 517 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 518 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 519 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 520 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 521 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 522 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 523
<> 149:156823d33999 524 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
<> 149:156823d33999 525 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
<> 149:156823d33999 526 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
<> 149:156823d33999 527 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
<> 149:156823d33999 528 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
<> 149:156823d33999 529 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 530 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 531
<> 149:156823d33999 532 /******* Non-Blocking mode: DMA */
<> 149:156823d33999 533 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 534 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 535 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 536 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 537 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 538 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 539 /**
<> 149:156823d33999 540 * @}
<> 149:156823d33999 541 */
<> 149:156823d33999 542
<> 149:156823d33999 543 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
<> 149:156823d33999 544 * @{
<> 149:156823d33999 545 */
<> 149:156823d33999 546 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
<> 149:156823d33999 547 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 548 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 549 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 550 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 551 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 552 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 553 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
<> 149:156823d33999 554 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 555 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 556 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 557 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 558 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 559 /**
<> 149:156823d33999 560 * @}
<> 149:156823d33999 561 */
<> 149:156823d33999 562
<> 149:156823d33999 563 /** @addtogroup I2C_Exported_Functions_Group3
<> 149:156823d33999 564 * @{
<> 149:156823d33999 565 */
<> 149:156823d33999 566 /* Peripheral State, Mode and Error functions *********************************/
<> 149:156823d33999 567 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 568 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 569 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 570
<> 149:156823d33999 571 /**
<> 149:156823d33999 572 * @}
<> 149:156823d33999 573 */
<> 149:156823d33999 574 /**
<> 149:156823d33999 575 * @}
<> 149:156823d33999 576 */
<> 149:156823d33999 577
<> 149:156823d33999 578 /* Private constants ---------------------------------------------------------*/
<> 149:156823d33999 579 /** @defgroup I2C_Private_Constants I2C Private Constants
<> 149:156823d33999 580 * @{
<> 149:156823d33999 581 */
AnnaBridge 184:08ed48f1de7f 582 #define I2C_FLAG_MASK (0x0000FFFFU)
<> 149:156823d33999 583 /**
<> 149:156823d33999 584 * @}
<> 149:156823d33999 585 */
<> 149:156823d33999 586
<> 149:156823d33999 587 /* Private macros ------------------------------------------------------------*/
<> 149:156823d33999 588 /** @defgroup I2C_Private_Macro I2C Private Macros
<> 149:156823d33999 589 * @{
<> 149:156823d33999 590 */
<> 149:156823d33999 591
<> 149:156823d33999 592 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
<> 149:156823d33999 593 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
<> 149:156823d33999 594
<> 149:156823d33999 595
<> 149:156823d33999 596 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
<> 149:156823d33999 597 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
<> 149:156823d33999 598
<> 149:156823d33999 599 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
<> 149:156823d33999 600 ((CYCLE) == I2C_DUTYCYCLE_16_9))
<> 149:156823d33999 601 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (0xFFFFFF01U)) == 0U)
<> 149:156823d33999 602 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (0xFFFFFC00U)) == 0U)
<> 149:156823d33999 603 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
<> 149:156823d33999 604 ((CALL) == I2C_GENERALCALL_ENABLE))
<> 149:156823d33999 605
<> 149:156823d33999 606 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
<> 149:156823d33999 607 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
<> 149:156823d33999 608
<> 149:156823d33999 609 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
<> 149:156823d33999 610 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
<> 149:156823d33999 611
<> 149:156823d33999 612 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
<> 149:156823d33999 613
<> 149:156823d33999 614
<> 149:156823d33999 615 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
<> 149:156823d33999 616 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
<> 149:156823d33999 617
<> 149:156823d33999 618
<> 149:156823d33999 619 #define I2C_FREQ_RANGE(__PCLK__) ((__PCLK__)/1000000U)
<> 149:156823d33999 620 #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
<> 149:156823d33999 621 #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
<> 149:156823d33999 622 #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3U)) : (((__PCLK__) / ((__SPEED__) * 25U)) | I2C_DUTYCYCLE_16_9))
<> 149:156823d33999 623 #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
<> 149:156823d33999 624 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
<> 149:156823d33999 625 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
<> 149:156823d33999 626
<> 149:156823d33999 627 #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
<> 149:156823d33999 628 #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
<> 149:156823d33999 629
<> 149:156823d33999 630 #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
<> 149:156823d33999 631 #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0xF0U))))
<> 149:156823d33999 632 #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0xF1U))))
<> 149:156823d33999 633
<> 149:156823d33999 634 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
<> 149:156823d33999 635 ((REQUEST) == I2C_NEXT_FRAME) || \
<> 149:156823d33999 636 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
<> 149:156823d33999 637 ((REQUEST) == I2C_LAST_FRAME))
<> 149:156823d33999 638 /**
<> 149:156823d33999 639 * @}
<> 149:156823d33999 640 */
<> 149:156823d33999 641
<> 149:156823d33999 642 /* Private Functions ---------------------------------------------------------*/
<> 149:156823d33999 643 /** @defgroup I2C_Private_Functions I2C Private Functions
<> 149:156823d33999 644 * @{
<> 149:156823d33999 645 */
<> 149:156823d33999 646 /* Private functions are defined in stm32f0xx_hal_i2c.c file */
<> 149:156823d33999 647 /**
<> 149:156823d33999 648 * @}
<> 149:156823d33999 649 */
<> 149:156823d33999 650
<> 149:156823d33999 651 /**
<> 149:156823d33999 652 * @}
<> 149:156823d33999 653 */
<> 149:156823d33999 654
<> 149:156823d33999 655 /**
<> 149:156823d33999 656 * @}
<> 149:156823d33999 657 */
<> 149:156823d33999 658
<> 149:156823d33999 659 #ifdef __cplusplus
<> 149:156823d33999 660 }
<> 149:156823d33999 661 #endif
<> 149:156823d33999 662
<> 149:156823d33999 663
<> 149:156823d33999 664 #endif /* __STM32L1xx_HAL_I2C_H */
<> 149:156823d33999 665
<> 149:156823d33999 666 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 149:156823d33999 667