mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file startup_stm32l152xe.s
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @brief STM32L152XE Devices vector table for
<> 149:156823d33999 6 * Atollic toolchain.
<> 149:156823d33999 7 * This module performs:
<> 149:156823d33999 8 * - Set the initial SP
<> 149:156823d33999 9 * - Set the initial PC == Reset_Handler,
<> 149:156823d33999 10 * - Set the vector table entries with the exceptions ISR address
<> 149:156823d33999 11 * - Configure the clock system
<> 149:156823d33999 12 * - Branches to main in the C library (which eventually
<> 149:156823d33999 13 * calls main()).
<> 149:156823d33999 14 * After Reset the Cortex-M3 processor is in Thread mode,
<> 149:156823d33999 15 * priority is Privileged, and the Stack is set to Main.
<> 149:156823d33999 16 ******************************************************************************
<> 149:156823d33999 17 *
AnnaBridge 184:08ed48f1de7f 18 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 149:156823d33999 19 *
<> 149:156823d33999 20 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 21 * are permitted provided that the following conditions are met:
<> 149:156823d33999 22 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 23 * this list of conditions and the following disclaimer.
<> 149:156823d33999 24 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 25 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 26 * and/or other materials provided with the distribution.
<> 149:156823d33999 27 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 28 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 29 * without specific prior written permission.
<> 149:156823d33999 30 *
<> 149:156823d33999 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 32 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 34 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 37 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 38 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 39 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 41 *
<> 149:156823d33999 42 ******************************************************************************
<> 149:156823d33999 43 */
<> 149:156823d33999 44
<> 149:156823d33999 45 .syntax unified
<> 149:156823d33999 46 .cpu cortex-m3
<> 149:156823d33999 47 .fpu softvfp
<> 149:156823d33999 48 .thumb
<> 149:156823d33999 49
<> 149:156823d33999 50 .global g_pfnVectors
<> 149:156823d33999 51 .global Default_Handler
<> 149:156823d33999 52
<> 149:156823d33999 53 /* start address for the initialization values of the .data section.
<> 149:156823d33999 54 defined in linker script */
<> 149:156823d33999 55 .word _sidata
<> 149:156823d33999 56 /* start address for the .data section. defined in linker script */
<> 149:156823d33999 57 .word _sdata
<> 149:156823d33999 58 /* end address for the .data section. defined in linker script */
<> 149:156823d33999 59 .word _edata
<> 149:156823d33999 60
<> 149:156823d33999 61 .equ BootRAM, 0xF108F85F
<> 149:156823d33999 62 /**
<> 149:156823d33999 63 * @brief This is the code that gets called when the processor first
<> 149:156823d33999 64 * starts execution following a reset event. Only the absolutely
<> 149:156823d33999 65 * necessary set is performed, after which the application
<> 149:156823d33999 66 * supplied main() routine is called.
<> 149:156823d33999 67 * @param None
<> 149:156823d33999 68 * @retval : None
<> 149:156823d33999 69 */
<> 149:156823d33999 70
<> 149:156823d33999 71 .section .text.Reset_Handler
<> 149:156823d33999 72 .weak Reset_Handler
<> 149:156823d33999 73 .type Reset_Handler, %function
<> 149:156823d33999 74 Reset_Handler:
<> 149:156823d33999 75 ldr r0, =_estack
<> 149:156823d33999 76 mov sp, r0 /* set stack pointer */
<> 149:156823d33999 77
<> 149:156823d33999 78 /* Copy the data segment initializers from flash to SRAM */
<> 149:156823d33999 79 movs r1, #0
<> 149:156823d33999 80 b LoopCopyDataInit
<> 149:156823d33999 81
<> 149:156823d33999 82 CopyDataInit:
<> 149:156823d33999 83 ldr r3, =_sidata
<> 149:156823d33999 84 ldr r3, [r3, r1]
<> 149:156823d33999 85 str r3, [r0, r1]
<> 149:156823d33999 86 adds r1, r1, #4
<> 149:156823d33999 87
<> 149:156823d33999 88 LoopCopyDataInit:
<> 149:156823d33999 89 ldr r0, =_sdata
<> 149:156823d33999 90 ldr r3, =_edata
<> 149:156823d33999 91 adds r2, r0, r1
<> 149:156823d33999 92 cmp r2, r3
<> 149:156823d33999 93 bcc CopyDataInit
<> 149:156823d33999 94
<> 149:156823d33999 95 /* Call the clock system intitialization function.*/
<> 149:156823d33999 96 bl SystemInit
<> 149:156823d33999 97 /* Call static constructors */
<> 149:156823d33999 98 //bl __libc_init_array
<> 149:156823d33999 99 /* Call the application's entry point.*/
<> 149:156823d33999 100 //bl main
<> 149:156823d33999 101 bl _start
<> 149:156823d33999 102
<> 149:156823d33999 103 LoopForever:
<> 149:156823d33999 104 b LoopForever
<> 149:156823d33999 105
<> 149:156823d33999 106
<> 149:156823d33999 107 .size Reset_Handler, .-Reset_Handler
<> 149:156823d33999 108
<> 149:156823d33999 109 /**
<> 149:156823d33999 110 * @brief This is the code that gets called when the processor receives an
<> 149:156823d33999 111 * unexpected interrupt. This simply enters an infinite loop, preserving
<> 149:156823d33999 112 * the system state for examination by a debugger.
<> 149:156823d33999 113 *
<> 149:156823d33999 114 * @param None
<> 149:156823d33999 115 * @retval : None
<> 149:156823d33999 116 */
<> 149:156823d33999 117 .section .text.Default_Handler,"ax",%progbits
<> 149:156823d33999 118 Default_Handler:
<> 149:156823d33999 119 Infinite_Loop:
<> 149:156823d33999 120 b Infinite_Loop
<> 149:156823d33999 121 .size Default_Handler, .-Default_Handler
<> 149:156823d33999 122 /******************************************************************************
<> 149:156823d33999 123 *
<> 149:156823d33999 124 * The minimal vector table for a Cortex M3. Note that the proper constructs
<> 149:156823d33999 125 * must be placed on this to ensure that it ends up at physical address
<> 149:156823d33999 126 * 0x0000.0000.
<> 149:156823d33999 127 *
<> 149:156823d33999 128 ******************************************************************************/
<> 149:156823d33999 129 .section .isr_vector,"a",%progbits
<> 149:156823d33999 130 .type g_pfnVectors, %object
<> 149:156823d33999 131 .size g_pfnVectors, .-g_pfnVectors
<> 149:156823d33999 132
<> 149:156823d33999 133
<> 149:156823d33999 134 g_pfnVectors:
<> 149:156823d33999 135 .word _estack
<> 149:156823d33999 136 .word Reset_Handler
<> 149:156823d33999 137 .word NMI_Handler
<> 149:156823d33999 138 .word HardFault_Handler
<> 149:156823d33999 139 .word MemManage_Handler
<> 149:156823d33999 140 .word BusFault_Handler
<> 149:156823d33999 141 .word UsageFault_Handler
<> 149:156823d33999 142 .word 0
<> 149:156823d33999 143 .word 0
<> 149:156823d33999 144 .word 0
<> 149:156823d33999 145 .word 0
<> 149:156823d33999 146 .word SVC_Handler
<> 149:156823d33999 147 .word DebugMon_Handler
<> 149:156823d33999 148 .word 0
<> 149:156823d33999 149 .word PendSV_Handler
<> 149:156823d33999 150 .word SysTick_Handler
<> 149:156823d33999 151 .word WWDG_IRQHandler
<> 149:156823d33999 152 .word PVD_IRQHandler
<> 149:156823d33999 153 .word TAMPER_STAMP_IRQHandler
<> 149:156823d33999 154 .word RTC_WKUP_IRQHandler
<> 149:156823d33999 155 .word FLASH_IRQHandler
<> 149:156823d33999 156 .word RCC_IRQHandler
<> 149:156823d33999 157 .word EXTI0_IRQHandler
<> 149:156823d33999 158 .word EXTI1_IRQHandler
<> 149:156823d33999 159 .word EXTI2_IRQHandler
<> 149:156823d33999 160 .word EXTI3_IRQHandler
<> 149:156823d33999 161 .word EXTI4_IRQHandler
<> 149:156823d33999 162 .word DMA1_Channel1_IRQHandler
<> 149:156823d33999 163 .word DMA1_Channel2_IRQHandler
<> 149:156823d33999 164 .word DMA1_Channel3_IRQHandler
<> 149:156823d33999 165 .word DMA1_Channel4_IRQHandler
<> 149:156823d33999 166 .word DMA1_Channel5_IRQHandler
<> 149:156823d33999 167 .word DMA1_Channel6_IRQHandler
<> 149:156823d33999 168 .word DMA1_Channel7_IRQHandler
<> 149:156823d33999 169 .word ADC1_IRQHandler
<> 149:156823d33999 170 .word USB_HP_IRQHandler
<> 149:156823d33999 171 .word USB_LP_IRQHandler
<> 149:156823d33999 172 .word DAC_IRQHandler
<> 149:156823d33999 173 .word COMP_IRQHandler
<> 149:156823d33999 174 .word EXTI9_5_IRQHandler
<> 149:156823d33999 175 .word LCD_IRQHandler
<> 149:156823d33999 176 .word TIM9_IRQHandler
<> 149:156823d33999 177 .word TIM10_IRQHandler
<> 149:156823d33999 178 .word TIM11_IRQHandler
<> 149:156823d33999 179 .word TIM2_IRQHandler
<> 149:156823d33999 180 .word TIM3_IRQHandler
<> 149:156823d33999 181 .word TIM4_IRQHandler
<> 149:156823d33999 182 .word I2C1_EV_IRQHandler
<> 149:156823d33999 183 .word I2C1_ER_IRQHandler
<> 149:156823d33999 184 .word I2C2_EV_IRQHandler
<> 149:156823d33999 185 .word I2C2_ER_IRQHandler
<> 149:156823d33999 186 .word SPI1_IRQHandler
<> 149:156823d33999 187 .word SPI2_IRQHandler
<> 149:156823d33999 188 .word USART1_IRQHandler
<> 149:156823d33999 189 .word USART2_IRQHandler
<> 149:156823d33999 190 .word USART3_IRQHandler
<> 149:156823d33999 191 .word EXTI15_10_IRQHandler
<> 149:156823d33999 192 .word RTC_Alarm_IRQHandler
<> 149:156823d33999 193 .word USB_FS_WKUP_IRQHandler
<> 149:156823d33999 194 .word TIM6_IRQHandler
<> 149:156823d33999 195 .word TIM7_IRQHandler
<> 149:156823d33999 196 .word 0
<> 149:156823d33999 197 .word TIM5_IRQHandler
<> 149:156823d33999 198 .word SPI3_IRQHandler
<> 149:156823d33999 199 .word UART4_IRQHandler
<> 149:156823d33999 200 .word UART5_IRQHandler
<> 149:156823d33999 201 .word DMA2_Channel1_IRQHandler
<> 149:156823d33999 202 .word DMA2_Channel2_IRQHandler
<> 149:156823d33999 203 .word DMA2_Channel3_IRQHandler
<> 149:156823d33999 204 .word DMA2_Channel4_IRQHandler
<> 149:156823d33999 205 .word DMA2_Channel5_IRQHandler
<> 149:156823d33999 206 .word 0
<> 149:156823d33999 207 .word COMP_ACQ_IRQHandler
<> 149:156823d33999 208 .word 0
<> 149:156823d33999 209 .word 0
<> 149:156823d33999 210 .word 0
<> 149:156823d33999 211 .word 0
<> 149:156823d33999 212 .word 0
<> 149:156823d33999 213 .word BootRAM /* @0x108. This is for boot in RAM mode for
<> 149:156823d33999 214 STM32L152XE devices. */
<> 149:156823d33999 215
<> 149:156823d33999 216 /*******************************************************************************
<> 149:156823d33999 217 *
<> 149:156823d33999 218 * Provide weak aliases for each Exception handler to the Default_Handler.
<> 149:156823d33999 219 * As they are weak aliases, any function with the same name will override
<> 149:156823d33999 220 * this definition.
<> 149:156823d33999 221 *
<> 149:156823d33999 222 *******************************************************************************/
<> 149:156823d33999 223
<> 149:156823d33999 224 .weak NMI_Handler
<> 149:156823d33999 225 .thumb_set NMI_Handler,Default_Handler
<> 149:156823d33999 226
<> 149:156823d33999 227 .weak HardFault_Handler
<> 149:156823d33999 228 .thumb_set HardFault_Handler,Default_Handler
<> 149:156823d33999 229
<> 149:156823d33999 230 .weak MemManage_Handler
<> 149:156823d33999 231 .thumb_set MemManage_Handler,Default_Handler
<> 149:156823d33999 232
<> 149:156823d33999 233 .weak BusFault_Handler
<> 149:156823d33999 234 .thumb_set BusFault_Handler,Default_Handler
<> 149:156823d33999 235
<> 149:156823d33999 236 .weak UsageFault_Handler
<> 149:156823d33999 237 .thumb_set UsageFault_Handler,Default_Handler
<> 149:156823d33999 238
<> 149:156823d33999 239 .weak SVC_Handler
<> 149:156823d33999 240 .thumb_set SVC_Handler,Default_Handler
<> 149:156823d33999 241
<> 149:156823d33999 242 .weak DebugMon_Handler
<> 149:156823d33999 243 .thumb_set DebugMon_Handler,Default_Handler
<> 149:156823d33999 244
<> 149:156823d33999 245 .weak PendSV_Handler
<> 149:156823d33999 246 .thumb_set PendSV_Handler,Default_Handler
<> 149:156823d33999 247
<> 149:156823d33999 248 .weak SysTick_Handler
<> 149:156823d33999 249 .thumb_set SysTick_Handler,Default_Handler
<> 149:156823d33999 250
<> 149:156823d33999 251 .weak WWDG_IRQHandler
<> 149:156823d33999 252 .thumb_set WWDG_IRQHandler,Default_Handler
<> 149:156823d33999 253
<> 149:156823d33999 254 .weak PVD_IRQHandler
<> 149:156823d33999 255 .thumb_set PVD_IRQHandler,Default_Handler
<> 149:156823d33999 256
<> 149:156823d33999 257 .weak TAMPER_STAMP_IRQHandler
<> 149:156823d33999 258 .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
<> 149:156823d33999 259
<> 149:156823d33999 260 .weak RTC_WKUP_IRQHandler
<> 149:156823d33999 261 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
<> 149:156823d33999 262
<> 149:156823d33999 263 .weak FLASH_IRQHandler
<> 149:156823d33999 264 .thumb_set FLASH_IRQHandler,Default_Handler
<> 149:156823d33999 265
<> 149:156823d33999 266 .weak RCC_IRQHandler
<> 149:156823d33999 267 .thumb_set RCC_IRQHandler,Default_Handler
<> 149:156823d33999 268
<> 149:156823d33999 269 .weak EXTI0_IRQHandler
<> 149:156823d33999 270 .thumb_set EXTI0_IRQHandler,Default_Handler
<> 149:156823d33999 271
<> 149:156823d33999 272 .weak EXTI1_IRQHandler
<> 149:156823d33999 273 .thumb_set EXTI1_IRQHandler,Default_Handler
<> 149:156823d33999 274
<> 149:156823d33999 275 .weak EXTI2_IRQHandler
<> 149:156823d33999 276 .thumb_set EXTI2_IRQHandler,Default_Handler
<> 149:156823d33999 277
<> 149:156823d33999 278 .weak EXTI3_IRQHandler
<> 149:156823d33999 279 .thumb_set EXTI3_IRQHandler,Default_Handler
<> 149:156823d33999 280
<> 149:156823d33999 281 .weak EXTI4_IRQHandler
<> 149:156823d33999 282 .thumb_set EXTI4_IRQHandler,Default_Handler
<> 149:156823d33999 283
<> 149:156823d33999 284 .weak DMA1_Channel1_IRQHandler
<> 149:156823d33999 285 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
<> 149:156823d33999 286
<> 149:156823d33999 287 .weak DMA1_Channel2_IRQHandler
<> 149:156823d33999 288 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
<> 149:156823d33999 289
<> 149:156823d33999 290 .weak DMA1_Channel3_IRQHandler
<> 149:156823d33999 291 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
<> 149:156823d33999 292
<> 149:156823d33999 293 .weak DMA1_Channel4_IRQHandler
<> 149:156823d33999 294 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
<> 149:156823d33999 295
<> 149:156823d33999 296 .weak DMA1_Channel5_IRQHandler
<> 149:156823d33999 297 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
<> 149:156823d33999 298
<> 149:156823d33999 299 .weak DMA1_Channel6_IRQHandler
<> 149:156823d33999 300 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
<> 149:156823d33999 301
<> 149:156823d33999 302 .weak DMA1_Channel7_IRQHandler
<> 149:156823d33999 303 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
<> 149:156823d33999 304
<> 149:156823d33999 305 .weak ADC1_IRQHandler
<> 149:156823d33999 306 .thumb_set ADC1_IRQHandler,Default_Handler
<> 149:156823d33999 307
<> 149:156823d33999 308 .weak USB_HP_IRQHandler
<> 149:156823d33999 309 .thumb_set USB_HP_IRQHandler,Default_Handler
<> 149:156823d33999 310
<> 149:156823d33999 311 .weak USB_LP_IRQHandler
<> 149:156823d33999 312 .thumb_set USB_LP_IRQHandler,Default_Handler
<> 149:156823d33999 313
<> 149:156823d33999 314 .weak DAC_IRQHandler
<> 149:156823d33999 315 .thumb_set DAC_IRQHandler,Default_Handler
<> 149:156823d33999 316
<> 149:156823d33999 317 .weak COMP_IRQHandler
<> 149:156823d33999 318 .thumb_set COMP_IRQHandler,Default_Handler
<> 149:156823d33999 319
<> 149:156823d33999 320 .weak EXTI9_5_IRQHandler
<> 149:156823d33999 321 .thumb_set EXTI9_5_IRQHandler,Default_Handler
<> 149:156823d33999 322
<> 149:156823d33999 323 .weak LCD_IRQHandler
<> 149:156823d33999 324 .thumb_set LCD_IRQHandler,Default_Handler
<> 149:156823d33999 325
<> 149:156823d33999 326 .weak TIM9_IRQHandler
<> 149:156823d33999 327 .thumb_set TIM9_IRQHandler,Default_Handler
<> 149:156823d33999 328
<> 149:156823d33999 329 .weak TIM10_IRQHandler
<> 149:156823d33999 330 .thumb_set TIM10_IRQHandler,Default_Handler
<> 149:156823d33999 331
<> 149:156823d33999 332 .weak TIM11_IRQHandler
<> 149:156823d33999 333 .thumb_set TIM11_IRQHandler,Default_Handler
<> 149:156823d33999 334
<> 149:156823d33999 335 .weak TIM2_IRQHandler
<> 149:156823d33999 336 .thumb_set TIM2_IRQHandler,Default_Handler
<> 149:156823d33999 337
<> 149:156823d33999 338 .weak TIM3_IRQHandler
<> 149:156823d33999 339 .thumb_set TIM3_IRQHandler,Default_Handler
<> 149:156823d33999 340
<> 149:156823d33999 341 .weak TIM4_IRQHandler
<> 149:156823d33999 342 .thumb_set TIM4_IRQHandler,Default_Handler
<> 149:156823d33999 343
<> 149:156823d33999 344 .weak I2C1_EV_IRQHandler
<> 149:156823d33999 345 .thumb_set I2C1_EV_IRQHandler,Default_Handler
<> 149:156823d33999 346
<> 149:156823d33999 347 .weak I2C1_ER_IRQHandler
<> 149:156823d33999 348 .thumb_set I2C1_ER_IRQHandler,Default_Handler
<> 149:156823d33999 349
<> 149:156823d33999 350 .weak I2C2_EV_IRQHandler
<> 149:156823d33999 351 .thumb_set I2C2_EV_IRQHandler,Default_Handler
<> 149:156823d33999 352
<> 149:156823d33999 353 .weak I2C2_ER_IRQHandler
<> 149:156823d33999 354 .thumb_set I2C2_ER_IRQHandler,Default_Handler
<> 149:156823d33999 355
<> 149:156823d33999 356 .weak SPI1_IRQHandler
<> 149:156823d33999 357 .thumb_set SPI1_IRQHandler,Default_Handler
<> 149:156823d33999 358
<> 149:156823d33999 359 .weak SPI2_IRQHandler
<> 149:156823d33999 360 .thumb_set SPI2_IRQHandler,Default_Handler
<> 149:156823d33999 361
<> 149:156823d33999 362 .weak USART1_IRQHandler
<> 149:156823d33999 363 .thumb_set USART1_IRQHandler,Default_Handler
<> 149:156823d33999 364
<> 149:156823d33999 365 .weak USART2_IRQHandler
<> 149:156823d33999 366 .thumb_set USART2_IRQHandler,Default_Handler
<> 149:156823d33999 367
<> 149:156823d33999 368 .weak USART3_IRQHandler
<> 149:156823d33999 369 .thumb_set USART3_IRQHandler,Default_Handler
<> 149:156823d33999 370
<> 149:156823d33999 371 .weak EXTI15_10_IRQHandler
<> 149:156823d33999 372 .thumb_set EXTI15_10_IRQHandler,Default_Handler
<> 149:156823d33999 373
<> 149:156823d33999 374 .weak RTC_Alarm_IRQHandler
<> 149:156823d33999 375 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
<> 149:156823d33999 376
<> 149:156823d33999 377 .weak USB_FS_WKUP_IRQHandler
<> 149:156823d33999 378 .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
<> 149:156823d33999 379
<> 149:156823d33999 380 .weak TIM6_IRQHandler
<> 149:156823d33999 381 .thumb_set TIM6_IRQHandler,Default_Handler
<> 149:156823d33999 382
<> 149:156823d33999 383 .weak TIM7_IRQHandler
<> 149:156823d33999 384 .thumb_set TIM7_IRQHandler,Default_Handler
<> 149:156823d33999 385
<> 149:156823d33999 386 .weak TIM5_IRQHandler
<> 149:156823d33999 387 .thumb_set TIM5_IRQHandler,Default_Handler
<> 149:156823d33999 388
<> 149:156823d33999 389 .weak SPI3_IRQHandler
<> 149:156823d33999 390 .thumb_set SPI3_IRQHandler,Default_Handler
<> 149:156823d33999 391
<> 149:156823d33999 392 .weak UART4_IRQHandler
<> 149:156823d33999 393 .thumb_set UART4_IRQHandler,Default_Handler
<> 149:156823d33999 394
<> 149:156823d33999 395 .weak UART5_IRQHandler
<> 149:156823d33999 396 .thumb_set UART5_IRQHandler,Default_Handler
<> 149:156823d33999 397
<> 149:156823d33999 398 .weak DMA2_Channel1_IRQHandler
<> 149:156823d33999 399 .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
<> 149:156823d33999 400
<> 149:156823d33999 401 .weak DMA2_Channel2_IRQHandler
<> 149:156823d33999 402 .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
<> 149:156823d33999 403
<> 149:156823d33999 404 .weak DMA2_Channel3_IRQHandler
<> 149:156823d33999 405 .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
<> 149:156823d33999 406
<> 149:156823d33999 407 .weak DMA2_Channel4_IRQHandler
<> 149:156823d33999 408 .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
<> 149:156823d33999 409
<> 149:156823d33999 410 .weak DMA2_Channel5_IRQHandler
<> 149:156823d33999 411 .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
<> 149:156823d33999 412
<> 149:156823d33999 413 .weak COMP_ACQ_IRQHandler
<> 149:156823d33999 414 .thumb_set COMP_ACQ_IRQHandler,Default_Handler
<> 149:156823d33999 415
<> 149:156823d33999 416 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 149:156823d33999 417