mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_utils.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 186:707f6e361f3e
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Kojto | 158:b23ee177fd68 | 1 | /** |
Kojto | 158:b23ee177fd68 | 2 | ****************************************************************************** |
Kojto | 158:b23ee177fd68 | 3 | * @file stm32l0xx_ll_utils.c |
Kojto | 158:b23ee177fd68 | 4 | * @author MCD Application Team |
Kojto | 158:b23ee177fd68 | 5 | * @brief UTILS LL module driver. |
Kojto | 158:b23ee177fd68 | 6 | ****************************************************************************** |
Kojto | 158:b23ee177fd68 | 7 | * @attention |
Kojto | 158:b23ee177fd68 | 8 | * |
Kojto | 158:b23ee177fd68 | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
Kojto | 158:b23ee177fd68 | 10 | * |
Kojto | 158:b23ee177fd68 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
Kojto | 158:b23ee177fd68 | 12 | * are permitted provided that the following conditions are met: |
Kojto | 158:b23ee177fd68 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
Kojto | 158:b23ee177fd68 | 14 | * this list of conditions and the following disclaimer. |
Kojto | 158:b23ee177fd68 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Kojto | 158:b23ee177fd68 | 16 | * this list of conditions and the following disclaimer in the documentation |
Kojto | 158:b23ee177fd68 | 17 | * and/or other materials provided with the distribution. |
Kojto | 158:b23ee177fd68 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Kojto | 158:b23ee177fd68 | 19 | * may be used to endorse or promote products derived from this software |
Kojto | 158:b23ee177fd68 | 20 | * without specific prior written permission. |
Kojto | 158:b23ee177fd68 | 21 | * |
Kojto | 158:b23ee177fd68 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Kojto | 158:b23ee177fd68 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Kojto | 158:b23ee177fd68 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 158:b23ee177fd68 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Kojto | 158:b23ee177fd68 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Kojto | 158:b23ee177fd68 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Kojto | 158:b23ee177fd68 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Kojto | 158:b23ee177fd68 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Kojto | 158:b23ee177fd68 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Kojto | 158:b23ee177fd68 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 158:b23ee177fd68 | 32 | * |
Kojto | 158:b23ee177fd68 | 33 | ****************************************************************************** |
Kojto | 158:b23ee177fd68 | 34 | */ |
Kojto | 158:b23ee177fd68 | 35 | /* Includes ------------------------------------------------------------------*/ |
Kojto | 158:b23ee177fd68 | 36 | #include "stm32l0xx_ll_rcc.h" |
Kojto | 158:b23ee177fd68 | 37 | #include "stm32l0xx_ll_utils.h" |
Kojto | 158:b23ee177fd68 | 38 | #include "stm32l0xx_ll_system.h" |
Kojto | 158:b23ee177fd68 | 39 | #include "stm32l0xx_ll_pwr.h" |
Kojto | 158:b23ee177fd68 | 40 | #ifdef USE_FULL_ASSERT |
Kojto | 158:b23ee177fd68 | 41 | #include "stm32_assert.h" |
Kojto | 158:b23ee177fd68 | 42 | #else |
Kojto | 158:b23ee177fd68 | 43 | #define assert_param(expr) ((void)0U) |
Kojto | 158:b23ee177fd68 | 44 | #endif |
Kojto | 158:b23ee177fd68 | 45 | |
Kojto | 158:b23ee177fd68 | 46 | /** @addtogroup STM32L0xx_LL_Driver |
Kojto | 158:b23ee177fd68 | 47 | * @{ |
Kojto | 158:b23ee177fd68 | 48 | */ |
Kojto | 158:b23ee177fd68 | 49 | |
Kojto | 158:b23ee177fd68 | 50 | /** @addtogroup UTILS_LL |
Kojto | 158:b23ee177fd68 | 51 | * @{ |
Kojto | 158:b23ee177fd68 | 52 | */ |
Kojto | 158:b23ee177fd68 | 53 | |
Kojto | 158:b23ee177fd68 | 54 | /* Private types -------------------------------------------------------------*/ |
Kojto | 158:b23ee177fd68 | 55 | /* Private variables ---------------------------------------------------------*/ |
Kojto | 158:b23ee177fd68 | 56 | /* Private constants ---------------------------------------------------------*/ |
Kojto | 158:b23ee177fd68 | 57 | /** @addtogroup UTILS_LL_Private_Constants |
Kojto | 158:b23ee177fd68 | 58 | * @{ |
Kojto | 158:b23ee177fd68 | 59 | */ |
Kojto | 158:b23ee177fd68 | 60 | #define UTILS_MAX_FREQUENCY_SCALE1 ((uint32_t)32000000U) /*!< Maximum frequency for system clock at power scale1, in Hz */ |
Kojto | 158:b23ee177fd68 | 61 | #define UTILS_MAX_FREQUENCY_SCALE2 ((uint32_t)16000000U) /*!< Maximum frequency for system clock at power scale2, in Hz */ |
Kojto | 158:b23ee177fd68 | 62 | #define UTILS_MAX_FREQUENCY_SCALE3 ((uint32_t)4000000U) /*!< Maximum frequency for system clock at power scale3, in Hz */ |
Kojto | 158:b23ee177fd68 | 63 | |
Kojto | 158:b23ee177fd68 | 64 | /* Defines used for PLL range */ |
Kojto | 158:b23ee177fd68 | 65 | #define UTILS_PLLVCO_OUTPUT_SCALE1 ((uint32_t)96000000U) /*!< Frequency max for PLLVCO output at power scale1, in Hz */ |
Kojto | 158:b23ee177fd68 | 66 | #define UTILS_PLLVCO_OUTPUT_SCALE2 ((uint32_t)48000000U) /*!< Frequency max for PLLVCO output at power scale2, in Hz */ |
Kojto | 158:b23ee177fd68 | 67 | #define UTILS_PLLVCO_OUTPUT_SCALE3 ((uint32_t)24000000U) /*!< Frequency max for PLLVCO output at power scale3, in Hz */ |
Kojto | 158:b23ee177fd68 | 68 | |
Kojto | 158:b23ee177fd68 | 69 | /* Defines used for HSE range */ |
Kojto | 158:b23ee177fd68 | 70 | #define UTILS_HSE_FREQUENCY_MIN ((uint32_t)1000000U) /*!< Frequency min for HSE frequency, in Hz */ |
Kojto | 158:b23ee177fd68 | 71 | #define UTILS_HSE_FREQUENCY_MAX ((uint32_t)24000000U) /*!< Frequency max for HSE frequency, in Hz */ |
Kojto | 158:b23ee177fd68 | 72 | |
Kojto | 158:b23ee177fd68 | 73 | /* Defines used for FLASH latency according to HCLK Frequency */ |
Kojto | 158:b23ee177fd68 | 74 | #define UTILS_SCALE1_LATENCY1_FREQ ((uint32_t)16000000U) /*!< HCLK frequency to set FLASH latency 1 in power scale 1 */ |
Kojto | 158:b23ee177fd68 | 75 | #define UTILS_SCALE2_LATENCY1_FREQ ((uint32_t)8000000U) /*!< HCLK frequency to set FLASH latency 1 in power scale 2 */ |
Kojto | 158:b23ee177fd68 | 76 | #define UTILS_SCALE3_LATENCY1_FREQ ((uint32_t)2000000U) /*!< HCLK frequency to set FLASH latency 1 in power scale 3 */ |
Kojto | 158:b23ee177fd68 | 77 | /** |
Kojto | 158:b23ee177fd68 | 78 | * @} |
Kojto | 158:b23ee177fd68 | 79 | */ |
Kojto | 158:b23ee177fd68 | 80 | /* Private macros ------------------------------------------------------------*/ |
Kojto | 158:b23ee177fd68 | 81 | /** @addtogroup UTILS_LL_Private_Macros |
Kojto | 158:b23ee177fd68 | 82 | * @{ |
Kojto | 158:b23ee177fd68 | 83 | */ |
Kojto | 158:b23ee177fd68 | 84 | #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ |
Kojto | 158:b23ee177fd68 | 85 | || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ |
Kojto | 158:b23ee177fd68 | 86 | || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ |
Kojto | 158:b23ee177fd68 | 87 | || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ |
Kojto | 158:b23ee177fd68 | 88 | || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ |
Kojto | 158:b23ee177fd68 | 89 | || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ |
Kojto | 158:b23ee177fd68 | 90 | || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ |
Kojto | 158:b23ee177fd68 | 91 | || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ |
Kojto | 158:b23ee177fd68 | 92 | || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) |
Kojto | 158:b23ee177fd68 | 93 | |
Kojto | 158:b23ee177fd68 | 94 | #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ |
Kojto | 158:b23ee177fd68 | 95 | || ((__VALUE__) == LL_RCC_APB1_DIV_2) \ |
Kojto | 158:b23ee177fd68 | 96 | || ((__VALUE__) == LL_RCC_APB1_DIV_4) \ |
Kojto | 158:b23ee177fd68 | 97 | || ((__VALUE__) == LL_RCC_APB1_DIV_8) \ |
Kojto | 158:b23ee177fd68 | 98 | || ((__VALUE__) == LL_RCC_APB1_DIV_16)) |
Kojto | 158:b23ee177fd68 | 99 | |
Kojto | 158:b23ee177fd68 | 100 | #define IS_LL_UTILS_APB2_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB2_DIV_1) \ |
Kojto | 158:b23ee177fd68 | 101 | || ((__VALUE__) == LL_RCC_APB2_DIV_2) \ |
Kojto | 158:b23ee177fd68 | 102 | || ((__VALUE__) == LL_RCC_APB2_DIV_4) \ |
Kojto | 158:b23ee177fd68 | 103 | || ((__VALUE__) == LL_RCC_APB2_DIV_8) \ |
Kojto | 158:b23ee177fd68 | 104 | || ((__VALUE__) == LL_RCC_APB2_DIV_16)) |
Kojto | 158:b23ee177fd68 | 105 | |
Kojto | 158:b23ee177fd68 | 106 | #define IS_LL_UTILS_PLLMUL_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL_MUL_3) \ |
Kojto | 158:b23ee177fd68 | 107 | || ((__VALUE__) == LL_RCC_PLL_MUL_4) \ |
Kojto | 158:b23ee177fd68 | 108 | || ((__VALUE__) == LL_RCC_PLL_MUL_6) \ |
Kojto | 158:b23ee177fd68 | 109 | || ((__VALUE__) == LL_RCC_PLL_MUL_8) \ |
Kojto | 158:b23ee177fd68 | 110 | || ((__VALUE__) == LL_RCC_PLL_MUL_12) \ |
Kojto | 158:b23ee177fd68 | 111 | || ((__VALUE__) == LL_RCC_PLL_MUL_16) \ |
Kojto | 158:b23ee177fd68 | 112 | || ((__VALUE__) == LL_RCC_PLL_MUL_24) \ |
Kojto | 158:b23ee177fd68 | 113 | || ((__VALUE__) == LL_RCC_PLL_MUL_32) \ |
Kojto | 158:b23ee177fd68 | 114 | || ((__VALUE__) == LL_RCC_PLL_MUL_48)) |
Kojto | 158:b23ee177fd68 | 115 | |
Kojto | 158:b23ee177fd68 | 116 | #define IS_LL_UTILS_PLLDIV_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL_DIV_2) || ((__VALUE__) == LL_RCC_PLL_DIV_3) || \ |
Kojto | 158:b23ee177fd68 | 117 | ((__VALUE__) == LL_RCC_PLL_DIV_4)) |
Kojto | 158:b23ee177fd68 | 118 | |
Kojto | 158:b23ee177fd68 | 119 | #define IS_LL_UTILS_PLLVCO_OUTPUT(__VALUE__) ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1) ? ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_SCALE1) : \ |
Kojto | 158:b23ee177fd68 | 120 | ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE2) ? ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_SCALE2) : \ |
Kojto | 158:b23ee177fd68 | 121 | ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_SCALE3))) |
Kojto | 158:b23ee177fd68 | 122 | |
Kojto | 158:b23ee177fd68 | 123 | #define IS_LL_UTILS_PLL_FREQUENCY(__VALUE__) ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1) ? ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE1) : \ |
Kojto | 158:b23ee177fd68 | 124 | ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE2) ? ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE2) : \ |
Kojto | 158:b23ee177fd68 | 125 | ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE3))) |
Kojto | 158:b23ee177fd68 | 126 | |
Kojto | 158:b23ee177fd68 | 127 | #define IS_LL_UTILS_HSE_BYPASS(__STATE__) (((__STATE__) == LL_UTILS_HSEBYPASS_ON) \ |
Kojto | 158:b23ee177fd68 | 128 | || ((__STATE__) == LL_UTILS_HSEBYPASS_OFF)) |
Kojto | 158:b23ee177fd68 | 129 | |
Kojto | 158:b23ee177fd68 | 130 | #define IS_LL_UTILS_HSE_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) >= UTILS_HSE_FREQUENCY_MIN) && ((__FREQUENCY__) <= UTILS_HSE_FREQUENCY_MAX)) |
Kojto | 158:b23ee177fd68 | 131 | /** |
Kojto | 158:b23ee177fd68 | 132 | * @} |
Kojto | 158:b23ee177fd68 | 133 | */ |
Kojto | 158:b23ee177fd68 | 134 | /* Private function prototypes -----------------------------------------------*/ |
Kojto | 158:b23ee177fd68 | 135 | /** @defgroup UTILS_LL_Private_Functions UTILS Private functions |
Kojto | 158:b23ee177fd68 | 136 | * @{ |
Kojto | 158:b23ee177fd68 | 137 | */ |
Kojto | 158:b23ee177fd68 | 138 | static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, |
Kojto | 158:b23ee177fd68 | 139 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct); |
Kojto | 158:b23ee177fd68 | 140 | static ErrorStatus UTILS_SetFlashLatency(uint32_t Frequency); |
Kojto | 158:b23ee177fd68 | 141 | static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); |
Kojto | 158:b23ee177fd68 | 142 | static ErrorStatus UTILS_PLL_IsBusy(void); |
Kojto | 158:b23ee177fd68 | 143 | /** |
Kojto | 158:b23ee177fd68 | 144 | * @} |
Kojto | 158:b23ee177fd68 | 145 | */ |
Kojto | 158:b23ee177fd68 | 146 | |
Kojto | 158:b23ee177fd68 | 147 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 158:b23ee177fd68 | 148 | /** @addtogroup UTILS_LL_Exported_Functions |
Kojto | 158:b23ee177fd68 | 149 | * @{ |
Kojto | 158:b23ee177fd68 | 150 | */ |
Kojto | 158:b23ee177fd68 | 151 | |
Kojto | 158:b23ee177fd68 | 152 | /** @addtogroup UTILS_LL_EF_DELAY |
Kojto | 158:b23ee177fd68 | 153 | * @{ |
Kojto | 158:b23ee177fd68 | 154 | */ |
Kojto | 158:b23ee177fd68 | 155 | |
Kojto | 158:b23ee177fd68 | 156 | /** |
Kojto | 158:b23ee177fd68 | 157 | * @brief This function configures the Cortex-M SysTick source to have 1ms time base. |
Kojto | 158:b23ee177fd68 | 158 | * @note When a RTOS is used, it is recommended to avoid changing the Systick |
Kojto | 158:b23ee177fd68 | 159 | * configuration by calling this function, for a delay use rather osDelay RTOS service. |
Kojto | 158:b23ee177fd68 | 160 | * @param HCLKFrequency HCLK frequency in Hz |
Kojto | 158:b23ee177fd68 | 161 | * @note HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq |
Kojto | 158:b23ee177fd68 | 162 | * @retval None |
Kojto | 158:b23ee177fd68 | 163 | */ |
Kojto | 158:b23ee177fd68 | 164 | void LL_Init1msTick(uint32_t HCLKFrequency) |
Kojto | 158:b23ee177fd68 | 165 | { |
Kojto | 158:b23ee177fd68 | 166 | /* Use frequency provided in argument */ |
Kojto | 158:b23ee177fd68 | 167 | LL_InitTick(HCLKFrequency, 1000U); |
Kojto | 158:b23ee177fd68 | 168 | } |
Kojto | 158:b23ee177fd68 | 169 | |
Kojto | 158:b23ee177fd68 | 170 | /** |
Kojto | 158:b23ee177fd68 | 171 | * @brief This function provides accurate delay (in milliseconds) based |
Kojto | 158:b23ee177fd68 | 172 | * on SysTick counter flag |
Kojto | 158:b23ee177fd68 | 173 | * @note When a RTOS is used, it is recommended to avoid using blocking delay |
Kojto | 158:b23ee177fd68 | 174 | * and use rather osDelay service. |
Kojto | 158:b23ee177fd68 | 175 | * @note To respect 1ms timebase, user should call @ref LL_Init1msTick function which |
Kojto | 158:b23ee177fd68 | 176 | * will configure Systick to 1ms |
Kojto | 158:b23ee177fd68 | 177 | * @param Delay specifies the delay time length, in milliseconds. |
Kojto | 158:b23ee177fd68 | 178 | * @retval None |
Kojto | 158:b23ee177fd68 | 179 | */ |
Kojto | 158:b23ee177fd68 | 180 | void LL_mDelay(uint32_t Delay) |
Kojto | 158:b23ee177fd68 | 181 | { |
Kojto | 158:b23ee177fd68 | 182 | __IO uint32_t tmp = SysTick->CTRL; /* Clear the COUNTFLAG first */ |
Kojto | 158:b23ee177fd68 | 183 | /* Add this code to indicate that local variable is not used */ |
Kojto | 158:b23ee177fd68 | 184 | ((void)tmp); |
Kojto | 158:b23ee177fd68 | 185 | |
Kojto | 158:b23ee177fd68 | 186 | /* Add a period to guaranty minimum wait */ |
Kojto | 158:b23ee177fd68 | 187 | if (Delay < LL_MAX_DELAY) |
Kojto | 158:b23ee177fd68 | 188 | { |
Kojto | 158:b23ee177fd68 | 189 | Delay++; |
Kojto | 158:b23ee177fd68 | 190 | } |
Kojto | 158:b23ee177fd68 | 191 | |
Kojto | 158:b23ee177fd68 | 192 | while (Delay) |
Kojto | 158:b23ee177fd68 | 193 | { |
Kojto | 158:b23ee177fd68 | 194 | if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U) |
Kojto | 158:b23ee177fd68 | 195 | { |
Kojto | 158:b23ee177fd68 | 196 | Delay--; |
Kojto | 158:b23ee177fd68 | 197 | } |
Kojto | 158:b23ee177fd68 | 198 | } |
Kojto | 158:b23ee177fd68 | 199 | } |
Kojto | 158:b23ee177fd68 | 200 | |
Kojto | 158:b23ee177fd68 | 201 | /** |
Kojto | 158:b23ee177fd68 | 202 | * @} |
Kojto | 158:b23ee177fd68 | 203 | */ |
Kojto | 158:b23ee177fd68 | 204 | |
Kojto | 158:b23ee177fd68 | 205 | /** @addtogroup UTILS_EF_SYSTEM |
Kojto | 158:b23ee177fd68 | 206 | * @brief System Configuration functions |
Kojto | 158:b23ee177fd68 | 207 | * |
Kojto | 158:b23ee177fd68 | 208 | @verbatim |
Kojto | 158:b23ee177fd68 | 209 | =============================================================================== |
Kojto | 158:b23ee177fd68 | 210 | ##### System Configuration functions ##### |
Kojto | 158:b23ee177fd68 | 211 | =============================================================================== |
Kojto | 158:b23ee177fd68 | 212 | [..] |
Kojto | 158:b23ee177fd68 | 213 | System, AHB and APB buses clocks configuration |
Kojto | 158:b23ee177fd68 | 214 | |
Kojto | 158:b23ee177fd68 | 215 | (+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 32000000 Hz. |
Kojto | 158:b23ee177fd68 | 216 | @endverbatim |
Kojto | 158:b23ee177fd68 | 217 | @internal |
Kojto | 158:b23ee177fd68 | 218 | Depending on the device voltage range, the maximum frequency should be |
Kojto | 158:b23ee177fd68 | 219 | adapted accordingly: |
Kojto | 158:b23ee177fd68 | 220 | (++) +----------------------------------------------------------------+ |
Kojto | 158:b23ee177fd68 | 221 | (++) | Wait states | HCLK clock frequency (MHz) | |
Kojto | 158:b23ee177fd68 | 222 | (++) | |------------------------------------------------| |
Kojto | 158:b23ee177fd68 | 223 | (++) | (Latency) | voltage range | voltage range | |
Kojto | 158:b23ee177fd68 | 224 | (++) | | 1.65 V - 3.6 V | 2.0 V - 3.6 V | |
Kojto | 158:b23ee177fd68 | 225 | (++) | |----------------|---------------|---------------| |
Kojto | 158:b23ee177fd68 | 226 | (++) | | VCORE = 1.2 V | VCORE = 1.5 V | VCORE = 1.8 V | |
Kojto | 158:b23ee177fd68 | 227 | (++) |-------------- |----------------|---------------|---------------| |
Kojto | 158:b23ee177fd68 | 228 | (++) |0WS(1CPU cycle)|0 < HCLK <= 2 |0 < HCLK <= 8 |0 < HCLK <= 16 | |
Kojto | 158:b23ee177fd68 | 229 | (++) |---------------|----------------|---------------|---------------| |
Kojto | 158:b23ee177fd68 | 230 | (++) |1WS(2CPU cycle)|2 < HCLK <= 4 |8 < HCLK <= 16 |16 < HCLK <= 32| |
Kojto | 158:b23ee177fd68 | 231 | (++) +----------------------------------------------------------------+ |
Kojto | 158:b23ee177fd68 | 232 | @endinternal |
Kojto | 158:b23ee177fd68 | 233 | * @{ |
Kojto | 158:b23ee177fd68 | 234 | */ |
Kojto | 158:b23ee177fd68 | 235 | |
Kojto | 158:b23ee177fd68 | 236 | /** |
Kojto | 158:b23ee177fd68 | 237 | * @brief This function sets directly SystemCoreClock CMSIS variable. |
Kojto | 158:b23ee177fd68 | 238 | * @note Variable can be calculated also through SystemCoreClockUpdate function. |
Kojto | 158:b23ee177fd68 | 239 | * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) |
Kojto | 158:b23ee177fd68 | 240 | * @retval None |
Kojto | 158:b23ee177fd68 | 241 | */ |
Kojto | 158:b23ee177fd68 | 242 | void LL_SetSystemCoreClock(uint32_t HCLKFrequency) |
Kojto | 158:b23ee177fd68 | 243 | { |
Kojto | 158:b23ee177fd68 | 244 | /* HCLK clock frequency */ |
Kojto | 158:b23ee177fd68 | 245 | SystemCoreClock = HCLKFrequency; |
Kojto | 158:b23ee177fd68 | 246 | } |
Kojto | 158:b23ee177fd68 | 247 | |
Kojto | 158:b23ee177fd68 | 248 | /** |
Kojto | 158:b23ee177fd68 | 249 | * @brief This function configures system clock with HSI as clock source of the PLL |
Kojto | 158:b23ee177fd68 | 250 | * @note The application need to ensure that PLL is disabled. |
Kojto | 158:b23ee177fd68 | 251 | * @note Function is based on the following formula: |
Kojto | 158:b23ee177fd68 | 252 | * - PLL output frequency = ((HSI frequency * PLLMul) / PLLDiv) |
Kojto | 158:b23ee177fd68 | 253 | * - PLLMul: The application software must set correctly the PLL multiplication factor to avoid exceeding |
Kojto | 158:b23ee177fd68 | 254 | * - 96 MHz as PLLVCO when the product is in range 1, |
Kojto | 158:b23ee177fd68 | 255 | * - 48 MHz as PLLVCO when the product is in range 2, |
Kojto | 158:b23ee177fd68 | 256 | * - 24 MHz when the product is in range 3 |
Kojto | 158:b23ee177fd68 | 257 | * @note FLASH latency can be modified through this function. |
Kojto | 158:b23ee177fd68 | 258 | * @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains |
Kojto | 158:b23ee177fd68 | 259 | * the configuration information for the PLL. |
Kojto | 158:b23ee177fd68 | 260 | * @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains |
Kojto | 158:b23ee177fd68 | 261 | * the configuration information for the BUS prescalers. |
Kojto | 158:b23ee177fd68 | 262 | * @retval An ErrorStatus enumeration value: |
Kojto | 158:b23ee177fd68 | 263 | * - SUCCESS: Max frequency configuration done |
Kojto | 158:b23ee177fd68 | 264 | * - ERROR: Max frequency configuration not done |
Kojto | 158:b23ee177fd68 | 265 | */ |
Kojto | 158:b23ee177fd68 | 266 | ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, |
Kojto | 158:b23ee177fd68 | 267 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct) |
Kojto | 158:b23ee177fd68 | 268 | { |
Kojto | 158:b23ee177fd68 | 269 | ErrorStatus status = SUCCESS; |
Kojto | 158:b23ee177fd68 | 270 | uint32_t pllfreq = 0U; |
Kojto | 158:b23ee177fd68 | 271 | |
Kojto | 158:b23ee177fd68 | 272 | /* Check if one of the PLL is enabled */ |
Kojto | 158:b23ee177fd68 | 273 | if (UTILS_PLL_IsBusy() == SUCCESS) |
Kojto | 158:b23ee177fd68 | 274 | { |
Kojto | 158:b23ee177fd68 | 275 | /* Calculate the new PLL output frequency */ |
Kojto | 158:b23ee177fd68 | 276 | pllfreq = UTILS_GetPLLOutputFrequency(HSI_VALUE, UTILS_PLLInitStruct); |
Kojto | 158:b23ee177fd68 | 277 | |
Kojto | 158:b23ee177fd68 | 278 | /* Enable HSI if not enabled */ |
Kojto | 158:b23ee177fd68 | 279 | if (LL_RCC_HSI_IsReady() != 1U) |
Kojto | 158:b23ee177fd68 | 280 | { |
Kojto | 158:b23ee177fd68 | 281 | LL_RCC_HSI_Enable(); |
Kojto | 158:b23ee177fd68 | 282 | while (LL_RCC_HSI_IsReady() != 1U) |
Kojto | 158:b23ee177fd68 | 283 | { |
Kojto | 158:b23ee177fd68 | 284 | /* Wait for HSI ready */ |
Kojto | 158:b23ee177fd68 | 285 | } |
Kojto | 158:b23ee177fd68 | 286 | } |
Kojto | 158:b23ee177fd68 | 287 | |
Kojto | 158:b23ee177fd68 | 288 | /* Configure PLL */ |
Kojto | 158:b23ee177fd68 | 289 | LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv); |
Kojto | 158:b23ee177fd68 | 290 | |
Kojto | 158:b23ee177fd68 | 291 | /* Enable PLL and switch system clock to PLL */ |
Kojto | 158:b23ee177fd68 | 292 | status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct); |
Kojto | 158:b23ee177fd68 | 293 | } |
Kojto | 158:b23ee177fd68 | 294 | else |
Kojto | 158:b23ee177fd68 | 295 | { |
Kojto | 158:b23ee177fd68 | 296 | /* Current PLL configuration cannot be modified */ |
Kojto | 158:b23ee177fd68 | 297 | status = ERROR; |
Kojto | 158:b23ee177fd68 | 298 | } |
Kojto | 158:b23ee177fd68 | 299 | |
Kojto | 158:b23ee177fd68 | 300 | return status; |
Kojto | 158:b23ee177fd68 | 301 | } |
Kojto | 158:b23ee177fd68 | 302 | |
Kojto | 158:b23ee177fd68 | 303 | /** |
Kojto | 158:b23ee177fd68 | 304 | * @brief This function configures system clock with HSE as clock source of the PLL |
Kojto | 158:b23ee177fd68 | 305 | * @note The application need to ensure that PLL is disabled. |
Kojto | 158:b23ee177fd68 | 306 | * @note Function is based on the following formula: |
Kojto | 158:b23ee177fd68 | 307 | * - PLL output frequency = ((HSE frequency * PLLMul) / PLLDiv) |
Kojto | 158:b23ee177fd68 | 308 | * - PLLMul: The application software must set correctly the PLL multiplication factor to avoid exceeding |
Kojto | 158:b23ee177fd68 | 309 | * - 96 MHz as PLLVCO when the product is in range 1, |
Kojto | 158:b23ee177fd68 | 310 | * - 48 MHz as PLLVCO when the product is in range 2, |
Kojto | 158:b23ee177fd68 | 311 | * - 24 MHz when the product is in range 3 |
Kojto | 158:b23ee177fd68 | 312 | * @note FLASH latency can be modified through this function. |
Kojto | 158:b23ee177fd68 | 313 | * @param HSEFrequency Value between Min_Data = 1000000 and Max_Data = 24000000 |
Kojto | 158:b23ee177fd68 | 314 | * @param HSEBypass This parameter can be one of the following values: |
Kojto | 158:b23ee177fd68 | 315 | * @arg @ref LL_UTILS_HSEBYPASS_ON |
Kojto | 158:b23ee177fd68 | 316 | * @arg @ref LL_UTILS_HSEBYPASS_OFF |
Kojto | 158:b23ee177fd68 | 317 | * @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains |
Kojto | 158:b23ee177fd68 | 318 | * the configuration information for the PLL. |
Kojto | 158:b23ee177fd68 | 319 | * @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains |
Kojto | 158:b23ee177fd68 | 320 | * the configuration information for the BUS prescalers. |
Kojto | 158:b23ee177fd68 | 321 | * @retval An ErrorStatus enumeration value: |
Kojto | 158:b23ee177fd68 | 322 | * - SUCCESS: Max frequency configuration done |
Kojto | 158:b23ee177fd68 | 323 | * - ERROR: Max frequency configuration not done |
Kojto | 158:b23ee177fd68 | 324 | */ |
Kojto | 158:b23ee177fd68 | 325 | ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, |
Kojto | 158:b23ee177fd68 | 326 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct) |
Kojto | 158:b23ee177fd68 | 327 | { |
Kojto | 158:b23ee177fd68 | 328 | ErrorStatus status = SUCCESS; |
Kojto | 158:b23ee177fd68 | 329 | uint32_t pllfreq = 0U; |
Kojto | 158:b23ee177fd68 | 330 | |
Kojto | 158:b23ee177fd68 | 331 | /* Check the parameters */ |
Kojto | 158:b23ee177fd68 | 332 | assert_param(IS_LL_UTILS_HSE_FREQUENCY(HSEFrequency)); |
Kojto | 158:b23ee177fd68 | 333 | assert_param(IS_LL_UTILS_HSE_BYPASS(HSEBypass)); |
Kojto | 158:b23ee177fd68 | 334 | |
Kojto | 158:b23ee177fd68 | 335 | /* Check if one of the PLL is enabled */ |
Kojto | 158:b23ee177fd68 | 336 | if (UTILS_PLL_IsBusy() == SUCCESS) |
Kojto | 158:b23ee177fd68 | 337 | { |
Kojto | 158:b23ee177fd68 | 338 | /* Calculate the new PLL output frequency */ |
Kojto | 158:b23ee177fd68 | 339 | pllfreq = UTILS_GetPLLOutputFrequency(HSEFrequency, UTILS_PLLInitStruct); |
Kojto | 158:b23ee177fd68 | 340 | |
Kojto | 158:b23ee177fd68 | 341 | /* Enable HSE if not enabled */ |
Kojto | 158:b23ee177fd68 | 342 | if (LL_RCC_HSE_IsReady() != 1U) |
Kojto | 158:b23ee177fd68 | 343 | { |
Kojto | 158:b23ee177fd68 | 344 | /* Check if need to enable HSE bypass feature or not */ |
Kojto | 158:b23ee177fd68 | 345 | if (HSEBypass == LL_UTILS_HSEBYPASS_ON) |
Kojto | 158:b23ee177fd68 | 346 | { |
Kojto | 158:b23ee177fd68 | 347 | LL_RCC_HSE_EnableBypass(); |
Kojto | 158:b23ee177fd68 | 348 | } |
Kojto | 158:b23ee177fd68 | 349 | else |
Kojto | 158:b23ee177fd68 | 350 | { |
Kojto | 158:b23ee177fd68 | 351 | LL_RCC_HSE_DisableBypass(); |
Kojto | 158:b23ee177fd68 | 352 | } |
Kojto | 158:b23ee177fd68 | 353 | |
Kojto | 158:b23ee177fd68 | 354 | /* Enable HSE */ |
Kojto | 158:b23ee177fd68 | 355 | LL_RCC_HSE_Enable(); |
Kojto | 158:b23ee177fd68 | 356 | while (LL_RCC_HSE_IsReady() != 1U) |
Kojto | 158:b23ee177fd68 | 357 | { |
Kojto | 158:b23ee177fd68 | 358 | /* Wait for HSE ready */ |
Kojto | 158:b23ee177fd68 | 359 | } |
Kojto | 158:b23ee177fd68 | 360 | } |
Kojto | 158:b23ee177fd68 | 361 | |
Kojto | 158:b23ee177fd68 | 362 | /* Configure PLL */ |
Kojto | 158:b23ee177fd68 | 363 | LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv); |
Kojto | 158:b23ee177fd68 | 364 | |
Kojto | 158:b23ee177fd68 | 365 | /* Enable PLL and switch system clock to PLL */ |
Kojto | 158:b23ee177fd68 | 366 | status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct); |
Kojto | 158:b23ee177fd68 | 367 | } |
Kojto | 158:b23ee177fd68 | 368 | else |
Kojto | 158:b23ee177fd68 | 369 | { |
Kojto | 158:b23ee177fd68 | 370 | /* Current PLL configuration cannot be modified */ |
Kojto | 158:b23ee177fd68 | 371 | status = ERROR; |
Kojto | 158:b23ee177fd68 | 372 | } |
Kojto | 158:b23ee177fd68 | 373 | |
Kojto | 158:b23ee177fd68 | 374 | return status; |
Kojto | 158:b23ee177fd68 | 375 | } |
Kojto | 158:b23ee177fd68 | 376 | |
Kojto | 158:b23ee177fd68 | 377 | /** |
Kojto | 158:b23ee177fd68 | 378 | * @} |
Kojto | 158:b23ee177fd68 | 379 | */ |
Kojto | 158:b23ee177fd68 | 380 | |
Kojto | 158:b23ee177fd68 | 381 | /** |
Kojto | 158:b23ee177fd68 | 382 | * @} |
Kojto | 158:b23ee177fd68 | 383 | */ |
Kojto | 158:b23ee177fd68 | 384 | |
Kojto | 158:b23ee177fd68 | 385 | /** @addtogroup UTILS_LL_Private_Functions |
Kojto | 158:b23ee177fd68 | 386 | * @{ |
Kojto | 158:b23ee177fd68 | 387 | */ |
Kojto | 158:b23ee177fd68 | 388 | /** |
Kojto | 158:b23ee177fd68 | 389 | * @brief Update number of Flash wait states in line with new frequency and current |
Kojto | 158:b23ee177fd68 | 390 | voltage range. |
Kojto | 158:b23ee177fd68 | 391 | * @param Frequency HCLK frequency |
Kojto | 158:b23ee177fd68 | 392 | * @retval An ErrorStatus enumeration value: |
Kojto | 158:b23ee177fd68 | 393 | * - SUCCESS: Latency has been modified |
Kojto | 158:b23ee177fd68 | 394 | * - ERROR: Latency cannot be modified |
Kojto | 158:b23ee177fd68 | 395 | */ |
Kojto | 158:b23ee177fd68 | 396 | static ErrorStatus UTILS_SetFlashLatency(uint32_t Frequency) |
Kojto | 158:b23ee177fd68 | 397 | { |
Kojto | 158:b23ee177fd68 | 398 | ErrorStatus status = SUCCESS; |
Kojto | 158:b23ee177fd68 | 399 | |
Kojto | 158:b23ee177fd68 | 400 | uint32_t latency = LL_FLASH_LATENCY_0; /* default value 0WS */ |
Kojto | 158:b23ee177fd68 | 401 | |
Kojto | 158:b23ee177fd68 | 402 | /* Frequency cannot be equal to 0 */ |
Kojto | 158:b23ee177fd68 | 403 | if (Frequency == 0U) |
Kojto | 158:b23ee177fd68 | 404 | { |
Kojto | 158:b23ee177fd68 | 405 | status = ERROR; |
Kojto | 158:b23ee177fd68 | 406 | } |
Kojto | 158:b23ee177fd68 | 407 | else |
Kojto | 158:b23ee177fd68 | 408 | { |
Kojto | 158:b23ee177fd68 | 409 | if (LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1) |
Kojto | 158:b23ee177fd68 | 410 | { |
Kojto | 158:b23ee177fd68 | 411 | if (Frequency > UTILS_SCALE1_LATENCY1_FREQ) |
Kojto | 158:b23ee177fd68 | 412 | { |
Kojto | 158:b23ee177fd68 | 413 | /* 16 < HCLK <= 32 => 1WS (2 CPU cycles) */ |
Kojto | 158:b23ee177fd68 | 414 | latency = LL_FLASH_LATENCY_1; |
Kojto | 158:b23ee177fd68 | 415 | } |
Kojto | 158:b23ee177fd68 | 416 | /* else HCLK < 16MHz default LL_FLASH_LATENCY_0 0WS */ |
Kojto | 158:b23ee177fd68 | 417 | } |
Kojto | 158:b23ee177fd68 | 418 | else if (LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE2) |
Kojto | 158:b23ee177fd68 | 419 | { |
Kojto | 158:b23ee177fd68 | 420 | if (Frequency > UTILS_SCALE2_LATENCY1_FREQ) |
Kojto | 158:b23ee177fd68 | 421 | { |
Kojto | 158:b23ee177fd68 | 422 | /* 8 < HCLK <= 16 => 1WS (2 CPU cycles) */ |
Kojto | 158:b23ee177fd68 | 423 | latency = LL_FLASH_LATENCY_1; |
Kojto | 158:b23ee177fd68 | 424 | } |
Kojto | 158:b23ee177fd68 | 425 | /* else HCLK < 8MHz default LL_FLASH_LATENCY_0 0WS */ |
Kojto | 158:b23ee177fd68 | 426 | } |
Kojto | 158:b23ee177fd68 | 427 | else |
Kojto | 158:b23ee177fd68 | 428 | { |
Kojto | 158:b23ee177fd68 | 429 | if (Frequency > UTILS_SCALE3_LATENCY1_FREQ) |
Kojto | 158:b23ee177fd68 | 430 | { |
Kojto | 158:b23ee177fd68 | 431 | /* 2 < HCLK <= 4 => 1WS (2 CPU cycles) */ |
Kojto | 158:b23ee177fd68 | 432 | latency = LL_FLASH_LATENCY_1; |
Kojto | 158:b23ee177fd68 | 433 | } |
Kojto | 158:b23ee177fd68 | 434 | /* else HCLK < 4MHz default LL_FLASH_LATENCY_0 0WS */ |
Kojto | 158:b23ee177fd68 | 435 | } |
Kojto | 158:b23ee177fd68 | 436 | |
Kojto | 158:b23ee177fd68 | 437 | LL_FLASH_SetLatency(latency); |
Kojto | 158:b23ee177fd68 | 438 | |
Kojto | 158:b23ee177fd68 | 439 | /* Check that the new number of wait states is taken into account to access the Flash |
Kojto | 158:b23ee177fd68 | 440 | memory by reading the FLASH_ACR register */ |
Kojto | 158:b23ee177fd68 | 441 | if (LL_FLASH_GetLatency() != latency) |
Kojto | 158:b23ee177fd68 | 442 | { |
Kojto | 158:b23ee177fd68 | 443 | status = ERROR; |
Kojto | 158:b23ee177fd68 | 444 | } |
Kojto | 158:b23ee177fd68 | 445 | } |
Kojto | 158:b23ee177fd68 | 446 | return status; |
Kojto | 158:b23ee177fd68 | 447 | } |
Kojto | 158:b23ee177fd68 | 448 | |
Kojto | 158:b23ee177fd68 | 449 | /** |
Kojto | 158:b23ee177fd68 | 450 | * @brief Function to check that PLL can be modified |
Kojto | 158:b23ee177fd68 | 451 | * @param PLL_InputFrequency PLL input frequency (in Hz) |
Kojto | 158:b23ee177fd68 | 452 | * @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains |
Kojto | 158:b23ee177fd68 | 453 | * the configuration information for the PLL. |
Kojto | 158:b23ee177fd68 | 454 | * @retval PLL output frequency (in Hz) |
Kojto | 158:b23ee177fd68 | 455 | */ |
Kojto | 158:b23ee177fd68 | 456 | static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct) |
Kojto | 158:b23ee177fd68 | 457 | { |
Kojto | 158:b23ee177fd68 | 458 | uint32_t pllfreq = 0U; |
Kojto | 158:b23ee177fd68 | 459 | |
Kojto | 158:b23ee177fd68 | 460 | /* Check the parameters */ |
Kojto | 158:b23ee177fd68 | 461 | assert_param(IS_LL_UTILS_PLLMUL_VALUE(UTILS_PLLInitStruct->PLLMul)); |
Kojto | 158:b23ee177fd68 | 462 | assert_param(IS_LL_UTILS_PLLDIV_VALUE(UTILS_PLLInitStruct->PLLDiv)); |
Kojto | 158:b23ee177fd68 | 463 | |
Kojto | 158:b23ee177fd68 | 464 | /* Check different PLL parameters according to RM */ |
Kojto | 158:b23ee177fd68 | 465 | /* The application software must set correctly the PLL multiplication factor to avoid exceeding |
Kojto | 158:b23ee177fd68 | 466 | 96 MHz as PLLVCO when the product is in range 1, |
Kojto | 158:b23ee177fd68 | 467 | 48 MHz as PLLVCO when the product is in range 2, |
Kojto | 158:b23ee177fd68 | 468 | 24 MHz when the product is in range 3. */ |
Kojto | 158:b23ee177fd68 | 469 | pllfreq = PLL_InputFrequency * (PLLMulTable[UTILS_PLLInitStruct->PLLMul >> RCC_POSITION_PLLMUL]); |
Kojto | 158:b23ee177fd68 | 470 | assert_param(IS_LL_UTILS_PLLVCO_OUTPUT(pllfreq)); |
Kojto | 158:b23ee177fd68 | 471 | |
Kojto | 158:b23ee177fd68 | 472 | /* The application software must set correctly the PLL multiplication factor to avoid exceeding |
Kojto | 158:b23ee177fd68 | 473 | maximum frequency 32000000 in range 1 */ |
Kojto | 158:b23ee177fd68 | 474 | pllfreq = pllfreq / ((UTILS_PLLInitStruct->PLLDiv >> RCC_POSITION_PLLDIV)+1U); |
Kojto | 158:b23ee177fd68 | 475 | assert_param(IS_LL_UTILS_PLL_FREQUENCY(pllfreq)); |
Kojto | 158:b23ee177fd68 | 476 | |
Kojto | 158:b23ee177fd68 | 477 | return pllfreq; |
Kojto | 158:b23ee177fd68 | 478 | } |
Kojto | 158:b23ee177fd68 | 479 | |
Kojto | 158:b23ee177fd68 | 480 | /** |
Kojto | 158:b23ee177fd68 | 481 | * @brief Function to check that PLL can be modified |
Kojto | 158:b23ee177fd68 | 482 | * @retval An ErrorStatus enumeration value: |
Kojto | 158:b23ee177fd68 | 483 | * - SUCCESS: PLL modification can be done |
Kojto | 158:b23ee177fd68 | 484 | * - ERROR: PLL is busy |
Kojto | 158:b23ee177fd68 | 485 | */ |
Kojto | 158:b23ee177fd68 | 486 | static ErrorStatus UTILS_PLL_IsBusy(void) |
Kojto | 158:b23ee177fd68 | 487 | { |
Kojto | 158:b23ee177fd68 | 488 | ErrorStatus status = SUCCESS; |
Kojto | 158:b23ee177fd68 | 489 | |
Kojto | 158:b23ee177fd68 | 490 | /* Check if PLL is busy*/ |
Kojto | 158:b23ee177fd68 | 491 | if (LL_RCC_PLL_IsReady() != 0U) |
Kojto | 158:b23ee177fd68 | 492 | { |
Kojto | 158:b23ee177fd68 | 493 | /* PLL configuration cannot be modified */ |
Kojto | 158:b23ee177fd68 | 494 | status = ERROR; |
Kojto | 158:b23ee177fd68 | 495 | } |
Kojto | 158:b23ee177fd68 | 496 | |
Kojto | 158:b23ee177fd68 | 497 | |
Kojto | 158:b23ee177fd68 | 498 | return status; |
Kojto | 158:b23ee177fd68 | 499 | } |
Kojto | 158:b23ee177fd68 | 500 | |
Kojto | 158:b23ee177fd68 | 501 | /** |
Kojto | 158:b23ee177fd68 | 502 | * @brief Function to enable PLL and switch system clock to PLL |
Kojto | 158:b23ee177fd68 | 503 | * @param SYSCLK_Frequency SYSCLK frequency |
Kojto | 158:b23ee177fd68 | 504 | * @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains |
Kojto | 158:b23ee177fd68 | 505 | * the configuration information for the BUS prescalers. |
Kojto | 158:b23ee177fd68 | 506 | * @retval An ErrorStatus enumeration value: |
Kojto | 158:b23ee177fd68 | 507 | * - SUCCESS: No problem to switch system to PLL |
Kojto | 158:b23ee177fd68 | 508 | * - ERROR: Problem to switch system to PLL |
Kojto | 158:b23ee177fd68 | 509 | */ |
Kojto | 158:b23ee177fd68 | 510 | static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct) |
Kojto | 158:b23ee177fd68 | 511 | { |
Kojto | 158:b23ee177fd68 | 512 | ErrorStatus status = SUCCESS; |
Kojto | 158:b23ee177fd68 | 513 | uint32_t hclk_frequency = 0U; |
Kojto | 158:b23ee177fd68 | 514 | |
Kojto | 158:b23ee177fd68 | 515 | assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); |
Kojto | 158:b23ee177fd68 | 516 | assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); |
Kojto | 158:b23ee177fd68 | 517 | assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); |
Kojto | 158:b23ee177fd68 | 518 | |
Kojto | 158:b23ee177fd68 | 519 | /* Calculate HCLK frequency */ |
Kojto | 158:b23ee177fd68 | 520 | hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); |
Kojto | 158:b23ee177fd68 | 521 | |
Kojto | 158:b23ee177fd68 | 522 | /* Increasing the number of wait states because of higher CPU frequency */ |
Kojto | 158:b23ee177fd68 | 523 | if (SystemCoreClock < hclk_frequency) |
Kojto | 158:b23ee177fd68 | 524 | { |
Kojto | 158:b23ee177fd68 | 525 | /* Set FLASH latency to highest latency */ |
Kojto | 158:b23ee177fd68 | 526 | status = UTILS_SetFlashLatency(hclk_frequency); |
Kojto | 158:b23ee177fd68 | 527 | } |
Kojto | 158:b23ee177fd68 | 528 | |
Kojto | 158:b23ee177fd68 | 529 | /* Update system clock configuration */ |
Kojto | 158:b23ee177fd68 | 530 | if (status == SUCCESS) |
Kojto | 158:b23ee177fd68 | 531 | { |
Kojto | 158:b23ee177fd68 | 532 | /* Enable PLL */ |
Kojto | 158:b23ee177fd68 | 533 | LL_RCC_PLL_Enable(); |
Kojto | 158:b23ee177fd68 | 534 | while (LL_RCC_PLL_IsReady() != 1U) |
Kojto | 158:b23ee177fd68 | 535 | { |
Kojto | 158:b23ee177fd68 | 536 | /* Wait for PLL ready */ |
Kojto | 158:b23ee177fd68 | 537 | } |
Kojto | 158:b23ee177fd68 | 538 | |
Kojto | 158:b23ee177fd68 | 539 | /* Sysclk activation on the main PLL */ |
Kojto | 158:b23ee177fd68 | 540 | LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); |
Kojto | 158:b23ee177fd68 | 541 | LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); |
Kojto | 158:b23ee177fd68 | 542 | while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) |
Kojto | 158:b23ee177fd68 | 543 | { |
Kojto | 158:b23ee177fd68 | 544 | /* Wait for system clock switch to PLL */ |
Kojto | 158:b23ee177fd68 | 545 | } |
Kojto | 158:b23ee177fd68 | 546 | |
Kojto | 158:b23ee177fd68 | 547 | /* Set APB1 & APB2 prescaler*/ |
Kojto | 158:b23ee177fd68 | 548 | LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); |
Kojto | 158:b23ee177fd68 | 549 | LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); |
Kojto | 158:b23ee177fd68 | 550 | } |
Kojto | 158:b23ee177fd68 | 551 | |
Kojto | 158:b23ee177fd68 | 552 | /* Decreasing the number of wait states because of lower CPU frequency */ |
Kojto | 158:b23ee177fd68 | 553 | if (SystemCoreClock > hclk_frequency) |
Kojto | 158:b23ee177fd68 | 554 | { |
Kojto | 158:b23ee177fd68 | 555 | /* Set FLASH latency to lowest latency */ |
Kojto | 158:b23ee177fd68 | 556 | status = UTILS_SetFlashLatency(hclk_frequency); |
Kojto | 158:b23ee177fd68 | 557 | } |
Kojto | 158:b23ee177fd68 | 558 | |
Kojto | 158:b23ee177fd68 | 559 | /* Update SystemCoreClock variable */ |
Kojto | 158:b23ee177fd68 | 560 | if (status == SUCCESS) |
Kojto | 158:b23ee177fd68 | 561 | { |
Kojto | 158:b23ee177fd68 | 562 | LL_SetSystemCoreClock(hclk_frequency); |
Kojto | 158:b23ee177fd68 | 563 | } |
Kojto | 158:b23ee177fd68 | 564 | |
Kojto | 158:b23ee177fd68 | 565 | return status; |
Kojto | 158:b23ee177fd68 | 566 | } |
Kojto | 158:b23ee177fd68 | 567 | |
Kojto | 158:b23ee177fd68 | 568 | /** |
Kojto | 158:b23ee177fd68 | 569 | * @} |
Kojto | 158:b23ee177fd68 | 570 | */ |
Kojto | 158:b23ee177fd68 | 571 | |
Kojto | 158:b23ee177fd68 | 572 | /** |
Kojto | 158:b23ee177fd68 | 573 | * @} |
Kojto | 158:b23ee177fd68 | 574 | */ |
Kojto | 158:b23ee177fd68 | 575 | |
Kojto | 158:b23ee177fd68 | 576 | /** |
Kojto | 158:b23ee177fd68 | 577 | * @} |
Kojto | 158:b23ee177fd68 | 578 | */ |
Kojto | 158:b23ee177fd68 | 579 | |
Kojto | 158:b23ee177fd68 | 580 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |