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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_rcc.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 186:707f6e361f3e

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	158:b23ee177fd68	1	/**
Kojto	158:b23ee177fd68	2	******************************************************************************
Kojto	158:b23ee177fd68	3	* @file stm32l0xx_ll_rcc.h
Kojto	158:b23ee177fd68	4	* @author MCD Application Team
Kojto	158:b23ee177fd68	5	* @brief Header file of RCC LL module.
Kojto	158:b23ee177fd68	6	******************************************************************************
Kojto	158:b23ee177fd68	7	* @attention
Kojto	158:b23ee177fd68	8	*
Kojto	158:b23ee177fd68	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	158:b23ee177fd68	10	*
Kojto	158:b23ee177fd68	11	* Redistribution and use in source and binary forms, with or without modification,
Kojto	158:b23ee177fd68	12	* are permitted provided that the following conditions are met:
Kojto	158:b23ee177fd68	13	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	158:b23ee177fd68	14	* this list of conditions and the following disclaimer.
Kojto	158:b23ee177fd68	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	158:b23ee177fd68	16	* this list of conditions and the following disclaimer in the documentation
Kojto	158:b23ee177fd68	17	* and/or other materials provided with the distribution.
Kojto	158:b23ee177fd68	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	158:b23ee177fd68	19	* may be used to endorse or promote products derived from this software
Kojto	158:b23ee177fd68	20	* without specific prior written permission.
Kojto	158:b23ee177fd68	21	*
Kojto	158:b23ee177fd68	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	158:b23ee177fd68	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	158:b23ee177fd68	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	158:b23ee177fd68	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	158:b23ee177fd68	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	158:b23ee177fd68	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	158:b23ee177fd68	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	158:b23ee177fd68	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	158:b23ee177fd68	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	158:b23ee177fd68	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	158:b23ee177fd68	32	*
Kojto	158:b23ee177fd68	33	******************************************************************************
Kojto	158:b23ee177fd68	34	*/
Kojto	158:b23ee177fd68	35
Kojto	158:b23ee177fd68	36	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	158:b23ee177fd68	37	#ifndef __STM32L0xx_LL_RCC_H
Kojto	158:b23ee177fd68	38	#define __STM32L0xx_LL_RCC_H
Kojto	158:b23ee177fd68	39
Kojto	158:b23ee177fd68	40	#ifdef __cplusplus
Kojto	158:b23ee177fd68	41	extern "C" {
Kojto	158:b23ee177fd68	42	#endif
Kojto	158:b23ee177fd68	43
Kojto	158:b23ee177fd68	44	/* Includes ------------------------------------------------------------------*/
Kojto	158:b23ee177fd68	45	#include "stm32l0xx.h"
Kojto	158:b23ee177fd68	46
Kojto	158:b23ee177fd68	47	/** @addtogroup STM32L0xx_LL_Driver
Kojto	158:b23ee177fd68	48	* @{
Kojto	158:b23ee177fd68	49	*/
Kojto	158:b23ee177fd68	50
Kojto	158:b23ee177fd68	51	#if defined(RCC)
Kojto	158:b23ee177fd68	52
Kojto	158:b23ee177fd68	53	/** @defgroup RCC_LL RCC
Kojto	158:b23ee177fd68	54	* @{
Kojto	158:b23ee177fd68	55	*/
Kojto	158:b23ee177fd68	56
Kojto	158:b23ee177fd68	57	/* Private types -------------------------------------------------------------*/
Kojto	158:b23ee177fd68	58	/* Private variables ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	59	/** @defgroup RCC_LL_Private_Variables RCC Private Variables
Kojto	158:b23ee177fd68	60	* @{
Kojto	158:b23ee177fd68	61	*/
Kojto	158:b23ee177fd68	62
Kojto	158:b23ee177fd68	63	/**
Kojto	158:b23ee177fd68	64	* @}
Kojto	158:b23ee177fd68	65	*/
Kojto	158:b23ee177fd68	66
Kojto	158:b23ee177fd68	67	/* Private constants ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	68	/** @defgroup RCC_LL_Private_Constants RCC Private Constants
Kojto	158:b23ee177fd68	69	* @{
Kojto	158:b23ee177fd68	70	*/
Kojto	158:b23ee177fd68	71	/* Defines used for the bit position in the register and perform offsets*/
Kojto	158:b23ee177fd68	72	#define RCC_POSITION_HPRE (uint32_t)4U /!< field position in register RCC_CFGR /
Kojto	158:b23ee177fd68	73	#define RCC_POSITION_PPRE1 (uint32_t)8U /!< field position in register RCC_CFGR /
Kojto	158:b23ee177fd68	74	#define RCC_POSITION_PPRE2 (uint32_t)11U /!< field position in register RCC_CFGR /
Kojto	158:b23ee177fd68	75	#define RCC_POSITION_PLLDIV (uint32_t)22U /!< field position in register RCC_CFGR /
Kojto	158:b23ee177fd68	76	#define RCC_POSITION_PLLMUL (uint32_t)18U /!< field position in register RCC_CFGR /
Kojto	158:b23ee177fd68	77	#define RCC_POSITION_HSICAL (uint32_t)0U /!< field position in register RCC_ICSCR /
Kojto	158:b23ee177fd68	78	#define RCC_POSITION_HSITRIM (uint32_t)8U /!< field position in register RCC_ICSCR /
Kojto	158:b23ee177fd68	79	#define RCC_POSITION_MSIRANGE (uint32_t)13U /!< field position in register RCC_ICSCR /
Kojto	158:b23ee177fd68	80	#define RCC_POSITION_MSICAL (uint32_t)16U /!< field position in register RCC_ICSCR /
Kojto	158:b23ee177fd68	81	#define RCC_POSITION_MSITRIM (uint32_t)24U /!< field position in register RCC_ICSCR /
Kojto	158:b23ee177fd68	82	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	83	#define RCC_POSITION_HSI48CAL (uint32_t)8U /!< field position in register RCC_CRRCR /
Kojto	158:b23ee177fd68	84	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	85
Kojto	158:b23ee177fd68	86	/**
Kojto	158:b23ee177fd68	87	* @}
Kojto	158:b23ee177fd68	88	*/
Kojto	158:b23ee177fd68	89
Kojto	158:b23ee177fd68	90	/* Private macros ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	91	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	92	/** @defgroup RCC_LL_Private_Macros RCC Private Macros
Kojto	158:b23ee177fd68	93	* @{
Kojto	158:b23ee177fd68	94	*/
Kojto	158:b23ee177fd68	95	/**
Kojto	158:b23ee177fd68	96	* @}
Kojto	158:b23ee177fd68	97	*/
Kojto	158:b23ee177fd68	98	#endif /USE_FULL_LL_DRIVER/
Kojto	158:b23ee177fd68	99	/* Exported types ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	100	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	101	/** @defgroup RCC_LL_Exported_Types RCC Exported Types
Kojto	158:b23ee177fd68	102	* @{
Kojto	158:b23ee177fd68	103	*/
Kojto	158:b23ee177fd68	104
Kojto	158:b23ee177fd68	105	/** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
Kojto	158:b23ee177fd68	106	* @{
Kojto	158:b23ee177fd68	107	*/
Kojto	158:b23ee177fd68	108
Kojto	158:b23ee177fd68	109	/**
Kojto	158:b23ee177fd68	110	* @brief RCC Clocks Frequency Structure
Kojto	158:b23ee177fd68	111	*/
Kojto	158:b23ee177fd68	112	typedef struct
Kojto	158:b23ee177fd68	113	{
Kojto	158:b23ee177fd68	114	uint32_t SYSCLK_Frequency; /!< SYSCLK clock frequency /
Kojto	158:b23ee177fd68	115	uint32_t HCLK_Frequency; /!< HCLK clock frequency /
Kojto	158:b23ee177fd68	116	uint32_t PCLK1_Frequency; /!< PCLK1 clock frequency /
Kojto	158:b23ee177fd68	117	uint32_t PCLK2_Frequency; /!< PCLK2 clock frequency /
Kojto	158:b23ee177fd68	118	} LL_RCC_ClocksTypeDef;
Kojto	158:b23ee177fd68	119
Kojto	158:b23ee177fd68	120	/**
Kojto	158:b23ee177fd68	121	* @}
Kojto	158:b23ee177fd68	122	*/
Kojto	158:b23ee177fd68	123
Kojto	158:b23ee177fd68	124	/**
Kojto	158:b23ee177fd68	125	* @}
Kojto	158:b23ee177fd68	126	*/
Kojto	158:b23ee177fd68	127	#endif /* USE_FULL_LL_DRIVER */
Kojto	158:b23ee177fd68	128
Kojto	158:b23ee177fd68	129	/* Exported constants --------------------------------------------------------*/
Kojto	158:b23ee177fd68	130	/** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
Kojto	158:b23ee177fd68	131	* @{
Kojto	158:b23ee177fd68	132	*/
Kojto	158:b23ee177fd68	133
Kojto	158:b23ee177fd68	134	/** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
Kojto	158:b23ee177fd68	135	* @brief Defines used to adapt values of different oscillators
Kojto	158:b23ee177fd68	136	* @note These values could be modified in the user environment according to
Kojto	158:b23ee177fd68	137	* HW set-up.
Kojto	158:b23ee177fd68	138	* @{
Kojto	158:b23ee177fd68	139	*/
Kojto	158:b23ee177fd68	140	#if !defined (HSE_VALUE)
Kojto	158:b23ee177fd68	141	#define HSE_VALUE ((uint32_t)8000000U) /!< Value of the HSE oscillator in Hz /
Kojto	158:b23ee177fd68	142	#endif /* HSE_VALUE */
Kojto	158:b23ee177fd68	143
Kojto	158:b23ee177fd68	144	#if !defined (HSI_VALUE)
Kojto	158:b23ee177fd68	145	#define HSI_VALUE ((uint32_t)16000000U) /!< Value of the HSI oscillator in Hz /
Kojto	158:b23ee177fd68	146	#endif /* HSI_VALUE */
Kojto	158:b23ee177fd68	147
Kojto	158:b23ee177fd68	148	#if !defined (LSE_VALUE)
Kojto	158:b23ee177fd68	149	#define LSE_VALUE ((uint32_t)32768U) /!< Value of the LSE oscillator in Hz /
Kojto	158:b23ee177fd68	150	#endif /* LSE_VALUE */
Kojto	158:b23ee177fd68	151
Kojto	158:b23ee177fd68	152	#if !defined (LSI_VALUE)
Kojto	158:b23ee177fd68	153	#define LSI_VALUE ((uint32_t)37000U) /!< Value of the LSI oscillator in Hz /
Kojto	158:b23ee177fd68	154	#endif /* LSI_VALUE */
Kojto	158:b23ee177fd68	155	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	156
Kojto	158:b23ee177fd68	157	#if !defined (HSI48_VALUE)
Kojto	158:b23ee177fd68	158	#define HSI48_VALUE ((uint32_t)48000000U) /!< Value of the HSI48 oscillator in Hz /
Kojto	158:b23ee177fd68	159	#endif /* HSI48_VALUE */
Kojto	158:b23ee177fd68	160	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	161	/**
Kojto	158:b23ee177fd68	162	* @}
Kojto	158:b23ee177fd68	163	*/
Kojto	158:b23ee177fd68	164
Kojto	158:b23ee177fd68	165	/** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
Kojto	158:b23ee177fd68	166	* @brief Flags defines which can be used with LL_RCC_WriteReg function
Kojto	158:b23ee177fd68	167	* @{
Kojto	158:b23ee177fd68	168	*/
Kojto	158:b23ee177fd68	169	#define LL_RCC_CICR_LSIRDYC RCC_CICR_LSIRDYC /!< LSI Ready Interrupt Clear /
Kojto	158:b23ee177fd68	170	#define LL_RCC_CICR_LSERDYC RCC_CICR_LSERDYC /!< LSE Ready Interrupt Clear /
Kojto	158:b23ee177fd68	171	#define LL_RCC_CICR_HSIRDYC RCC_CICR_HSIRDYC /!< HSI Ready Interrupt Clear /
Kojto	158:b23ee177fd68	172	#define LL_RCC_CICR_HSERDYC RCC_CICR_HSERDYC /!< HSE Ready Interrupt Clear /
Kojto	158:b23ee177fd68	173	#define LL_RCC_CICR_PLLRDYC RCC_CICR_PLLRDYC /!< PLL Ready Interrupt Clear /
Kojto	158:b23ee177fd68	174	#define LL_RCC_CICR_MSIRDYC RCC_CICR_MSIRDYC /!< MSI Ready Interrupt Clear /
Kojto	158:b23ee177fd68	175	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	176	#define LL_RCC_CICR_HSI48RDYC RCC_CICR_HSI48RDYC /!< HSI48 Ready Interrupt Clear /
Kojto	158:b23ee177fd68	177	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	178	#define LL_RCC_CICR_LSECSSC RCC_CICR_LSECSSC /!< LSE Clock Security System Interrupt Clear /
Kojto	158:b23ee177fd68	179	#define LL_RCC_CICR_CSSC RCC_CICR_CSSC /!< Clock Security System Interrupt Clear /
Kojto	158:b23ee177fd68	180	/**
Kojto	158:b23ee177fd68	181	* @}
Kojto	158:b23ee177fd68	182	*/
Kojto	158:b23ee177fd68	183
Kojto	158:b23ee177fd68	184	/** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines
Kojto	158:b23ee177fd68	185	* @brief Flags defines which can be used with LL_RCC_ReadReg function
Kojto	158:b23ee177fd68	186	* @{
Kojto	158:b23ee177fd68	187	*/
Kojto	158:b23ee177fd68	188	#define LL_RCC_CIFR_LSIRDYF RCC_CIFR_LSIRDYF /!< LSI Ready Interrupt flag /
Kojto	158:b23ee177fd68	189	#define LL_RCC_CIFR_LSERDYF RCC_CIFR_LSERDYF /!< LSE Ready Interrupt flag /
Kojto	158:b23ee177fd68	190	#define LL_RCC_CIFR_HSIRDYF RCC_CIFR_HSIRDYF /!< HSI Ready Interrupt flag /
Kojto	158:b23ee177fd68	191	#define LL_RCC_CIFR_HSERDYF RCC_CIFR_HSERDYF /!< HSE Ready Interrupt flag /
Kojto	158:b23ee177fd68	192	#define LL_RCC_CIFR_PLLRDYF RCC_CIFR_PLLRDYF /!< PLL Ready Interrupt flag /
Kojto	158:b23ee177fd68	193	#define LL_RCC_CIFR_MSIRDYF RCC_CIFR_MSIRDYF /!< MSI Ready Interrupt flag /
Kojto	158:b23ee177fd68	194	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	195	#define LL_RCC_CIFR_HSI48RDYF RCC_CIFR_HSI48RDYF /!< HSI48 Ready Interrupt flag /
Kojto	158:b23ee177fd68	196	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	197	#define LL_RCC_CIFR_LSECSSF RCC_CIFR_LSECSSF /!< LSE Clock Security System Interrupt flag /
Kojto	158:b23ee177fd68	198	#define LL_RCC_CIFR_CSSF RCC_CIFR_CSSF /!< Clock Security System Interrupt flag /
Kojto	158:b23ee177fd68	199	#define LL_RCC_CSR_FWRSTF RCC_CSR_FWRSTF /!< Firewall reset flag /
Kojto	158:b23ee177fd68	200	#define LL_RCC_CSR_OBLRSTF RCC_CSR_OBLRSTF /!< OBL reset flag /
Kojto	158:b23ee177fd68	201	#define LL_RCC_CSR_PINRSTF RCC_CSR_PINRSTF /!< PIN reset flag /
Kojto	158:b23ee177fd68	202	#define LL_RCC_CSR_PORRSTF RCC_CSR_PORRSTF /!< POR/PDR reset flag /
Kojto	158:b23ee177fd68	203	#define LL_RCC_CSR_SFTRSTF RCC_CSR_SFTRSTF /!< Software Reset flag /
Kojto	158:b23ee177fd68	204	#define LL_RCC_CSR_IWDGRSTF RCC_CSR_IWDGRSTF /!< Independent Watchdog reset flag /
Kojto	158:b23ee177fd68	205	#define LL_RCC_CSR_WWDGRSTF RCC_CSR_WWDGRSTF /!< Window watchdog reset flag /
Kojto	158:b23ee177fd68	206	#define LL_RCC_CSR_LPWRRSTF RCC_CSR_LPWRRSTF /!< Low-Power reset flag /
Kojto	158:b23ee177fd68	207	/**
Kojto	158:b23ee177fd68	208	* @}
Kojto	158:b23ee177fd68	209	*/
Kojto	158:b23ee177fd68	210
Kojto	158:b23ee177fd68	211	/** @defgroup RCC_LL_EC_IT IT Defines
Kojto	158:b23ee177fd68	212	* @brief IT defines which can be used with LL_RCC_ReadReg and LL_RCC_WriteReg functions
Kojto	158:b23ee177fd68	213	* @{
Kojto	158:b23ee177fd68	214	*/
Kojto	158:b23ee177fd68	215	#define LL_RCC_CIER_LSIRDYIE RCC_CIER_LSIRDYIE /!< LSI Ready Interrupt Enable /
Kojto	158:b23ee177fd68	216	#define LL_RCC_CIER_LSERDYIE RCC_CIER_LSERDYIE /!< LSE Ready Interrupt Enable /
Kojto	158:b23ee177fd68	217	#define LL_RCC_CIER_HSIRDYIE RCC_CIER_HSIRDYIE /!< HSI Ready Interrupt Enable /
Kojto	158:b23ee177fd68	218	#define LL_RCC_CIER_HSERDYIE RCC_CIER_HSERDYIE /!< HSE Ready Interrupt Enable /
Kojto	158:b23ee177fd68	219	#define LL_RCC_CIER_PLLRDYIE RCC_CIER_PLLRDYIE /!< PLL Ready Interrupt Enable /
Kojto	158:b23ee177fd68	220	#define LL_RCC_CIER_MSIRDYIE RCC_CIER_MSIRDYIE /!< MSI Ready Interrupt Enable /
Kojto	158:b23ee177fd68	221	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	222	#define LL_RCC_CIER_HSI48RDYIE RCC_CIER_HSI48RDYIE /!< HSI48 Ready Interrupt Enable /
Kojto	158:b23ee177fd68	223	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	224	#define LL_RCC_CIER_LSECSSIE RCC_CIER_LSECSSIE /!< LSE CSS Interrupt Enable /
Kojto	158:b23ee177fd68	225	/**
Kojto	158:b23ee177fd68	226	* @}
Kojto	158:b23ee177fd68	227	*/
Kojto	158:b23ee177fd68	228
Kojto	158:b23ee177fd68	229	/** @defgroup RCC_LL_EC_LSEDRIVE LSE oscillator drive capability
Kojto	158:b23ee177fd68	230	* @{
Kojto	158:b23ee177fd68	231	*/
Kojto	158:b23ee177fd68	232	#define LL_RCC_LSEDRIVE_LOW ((uint32_t)0x00000000U) /!< Xtal mode lower driving capability /
Kojto	158:b23ee177fd68	233	#define LL_RCC_LSEDRIVE_MEDIUMLOW RCC_CSR_LSEDRV_0 /!< Xtal mode medium low driving capability /
Kojto	158:b23ee177fd68	234	#define LL_RCC_LSEDRIVE_MEDIUMHIGH RCC_CSR_LSEDRV_1 /!< Xtal mode medium high driving capability /
Kojto	158:b23ee177fd68	235	#define LL_RCC_LSEDRIVE_HIGH RCC_CSR_LSEDRV /!< Xtal mode higher driving capability /
Kojto	158:b23ee177fd68	236	/**
Kojto	158:b23ee177fd68	237	* @}
Kojto	158:b23ee177fd68	238	*/
Kojto	158:b23ee177fd68	239
Kojto	158:b23ee177fd68	240	/** @defgroup RCC_LL_EC_RTC_HSE_DIV RTC HSE Prescaler
Kojto	158:b23ee177fd68	241	* @{
Kojto	158:b23ee177fd68	242	*/
Kojto	158:b23ee177fd68	243	#define LL_RCC_RTC_HSE_DIV_2 (uint32_t)0x00000000U/!< HSE is divided by 2 for RTC clock /
Kojto	158:b23ee177fd68	244	#define LL_RCC_RTC_HSE_DIV_4 RCC_CR_RTCPRE_0 /!< HSE is divided by 4 for RTC clock /
Kojto	158:b23ee177fd68	245	#define LL_RCC_RTC_HSE_DIV_8 RCC_CR_RTCPRE_1 /!< HSE is divided by 8 for RTC clock /
Kojto	158:b23ee177fd68	246	#define LL_RCC_RTC_HSE_DIV_16 RCC_CR_RTCPRE /!< HSE is divided by 16 for RTC clock /
Kojto	158:b23ee177fd68	247	/**
Kojto	158:b23ee177fd68	248	* @}
Kojto	158:b23ee177fd68	249	*/
Kojto	158:b23ee177fd68	250
Kojto	158:b23ee177fd68	251	/** @defgroup RCC_LL_EC_MSIRANGE MSI clock ranges
Kojto	158:b23ee177fd68	252	* @{
Kojto	158:b23ee177fd68	253	*/
Kojto	158:b23ee177fd68	254	#define LL_RCC_MSIRANGE_0 RCC_ICSCR_MSIRANGE_0 /!< MSI = 65.536 KHz /
Kojto	158:b23ee177fd68	255	#define LL_RCC_MSIRANGE_1 RCC_ICSCR_MSIRANGE_1 /!< MSI = 131.072 KHz/
Kojto	158:b23ee177fd68	256	#define LL_RCC_MSIRANGE_2 RCC_ICSCR_MSIRANGE_2 /!< MSI = 262.144 KHz /
Kojto	158:b23ee177fd68	257	#define LL_RCC_MSIRANGE_3 RCC_ICSCR_MSIRANGE_3 /!< MSI = 524.288 KHz /
Kojto	158:b23ee177fd68	258	#define LL_RCC_MSIRANGE_4 RCC_ICSCR_MSIRANGE_4 /!< MSI = 1.048 MHz /
Kojto	158:b23ee177fd68	259	#define LL_RCC_MSIRANGE_5 RCC_ICSCR_MSIRANGE_5 /!< MSI = 2.097 MHz /
Kojto	158:b23ee177fd68	260	#define LL_RCC_MSIRANGE_6 RCC_ICSCR_MSIRANGE_6 /!< MSI = 4.194 MHz /
Kojto	158:b23ee177fd68	261	/**
Kojto	158:b23ee177fd68	262	* @}
Kojto	158:b23ee177fd68	263	*/
Kojto	158:b23ee177fd68	264
Kojto	158:b23ee177fd68	265	/** @defgroup RCC_LL_EC_SYS_CLKSOURCE System clock switch
Kojto	158:b23ee177fd68	266	* @{
Kojto	158:b23ee177fd68	267	*/
Kojto	158:b23ee177fd68	268	#define LL_RCC_SYS_CLKSOURCE_MSI RCC_CFGR_SW_MSI /!< MSI selection as system clock /
Kojto	158:b23ee177fd68	269	#define LL_RCC_SYS_CLKSOURCE_HSI RCC_CFGR_SW_HSI /!< HSI selection as system clock /
Kojto	158:b23ee177fd68	270	#define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_HSE /!< HSE selection as system clock /
Kojto	158:b23ee177fd68	271	#define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /!< PLL selection as system clock /
Kojto	158:b23ee177fd68	272	/**
Kojto	158:b23ee177fd68	273	* @}
Kojto	158:b23ee177fd68	274	*/
Kojto	158:b23ee177fd68	275
Kojto	158:b23ee177fd68	276	/** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS System clock switch status
Kojto	158:b23ee177fd68	277	* @{
Kojto	158:b23ee177fd68	278	*/
Kojto	158:b23ee177fd68	279	#define LL_RCC_SYS_CLKSOURCE_STATUS_MSI RCC_CFGR_SWS_MSI /!< MSI used as system clock /
Kojto	158:b23ee177fd68	280	#define LL_RCC_SYS_CLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /!< HSI used as system clock /
Kojto	158:b23ee177fd68	281	#define LL_RCC_SYS_CLKSOURCE_STATUS_HSE RCC_CFGR_SWS_HSE /!< HSE used as system clock /
Kojto	158:b23ee177fd68	282	#define LL_RCC_SYS_CLKSOURCE_STATUS_PLL RCC_CFGR_SWS_PLL /!< PLL used as system clock /
Kojto	158:b23ee177fd68	283	/**
Kojto	158:b23ee177fd68	284	* @}
Kojto	158:b23ee177fd68	285	*/
Kojto	158:b23ee177fd68	286
Kojto	158:b23ee177fd68	287	/** @defgroup RCC_LL_EC_SYSCLK_DIV AHB prescaler
Kojto	158:b23ee177fd68	288	* @{
Kojto	158:b23ee177fd68	289	*/
Kojto	158:b23ee177fd68	290	#define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /!< SYSCLK not divided /
Kojto	158:b23ee177fd68	291	#define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /!< SYSCLK divided by 2 /
Kojto	158:b23ee177fd68	292	#define LL_RCC_SYSCLK_DIV_4 RCC_CFGR_HPRE_DIV4 /!< SYSCLK divided by 4 /
Kojto	158:b23ee177fd68	293	#define LL_RCC_SYSCLK_DIV_8 RCC_CFGR_HPRE_DIV8 /!< SYSCLK divided by 8 /
Kojto	158:b23ee177fd68	294	#define LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 /!< SYSCLK divided by 16 /
Kojto	158:b23ee177fd68	295	#define LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 /!< SYSCLK divided by 64 /
Kojto	158:b23ee177fd68	296	#define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /!< SYSCLK divided by 128 /
Kojto	158:b23ee177fd68	297	#define LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 /!< SYSCLK divided by 256 /
Kojto	158:b23ee177fd68	298	#define LL_RCC_SYSCLK_DIV_512 RCC_CFGR_HPRE_DIV512 /!< SYSCLK divided by 512 /
Kojto	158:b23ee177fd68	299	/**
Kojto	158:b23ee177fd68	300	* @}
Kojto	158:b23ee177fd68	301	*/
Kojto	158:b23ee177fd68	302
Kojto	158:b23ee177fd68	303	/** @defgroup RCC_LL_EC_APB1_DIV APB low-speed prescaler (APB1)
Kojto	158:b23ee177fd68	304	* @{
Kojto	158:b23ee177fd68	305	*/
Kojto	158:b23ee177fd68	306	#define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE1_DIV1 /!< HCLK not divided /
Kojto	158:b23ee177fd68	307	#define LL_RCC_APB1_DIV_2 RCC_CFGR_PPRE1_DIV2 /!< HCLK divided by 2 /
Kojto	158:b23ee177fd68	308	#define LL_RCC_APB1_DIV_4 RCC_CFGR_PPRE1_DIV4 /!< HCLK divided by 4 /
Kojto	158:b23ee177fd68	309	#define LL_RCC_APB1_DIV_8 RCC_CFGR_PPRE1_DIV8 /!< HCLK divided by 8 /
Kojto	158:b23ee177fd68	310	#define LL_RCC_APB1_DIV_16 RCC_CFGR_PPRE1_DIV16 /!< HCLK divided by 16 /
Kojto	158:b23ee177fd68	311	/**
Kojto	158:b23ee177fd68	312	* @}
Kojto	158:b23ee177fd68	313	*/
Kojto	158:b23ee177fd68	314
Kojto	158:b23ee177fd68	315	/** @defgroup RCC_LL_EC_APB2_DIV APB high-speed prescaler (APB2)
Kojto	158:b23ee177fd68	316	* @{
Kojto	158:b23ee177fd68	317	*/
Kojto	158:b23ee177fd68	318	#define LL_RCC_APB2_DIV_1 RCC_CFGR_PPRE2_DIV1 /!< HCLK not divided /
Kojto	158:b23ee177fd68	319	#define LL_RCC_APB2_DIV_2 RCC_CFGR_PPRE2_DIV2 /!< HCLK divided by 2 /
Kojto	158:b23ee177fd68	320	#define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /!< HCLK divided by 4 /
Kojto	158:b23ee177fd68	321	#define LL_RCC_APB2_DIV_8 RCC_CFGR_PPRE2_DIV8 /!< HCLK divided by 8 /
Kojto	158:b23ee177fd68	322	#define LL_RCC_APB2_DIV_16 RCC_CFGR_PPRE2_DIV16 /!< HCLK divided by 16 /
Kojto	158:b23ee177fd68	323	/**
Kojto	158:b23ee177fd68	324	* @}
Kojto	158:b23ee177fd68	325	*/
Kojto	158:b23ee177fd68	326
Kojto	158:b23ee177fd68	327	/** @defgroup RCC_LL_EC_STOP_WAKEUPCLOCK Wakeup from Stop and CSS backup clock selection
Kojto	158:b23ee177fd68	328	* @{
Kojto	158:b23ee177fd68	329	*/
Kojto	158:b23ee177fd68	330	#define LL_RCC_STOP_WAKEUPCLOCK_MSI ((uint32_t)0x00000000U) /!< MSI selection after wake-up from STOP /
Kojto	158:b23ee177fd68	331	#define LL_RCC_STOP_WAKEUPCLOCK_HSI RCC_CFGR_STOPWUCK /!< HSI selection after wake-up from STOP /
Kojto	158:b23ee177fd68	332	/**
Kojto	158:b23ee177fd68	333	* @}
Kojto	158:b23ee177fd68	334	*/
Kojto	158:b23ee177fd68	335
Kojto	158:b23ee177fd68	336	/** @defgroup RCC_LL_EC_MCO1SOURCE MCO1 SOURCE selection
Kojto	158:b23ee177fd68	337	* @{
Kojto	158:b23ee177fd68	338	*/
Kojto	158:b23ee177fd68	339	#define LL_RCC_MCO1SOURCE_NOCLOCK RCC_CFGR_MCOSEL_NOCLOCK /!< MCO output disabled, no clock on MCO /
Kojto	158:b23ee177fd68	340	#define LL_RCC_MCO1SOURCE_SYSCLK RCC_CFGR_MCOSEL_SYSCLK /!< SYSCLK selection as MCO source /
Kojto	158:b23ee177fd68	341	#define LL_RCC_MCO1SOURCE_HSI RCC_CFGR_MCOSEL_HSI /!< HSI selection as MCO source /
Kojto	158:b23ee177fd68	342	#define LL_RCC_MCO1SOURCE_MSI RCC_CFGR_MCOSEL_MSI /!< MSI selection as MCO source /
Kojto	158:b23ee177fd68	343	#define LL_RCC_MCO1SOURCE_HSE RCC_CFGR_MCOSEL_HSE /!< HSE selection as MCO source /
Kojto	158:b23ee177fd68	344	#define LL_RCC_MCO1SOURCE_LSI RCC_CFGR_MCOSEL_LSI /!< LSI selection as MCO source /
Kojto	158:b23ee177fd68	345	#define LL_RCC_MCO1SOURCE_LSE RCC_CFGR_MCOSEL_LSE /!< LSE selection as MCO source /
Kojto	158:b23ee177fd68	346	#if defined(RCC_CFGR_MCOSEL_HSI48)
Kojto	158:b23ee177fd68	347	#define LL_RCC_MCO1SOURCE_HSI48 RCC_CFGR_MCOSEL_HSI48 /!< HSI48 selection as MCO source /
Kojto	158:b23ee177fd68	348	#endif /* RCC_CFGR_MCOSEL_HSI48 */
Kojto	158:b23ee177fd68	349	#define LL_RCC_MCO1SOURCE_PLLCLK RCC_CFGR_MCOSEL_PLL /!< PLLCLK selection as MCO source /
Kojto	158:b23ee177fd68	350	/**
Kojto	158:b23ee177fd68	351	* @}
Kojto	158:b23ee177fd68	352	*/
Kojto	158:b23ee177fd68	353
Kojto	158:b23ee177fd68	354	/** @defgroup RCC_LL_EC_MCO1_DIV MCO1 prescaler
Kojto	158:b23ee177fd68	355	* @{
Kojto	158:b23ee177fd68	356	*/
Kojto	158:b23ee177fd68	357	#define LL_RCC_MCO1_DIV_1 RCC_CFGR_MCOPRE_DIV1 /!< MCO Clock divided by 1 /
Kojto	158:b23ee177fd68	358	#define LL_RCC_MCO1_DIV_2 RCC_CFGR_MCOPRE_DIV2 /!< MCO Clock divided by 2 /
Kojto	158:b23ee177fd68	359	#define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /!< MCO Clock divided by 4 /
Kojto	158:b23ee177fd68	360	#define LL_RCC_MCO1_DIV_8 RCC_CFGR_MCOPRE_DIV8 /!< MCO Clock divided by 8 /
Kojto	158:b23ee177fd68	361	#define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /!< MCO Clock divided by 16 /
Kojto	158:b23ee177fd68	362	/**
Kojto	158:b23ee177fd68	363	* @}
Kojto	158:b23ee177fd68	364	*/
Kojto	158:b23ee177fd68	365	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	366	/** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
Kojto	158:b23ee177fd68	367	* @{
Kojto	158:b23ee177fd68	368	*/
Kojto	158:b23ee177fd68	369	#define LL_RCC_PERIPH_FREQUENCY_NO (uint32_t)0x00000000U /!< No clock enabled for the peripheral /
Kojto	158:b23ee177fd68	370	#define LL_RCC_PERIPH_FREQUENCY_NA (uint32_t)0xFFFFFFFFU /!< Frequency cannot be provided as external clock /
Kojto	158:b23ee177fd68	371	/**
Kojto	158:b23ee177fd68	372	* @}
Kojto	158:b23ee177fd68	373	*/
Kojto	158:b23ee177fd68	374	#endif /* USE_FULL_LL_DRIVER */
Kojto	158:b23ee177fd68	375
Kojto	158:b23ee177fd68	376	/** @defgroup RCC_LL_EC_USART1_CLKSOURCE Peripheral USART clock source selection
Kojto	158:b23ee177fd68	377	* @{
Kojto	158:b23ee177fd68	378	*/
Kojto	158:b23ee177fd68	379	#if defined(RCC_CCIPR_USART1SEL)
Kojto	158:b23ee177fd68	380	#define LL_RCC_USART1_CLKSOURCE_PCLK2 (uint32_t)((RCC_CCIPR_USART1SEL << 16U) \| 0x00000000U) /!< PCLK2 selected as USART1 clock /
Kojto	158:b23ee177fd68	381	#define LL_RCC_USART1_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_USART1SEL << 16U) \| RCC_CCIPR_USART1SEL_0) /!< SYSCLK selected as USART1 clock /
Kojto	158:b23ee177fd68	382	#define LL_RCC_USART1_CLKSOURCE_HSI (uint32_t)((RCC_CCIPR_USART1SEL << 16U) \| RCC_CCIPR_USART1SEL_1) /!< HSI selected as USART1 clock /
Kojto	158:b23ee177fd68	383	#define LL_RCC_USART1_CLKSOURCE_LSE (uint32_t)((RCC_CCIPR_USART1SEL << 16U) \| RCC_CCIPR_USART1SEL) /!< LSE selected as USART1 clock/
Kojto	158:b23ee177fd68	384	#endif /* RCC_CCIPR_USART1SEL */
Kojto	158:b23ee177fd68	385	#define LL_RCC_USART2_CLKSOURCE_PCLK1 (uint32_t)((RCC_CCIPR_USART2SEL << 16U) \| 0x00000000U) /!< PCLK1 selected as USART2 clock /
Kojto	158:b23ee177fd68	386	#define LL_RCC_USART2_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_USART2SEL << 16U) \| RCC_CCIPR_USART2SEL_0) /!< SYSCLK selected as USART2 clock /
Kojto	158:b23ee177fd68	387	#define LL_RCC_USART2_CLKSOURCE_HSI (uint32_t)((RCC_CCIPR_USART2SEL << 16U) \| RCC_CCIPR_USART2SEL_1) /!< HSI selected as USART2 clock /
Kojto	158:b23ee177fd68	388	#define LL_RCC_USART2_CLKSOURCE_LSE (uint32_t)((RCC_CCIPR_USART2SEL << 16U) \| RCC_CCIPR_USART2SEL) /!< LSE selected as USART2 clock/
Kojto	158:b23ee177fd68	389	/**
Kojto	158:b23ee177fd68	390	* @}
Kojto	158:b23ee177fd68	391	*/
Kojto	158:b23ee177fd68	392
Kojto	158:b23ee177fd68	393
Kojto	158:b23ee177fd68	394
Kojto	158:b23ee177fd68	395	/** @defgroup RCC_LL_EC_LPUART1_CLKSOURCE Peripheral LPUART clock source selection
Kojto	158:b23ee177fd68	396	* @{
Kojto	158:b23ee177fd68	397	*/
Kojto	158:b23ee177fd68	398	#define LL_RCC_LPUART1_CLKSOURCE_PCLK1 (uint32_t)0x00000000U /!< PCLK1 selected as LPUART1 clock /
Kojto	158:b23ee177fd68	399	#define LL_RCC_LPUART1_CLKSOURCE_SYSCLK RCC_CCIPR_LPUART1SEL_0 /!< SYSCLK selected as LPUART1 clock /
Kojto	158:b23ee177fd68	400	#define LL_RCC_LPUART1_CLKSOURCE_HSI RCC_CCIPR_LPUART1SEL_1 /!< HSI selected as LPUART1 clock /
Kojto	158:b23ee177fd68	401	#define LL_RCC_LPUART1_CLKSOURCE_LSE RCC_CCIPR_LPUART1SEL /!< LSE selected as LPUART1 clock/
Kojto	158:b23ee177fd68	402	/**
Kojto	158:b23ee177fd68	403	* @}
Kojto	158:b23ee177fd68	404	*/
Kojto	158:b23ee177fd68	405
Kojto	158:b23ee177fd68	406	/** @defgroup RCC_LL_EC_I2C1_CLKSOURCE Peripheral I2C clock source selection
Kojto	158:b23ee177fd68	407	* @{
Kojto	158:b23ee177fd68	408	*/
Kojto	158:b23ee177fd68	409	#define LL_RCC_I2C1_CLKSOURCE_PCLK1 (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) \| (0x00000000U >> 4U)) /!< PCLK1 selected as I2C1 clock /
Kojto	158:b23ee177fd68	410	#define LL_RCC_I2C1_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) \| (RCC_CCIPR_I2C1SEL_0 >> 4U)) /!< SYSCLK selected as I2C1 clock /
Kojto	158:b23ee177fd68	411	#define LL_RCC_I2C1_CLKSOURCE_HSI (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) \| (RCC_CCIPR_I2C1SEL_1 >> 4U)) /!< HSI selected as I2C1 clock /
Kojto	158:b23ee177fd68	412	#if defined(RCC_CCIPR_I2C3SEL)
Kojto	158:b23ee177fd68	413	#define LL_RCC_I2C3_CLKSOURCE_PCLK1 (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) \| (0x00000000U >> 4U)) /!< PCLK1 selected as I2C3 clock /
Kojto	158:b23ee177fd68	414	#define LL_RCC_I2C3_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) \| (RCC_CCIPR_I2C3SEL_0 >> 4U)) /!< SYSCLK selected as I2C3 clock /
Kojto	158:b23ee177fd68	415	#define LL_RCC_I2C3_CLKSOURCE_HSI (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) \| (RCC_CCIPR_I2C3SEL_1 >> 4U)) /!< HSI selected as I2C3 clock /
Kojto	158:b23ee177fd68	416	#endif /RCC_CCIPR_I2C3SEL/
Kojto	158:b23ee177fd68	417	/**
Kojto	158:b23ee177fd68	418	* @}
Kojto	158:b23ee177fd68	419	*/
Kojto	158:b23ee177fd68	420
Kojto	158:b23ee177fd68	421	/** @defgroup RCC_LL_EC_LPTIM1_CLKSOURCE Peripheral LPTIM clock source selection
Kojto	158:b23ee177fd68	422	* @{
Kojto	158:b23ee177fd68	423	*/
Kojto	158:b23ee177fd68	424	#define LL_RCC_LPTIM1_CLKSOURCE_PCLK1 (uint32_t)(0x00000000U) /!< PCLK1 selected as LPTIM1 clock /
Kojto	158:b23ee177fd68	425	#define LL_RCC_LPTIM1_CLKSOURCE_LSI (uint32_t)RCC_CCIPR_LPTIM1SEL_0 /!< LSI selected as LPTIM1 clock /
Kojto	158:b23ee177fd68	426	#define LL_RCC_LPTIM1_CLKSOURCE_HSI (uint32_t)RCC_CCIPR_LPTIM1SEL_1 /!< HSI selected as LPTIM1 clock /
Kojto	158:b23ee177fd68	427	#define LL_RCC_LPTIM1_CLKSOURCE_LSE (uint32_t)RCC_CCIPR_LPTIM1SEL /!< LSE selected as LPTIM1 clock/
Kojto	158:b23ee177fd68	428	/**
Kojto	158:b23ee177fd68	429	* @}
Kojto	158:b23ee177fd68	430	*/
Kojto	158:b23ee177fd68	431
Kojto	158:b23ee177fd68	432	#if defined(RCC_CCIPR_HSI48SEL)
Kojto	158:b23ee177fd68	433
Kojto	158:b23ee177fd68	434	#if defined(RNG)
Kojto	158:b23ee177fd68	435	/** @defgroup RCC_LL_EC_RNG_CLKSOURCE Peripheral RNG clock source selection
Kojto	158:b23ee177fd68	436	* @{
Kojto	158:b23ee177fd68	437	*/
Kojto	158:b23ee177fd68	438	#define LL_RCC_RNG_CLKSOURCE_PLL (uint32_t)(0x00000000U) /!< PLL selected as RNG clock /
Kojto	158:b23ee177fd68	439	#define LL_RCC_RNG_CLKSOURCE_HSI48 (uint32_t)(RCC_CCIPR_HSI48SEL) /!< HSI48 selected as RNG clock/
Kojto	158:b23ee177fd68	440	/**
Kojto	158:b23ee177fd68	441	* @}
Kojto	158:b23ee177fd68	442	*/
Kojto	158:b23ee177fd68	443	#endif /* RNG */
Kojto	158:b23ee177fd68	444	#if defined(USB)
Kojto	158:b23ee177fd68	445	/** @defgroup RCC_LL_EC_USB_CLKSOURCE Peripheral USB clock source selection
Kojto	158:b23ee177fd68	446	* @{
Kojto	158:b23ee177fd68	447	*/
Kojto	158:b23ee177fd68	448	#define LL_RCC_USB_CLKSOURCE_PLL (uint32_t)(0x00000000U) /!< PLL selected as USB clock /
Kojto	158:b23ee177fd68	449	#define LL_RCC_USB_CLKSOURCE_HSI48 (uint32_t)(RCC_CCIPR_HSI48SEL) /!< HSI48 selected as USB clock/
Kojto	158:b23ee177fd68	450	/**
Kojto	158:b23ee177fd68	451	* @}
Kojto	158:b23ee177fd68	452	*/
Kojto	158:b23ee177fd68	453
Kojto	158:b23ee177fd68	454	#endif /* USB */
Kojto	158:b23ee177fd68	455	#endif /* RCC_CCIPR_HSI48SEL */
Kojto	158:b23ee177fd68	456
Kojto	158:b23ee177fd68	457
Kojto	158:b23ee177fd68	458	/** @defgroup RCC_LL_EC_USART1 Peripheral USART get clock source
Kojto	158:b23ee177fd68	459	* @{
Kojto	158:b23ee177fd68	460	*/
Kojto	158:b23ee177fd68	461	#if defined(RCC_CCIPR_USART1SEL)
Kojto	158:b23ee177fd68	462	#define LL_RCC_USART1_CLKSOURCE RCC_CCIPR_USART1SEL /!< USART1 clock source selection bits /
Kojto	158:b23ee177fd68	463	#endif /* RCC_CCIPR_USART1SEL */
Kojto	158:b23ee177fd68	464	#define LL_RCC_USART2_CLKSOURCE RCC_CCIPR_USART2SEL /!< USART2 clock source selection bits /
Kojto	158:b23ee177fd68	465	/**
Kojto	158:b23ee177fd68	466	* @}
Kojto	158:b23ee177fd68	467	*/
Kojto	158:b23ee177fd68	468
Kojto	158:b23ee177fd68	469
Kojto	158:b23ee177fd68	470	/** @defgroup RCC_LL_EC_LPUART1 Peripheral LPUART get clock source
Kojto	158:b23ee177fd68	471	* @{
Kojto	158:b23ee177fd68	472	*/
Kojto	158:b23ee177fd68	473	#define LL_RCC_LPUART1_CLKSOURCE RCC_CCIPR_LPUART1SEL /!< LPUART1 clock source selection bits /
Kojto	158:b23ee177fd68	474	/**
Kojto	158:b23ee177fd68	475	* @}
Kojto	158:b23ee177fd68	476	*/
Kojto	158:b23ee177fd68	477
Kojto	158:b23ee177fd68	478	/** @defgroup RCC_LL_EC_I2C1 Peripheral I2C get clock source
Kojto	158:b23ee177fd68	479	* @{
Kojto	158:b23ee177fd68	480	*/
Kojto	158:b23ee177fd68	481	#define LL_RCC_I2C1_CLKSOURCE RCC_CCIPR_I2C1SEL /!< I2C1 clock source selection bits /
Kojto	158:b23ee177fd68	482	#if defined(RCC_CCIPR_I2C3SEL)
Kojto	158:b23ee177fd68	483	#define LL_RCC_I2C3_CLKSOURCE RCC_CCIPR_I2C3SEL /!< I2C3 clock source selection bits /
Kojto	158:b23ee177fd68	484	#endif /RCC_CCIPR_I2C3SEL/
Kojto	158:b23ee177fd68	485	/**
Kojto	158:b23ee177fd68	486	* @}
Kojto	158:b23ee177fd68	487	*/
Kojto	158:b23ee177fd68	488
Kojto	158:b23ee177fd68	489	/** @defgroup RCC_LL_EC_LPTIM1 Peripheral LPTIM get clock source
Kojto	158:b23ee177fd68	490	* @{
Kojto	158:b23ee177fd68	491	*/
Kojto	158:b23ee177fd68	492	#define LL_RCC_LPTIM1_CLKSOURCE RCC_CCIPR_LPTIM1SEL /!< LPTIM1 clock source selection bits /
Kojto	158:b23ee177fd68	493	/**
Kojto	158:b23ee177fd68	494	* @}
Kojto	158:b23ee177fd68	495	*/
Kojto	158:b23ee177fd68	496
Kojto	158:b23ee177fd68	497	#if defined(RCC_CCIPR_HSI48SEL)
Kojto	158:b23ee177fd68	498	#if defined(RNG)
Kojto	158:b23ee177fd68	499	/** @defgroup RCC_LL_EC_RNG Peripheral RNG get clock source
Kojto	158:b23ee177fd68	500	* @{
Kojto	158:b23ee177fd68	501	*/
Kojto	158:b23ee177fd68	502	#define LL_RCC_RNG_CLKSOURCE RCC_CCIPR_HSI48SEL /!< HSI48 RC clock source selection bit for RNG/
Kojto	158:b23ee177fd68	503	/**
Kojto	158:b23ee177fd68	504	* @}
Kojto	158:b23ee177fd68	505	*/
Kojto	158:b23ee177fd68	506	#endif /* RNG */
Kojto	158:b23ee177fd68	507
Kojto	158:b23ee177fd68	508	#if defined(USB)
Kojto	158:b23ee177fd68	509	/** @defgroup RCC_LL_EC_USB Peripheral USB get clock source
Kojto	158:b23ee177fd68	510	* @{
Kojto	158:b23ee177fd68	511	*/
Kojto	158:b23ee177fd68	512	#define LL_RCC_USB_CLKSOURCE RCC_CCIPR_HSI48SEL /!< HSI48 RC clock source selection bit for USB/
Kojto	158:b23ee177fd68	513	/**
Kojto	158:b23ee177fd68	514	* @}
Kojto	158:b23ee177fd68	515	*/
Kojto	158:b23ee177fd68	516
Kojto	158:b23ee177fd68	517	#endif /* USB */
Kojto	158:b23ee177fd68	518	#endif /* RCC_CCIPR_HSI48SEL */
Kojto	158:b23ee177fd68	519
Kojto	158:b23ee177fd68	520	/** @defgroup RCC_LL_EC_RTC_CLKSOURCE RTC clock source selection
Kojto	158:b23ee177fd68	521	* @{
Kojto	158:b23ee177fd68	522	*/
Kojto	158:b23ee177fd68	523	#define LL_RCC_RTC_CLKSOURCE_NONE (uint32_t)0x00000000U /!< No clock used as RTC clock /
Kojto	158:b23ee177fd68	524	#define LL_RCC_RTC_CLKSOURCE_LSE RCC_CSR_RTCSEL_LSE /!< LSE oscillator clock used as RTC clock /
Kojto	158:b23ee177fd68	525	#define LL_RCC_RTC_CLKSOURCE_LSI RCC_CSR_RTCSEL_LSI /!< LSI oscillator clock used as RTC clock /
Kojto	158:b23ee177fd68	526	#define LL_RCC_RTC_CLKSOURCE_HSE RCC_CSR_RTCSEL_HSE /*!< HSE oscillator clock divided by a programmable prescaler
Kojto	158:b23ee177fd68	527	(selection through @ref LL_RCC_SetRTC_HSEPrescaler function ) */
Kojto	158:b23ee177fd68	528	/**
Kojto	158:b23ee177fd68	529	* @}
Kojto	158:b23ee177fd68	530	*/
Kojto	158:b23ee177fd68	531
Kojto	158:b23ee177fd68	532	/** @defgroup RCC_LL_EC_PLL_MUL PLL Multiplicator factor
Kojto	158:b23ee177fd68	533	* @{
Kojto	158:b23ee177fd68	534	*/
Kojto	158:b23ee177fd68	535	#define LL_RCC_PLL_MUL_3 RCC_CFGR_PLLMUL3 /!< PLL input clock 3 */
Kojto	158:b23ee177fd68	536	#define LL_RCC_PLL_MUL_4 RCC_CFGR_PLLMUL4 /!< PLL input clock 4 */
Kojto	158:b23ee177fd68	537	#define LL_RCC_PLL_MUL_6 RCC_CFGR_PLLMUL6 /!< PLL input clock 6 */
Kojto	158:b23ee177fd68	538	#define LL_RCC_PLL_MUL_8 RCC_CFGR_PLLMUL8 /!< PLL input clock 8 */
Kojto	158:b23ee177fd68	539	#define LL_RCC_PLL_MUL_12 RCC_CFGR_PLLMUL12 /!< PLL input clock 12 */
Kojto	158:b23ee177fd68	540	#define LL_RCC_PLL_MUL_16 RCC_CFGR_PLLMUL16 /!< PLL input clock 16 */
Kojto	158:b23ee177fd68	541	#define LL_RCC_PLL_MUL_24 RCC_CFGR_PLLMUL24 /!< PLL input clock 24 */
Kojto	158:b23ee177fd68	542	#define LL_RCC_PLL_MUL_32 RCC_CFGR_PLLMUL32 /!< PLL input clock 32 */
Kojto	158:b23ee177fd68	543	#define LL_RCC_PLL_MUL_48 RCC_CFGR_PLLMUL48 /!< PLL input clock 48 */
Kojto	158:b23ee177fd68	544	/**
Kojto	158:b23ee177fd68	545	* @}
Kojto	158:b23ee177fd68	546	*/
Kojto	158:b23ee177fd68	547
Kojto	158:b23ee177fd68	548	/** @defgroup RCC_LL_EC_PLL_DIV PLL division factor
Kojto	158:b23ee177fd68	549	* @{
Kojto	158:b23ee177fd68	550	*/
Kojto	158:b23ee177fd68	551	#define LL_RCC_PLL_DIV_2 RCC_CFGR_PLLDIV2 /!< PLL clock output = PLLVCO / 2 /
Kojto	158:b23ee177fd68	552	#define LL_RCC_PLL_DIV_3 RCC_CFGR_PLLDIV3 /!< PLL clock output = PLLVCO / 3 /
Kojto	158:b23ee177fd68	553	#define LL_RCC_PLL_DIV_4 RCC_CFGR_PLLDIV4 /!< PLL clock output = PLLVCO / 4 /
Kojto	158:b23ee177fd68	554	/**
Kojto	158:b23ee177fd68	555	* @}
Kojto	158:b23ee177fd68	556	*/
Kojto	158:b23ee177fd68	557
Kojto	158:b23ee177fd68	558	/** @defgroup RCC_LL_EC_PLLSOURCE PLL SOURCE
Kojto	158:b23ee177fd68	559	* @{
Kojto	158:b23ee177fd68	560	*/
Kojto	158:b23ee177fd68	561	#define LL_RCC_PLLSOURCE_HSI RCC_CFGR_PLLSRC_HSI /!< HSI clock selected as PLL entry clock source /
Kojto	158:b23ee177fd68	562	#define LL_RCC_PLLSOURCE_HSE RCC_CFGR_PLLSRC_HSE /!< HSE clock selected as PLL entry clock source /
Kojto	158:b23ee177fd68	563	/**
Kojto	158:b23ee177fd68	564	* @}
Kojto	158:b23ee177fd68	565	*/
Kojto	158:b23ee177fd68	566
Kojto	158:b23ee177fd68	567	/**
Kojto	158:b23ee177fd68	568	* @}
Kojto	158:b23ee177fd68	569	*/
Kojto	158:b23ee177fd68	570
Kojto	158:b23ee177fd68	571	/* Exported macro ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	572	/** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
Kojto	158:b23ee177fd68	573	* @{
Kojto	158:b23ee177fd68	574	*/
Kojto	158:b23ee177fd68	575
Kojto	158:b23ee177fd68	576	/** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto	158:b23ee177fd68	577	* @{
Kojto	158:b23ee177fd68	578	*/
Kojto	158:b23ee177fd68	579
Kojto	158:b23ee177fd68	580	/**
Kojto	158:b23ee177fd68	581	* @brief Write a value in RCC register
Kojto	158:b23ee177fd68	582	* @param __REG__ Register to be written
Kojto	158:b23ee177fd68	583	* @param __VALUE__ Value to be written in the register
Kojto	158:b23ee177fd68	584	* @retval None
Kojto	158:b23ee177fd68	585	*/
Kojto	158:b23ee177fd68	586	#define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, (__VALUE__))
Kojto	158:b23ee177fd68	587
Kojto	158:b23ee177fd68	588	/**
Kojto	158:b23ee177fd68	589	* @brief Read a value in RCC register
Kojto	158:b23ee177fd68	590	* @param __REG__ Register to be read
Kojto	158:b23ee177fd68	591	* @retval Register value
Kojto	158:b23ee177fd68	592	*/
Kojto	158:b23ee177fd68	593	#define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
Kojto	158:b23ee177fd68	594	/**
Kojto	158:b23ee177fd68	595	* @}
Kojto	158:b23ee177fd68	596	*/
Kojto	158:b23ee177fd68	597
Kojto	158:b23ee177fd68	598	/** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
Kojto	158:b23ee177fd68	599	* @{
Kojto	158:b23ee177fd68	600	*/
Kojto	158:b23ee177fd68	601
Kojto	158:b23ee177fd68	602	/**
Kojto	158:b23ee177fd68	603	* @brief Helper macro to calculate the PLLCLK frequency
Kojto	158:b23ee177fd68	604	* @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE,
Kojto	158:b23ee177fd68	605	* @ref LL_RCC_PLL_GetMultiplicator (),
Kojto	158:b23ee177fd68	606	* @ref LL_RCC_PLL_GetDivider ());
Kojto	158:b23ee177fd68	607	* @param __INPUTFREQ__ PLL Input frequency (based on MSI/HSE/HSI)
Kojto	158:b23ee177fd68	608	* @param __PLLMUL__ This parameter can be one of the following values:
Kojto	158:b23ee177fd68	609	* @arg @ref LL_RCC_PLL_MUL_3
Kojto	158:b23ee177fd68	610	* @arg @ref LL_RCC_PLL_MUL_4
Kojto	158:b23ee177fd68	611	* @arg @ref LL_RCC_PLL_MUL_6
Kojto	158:b23ee177fd68	612	* @arg @ref LL_RCC_PLL_MUL_8
Kojto	158:b23ee177fd68	613	* @arg @ref LL_RCC_PLL_MUL_12
Kojto	158:b23ee177fd68	614	* @arg @ref LL_RCC_PLL_MUL_16
Kojto	158:b23ee177fd68	615	* @arg @ref LL_RCC_PLL_MUL_24
Kojto	158:b23ee177fd68	616	* @arg @ref LL_RCC_PLL_MUL_32
Kojto	158:b23ee177fd68	617	* @arg @ref LL_RCC_PLL_MUL_48
Kojto	158:b23ee177fd68	618	* @param __PLLDIV__ This parameter can be one of the following values:
Kojto	158:b23ee177fd68	619	* @arg @ref LL_RCC_PLL_DIV_2
Kojto	158:b23ee177fd68	620	* @arg @ref LL_RCC_PLL_DIV_3
Kojto	158:b23ee177fd68	621	* @arg @ref LL_RCC_PLL_DIV_4
Kojto	158:b23ee177fd68	622	* @retval PLL clock frequency (in Hz)
Kojto	158:b23ee177fd68	623	*/
Kojto	158:b23ee177fd68	624	#define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLMUL__, __PLLDIV__) ((__INPUTFREQ__) * (PLLMulTable[(__PLLMUL__) >> RCC_POSITION_PLLMUL]) / (((__PLLDIV__) >> RCC_POSITION_PLLDIV)+1U))
Kojto	158:b23ee177fd68	625
Kojto	158:b23ee177fd68	626	/**
Kojto	158:b23ee177fd68	627	* @brief Helper macro to calculate the HCLK frequency
Kojto	158:b23ee177fd68	628	* @note: __AHBPRESCALER__ be retrieved by @ref LL_RCC_GetAHBPrescaler
Kojto	158:b23ee177fd68	629	* ex: __LL_RCC_CALC_HCLK_FREQ(LL_RCC_GetAHBPrescaler())
Kojto	158:b23ee177fd68	630	* @param __SYSCLKFREQ__ SYSCLK frequency (based on MSI/HSE/HSI/PLLCLK)
Kojto	158:b23ee177fd68	631	* @param __AHBPRESCALER__: This parameter can be one of the following values:
Kojto	158:b23ee177fd68	632	* @arg @ref LL_RCC_SYSCLK_DIV_1
Kojto	158:b23ee177fd68	633	* @arg @ref LL_RCC_SYSCLK_DIV_2
Kojto	158:b23ee177fd68	634	* @arg @ref LL_RCC_SYSCLK_DIV_4
Kojto	158:b23ee177fd68	635	* @arg @ref LL_RCC_SYSCLK_DIV_8
Kojto	158:b23ee177fd68	636	* @arg @ref LL_RCC_SYSCLK_DIV_16
Kojto	158:b23ee177fd68	637	* @arg @ref LL_RCC_SYSCLK_DIV_64
Kojto	158:b23ee177fd68	638	* @arg @ref LL_RCC_SYSCLK_DIV_128
Kojto	158:b23ee177fd68	639	* @arg @ref LL_RCC_SYSCLK_DIV_256
Kojto	158:b23ee177fd68	640	* @arg @ref LL_RCC_SYSCLK_DIV_512
Kojto	158:b23ee177fd68	641	* @retval HCLK clock frequency (in Hz)
Kojto	158:b23ee177fd68	642	*/
Kojto	158:b23ee177fd68	643	#define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_POSITION_HPRE])
Kojto	158:b23ee177fd68	644
Kojto	158:b23ee177fd68	645	/**
Kojto	158:b23ee177fd68	646	* @brief Helper macro to calculate the PCLK1 frequency (ABP1)
Kojto	158:b23ee177fd68	647	* @note: __APB1PRESCALER__ be retrieved by @ref LL_RCC_GetAPB1Prescaler
Kojto	158:b23ee177fd68	648	* ex: __LL_RCC_CALC_PCLK1_FREQ(LL_RCC_GetAPB1Prescaler())
Kojto	158:b23ee177fd68	649	* @param __HCLKFREQ__ HCLK frequency
Kojto	158:b23ee177fd68	650	* @param __APB1PRESCALER__: This parameter can be one of the following values:
Kojto	158:b23ee177fd68	651	* @arg @ref LL_RCC_APB1_DIV_1
Kojto	158:b23ee177fd68	652	* @arg @ref LL_RCC_APB1_DIV_2
Kojto	158:b23ee177fd68	653	* @arg @ref LL_RCC_APB1_DIV_4
Kojto	158:b23ee177fd68	654	* @arg @ref LL_RCC_APB1_DIV_8
Kojto	158:b23ee177fd68	655	* @arg @ref LL_RCC_APB1_DIV_16
Kojto	158:b23ee177fd68	656	* @retval PCLK1 clock frequency (in Hz)
Kojto	158:b23ee177fd68	657	*/
Kojto	158:b23ee177fd68	658	#define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB1PRESCALER__) >> RCC_POSITION_PPRE1])
Kojto	158:b23ee177fd68	659
Kojto	158:b23ee177fd68	660	/**
Kojto	158:b23ee177fd68	661	* @brief Helper macro to calculate the PCLK2 frequency (ABP2)
Kojto	158:b23ee177fd68	662	* @note: __APB2PRESCALER__ be retrieved by @ref LL_RCC_GetAPB2Prescaler
Kojto	158:b23ee177fd68	663	* ex: __LL_RCC_CALC_PCLK2_FREQ(LL_RCC_GetAPB2Prescaler())
Kojto	158:b23ee177fd68	664	* @param __HCLKFREQ__ HCLK frequency
Kojto	158:b23ee177fd68	665	* @param __APB2PRESCALER__: This parameter can be one of the following values:
Kojto	158:b23ee177fd68	666	* @arg @ref LL_RCC_APB2_DIV_1
Kojto	158:b23ee177fd68	667	* @arg @ref LL_RCC_APB2_DIV_2
Kojto	158:b23ee177fd68	668	* @arg @ref LL_RCC_APB2_DIV_4
Kojto	158:b23ee177fd68	669	* @arg @ref LL_RCC_APB2_DIV_8
Kojto	158:b23ee177fd68	670	* @arg @ref LL_RCC_APB2_DIV_16
Kojto	158:b23ee177fd68	671	* @retval PCLK2 clock frequency (in Hz)
Kojto	158:b23ee177fd68	672	*/
Kojto	158:b23ee177fd68	673	#define __LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB2PRESCALER__) >> RCC_POSITION_PPRE2])
Kojto	158:b23ee177fd68	674
Kojto	158:b23ee177fd68	675	/**
Kojto	158:b23ee177fd68	676	* @brief Helper macro to calculate the MSI frequency (in Hz)
Kojto	158:b23ee177fd68	677	* @note: __MSIRANGE__can be retrieved by @ref LL_RCC_MSI_GetRange
Kojto	158:b23ee177fd68	678	* ex: __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange())
Kojto	158:b23ee177fd68	679	* @param __MSIRANGE__: This parameter can be one of the following values:
Kojto	158:b23ee177fd68	680	* @arg @ref LL_RCC_MSIRANGE_0
Kojto	158:b23ee177fd68	681	* @arg @ref LL_RCC_MSIRANGE_1
Kojto	158:b23ee177fd68	682	* @arg @ref LL_RCC_MSIRANGE_2
Kojto	158:b23ee177fd68	683	* @arg @ref LL_RCC_MSIRANGE_3
Kojto	158:b23ee177fd68	684	* @arg @ref LL_RCC_MSIRANGE_4
Kojto	158:b23ee177fd68	685	* @arg @ref LL_RCC_MSIRANGE_5
Kojto	158:b23ee177fd68	686	* @arg @ref LL_RCC_MSIRANGE_6
Kojto	158:b23ee177fd68	687	* @retval MSI clock frequency (in Hz)
Kojto	158:b23ee177fd68	688	*/
Kojto	158:b23ee177fd68	689	#define __LL_RCC_CALC_MSI_FREQ(__MSIRANGE__) ((32768U * ( 1U << (((__MSIRANGE__) >> RCC_POSITION_MSIRANGE) + 1U))))
Kojto	158:b23ee177fd68	690
Kojto	158:b23ee177fd68	691	/**
Kojto	158:b23ee177fd68	692	* @}
Kojto	158:b23ee177fd68	693	*/
Kojto	158:b23ee177fd68	694
Kojto	158:b23ee177fd68	695	/**
Kojto	158:b23ee177fd68	696	* @}
Kojto	158:b23ee177fd68	697	*/
Kojto	158:b23ee177fd68	698
Kojto	158:b23ee177fd68	699	/* Exported functions --------------------------------------------------------*/
Kojto	158:b23ee177fd68	700	/** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
Kojto	158:b23ee177fd68	701	* @{
Kojto	158:b23ee177fd68	702	*/
Kojto	158:b23ee177fd68	703
Kojto	158:b23ee177fd68	704	/** @defgroup RCC_LL_EF_HSE HSE
Kojto	158:b23ee177fd68	705	* @{
Kojto	158:b23ee177fd68	706	*/
Kojto	158:b23ee177fd68	707
Kojto	158:b23ee177fd68	708	#if defined(RCC_HSECSS_SUPPORT)
Kojto	158:b23ee177fd68	709	/**
Kojto	158:b23ee177fd68	710	* @brief Enable the Clock Security System.
Kojto	158:b23ee177fd68	711	* @rmtoll CR CSSHSEON LL_RCC_HSE_EnableCSS
Kojto	158:b23ee177fd68	712	* @retval None
Kojto	158:b23ee177fd68	713	*/
Kojto	158:b23ee177fd68	714	__STATIC_INLINE void LL_RCC_HSE_EnableCSS(void)
Kojto	158:b23ee177fd68	715	{
Kojto	158:b23ee177fd68	716	SET_BIT(RCC->CR, RCC_CR_CSSON);
Kojto	158:b23ee177fd68	717	}
Kojto	158:b23ee177fd68	718	#endif /* RCC_HSECSS_SUPPORT */
Kojto	158:b23ee177fd68	719
Kojto	158:b23ee177fd68	720	/**
Kojto	158:b23ee177fd68	721	* @brief Enable HSE external oscillator (HSE Bypass)
Kojto	158:b23ee177fd68	722	* @rmtoll CR HSEBYP LL_RCC_HSE_EnableBypass
Kojto	158:b23ee177fd68	723	* @retval None
Kojto	158:b23ee177fd68	724	*/
Kojto	158:b23ee177fd68	725	__STATIC_INLINE void LL_RCC_HSE_EnableBypass(void)
Kojto	158:b23ee177fd68	726	{
Kojto	158:b23ee177fd68	727	SET_BIT(RCC->CR, RCC_CR_HSEBYP);
Kojto	158:b23ee177fd68	728	}
Kojto	158:b23ee177fd68	729
Kojto	158:b23ee177fd68	730	/**
Kojto	158:b23ee177fd68	731	* @brief Disable HSE external oscillator (HSE Bypass)
Kojto	158:b23ee177fd68	732	* @rmtoll CR HSEBYP LL_RCC_HSE_DisableBypass
Kojto	158:b23ee177fd68	733	* @retval None
Kojto	158:b23ee177fd68	734	*/
Kojto	158:b23ee177fd68	735	__STATIC_INLINE void LL_RCC_HSE_DisableBypass(void)
Kojto	158:b23ee177fd68	736	{
Kojto	158:b23ee177fd68	737	CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
Kojto	158:b23ee177fd68	738	}
Kojto	158:b23ee177fd68	739
Kojto	158:b23ee177fd68	740	/**
Kojto	158:b23ee177fd68	741	* @brief Enable HSE crystal oscillator (HSE ON)
Kojto	158:b23ee177fd68	742	* @rmtoll CR HSEON LL_RCC_HSE_Enable
Kojto	158:b23ee177fd68	743	* @retval None
Kojto	158:b23ee177fd68	744	*/
Kojto	158:b23ee177fd68	745	__STATIC_INLINE void LL_RCC_HSE_Enable(void)
Kojto	158:b23ee177fd68	746	{
Kojto	158:b23ee177fd68	747	SET_BIT(RCC->CR, RCC_CR_HSEON);
Kojto	158:b23ee177fd68	748	}
Kojto	158:b23ee177fd68	749
Kojto	158:b23ee177fd68	750	/**
Kojto	158:b23ee177fd68	751	* @brief Disable HSE crystal oscillator (HSE ON)
Kojto	158:b23ee177fd68	752	* @rmtoll CR HSEON LL_RCC_HSE_Disable
Kojto	158:b23ee177fd68	753	* @retval None
Kojto	158:b23ee177fd68	754	*/
Kojto	158:b23ee177fd68	755	__STATIC_INLINE void LL_RCC_HSE_Disable(void)
Kojto	158:b23ee177fd68	756	{
Kojto	158:b23ee177fd68	757	CLEAR_BIT(RCC->CR, RCC_CR_HSEON);
Kojto	158:b23ee177fd68	758	}
Kojto	158:b23ee177fd68	759
Kojto	158:b23ee177fd68	760	/**
Kojto	158:b23ee177fd68	761	* @brief Check if HSE oscillator Ready
Kojto	158:b23ee177fd68	762	* @rmtoll CR HSERDY LL_RCC_HSE_IsReady
Kojto	158:b23ee177fd68	763	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	764	*/
Kojto	158:b23ee177fd68	765	__STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
Kojto	158:b23ee177fd68	766	{
Kojto	158:b23ee177fd68	767	return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY));
Kojto	158:b23ee177fd68	768	}
Kojto	158:b23ee177fd68	769
Kojto	158:b23ee177fd68	770	/**
Kojto	158:b23ee177fd68	771	* @brief Configure the RTC prescaler (divider)
Kojto	158:b23ee177fd68	772	* @rmtoll CR RTCPRE LL_RCC_SetRTC_HSEPrescaler
Kojto	158:b23ee177fd68	773	* @param Div This parameter can be one of the following values:
Kojto	158:b23ee177fd68	774	* @arg @ref LL_RCC_RTC_HSE_DIV_2
Kojto	158:b23ee177fd68	775	* @arg @ref LL_RCC_RTC_HSE_DIV_4
Kojto	158:b23ee177fd68	776	* @arg @ref LL_RCC_RTC_HSE_DIV_8
Kojto	158:b23ee177fd68	777	* @arg @ref LL_RCC_RTC_HSE_DIV_16
Kojto	158:b23ee177fd68	778	* @retval None
Kojto	158:b23ee177fd68	779	*/
Kojto	158:b23ee177fd68	780	__STATIC_INLINE void LL_RCC_SetRTC_HSEPrescaler(uint32_t Div)
Kojto	158:b23ee177fd68	781	{
Kojto	158:b23ee177fd68	782	MODIFY_REG(RCC->CR, RCC_CR_RTCPRE, Div);
Kojto	158:b23ee177fd68	783	}
Kojto	158:b23ee177fd68	784
Kojto	158:b23ee177fd68	785	/**
Kojto	158:b23ee177fd68	786	* @brief Get the RTC divider (prescaler)
Kojto	158:b23ee177fd68	787	* @rmtoll CR RTCPRE LL_RCC_GetRTC_HSEPrescaler
Kojto	158:b23ee177fd68	788	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	789	* @arg @ref LL_RCC_RTC_HSE_DIV_2
Kojto	158:b23ee177fd68	790	* @arg @ref LL_RCC_RTC_HSE_DIV_4
Kojto	158:b23ee177fd68	791	* @arg @ref LL_RCC_RTC_HSE_DIV_8
Kojto	158:b23ee177fd68	792	* @arg @ref LL_RCC_RTC_HSE_DIV_16
Kojto	158:b23ee177fd68	793	*/
Kojto	158:b23ee177fd68	794	__STATIC_INLINE uint32_t LL_RCC_GetRTC_HSEPrescaler(void)
Kojto	158:b23ee177fd68	795	{
Kojto	158:b23ee177fd68	796	return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_RTCPRE));
Kojto	158:b23ee177fd68	797	}
Kojto	158:b23ee177fd68	798
Kojto	158:b23ee177fd68	799	/**
Kojto	158:b23ee177fd68	800	* @}
Kojto	158:b23ee177fd68	801	*/
Kojto	158:b23ee177fd68	802
Kojto	158:b23ee177fd68	803	/** @defgroup RCC_LL_EF_HSI HSI
Kojto	158:b23ee177fd68	804	* @{
Kojto	158:b23ee177fd68	805	*/
Kojto	158:b23ee177fd68	806
Kojto	158:b23ee177fd68	807	/**
Kojto	158:b23ee177fd68	808	* @brief Enable HSI oscillator
Kojto	158:b23ee177fd68	809	* @rmtoll CR HSION LL_RCC_HSI_Enable
Kojto	158:b23ee177fd68	810	* @retval None
Kojto	158:b23ee177fd68	811	*/
Kojto	158:b23ee177fd68	812	__STATIC_INLINE void LL_RCC_HSI_Enable(void)
Kojto	158:b23ee177fd68	813	{
Kojto	158:b23ee177fd68	814	SET_BIT(RCC->CR, RCC_CR_HSION);
Kojto	158:b23ee177fd68	815	}
Kojto	158:b23ee177fd68	816
Kojto	158:b23ee177fd68	817	/**
Kojto	158:b23ee177fd68	818	* @brief Disable HSI oscillator
Kojto	158:b23ee177fd68	819	* @rmtoll CR HSION LL_RCC_HSI_Disable
Kojto	158:b23ee177fd68	820	* @retval None
Kojto	158:b23ee177fd68	821	*/
Kojto	158:b23ee177fd68	822	__STATIC_INLINE void LL_RCC_HSI_Disable(void)
Kojto	158:b23ee177fd68	823	{
Kojto	158:b23ee177fd68	824	CLEAR_BIT(RCC->CR, RCC_CR_HSION);
Kojto	158:b23ee177fd68	825	}
Kojto	158:b23ee177fd68	826
Kojto	158:b23ee177fd68	827	/**
Kojto	158:b23ee177fd68	828	* @brief Check if HSI clock is ready
Kojto	158:b23ee177fd68	829	* @rmtoll CR HSIRDY LL_RCC_HSI_IsReady
Kojto	158:b23ee177fd68	830	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	831	*/
Kojto	158:b23ee177fd68	832	__STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
Kojto	158:b23ee177fd68	833	{
Kojto	158:b23ee177fd68	834	return (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY));
Kojto	158:b23ee177fd68	835	}
Kojto	158:b23ee177fd68	836
Kojto	158:b23ee177fd68	837	/**
Kojto	158:b23ee177fd68	838	* @brief Enable HSI even in stop mode
Kojto	158:b23ee177fd68	839	* @note HSI oscillator is forced ON even in Stop mode
Kojto	158:b23ee177fd68	840	* @rmtoll CR HSIKERON LL_RCC_HSI_EnableInStopMode
Kojto	158:b23ee177fd68	841	* @retval None
Kojto	158:b23ee177fd68	842	*/
Kojto	158:b23ee177fd68	843	__STATIC_INLINE void LL_RCC_HSI_EnableInStopMode(void)
Kojto	158:b23ee177fd68	844	{
Kojto	158:b23ee177fd68	845	SET_BIT(RCC->CR, RCC_CR_HSIKERON);
Kojto	158:b23ee177fd68	846	}
Kojto	158:b23ee177fd68	847
Kojto	158:b23ee177fd68	848	/**
Kojto	158:b23ee177fd68	849	* @brief Disable HSI in stop mode
Kojto	158:b23ee177fd68	850	* @rmtoll CR HSIKERON LL_RCC_HSI_DisableInStopMode
Kojto	158:b23ee177fd68	851	* @retval None
Kojto	158:b23ee177fd68	852	*/
Kojto	158:b23ee177fd68	853	__STATIC_INLINE void LL_RCC_HSI_DisableInStopMode(void)
Kojto	158:b23ee177fd68	854	{
Kojto	158:b23ee177fd68	855	CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON);
Kojto	158:b23ee177fd68	856	}
Kojto	158:b23ee177fd68	857
Kojto	158:b23ee177fd68	858	/**
Kojto	158:b23ee177fd68	859	* @brief Enable HSI Divider (it divides by 4)
Kojto	158:b23ee177fd68	860	* @rmtoll CR HSIDIVEN LL_RCC_HSI_EnableDivider
Kojto	158:b23ee177fd68	861	* @retval None
Kojto	158:b23ee177fd68	862	*/
Kojto	158:b23ee177fd68	863	__STATIC_INLINE void LL_RCC_HSI_EnableDivider(void)
Kojto	158:b23ee177fd68	864	{
Kojto	158:b23ee177fd68	865	SET_BIT(RCC->CR, RCC_CR_HSIDIVEN);
Kojto	158:b23ee177fd68	866	}
Kojto	158:b23ee177fd68	867
Kojto	158:b23ee177fd68	868	/**
Kojto	158:b23ee177fd68	869	* @brief Disable HSI Divider (it divides by 4)
Kojto	158:b23ee177fd68	870	* @rmtoll CR HSIDIVEN LL_RCC_HSI_DisableDivider
Kojto	158:b23ee177fd68	871	* @retval None
Kojto	158:b23ee177fd68	872	*/
Kojto	158:b23ee177fd68	873	__STATIC_INLINE void LL_RCC_HSI_DisableDivider(void)
Kojto	158:b23ee177fd68	874	{
Kojto	158:b23ee177fd68	875	CLEAR_BIT(RCC->CR, RCC_CR_HSIDIVEN);
Kojto	158:b23ee177fd68	876	}
Kojto	158:b23ee177fd68	877
Kojto	158:b23ee177fd68	878
Kojto	158:b23ee177fd68	879
Kojto	158:b23ee177fd68	880	#if defined(RCC_CR_HSIOUTEN)
Kojto	158:b23ee177fd68	881	/**
Kojto	158:b23ee177fd68	882	* @brief Enable HSI Output
Kojto	158:b23ee177fd68	883	* @rmtoll CR HSIOUTEN LL_RCC_HSI_EnableOutput
Kojto	158:b23ee177fd68	884	* @retval None
Kojto	158:b23ee177fd68	885	*/
Kojto	158:b23ee177fd68	886	__STATIC_INLINE void LL_RCC_HSI_EnableOutput(void)
Kojto	158:b23ee177fd68	887	{
Kojto	158:b23ee177fd68	888	SET_BIT(RCC->CR, RCC_CR_HSIOUTEN);
Kojto	158:b23ee177fd68	889	}
Kojto	158:b23ee177fd68	890
Kojto	158:b23ee177fd68	891	/**
Kojto	158:b23ee177fd68	892	* @brief Disable HSI Output
Kojto	158:b23ee177fd68	893	* @rmtoll CR HSIOUTEN LL_RCC_HSI_DisableOutput
Kojto	158:b23ee177fd68	894	* @retval None
Kojto	158:b23ee177fd68	895	*/
Kojto	158:b23ee177fd68	896	__STATIC_INLINE void LL_RCC_HSI_DisableOutput(void)
Kojto	158:b23ee177fd68	897	{
Kojto	158:b23ee177fd68	898	CLEAR_BIT(RCC->CR, RCC_CR_HSIOUTEN);
Kojto	158:b23ee177fd68	899	}
Kojto	158:b23ee177fd68	900	#endif /* RCC_CR_HSIOUTEN */
Kojto	158:b23ee177fd68	901
Kojto	158:b23ee177fd68	902	/**
Kojto	158:b23ee177fd68	903	* @brief Get HSI Calibration value
Kojto	158:b23ee177fd68	904	* @note When HSITRIM is written, HSICAL is updated with the sum of
Kojto	158:b23ee177fd68	905	* HSITRIM and the factory trim value
Kojto	158:b23ee177fd68	906	* @rmtoll ICSCR HSICAL LL_RCC_HSI_GetCalibration
Kojto	158:b23ee177fd68	907	* @retval Between Min_Data = 0x00 and Max_Data = 0xFF
Kojto	158:b23ee177fd68	908	*/
Kojto	158:b23ee177fd68	909	__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void)
Kojto	158:b23ee177fd68	910	{
Kojto	158:b23ee177fd68	911	return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSICAL) >> RCC_POSITION_HSICAL);
Kojto	158:b23ee177fd68	912	}
Kojto	158:b23ee177fd68	913
Kojto	158:b23ee177fd68	914	/**
Kojto	158:b23ee177fd68	915	* @brief Set HSI Calibration trimming
Kojto	158:b23ee177fd68	916	* @note user-programmable trimming value that is added to the HSICAL
Kojto	158:b23ee177fd68	917	* @note Default value is 16, which, when added to the HSICAL value,
Kojto	158:b23ee177fd68	918	* should trim the HSI to 16 MHz +/- 1 %
Kojto	158:b23ee177fd68	919	* @rmtoll ICSCR HSITRIM LL_RCC_HSI_SetCalibTrimming
Kojto	158:b23ee177fd68	920	* @param Value between Min_Data = 0x00 and Max_Data = 0x1F
Kojto	158:b23ee177fd68	921	* @retval None
Kojto	158:b23ee177fd68	922	*/
Kojto	158:b23ee177fd68	923	__STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
Kojto	158:b23ee177fd68	924	{
Kojto	158:b23ee177fd68	925	MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, Value << RCC_POSITION_HSITRIM);
Kojto	158:b23ee177fd68	926	}
Kojto	158:b23ee177fd68	927
Kojto	158:b23ee177fd68	928	/**
Kojto	158:b23ee177fd68	929	* @brief Get HSI Calibration trimming
Kojto	158:b23ee177fd68	930	* @rmtoll ICSCR HSITRIM LL_RCC_HSI_GetCalibTrimming
Kojto	158:b23ee177fd68	931	* @retval Between Min_Data = 0x00 and Max_Data = 0x1F
Kojto	158:b23ee177fd68	932	*/
Kojto	158:b23ee177fd68	933	__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
Kojto	158:b23ee177fd68	934	{
Kojto	158:b23ee177fd68	935	return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSITRIM) >> RCC_POSITION_HSITRIM);
Kojto	158:b23ee177fd68	936	}
Kojto	158:b23ee177fd68	937
Kojto	158:b23ee177fd68	938	/**
Kojto	158:b23ee177fd68	939	* @}
Kojto	158:b23ee177fd68	940	*/
Kojto	158:b23ee177fd68	941
Kojto	158:b23ee177fd68	942	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	943	/** @defgroup RCC_LL_EF_HSI48 HSI48
Kojto	158:b23ee177fd68	944	* @{
Kojto	158:b23ee177fd68	945	*/
Kojto	158:b23ee177fd68	946
Kojto	158:b23ee177fd68	947	/**
Kojto	158:b23ee177fd68	948	* @brief Enable HSI48
Kojto	158:b23ee177fd68	949	* @rmtoll CRRCR HSI48ON LL_RCC_HSI48_Enable
Kojto	158:b23ee177fd68	950	* @retval None
Kojto	158:b23ee177fd68	951	*/
Kojto	158:b23ee177fd68	952	__STATIC_INLINE void LL_RCC_HSI48_Enable(void)
Kojto	158:b23ee177fd68	953	{
Kojto	158:b23ee177fd68	954	SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON);
Kojto	158:b23ee177fd68	955	}
Kojto	158:b23ee177fd68	956
Kojto	158:b23ee177fd68	957	/**
Kojto	158:b23ee177fd68	958	* @brief Disable HSI48
Kojto	158:b23ee177fd68	959	* @rmtoll CRRCR HSI48ON LL_RCC_HSI48_Disable
Kojto	158:b23ee177fd68	960	* @retval None
Kojto	158:b23ee177fd68	961	*/
Kojto	158:b23ee177fd68	962	__STATIC_INLINE void LL_RCC_HSI48_Disable(void)
Kojto	158:b23ee177fd68	963	{
Kojto	158:b23ee177fd68	964	CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON);
Kojto	158:b23ee177fd68	965	}
Kojto	158:b23ee177fd68	966
Kojto	158:b23ee177fd68	967	/**
Kojto	158:b23ee177fd68	968	* @brief Check if HSI48 oscillator Ready
Kojto	158:b23ee177fd68	969	* @rmtoll CRRCR HSI48RDY LL_RCC_HSI48_IsReady
Kojto	158:b23ee177fd68	970	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	971	*/
Kojto	158:b23ee177fd68	972	__STATIC_INLINE uint32_t LL_RCC_HSI48_IsReady(void)
Kojto	158:b23ee177fd68	973	{
Kojto	158:b23ee177fd68	974	return (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == (RCC_CRRCR_HSI48RDY));
Kojto	158:b23ee177fd68	975	}
Kojto	158:b23ee177fd68	976
Kojto	158:b23ee177fd68	977	/**
Kojto	158:b23ee177fd68	978	* @brief Get HSI48 Calibration value
Kojto	158:b23ee177fd68	979	* @rmtoll CRRCR HSI48CAL LL_RCC_HSI48_GetCalibration
Kojto	158:b23ee177fd68	980	* @retval Between Min_Data = 0x00 and Max_Data = 0xFF
Kojto	158:b23ee177fd68	981	*/
Kojto	158:b23ee177fd68	982	__STATIC_INLINE uint32_t LL_RCC_HSI48_GetCalibration(void)
Kojto	158:b23ee177fd68	983	{
Kojto	158:b23ee177fd68	984	return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_POSITION_HSI48CAL);
Kojto	158:b23ee177fd68	985	}
Kojto	158:b23ee177fd68	986
Kojto	158:b23ee177fd68	987	#if defined(RCC_CRRCR_HSI48DIV6OUTEN)
Kojto	158:b23ee177fd68	988	/**
Kojto	158:b23ee177fd68	989	* @brief Enable HSI48 Divider (it divides by 6)
Kojto	158:b23ee177fd68	990	* @rmtoll CRRCR HSI48DIV6OUTEN LL_RCC_HSI48_EnableDivider
Kojto	158:b23ee177fd68	991	* @retval None
Kojto	158:b23ee177fd68	992	*/
Kojto	158:b23ee177fd68	993	__STATIC_INLINE void LL_RCC_HSI48_EnableDivider(void)
Kojto	158:b23ee177fd68	994	{
Kojto	158:b23ee177fd68	995	SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN);
Kojto	158:b23ee177fd68	996	}
Kojto	158:b23ee177fd68	997
Kojto	158:b23ee177fd68	998	/**
Kojto	158:b23ee177fd68	999	* @brief Disable HSI48 Divider (it divides by 6)
Kojto	158:b23ee177fd68	1000	* @rmtoll CRRCR HSI48DIV6OUTEN LL_RCC_HSI48_DisableDivider
Kojto	158:b23ee177fd68	1001	* @retval None
Kojto	158:b23ee177fd68	1002	*/
Kojto	158:b23ee177fd68	1003	__STATIC_INLINE void LL_RCC_HSI48_DisableDivider(void)
Kojto	158:b23ee177fd68	1004	{
Kojto	158:b23ee177fd68	1005	CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN);
Kojto	158:b23ee177fd68	1006	}
Kojto	158:b23ee177fd68	1007
Kojto	158:b23ee177fd68	1008	/**
Kojto	158:b23ee177fd68	1009	* @brief Check if HSI48 Divider is enabled (it divides by 6)
Kojto	158:b23ee177fd68	1010	* @rmtoll CRRCR HSI48DIV6OUTEN LL_RCC_HSI48_IsDivided
Kojto	158:b23ee177fd68	1011	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1012	*/
Kojto	158:b23ee177fd68	1013	__STATIC_INLINE uint32_t LL_RCC_HSI48_IsDivided(void)
Kojto	158:b23ee177fd68	1014	{
Kojto	158:b23ee177fd68	1015	return (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN) == (RCC_CRRCR_HSI48DIV6OUTEN));
Kojto	158:b23ee177fd68	1016	}
Kojto	158:b23ee177fd68	1017
Kojto	158:b23ee177fd68	1018	#endif /RCC_CRRCR_HSI48DIV6OUTEN/
Kojto	158:b23ee177fd68	1019
Kojto	158:b23ee177fd68	1020	/**
Kojto	158:b23ee177fd68	1021	* @}
Kojto	158:b23ee177fd68	1022	*/
Kojto	158:b23ee177fd68	1023
Kojto	158:b23ee177fd68	1024	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	1025
Kojto	158:b23ee177fd68	1026	/** @defgroup RCC_LL_EF_LSE LSE
Kojto	158:b23ee177fd68	1027	* @{
Kojto	158:b23ee177fd68	1028	*/
Kojto	158:b23ee177fd68	1029
Kojto	158:b23ee177fd68	1030	/**
Kojto	158:b23ee177fd68	1031	* @brief Enable Low Speed External (LSE) crystal.
Kojto	158:b23ee177fd68	1032	* @rmtoll CSR LSEON LL_RCC_LSE_Enable
Kojto	158:b23ee177fd68	1033	* @retval None
Kojto	158:b23ee177fd68	1034	*/
Kojto	158:b23ee177fd68	1035	__STATIC_INLINE void LL_RCC_LSE_Enable(void)
Kojto	158:b23ee177fd68	1036	{
Kojto	158:b23ee177fd68	1037	SET_BIT(RCC->CSR, RCC_CSR_LSEON);
Kojto	158:b23ee177fd68	1038	}
Kojto	158:b23ee177fd68	1039
Kojto	158:b23ee177fd68	1040	/**
Kojto	158:b23ee177fd68	1041	* @brief Disable Low Speed External (LSE) crystal.
Kojto	158:b23ee177fd68	1042	* @rmtoll CSR LSEON LL_RCC_LSE_Disable
Kojto	158:b23ee177fd68	1043	* @retval None
Kojto	158:b23ee177fd68	1044	*/
Kojto	158:b23ee177fd68	1045	__STATIC_INLINE void LL_RCC_LSE_Disable(void)
Kojto	158:b23ee177fd68	1046	{
Kojto	158:b23ee177fd68	1047	CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON);
Kojto	158:b23ee177fd68	1048	}
Kojto	158:b23ee177fd68	1049
Kojto	158:b23ee177fd68	1050	/**
Kojto	158:b23ee177fd68	1051	* @brief Enable external clock source (LSE bypass).
Kojto	158:b23ee177fd68	1052	* @rmtoll CSR LSEBYP LL_RCC_LSE_EnableBypass
Kojto	158:b23ee177fd68	1053	* @retval None
Kojto	158:b23ee177fd68	1054	*/
Kojto	158:b23ee177fd68	1055	__STATIC_INLINE void LL_RCC_LSE_EnableBypass(void)
Kojto	158:b23ee177fd68	1056	{
Kojto	158:b23ee177fd68	1057	SET_BIT(RCC->CSR, RCC_CSR_LSEBYP);
Kojto	158:b23ee177fd68	1058	}
Kojto	158:b23ee177fd68	1059
Kojto	158:b23ee177fd68	1060	/**
Kojto	158:b23ee177fd68	1061	* @brief Disable external clock source (LSE bypass).
Kojto	158:b23ee177fd68	1062	* @rmtoll CSR LSEBYP LL_RCC_LSE_DisableBypass
Kojto	158:b23ee177fd68	1063	* @retval None
Kojto	158:b23ee177fd68	1064	*/
Kojto	158:b23ee177fd68	1065	__STATIC_INLINE void LL_RCC_LSE_DisableBypass(void)
Kojto	158:b23ee177fd68	1066	{
Kojto	158:b23ee177fd68	1067	CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP);
Kojto	158:b23ee177fd68	1068	}
Kojto	158:b23ee177fd68	1069
Kojto	158:b23ee177fd68	1070	/**
Kojto	158:b23ee177fd68	1071	* @brief Set LSE oscillator drive capability
Kojto	158:b23ee177fd68	1072	* @note The oscillator is in Xtal mode when it is not in bypass mode.
Kojto	158:b23ee177fd68	1073	* @rmtoll CSR LSEDRV LL_RCC_LSE_SetDriveCapability
Kojto	158:b23ee177fd68	1074	* @param LSEDrive This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1075	* @arg @ref LL_RCC_LSEDRIVE_LOW
Kojto	158:b23ee177fd68	1076	* @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW
Kojto	158:b23ee177fd68	1077	* @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
Kojto	158:b23ee177fd68	1078	* @arg @ref LL_RCC_LSEDRIVE_HIGH
Kojto	158:b23ee177fd68	1079	* @retval None
Kojto	158:b23ee177fd68	1080	*/
Kojto	158:b23ee177fd68	1081	__STATIC_INLINE void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive)
Kojto	158:b23ee177fd68	1082	{
Kojto	158:b23ee177fd68	1083	MODIFY_REG(RCC->CSR, RCC_CSR_LSEDRV, LSEDrive);
Kojto	158:b23ee177fd68	1084	}
Kojto	158:b23ee177fd68	1085
Kojto	158:b23ee177fd68	1086	/**
Kojto	158:b23ee177fd68	1087	* @brief Get LSE oscillator drive capability
Kojto	158:b23ee177fd68	1088	* @rmtoll CSR LSEDRV LL_RCC_LSE_GetDriveCapability
Kojto	158:b23ee177fd68	1089	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1090	* @arg @ref LL_RCC_LSEDRIVE_LOW
Kojto	158:b23ee177fd68	1091	* @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW
Kojto	158:b23ee177fd68	1092	* @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
Kojto	158:b23ee177fd68	1093	* @arg @ref LL_RCC_LSEDRIVE_HIGH
Kojto	158:b23ee177fd68	1094	*/
Kojto	158:b23ee177fd68	1095	__STATIC_INLINE uint32_t LL_RCC_LSE_GetDriveCapability(void)
Kojto	158:b23ee177fd68	1096	{
Kojto	158:b23ee177fd68	1097	return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_LSEDRV));
Kojto	158:b23ee177fd68	1098	}
Kojto	158:b23ee177fd68	1099
Kojto	158:b23ee177fd68	1100	/**
Kojto	158:b23ee177fd68	1101	* @brief Enable Clock security system on LSE.
Kojto	158:b23ee177fd68	1102	* @rmtoll CSR LSECSSON LL_RCC_LSE_EnableCSS
Kojto	158:b23ee177fd68	1103	* @retval None
Kojto	158:b23ee177fd68	1104	*/
Kojto	158:b23ee177fd68	1105	__STATIC_INLINE void LL_RCC_LSE_EnableCSS(void)
Kojto	158:b23ee177fd68	1106	{
Kojto	158:b23ee177fd68	1107	SET_BIT(RCC->CSR, RCC_CSR_LSECSSON);
Kojto	158:b23ee177fd68	1108	}
Kojto	158:b23ee177fd68	1109
Kojto	158:b23ee177fd68	1110	/**
Kojto	158:b23ee177fd68	1111	* @brief Disable Clock security system on LSE.
Kojto	158:b23ee177fd68	1112	* @note Clock security system can be disabled only after a LSE
Kojto	158:b23ee177fd68	1113	* failure detection. In that case it MUST be disabled by software.
Kojto	158:b23ee177fd68	1114	* @rmtoll CSR LSECSSON LL_RCC_LSE_DisableCSS
Kojto	158:b23ee177fd68	1115	* @retval None
Kojto	158:b23ee177fd68	1116	*/
Kojto	158:b23ee177fd68	1117	__STATIC_INLINE void LL_RCC_LSE_DisableCSS(void)
Kojto	158:b23ee177fd68	1118	{
Kojto	158:b23ee177fd68	1119	CLEAR_BIT(RCC->CSR, RCC_CSR_LSECSSON);
Kojto	158:b23ee177fd68	1120	}
Kojto	158:b23ee177fd68	1121
Kojto	158:b23ee177fd68	1122	/**
Kojto	158:b23ee177fd68	1123	* @brief Check if LSE oscillator Ready
Kojto	158:b23ee177fd68	1124	* @rmtoll CSR LSERDY LL_RCC_LSE_IsReady
Kojto	158:b23ee177fd68	1125	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1126	*/
Kojto	158:b23ee177fd68	1127	__STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
Kojto	158:b23ee177fd68	1128	{
Kojto	158:b23ee177fd68	1129	return (READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == (RCC_CSR_LSERDY));
Kojto	158:b23ee177fd68	1130	}
Kojto	158:b23ee177fd68	1131
Kojto	158:b23ee177fd68	1132	/**
Kojto	158:b23ee177fd68	1133	* @brief Check if CSS on LSE failure Detection
Kojto	158:b23ee177fd68	1134	* @rmtoll CSR LSECSSD LL_RCC_LSE_IsCSSDetected
Kojto	158:b23ee177fd68	1135	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1136	*/
Kojto	158:b23ee177fd68	1137	__STATIC_INLINE uint32_t LL_RCC_LSE_IsCSSDetected(void)
Kojto	158:b23ee177fd68	1138	{
Kojto	158:b23ee177fd68	1139	return (READ_BIT(RCC->CSR, RCC_CSR_LSECSSD) == (RCC_CSR_LSECSSD));
Kojto	158:b23ee177fd68	1140	}
Kojto	158:b23ee177fd68	1141
Kojto	158:b23ee177fd68	1142	/**
Kojto	158:b23ee177fd68	1143	* @}
Kojto	158:b23ee177fd68	1144	*/
Kojto	158:b23ee177fd68	1145
Kojto	158:b23ee177fd68	1146	/** @defgroup RCC_LL_EF_LSI LSI
Kojto	158:b23ee177fd68	1147	* @{
Kojto	158:b23ee177fd68	1148	*/
Kojto	158:b23ee177fd68	1149
Kojto	158:b23ee177fd68	1150	/**
Kojto	158:b23ee177fd68	1151	* @brief Enable LSI Oscillator
Kojto	158:b23ee177fd68	1152	* @rmtoll CSR LSION LL_RCC_LSI_Enable
Kojto	158:b23ee177fd68	1153	* @retval None
Kojto	158:b23ee177fd68	1154	*/
Kojto	158:b23ee177fd68	1155	__STATIC_INLINE void LL_RCC_LSI_Enable(void)
Kojto	158:b23ee177fd68	1156	{
Kojto	158:b23ee177fd68	1157	SET_BIT(RCC->CSR, RCC_CSR_LSION);
Kojto	158:b23ee177fd68	1158	}
Kojto	158:b23ee177fd68	1159
Kojto	158:b23ee177fd68	1160	/**
Kojto	158:b23ee177fd68	1161	* @brief Disable LSI Oscillator
Kojto	158:b23ee177fd68	1162	* @rmtoll CSR LSION LL_RCC_LSI_Disable
Kojto	158:b23ee177fd68	1163	* @retval None
Kojto	158:b23ee177fd68	1164	*/
Kojto	158:b23ee177fd68	1165	__STATIC_INLINE void LL_RCC_LSI_Disable(void)
Kojto	158:b23ee177fd68	1166	{
Kojto	158:b23ee177fd68	1167	CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
Kojto	158:b23ee177fd68	1168	}
Kojto	158:b23ee177fd68	1169
Kojto	158:b23ee177fd68	1170	/**
Kojto	158:b23ee177fd68	1171	* @brief Check if LSI is Ready
Kojto	158:b23ee177fd68	1172	* @rmtoll CSR LSIRDY LL_RCC_LSI_IsReady
Kojto	158:b23ee177fd68	1173	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1174	*/
Kojto	158:b23ee177fd68	1175	__STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
Kojto	158:b23ee177fd68	1176	{
Kojto	158:b23ee177fd68	1177	return (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY));
Kojto	158:b23ee177fd68	1178	}
Kojto	158:b23ee177fd68	1179
Kojto	158:b23ee177fd68	1180	/**
Kojto	158:b23ee177fd68	1181	* @}
Kojto	158:b23ee177fd68	1182	*/
Kojto	158:b23ee177fd68	1183
Kojto	158:b23ee177fd68	1184	/** @defgroup RCC_LL_EF_MSI MSI
Kojto	158:b23ee177fd68	1185	* @{
Kojto	158:b23ee177fd68	1186	*/
Kojto	158:b23ee177fd68	1187
Kojto	158:b23ee177fd68	1188	/**
Kojto	158:b23ee177fd68	1189	* @brief Enable MSI oscillator
Kojto	158:b23ee177fd68	1190	* @rmtoll CR MSION LL_RCC_MSI_Enable
Kojto	158:b23ee177fd68	1191	* @retval None
Kojto	158:b23ee177fd68	1192	*/
Kojto	158:b23ee177fd68	1193	__STATIC_INLINE void LL_RCC_MSI_Enable(void)
Kojto	158:b23ee177fd68	1194	{
Kojto	158:b23ee177fd68	1195	SET_BIT(RCC->CR, RCC_CR_MSION);
Kojto	158:b23ee177fd68	1196	}
Kojto	158:b23ee177fd68	1197
Kojto	158:b23ee177fd68	1198	/**
Kojto	158:b23ee177fd68	1199	* @brief Disable MSI oscillator
Kojto	158:b23ee177fd68	1200	* @rmtoll CR MSION LL_RCC_MSI_Disable
Kojto	158:b23ee177fd68	1201	* @retval None
Kojto	158:b23ee177fd68	1202	*/
Kojto	158:b23ee177fd68	1203	__STATIC_INLINE void LL_RCC_MSI_Disable(void)
Kojto	158:b23ee177fd68	1204	{
Kojto	158:b23ee177fd68	1205	CLEAR_BIT(RCC->CR, RCC_CR_MSION);
Kojto	158:b23ee177fd68	1206	}
Kojto	158:b23ee177fd68	1207
Kojto	158:b23ee177fd68	1208	/**
Kojto	158:b23ee177fd68	1209	* @brief Check if MSI oscillator Ready
Kojto	158:b23ee177fd68	1210	* @rmtoll CR MSIRDY LL_RCC_MSI_IsReady
Kojto	158:b23ee177fd68	1211	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1212	*/
Kojto	158:b23ee177fd68	1213	__STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void)
Kojto	158:b23ee177fd68	1214	{
Kojto	158:b23ee177fd68	1215	return (READ_BIT(RCC->CR, RCC_CR_MSIRDY) == (RCC_CR_MSIRDY));
Kojto	158:b23ee177fd68	1216	}
Kojto	158:b23ee177fd68	1217
Kojto	158:b23ee177fd68	1218	/**
Kojto	158:b23ee177fd68	1219	* @brief Configure the Internal Multi Speed oscillator (MSI) clock range in run mode.
Kojto	158:b23ee177fd68	1220	* @rmtoll ICSCR MSIRANGE LL_RCC_MSI_SetRange
Kojto	158:b23ee177fd68	1221	* @param Range This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1222	* @arg @ref LL_RCC_MSIRANGE_0
Kojto	158:b23ee177fd68	1223	* @arg @ref LL_RCC_MSIRANGE_1
Kojto	158:b23ee177fd68	1224	* @arg @ref LL_RCC_MSIRANGE_2
Kojto	158:b23ee177fd68	1225	* @arg @ref LL_RCC_MSIRANGE_3
Kojto	158:b23ee177fd68	1226	* @arg @ref LL_RCC_MSIRANGE_4
Kojto	158:b23ee177fd68	1227	* @arg @ref LL_RCC_MSIRANGE_5
Kojto	158:b23ee177fd68	1228	* @arg @ref LL_RCC_MSIRANGE_6
Kojto	158:b23ee177fd68	1229	* @retval None
Kojto	158:b23ee177fd68	1230	*/
Kojto	158:b23ee177fd68	1231	__STATIC_INLINE void LL_RCC_MSI_SetRange(uint32_t Range)
Kojto	158:b23ee177fd68	1232	{
Kojto	158:b23ee177fd68	1233	MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSIRANGE, Range);
Kojto	158:b23ee177fd68	1234	}
Kojto	158:b23ee177fd68	1235
Kojto	158:b23ee177fd68	1236	/**
Kojto	158:b23ee177fd68	1237	* @brief Get the Internal Multi Speed oscillator (MSI) clock range in run mode.
Kojto	158:b23ee177fd68	1238	* @rmtoll ICSCR MSIRANGE LL_RCC_MSI_GetRange
Kojto	158:b23ee177fd68	1239	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1240	* @arg @ref LL_RCC_MSIRANGE_0
Kojto	158:b23ee177fd68	1241	* @arg @ref LL_RCC_MSIRANGE_1
Kojto	158:b23ee177fd68	1242	* @arg @ref LL_RCC_MSIRANGE_2
Kojto	158:b23ee177fd68	1243	* @arg @ref LL_RCC_MSIRANGE_3
Kojto	158:b23ee177fd68	1244	* @arg @ref LL_RCC_MSIRANGE_4
Kojto	158:b23ee177fd68	1245	* @arg @ref LL_RCC_MSIRANGE_5
Kojto	158:b23ee177fd68	1246	* @arg @ref LL_RCC_MSIRANGE_6
Kojto	158:b23ee177fd68	1247	*/
Kojto	158:b23ee177fd68	1248	__STATIC_INLINE uint32_t LL_RCC_MSI_GetRange(void)
Kojto	158:b23ee177fd68	1249	{
Kojto	158:b23ee177fd68	1250	return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSIRANGE));
Kojto	158:b23ee177fd68	1251	}
Kojto	158:b23ee177fd68	1252
Kojto	158:b23ee177fd68	1253	/**
Kojto	158:b23ee177fd68	1254	* @brief Get MSI Calibration value
Kojto	158:b23ee177fd68	1255	* @note When MSITRIM is written, MSICAL is updated with the sum of
Kojto	158:b23ee177fd68	1256	* MSITRIM and the factory trim value
Kojto	158:b23ee177fd68	1257	* @rmtoll ICSCR MSICAL LL_RCC_MSI_GetCalibration
Kojto	158:b23ee177fd68	1258	* @retval Between Min_Data = 0x00 and Max_Data = 0xFF
Kojto	158:b23ee177fd68	1259	*/
Kojto	158:b23ee177fd68	1260	__STATIC_INLINE uint32_t LL_RCC_MSI_GetCalibration(void)
Kojto	158:b23ee177fd68	1261	{
Kojto	158:b23ee177fd68	1262	return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSICAL) >> RCC_POSITION_MSICAL);
Kojto	158:b23ee177fd68	1263	}
Kojto	158:b23ee177fd68	1264
Kojto	158:b23ee177fd68	1265	/**
Kojto	158:b23ee177fd68	1266	* @brief Set MSI Calibration trimming
Kojto	158:b23ee177fd68	1267	* @note user-programmable trimming value that is added to the MSICAL
Kojto	158:b23ee177fd68	1268	* @rmtoll ICSCR MSITRIM LL_RCC_MSI_SetCalibTrimming
Kojto	158:b23ee177fd68	1269	* @param Value between Min_Data = 0x00 and Max_Data = 0xFF
Kojto	158:b23ee177fd68	1270	* @retval None
Kojto	158:b23ee177fd68	1271	*/
Kojto	158:b23ee177fd68	1272	__STATIC_INLINE void LL_RCC_MSI_SetCalibTrimming(uint32_t Value)
Kojto	158:b23ee177fd68	1273	{
Kojto	158:b23ee177fd68	1274	MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, Value << RCC_POSITION_MSITRIM);
Kojto	158:b23ee177fd68	1275	}
Kojto	158:b23ee177fd68	1276
Kojto	158:b23ee177fd68	1277	/**
Kojto	158:b23ee177fd68	1278	* @brief Get MSI Calibration trimming
Kojto	158:b23ee177fd68	1279	* @rmtoll ICSCR MSITRIM LL_RCC_MSI_GetCalibTrimming
Kojto	158:b23ee177fd68	1280	* @retval Between Min_Data = 0x00 and Max_Data = 0xFF
Kojto	158:b23ee177fd68	1281	*/
Kojto	158:b23ee177fd68	1282	__STATIC_INLINE uint32_t LL_RCC_MSI_GetCalibTrimming(void)
Kojto	158:b23ee177fd68	1283	{
Kojto	158:b23ee177fd68	1284	return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSITRIM) >> RCC_POSITION_MSITRIM);
Kojto	158:b23ee177fd68	1285	}
Kojto	158:b23ee177fd68	1286
Kojto	158:b23ee177fd68	1287	/**
Kojto	158:b23ee177fd68	1288	* @}
Kojto	158:b23ee177fd68	1289	*/
Kojto	158:b23ee177fd68	1290
Kojto	158:b23ee177fd68	1291	/** @defgroup RCC_LL_EF_System System
Kojto	158:b23ee177fd68	1292	* @{
Kojto	158:b23ee177fd68	1293	*/
Kojto	158:b23ee177fd68	1294
Kojto	158:b23ee177fd68	1295	/**
Kojto	158:b23ee177fd68	1296	* @brief Configure the system clock source
Kojto	158:b23ee177fd68	1297	* @rmtoll CFGR SW LL_RCC_SetSysClkSource
Kojto	158:b23ee177fd68	1298	* @param Source This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1299	* @arg @ref LL_RCC_SYS_CLKSOURCE_MSI
Kojto	158:b23ee177fd68	1300	* @arg @ref LL_RCC_SYS_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1301	* @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
Kojto	158:b23ee177fd68	1302	* @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
Kojto	158:b23ee177fd68	1303	* @retval None
Kojto	158:b23ee177fd68	1304	*/
Kojto	158:b23ee177fd68	1305	__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
Kojto	158:b23ee177fd68	1306	{
Kojto	158:b23ee177fd68	1307	MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
Kojto	158:b23ee177fd68	1308	}
Kojto	158:b23ee177fd68	1309
Kojto	158:b23ee177fd68	1310	/**
Kojto	158:b23ee177fd68	1311	* @brief Get the system clock source
Kojto	158:b23ee177fd68	1312	* @rmtoll CFGR SWS LL_RCC_GetSysClkSource
Kojto	158:b23ee177fd68	1313	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1314	* @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_MSI
Kojto	158:b23ee177fd68	1315	* @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
Kojto	158:b23ee177fd68	1316	* @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
Kojto	158:b23ee177fd68	1317	* @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
Kojto	158:b23ee177fd68	1318	*/
Kojto	158:b23ee177fd68	1319	__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
Kojto	158:b23ee177fd68	1320	{
Kojto	158:b23ee177fd68	1321	return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
Kojto	158:b23ee177fd68	1322	}
Kojto	158:b23ee177fd68	1323
Kojto	158:b23ee177fd68	1324	/**
Kojto	158:b23ee177fd68	1325	* @brief Set AHB prescaler
Kojto	158:b23ee177fd68	1326	* @rmtoll CFGR HPRE LL_RCC_SetAHBPrescaler
Kojto	158:b23ee177fd68	1327	* @param Prescaler This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1328	* @arg @ref LL_RCC_SYSCLK_DIV_1
Kojto	158:b23ee177fd68	1329	* @arg @ref LL_RCC_SYSCLK_DIV_2
Kojto	158:b23ee177fd68	1330	* @arg @ref LL_RCC_SYSCLK_DIV_4
Kojto	158:b23ee177fd68	1331	* @arg @ref LL_RCC_SYSCLK_DIV_8
Kojto	158:b23ee177fd68	1332	* @arg @ref LL_RCC_SYSCLK_DIV_16
Kojto	158:b23ee177fd68	1333	* @arg @ref LL_RCC_SYSCLK_DIV_64
Kojto	158:b23ee177fd68	1334	* @arg @ref LL_RCC_SYSCLK_DIV_128
Kojto	158:b23ee177fd68	1335	* @arg @ref LL_RCC_SYSCLK_DIV_256
Kojto	158:b23ee177fd68	1336	* @arg @ref LL_RCC_SYSCLK_DIV_512
Kojto	158:b23ee177fd68	1337	* @retval None
Kojto	158:b23ee177fd68	1338	*/
Kojto	158:b23ee177fd68	1339	__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
Kojto	158:b23ee177fd68	1340	{
Kojto	158:b23ee177fd68	1341	MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
Kojto	158:b23ee177fd68	1342	}
Kojto	158:b23ee177fd68	1343
Kojto	158:b23ee177fd68	1344	/**
Kojto	158:b23ee177fd68	1345	* @brief Set APB1 prescaler
Kojto	158:b23ee177fd68	1346	* @rmtoll CFGR PPRE1 LL_RCC_SetAPB1Prescaler
Kojto	158:b23ee177fd68	1347	* @param Prescaler This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1348	* @arg @ref LL_RCC_APB1_DIV_1
Kojto	158:b23ee177fd68	1349	* @arg @ref LL_RCC_APB1_DIV_2
Kojto	158:b23ee177fd68	1350	* @arg @ref LL_RCC_APB1_DIV_4
Kojto	158:b23ee177fd68	1351	* @arg @ref LL_RCC_APB1_DIV_8
Kojto	158:b23ee177fd68	1352	* @arg @ref LL_RCC_APB1_DIV_16
Kojto	158:b23ee177fd68	1353	* @retval None
Kojto	158:b23ee177fd68	1354	*/
Kojto	158:b23ee177fd68	1355	__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
Kojto	158:b23ee177fd68	1356	{
Kojto	158:b23ee177fd68	1357	MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
Kojto	158:b23ee177fd68	1358	}
Kojto	158:b23ee177fd68	1359
Kojto	158:b23ee177fd68	1360	/**
Kojto	158:b23ee177fd68	1361	* @brief Set APB2 prescaler
Kojto	158:b23ee177fd68	1362	* @rmtoll CFGR PPRE2 LL_RCC_SetAPB2Prescaler
Kojto	158:b23ee177fd68	1363	* @param Prescaler This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1364	* @arg @ref LL_RCC_APB2_DIV_1
Kojto	158:b23ee177fd68	1365	* @arg @ref LL_RCC_APB2_DIV_2
Kojto	158:b23ee177fd68	1366	* @arg @ref LL_RCC_APB2_DIV_4
Kojto	158:b23ee177fd68	1367	* @arg @ref LL_RCC_APB2_DIV_8
Kojto	158:b23ee177fd68	1368	* @arg @ref LL_RCC_APB2_DIV_16
Kojto	158:b23ee177fd68	1369	* @retval None
Kojto	158:b23ee177fd68	1370	*/
Kojto	158:b23ee177fd68	1371	__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
Kojto	158:b23ee177fd68	1372	{
Kojto	158:b23ee177fd68	1373	MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
Kojto	158:b23ee177fd68	1374	}
Kojto	158:b23ee177fd68	1375
Kojto	158:b23ee177fd68	1376	/**
Kojto	158:b23ee177fd68	1377	* @brief Get AHB prescaler
Kojto	158:b23ee177fd68	1378	* @rmtoll CFGR HPRE LL_RCC_GetAHBPrescaler
Kojto	158:b23ee177fd68	1379	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1380	* @arg @ref LL_RCC_SYSCLK_DIV_1
Kojto	158:b23ee177fd68	1381	* @arg @ref LL_RCC_SYSCLK_DIV_2
Kojto	158:b23ee177fd68	1382	* @arg @ref LL_RCC_SYSCLK_DIV_4
Kojto	158:b23ee177fd68	1383	* @arg @ref LL_RCC_SYSCLK_DIV_8
Kojto	158:b23ee177fd68	1384	* @arg @ref LL_RCC_SYSCLK_DIV_16
Kojto	158:b23ee177fd68	1385	* @arg @ref LL_RCC_SYSCLK_DIV_64
Kojto	158:b23ee177fd68	1386	* @arg @ref LL_RCC_SYSCLK_DIV_128
Kojto	158:b23ee177fd68	1387	* @arg @ref LL_RCC_SYSCLK_DIV_256
Kojto	158:b23ee177fd68	1388	* @arg @ref LL_RCC_SYSCLK_DIV_512
Kojto	158:b23ee177fd68	1389	*/
Kojto	158:b23ee177fd68	1390	__STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void)
Kojto	158:b23ee177fd68	1391	{
Kojto	158:b23ee177fd68	1392	return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
Kojto	158:b23ee177fd68	1393	}
Kojto	158:b23ee177fd68	1394
Kojto	158:b23ee177fd68	1395	/**
Kojto	158:b23ee177fd68	1396	* @brief Get APB1 prescaler
Kojto	158:b23ee177fd68	1397	* @rmtoll CFGR PPRE1 LL_RCC_GetAPB1Prescaler
Kojto	158:b23ee177fd68	1398	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1399	* @arg @ref LL_RCC_APB1_DIV_1
Kojto	158:b23ee177fd68	1400	* @arg @ref LL_RCC_APB1_DIV_2
Kojto	158:b23ee177fd68	1401	* @arg @ref LL_RCC_APB1_DIV_4
Kojto	158:b23ee177fd68	1402	* @arg @ref LL_RCC_APB1_DIV_8
Kojto	158:b23ee177fd68	1403	* @arg @ref LL_RCC_APB1_DIV_16
Kojto	158:b23ee177fd68	1404	*/
Kojto	158:b23ee177fd68	1405	__STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void)
Kojto	158:b23ee177fd68	1406	{
Kojto	158:b23ee177fd68	1407	return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
Kojto	158:b23ee177fd68	1408	}
Kojto	158:b23ee177fd68	1409
Kojto	158:b23ee177fd68	1410	/**
Kojto	158:b23ee177fd68	1411	* @brief Get APB2 prescaler
Kojto	158:b23ee177fd68	1412	* @rmtoll CFGR PPRE2 LL_RCC_GetAPB2Prescaler
Kojto	158:b23ee177fd68	1413	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1414	* @arg @ref LL_RCC_APB2_DIV_1
Kojto	158:b23ee177fd68	1415	* @arg @ref LL_RCC_APB2_DIV_2
Kojto	158:b23ee177fd68	1416	* @arg @ref LL_RCC_APB2_DIV_4
Kojto	158:b23ee177fd68	1417	* @arg @ref LL_RCC_APB2_DIV_8
Kojto	158:b23ee177fd68	1418	* @arg @ref LL_RCC_APB2_DIV_16
Kojto	158:b23ee177fd68	1419	*/
Kojto	158:b23ee177fd68	1420	__STATIC_INLINE uint32_t LL_RCC_GetAPB2Prescaler(void)
Kojto	158:b23ee177fd68	1421	{
Kojto	158:b23ee177fd68	1422	return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2));
Kojto	158:b23ee177fd68	1423	}
Kojto	158:b23ee177fd68	1424
Kojto	158:b23ee177fd68	1425	/**
Kojto	158:b23ee177fd68	1426	* @brief Set Clock After Wake-Up From Stop mode
Kojto	158:b23ee177fd68	1427	* @rmtoll CFGR STOPWUCK LL_RCC_SetClkAfterWakeFromStop
Kojto	158:b23ee177fd68	1428	* @param Clock This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1429	* @arg @ref LL_RCC_STOP_WAKEUPCLOCK_MSI
Kojto	158:b23ee177fd68	1430	* @arg @ref LL_RCC_STOP_WAKEUPCLOCK_HSI
Kojto	158:b23ee177fd68	1431	* @retval None
Kojto	158:b23ee177fd68	1432	*/
Kojto	158:b23ee177fd68	1433	__STATIC_INLINE void LL_RCC_SetClkAfterWakeFromStop(uint32_t Clock)
Kojto	158:b23ee177fd68	1434	{
Kojto	158:b23ee177fd68	1435	MODIFY_REG(RCC->CFGR, RCC_CFGR_STOPWUCK, Clock);
Kojto	158:b23ee177fd68	1436	}
Kojto	158:b23ee177fd68	1437
Kojto	158:b23ee177fd68	1438	/**
Kojto	158:b23ee177fd68	1439	* @brief Get Clock After Wake-Up From Stop mode
Kojto	158:b23ee177fd68	1440	* @rmtoll CFGR STOPWUCK LL_RCC_GetClkAfterWakeFromStop
Kojto	158:b23ee177fd68	1441	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1442	* @arg @ref LL_RCC_STOP_WAKEUPCLOCK_MSI
Kojto	158:b23ee177fd68	1443	* @arg @ref LL_RCC_STOP_WAKEUPCLOCK_HSI
Kojto	158:b23ee177fd68	1444	*/
Kojto	158:b23ee177fd68	1445	__STATIC_INLINE uint32_t LL_RCC_GetClkAfterWakeFromStop(void)
Kojto	158:b23ee177fd68	1446	{
Kojto	158:b23ee177fd68	1447	return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_STOPWUCK));
Kojto	158:b23ee177fd68	1448	}
Kojto	158:b23ee177fd68	1449
Kojto	158:b23ee177fd68	1450	/**
Kojto	158:b23ee177fd68	1451	* @}
Kojto	158:b23ee177fd68	1452	*/
Kojto	158:b23ee177fd68	1453
Kojto	158:b23ee177fd68	1454	/** @defgroup RCC_LL_EF_MCO MCO
Kojto	158:b23ee177fd68	1455	* @{
Kojto	158:b23ee177fd68	1456	*/
Kojto	158:b23ee177fd68	1457
Kojto	158:b23ee177fd68	1458	/**
Kojto	158:b23ee177fd68	1459	* @brief Configure MCOx
Kojto	158:b23ee177fd68	1460	* @rmtoll CFGR MCOSEL LL_RCC_ConfigMCO\n
Kojto	158:b23ee177fd68	1461	* CFGR MCOPRE LL_RCC_ConfigMCO
Kojto	158:b23ee177fd68	1462	* @param MCOxSource This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1463	* @arg @ref LL_RCC_MCO1SOURCE_NOCLOCK
Kojto	158:b23ee177fd68	1464	* @arg @ref LL_RCC_MCO1SOURCE_SYSCLK
Kojto	158:b23ee177fd68	1465	* @arg @ref LL_RCC_MCO1SOURCE_HSI
Kojto	158:b23ee177fd68	1466	* @arg @ref LL_RCC_MCO1SOURCE_MSI
Kojto	158:b23ee177fd68	1467	* @arg @ref LL_RCC_MCO1SOURCE_HSE
Kojto	158:b23ee177fd68	1468	* @arg @ref LL_RCC_MCO1SOURCE_PLLCLK
Kojto	158:b23ee177fd68	1469	* @arg @ref LL_RCC_MCO1SOURCE_LSI
Kojto	158:b23ee177fd68	1470	* @arg @ref LL_RCC_MCO1SOURCE_LSE
Kojto	158:b23ee177fd68	1471	* @arg @ref LL_RCC_MCO1SOURCE_HSI48 (*)
Kojto	158:b23ee177fd68	1472	*
Kojto	158:b23ee177fd68	1473	* (*) value not defined in all devices.
Kojto	158:b23ee177fd68	1474	* @param MCOxPrescaler This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1475	* @arg @ref LL_RCC_MCO1_DIV_1
Kojto	158:b23ee177fd68	1476	* @arg @ref LL_RCC_MCO1_DIV_2
Kojto	158:b23ee177fd68	1477	* @arg @ref LL_RCC_MCO1_DIV_4
Kojto	158:b23ee177fd68	1478	* @arg @ref LL_RCC_MCO1_DIV_8
Kojto	158:b23ee177fd68	1479	* @arg @ref LL_RCC_MCO1_DIV_16
Kojto	158:b23ee177fd68	1480	* @retval None
Kojto	158:b23ee177fd68	1481	*/
Kojto	158:b23ee177fd68	1482	__STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource, uint32_t MCOxPrescaler)
Kojto	158:b23ee177fd68	1483	{
Kojto	158:b23ee177fd68	1484	MODIFY_REG(RCC->CFGR, RCC_CFGR_MCOSEL \| RCC_CFGR_MCOPRE, MCOxSource \| MCOxPrescaler);
Kojto	158:b23ee177fd68	1485	}
Kojto	158:b23ee177fd68	1486
Kojto	158:b23ee177fd68	1487	/**
Kojto	158:b23ee177fd68	1488	* @}
Kojto	158:b23ee177fd68	1489	*/
Kojto	158:b23ee177fd68	1490
Kojto	158:b23ee177fd68	1491	/** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source
Kojto	158:b23ee177fd68	1492	* @{
Kojto	158:b23ee177fd68	1493	*/
Kojto	158:b23ee177fd68	1494
Kojto	158:b23ee177fd68	1495	/**
Kojto	158:b23ee177fd68	1496	* @brief Configure USARTx clock source
Kojto	158:b23ee177fd68	1497	* @rmtoll CCIPR USARTxSEL LL_RCC_SetUSARTClockSource
Kojto	158:b23ee177fd68	1498	* @param USARTxSource This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1499	* @arg @ref LL_RCC_USART1_CLKSOURCE_PCLK2 (*)
Kojto	158:b23ee177fd68	1500	* @arg @ref LL_RCC_USART1_CLKSOURCE_SYSCLK (*)
Kojto	158:b23ee177fd68	1501	* @arg @ref LL_RCC_USART1_CLKSOURCE_HSI (*)
Kojto	158:b23ee177fd68	1502	* @arg @ref LL_RCC_USART1_CLKSOURCE_LSE (*)
Kojto	158:b23ee177fd68	1503	* @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1
Kojto	158:b23ee177fd68	1504	* @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK
Kojto	158:b23ee177fd68	1505	* @arg @ref LL_RCC_USART2_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1506	* @arg @ref LL_RCC_USART2_CLKSOURCE_LSE
Kojto	158:b23ee177fd68	1507	*
Kojto	158:b23ee177fd68	1508	* (*) value not defined in all devices.
Kojto	158:b23ee177fd68	1509	* @retval None
Kojto	158:b23ee177fd68	1510	*/
Kojto	158:b23ee177fd68	1511	__STATIC_INLINE void LL_RCC_SetUSARTClockSource(uint32_t USARTxSource)
Kojto	158:b23ee177fd68	1512	{
Kojto	158:b23ee177fd68	1513	MODIFY_REG(RCC->CCIPR, (USARTxSource >> 16U), (USARTxSource & 0x0000FFFFU));
Kojto	158:b23ee177fd68	1514	}
Kojto	158:b23ee177fd68	1515
Kojto	158:b23ee177fd68	1516	/**
Kojto	158:b23ee177fd68	1517	* @brief Configure LPUART1x clock source
Kojto	158:b23ee177fd68	1518	* @rmtoll CCIPR LPUART1SEL LL_RCC_SetLPUARTClockSource
Kojto	158:b23ee177fd68	1519	* @param LPUARTxSource This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1520	* @arg @ref LL_RCC_LPUART1_CLKSOURCE_PCLK1
Kojto	158:b23ee177fd68	1521	* @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK
Kojto	158:b23ee177fd68	1522	* @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1523	* @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
Kojto	158:b23ee177fd68	1524	* @retval None
Kojto	158:b23ee177fd68	1525	*/
Kojto	158:b23ee177fd68	1526	__STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource)
Kojto	158:b23ee177fd68	1527	{
Kojto	158:b23ee177fd68	1528	MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource);
Kojto	158:b23ee177fd68	1529	}
Kojto	158:b23ee177fd68	1530
Kojto	158:b23ee177fd68	1531	/**
Kojto	158:b23ee177fd68	1532	* @brief Configure I2Cx clock source
Kojto	158:b23ee177fd68	1533	* @rmtoll CCIPR I2CxSEL LL_RCC_SetI2CClockSource
Kojto	158:b23ee177fd68	1534	* @param I2CxSource This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1535	* @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1
Kojto	158:b23ee177fd68	1536	* @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
Kojto	158:b23ee177fd68	1537	* @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1538	* @arg @ref LL_RCC_I2C3_CLKSOURCE_PCLK1 (*)
Kojto	158:b23ee177fd68	1539	* @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK (*)
Kojto	158:b23ee177fd68	1540	* @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI (*)
Kojto	158:b23ee177fd68	1541	*
Kojto	158:b23ee177fd68	1542	* (*) value not defined in all devices.
Kojto	158:b23ee177fd68	1543	* @retval None
Kojto	158:b23ee177fd68	1544	*/
Kojto	158:b23ee177fd68	1545	__STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource)
Kojto	158:b23ee177fd68	1546	{
Kojto	158:b23ee177fd68	1547	MODIFY_REG(RCC->CCIPR, ((I2CxSource >> 4U) & 0x000FF000U), ((I2CxSource << 4U) & 0x000FF000U));
Kojto	158:b23ee177fd68	1548	}
Kojto	158:b23ee177fd68	1549
Kojto	158:b23ee177fd68	1550	/**
Kojto	158:b23ee177fd68	1551	* @brief Configure LPTIMx clock source
Kojto	158:b23ee177fd68	1552	* @rmtoll CCIPR LPTIMxSEL LL_RCC_SetLPTIMClockSource
Kojto	158:b23ee177fd68	1553	* @param LPTIMxSource This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1554	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
Kojto	158:b23ee177fd68	1555	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
Kojto	158:b23ee177fd68	1556	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1557	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
Kojto	158:b23ee177fd68	1558	* @retval None
Kojto	158:b23ee177fd68	1559	*/
Kojto	158:b23ee177fd68	1560	__STATIC_INLINE void LL_RCC_SetLPTIMClockSource(uint32_t LPTIMxSource)
Kojto	158:b23ee177fd68	1561	{
Kojto	158:b23ee177fd68	1562	MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL, LPTIMxSource);
Kojto	158:b23ee177fd68	1563	}
Kojto	158:b23ee177fd68	1564
Kojto	158:b23ee177fd68	1565	#if defined(RCC_CCIPR_HSI48SEL)
Kojto	158:b23ee177fd68	1566	#if defined(RNG)
Kojto	158:b23ee177fd68	1567	/**
Kojto	158:b23ee177fd68	1568	* @brief Configure RNG clock source
Kojto	158:b23ee177fd68	1569	* @rmtoll CCIPR HSI48SEL LL_RCC_SetRNGClockSource
Kojto	158:b23ee177fd68	1570	* @param RNGxSource This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1571	* @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
Kojto	158:b23ee177fd68	1572	* @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
Kojto	158:b23ee177fd68	1573	* @retval None
Kojto	158:b23ee177fd68	1574	*/
Kojto	158:b23ee177fd68	1575	__STATIC_INLINE void LL_RCC_SetRNGClockSource(uint32_t RNGxSource)
Kojto	158:b23ee177fd68	1576	{
Kojto	158:b23ee177fd68	1577	MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, RNGxSource);
Kojto	158:b23ee177fd68	1578	}
Kojto	158:b23ee177fd68	1579	#endif /* RNG */
Kojto	158:b23ee177fd68	1580
Kojto	158:b23ee177fd68	1581	#if defined(USB)
Kojto	158:b23ee177fd68	1582	/**
Kojto	158:b23ee177fd68	1583	* @brief Configure USB clock source
Kojto	158:b23ee177fd68	1584	* @rmtoll CCIPR HSI48SEL LL_RCC_SetUSBClockSource
Kojto	158:b23ee177fd68	1585	* @param USBxSource This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1586	* @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
Kojto	158:b23ee177fd68	1587	* @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
Kojto	158:b23ee177fd68	1588	* @retval None
Kojto	158:b23ee177fd68	1589	*/
Kojto	158:b23ee177fd68	1590	__STATIC_INLINE void LL_RCC_SetUSBClockSource(uint32_t USBxSource)
Kojto	158:b23ee177fd68	1591	{
Kojto	158:b23ee177fd68	1592	MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, USBxSource);
Kojto	158:b23ee177fd68	1593	}
Kojto	158:b23ee177fd68	1594	#endif /* USB */
Kojto	158:b23ee177fd68	1595
Kojto	158:b23ee177fd68	1596	#endif /* RCC_CCIPR_HSI48SEL */
Kojto	158:b23ee177fd68	1597
Kojto	158:b23ee177fd68	1598	/**
Kojto	158:b23ee177fd68	1599	* @brief Get USARTx clock source
Kojto	158:b23ee177fd68	1600	* @rmtoll CCIPR USARTxSEL LL_RCC_GetUSARTClockSource
Kojto	158:b23ee177fd68	1601	* @param USARTx This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1602	* @arg @ref LL_RCC_USART1_CLKSOURCE (*)
Kojto	158:b23ee177fd68	1603	* @arg @ref LL_RCC_USART2_CLKSOURCE
Kojto	158:b23ee177fd68	1604	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1605	* @arg @ref LL_RCC_USART1_CLKSOURCE_PCLK2 (*)
Kojto	158:b23ee177fd68	1606	* @arg @ref LL_RCC_USART1_CLKSOURCE_SYSCLK (*)
Kojto	158:b23ee177fd68	1607	* @arg @ref LL_RCC_USART1_CLKSOURCE_HSI (*)
Kojto	158:b23ee177fd68	1608	* @arg @ref LL_RCC_USART1_CLKSOURCE_LSE (*)
Kojto	158:b23ee177fd68	1609	* @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1
Kojto	158:b23ee177fd68	1610	* @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK
Kojto	158:b23ee177fd68	1611	* @arg @ref LL_RCC_USART2_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1612	* @arg @ref LL_RCC_USART2_CLKSOURCE_LSE
Kojto	158:b23ee177fd68	1613	*
Kojto	158:b23ee177fd68	1614	* (*) value not defined in all devices.
Kojto	158:b23ee177fd68	1615	*/
Kojto	158:b23ee177fd68	1616	__STATIC_INLINE uint32_t LL_RCC_GetUSARTClockSource(uint32_t USARTx)
Kojto	158:b23ee177fd68	1617	{
Kojto	158:b23ee177fd68	1618	return (uint32_t)(READ_BIT(RCC->CCIPR, USARTx) \| (USARTx << 16U));
Kojto	158:b23ee177fd68	1619	}
Kojto	158:b23ee177fd68	1620
Kojto	158:b23ee177fd68	1621
Kojto	158:b23ee177fd68	1622
Kojto	158:b23ee177fd68	1623	/**
Kojto	158:b23ee177fd68	1624	* @brief Get LPUARTx clock source
Kojto	158:b23ee177fd68	1625	* @rmtoll CCIPR LPUART1SEL LL_RCC_GetLPUARTClockSource
Kojto	158:b23ee177fd68	1626	* @param LPUARTx This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1627	* @arg @ref LL_RCC_LPUART1_CLKSOURCE
Kojto	158:b23ee177fd68	1628	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1629	* @arg @ref LL_RCC_LPUART1_CLKSOURCE_PCLK1
Kojto	158:b23ee177fd68	1630	* @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK
Kojto	158:b23ee177fd68	1631	* @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1632	* @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
Kojto	158:b23ee177fd68	1633	*/
Kojto	158:b23ee177fd68	1634	__STATIC_INLINE uint32_t LL_RCC_GetLPUARTClockSource(uint32_t LPUARTx)
Kojto	158:b23ee177fd68	1635	{
Kojto	158:b23ee177fd68	1636	return (uint32_t)(READ_BIT(RCC->CCIPR, LPUARTx));
Kojto	158:b23ee177fd68	1637	}
Kojto	158:b23ee177fd68	1638
Kojto	158:b23ee177fd68	1639	/**
Kojto	158:b23ee177fd68	1640	* @brief Get I2Cx clock source
Kojto	158:b23ee177fd68	1641	* @rmtoll CCIPR I2CxSEL LL_RCC_GetI2CClockSource
Kojto	158:b23ee177fd68	1642	* @param I2Cx This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1643	* @arg @ref LL_RCC_I2C1_CLKSOURCE
Kojto	158:b23ee177fd68	1644	* @arg @ref LL_RCC_I2C3_CLKSOURCE
Kojto	158:b23ee177fd68	1645	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1646	* @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1
Kojto	158:b23ee177fd68	1647	* @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
Kojto	158:b23ee177fd68	1648	* @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1649	* @arg @ref LL_RCC_I2C3_CLKSOURCE_PCLK1 (*)
Kojto	158:b23ee177fd68	1650	* @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK (*)
Kojto	158:b23ee177fd68	1651	* @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI (*)
Kojto	158:b23ee177fd68	1652	*
Kojto	158:b23ee177fd68	1653	* (*) value not defined in all devices.
Kojto	158:b23ee177fd68	1654	*/
Kojto	158:b23ee177fd68	1655	__STATIC_INLINE uint32_t LL_RCC_GetI2CClockSource(uint32_t I2Cx)
Kojto	158:b23ee177fd68	1656	{
Kojto	158:b23ee177fd68	1657	return (uint32_t)((READ_BIT(RCC->CCIPR, I2Cx) >> 4U) \| (I2Cx << 4U));
Kojto	158:b23ee177fd68	1658	}
Kojto	158:b23ee177fd68	1659
Kojto	158:b23ee177fd68	1660	/**
Kojto	158:b23ee177fd68	1661	* @brief Get LPTIMx clock source
Kojto	158:b23ee177fd68	1662	* @rmtoll CCIPR LPTIMxSEL LL_RCC_GetLPTIMClockSource
Kojto	158:b23ee177fd68	1663	* @param LPTIMx This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1664	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE
Kojto	158:b23ee177fd68	1665	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1666	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
Kojto	158:b23ee177fd68	1667	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
Kojto	158:b23ee177fd68	1668	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
Kojto	158:b23ee177fd68	1669	* @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
Kojto	158:b23ee177fd68	1670	*/
Kojto	158:b23ee177fd68	1671	__STATIC_INLINE uint32_t LL_RCC_GetLPTIMClockSource(uint32_t LPTIMx)
Kojto	158:b23ee177fd68	1672	{
Kojto	158:b23ee177fd68	1673	return (uint32_t)(READ_BIT(RCC->CCIPR, LPTIMx));
Kojto	158:b23ee177fd68	1674	}
Kojto	158:b23ee177fd68	1675
Kojto	158:b23ee177fd68	1676	#if defined(RCC_CCIPR_HSI48SEL)
Kojto	158:b23ee177fd68	1677	#if defined(RNG)
Kojto	158:b23ee177fd68	1678	/**
Kojto	158:b23ee177fd68	1679	* @brief Get RNGx clock source
Kojto	158:b23ee177fd68	1680	* @rmtoll CCIPR CLK48SEL LL_RCC_GetRNGClockSource
Kojto	158:b23ee177fd68	1681	* @param RNGx This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1682	* @arg @ref LL_RCC_RNG_CLKSOURCE
Kojto	158:b23ee177fd68	1683	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1684	* @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
Kojto	158:b23ee177fd68	1685	* @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
Kojto	158:b23ee177fd68	1686	*/
Kojto	158:b23ee177fd68	1687	__STATIC_INLINE uint32_t LL_RCC_GetRNGClockSource(uint32_t RNGx)
Kojto	158:b23ee177fd68	1688	{
Kojto	158:b23ee177fd68	1689	return (uint32_t)(READ_BIT(RCC->CCIPR, RNGx));
Kojto	158:b23ee177fd68	1690	}
Kojto	158:b23ee177fd68	1691	#endif /* RNG */
Kojto	158:b23ee177fd68	1692
Kojto	158:b23ee177fd68	1693	#if defined(USB)
Kojto	158:b23ee177fd68	1694	/**
Kojto	158:b23ee177fd68	1695	* @brief Get USBx clock source
Kojto	158:b23ee177fd68	1696	* @rmtoll CCIPR CLK48SEL LL_RCC_GetUSBClockSource
Kojto	158:b23ee177fd68	1697	* @param USBx This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1698	* @arg @ref LL_RCC_USB_CLKSOURCE
Kojto	158:b23ee177fd68	1699	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1700	* @arg @ref LL_RCC_USB_CLKSOURCE_PLL
Kojto	158:b23ee177fd68	1701	* @arg @ref LL_RCC_USB_CLKSOURCE_HSI48
Kojto	158:b23ee177fd68	1702	*/
Kojto	158:b23ee177fd68	1703	__STATIC_INLINE uint32_t LL_RCC_GetUSBClockSource(uint32_t USBx)
Kojto	158:b23ee177fd68	1704	{
Kojto	158:b23ee177fd68	1705	return (uint32_t)(READ_BIT(RCC->CCIPR, USBx));
Kojto	158:b23ee177fd68	1706	}
Kojto	158:b23ee177fd68	1707	#endif /* USB */
Kojto	158:b23ee177fd68	1708
Kojto	158:b23ee177fd68	1709	#endif /* RCC_CCIPR_HSI48SEL */
Kojto	158:b23ee177fd68	1710
Kojto	158:b23ee177fd68	1711	/**
Kojto	158:b23ee177fd68	1712	* @}
Kojto	158:b23ee177fd68	1713	*/
Kojto	158:b23ee177fd68	1714
Kojto	158:b23ee177fd68	1715	/** @defgroup RCC_LL_EF_RTC RTC
Kojto	158:b23ee177fd68	1716	* @{
Kojto	158:b23ee177fd68	1717	*/
Kojto	158:b23ee177fd68	1718
Kojto	158:b23ee177fd68	1719	/**
Kojto	158:b23ee177fd68	1720	* @brief Set RTC Clock Source
Kojto	158:b23ee177fd68	1721	* @note Once the RTC clock source has been selected, it cannot be changed any more unless
Kojto	158:b23ee177fd68	1722	* the Backup domain is reset, or unless a failure is detected on LSE (LSECSSD is
Kojto	158:b23ee177fd68	1723	* set). The RTCRST bit can be used to reset them.
Kojto	158:b23ee177fd68	1724	* @rmtoll CSR RTCSEL LL_RCC_SetRTCClockSource
Kojto	158:b23ee177fd68	1725	* @param Source This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1726	* @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
Kojto	158:b23ee177fd68	1727	* @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
Kojto	158:b23ee177fd68	1728	* @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
Kojto	158:b23ee177fd68	1729	* @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
Kojto	158:b23ee177fd68	1730	* @retval None
Kojto	158:b23ee177fd68	1731	*/
Kojto	158:b23ee177fd68	1732	__STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)
Kojto	158:b23ee177fd68	1733	{
Kojto	158:b23ee177fd68	1734	MODIFY_REG(RCC->CSR, RCC_CSR_RTCSEL, Source);
Kojto	158:b23ee177fd68	1735	}
Kojto	158:b23ee177fd68	1736
Kojto	158:b23ee177fd68	1737	/**
Kojto	158:b23ee177fd68	1738	* @brief Get RTC Clock Source
Kojto	158:b23ee177fd68	1739	* @rmtoll CSR RTCSEL LL_RCC_GetRTCClockSource
Kojto	158:b23ee177fd68	1740	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1741	* @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
Kojto	158:b23ee177fd68	1742	* @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
Kojto	158:b23ee177fd68	1743	* @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
Kojto	158:b23ee177fd68	1744	* @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
Kojto	158:b23ee177fd68	1745	*/
Kojto	158:b23ee177fd68	1746	__STATIC_INLINE uint32_t LL_RCC_GetRTCClockSource(void)
Kojto	158:b23ee177fd68	1747	{
Kojto	158:b23ee177fd68	1748	return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_RTCSEL));
Kojto	158:b23ee177fd68	1749	}
Kojto	158:b23ee177fd68	1750
Kojto	158:b23ee177fd68	1751	/**
Kojto	158:b23ee177fd68	1752	* @brief Enable RTC
Kojto	158:b23ee177fd68	1753	* @rmtoll CSR RTCEN LL_RCC_EnableRTC
Kojto	158:b23ee177fd68	1754	* @retval None
Kojto	158:b23ee177fd68	1755	*/
Kojto	158:b23ee177fd68	1756	__STATIC_INLINE void LL_RCC_EnableRTC(void)
Kojto	158:b23ee177fd68	1757	{
Kojto	158:b23ee177fd68	1758	SET_BIT(RCC->CSR, RCC_CSR_RTCEN);
Kojto	158:b23ee177fd68	1759	}
Kojto	158:b23ee177fd68	1760
Kojto	158:b23ee177fd68	1761	/**
Kojto	158:b23ee177fd68	1762	* @brief Disable RTC
Kojto	158:b23ee177fd68	1763	* @rmtoll CSR RTCEN LL_RCC_DisableRTC
Kojto	158:b23ee177fd68	1764	* @retval None
Kojto	158:b23ee177fd68	1765	*/
Kojto	158:b23ee177fd68	1766	__STATIC_INLINE void LL_RCC_DisableRTC(void)
Kojto	158:b23ee177fd68	1767	{
Kojto	158:b23ee177fd68	1768	CLEAR_BIT(RCC->CSR, RCC_CSR_RTCEN);
Kojto	158:b23ee177fd68	1769	}
Kojto	158:b23ee177fd68	1770
Kojto	158:b23ee177fd68	1771	/**
Kojto	158:b23ee177fd68	1772	* @brief Check if RTC has been enabled or not
Kojto	158:b23ee177fd68	1773	* @rmtoll CSR RTCEN LL_RCC_IsEnabledRTC
Kojto	158:b23ee177fd68	1774	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1775	*/
Kojto	158:b23ee177fd68	1776	__STATIC_INLINE uint32_t LL_RCC_IsEnabledRTC(void)
Kojto	158:b23ee177fd68	1777	{
Kojto	158:b23ee177fd68	1778	return (READ_BIT(RCC->CSR, RCC_CSR_RTCEN) == (RCC_CSR_RTCEN));
Kojto	158:b23ee177fd68	1779	}
Kojto	158:b23ee177fd68	1780
Kojto	158:b23ee177fd68	1781	/**
Kojto	158:b23ee177fd68	1782	* @brief Force the Backup domain reset
Kojto	158:b23ee177fd68	1783	* @rmtoll CSR RTCRST LL_RCC_ForceBackupDomainReset
Kojto	158:b23ee177fd68	1784	* @retval None
Kojto	158:b23ee177fd68	1785	*/
Kojto	158:b23ee177fd68	1786	__STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void)
Kojto	158:b23ee177fd68	1787	{
Kojto	158:b23ee177fd68	1788	SET_BIT(RCC->CSR, RCC_CSR_RTCRST);
Kojto	158:b23ee177fd68	1789	}
Kojto	158:b23ee177fd68	1790
Kojto	158:b23ee177fd68	1791	/**
Kojto	158:b23ee177fd68	1792	* @brief Release the Backup domain reset
Kojto	158:b23ee177fd68	1793	* @rmtoll CSR RTCRST LL_RCC_ReleaseBackupDomainReset
Kojto	158:b23ee177fd68	1794	* @retval None
Kojto	158:b23ee177fd68	1795	*/
Kojto	158:b23ee177fd68	1796	__STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void)
Kojto	158:b23ee177fd68	1797	{
Kojto	158:b23ee177fd68	1798	CLEAR_BIT(RCC->CSR, RCC_CSR_RTCRST);
Kojto	158:b23ee177fd68	1799	}
Kojto	158:b23ee177fd68	1800
Kojto	158:b23ee177fd68	1801	/**
Kojto	158:b23ee177fd68	1802	* @}
Kojto	158:b23ee177fd68	1803	*/
Kojto	158:b23ee177fd68	1804
Kojto	158:b23ee177fd68	1805	/** @defgroup RCC_LL_EF_PLL PLL
Kojto	158:b23ee177fd68	1806	* @{
Kojto	158:b23ee177fd68	1807	*/
Kojto	158:b23ee177fd68	1808
Kojto	158:b23ee177fd68	1809	/**
Kojto	158:b23ee177fd68	1810	* @brief Enable PLL
Kojto	158:b23ee177fd68	1811	* @rmtoll CR PLLON LL_RCC_PLL_Enable
Kojto	158:b23ee177fd68	1812	* @retval None
Kojto	158:b23ee177fd68	1813	*/
Kojto	158:b23ee177fd68	1814	__STATIC_INLINE void LL_RCC_PLL_Enable(void)
Kojto	158:b23ee177fd68	1815	{
Kojto	158:b23ee177fd68	1816	SET_BIT(RCC->CR, RCC_CR_PLLON);
Kojto	158:b23ee177fd68	1817	}
Kojto	158:b23ee177fd68	1818
Kojto	158:b23ee177fd68	1819	/**
Kojto	158:b23ee177fd68	1820	* @brief Disable PLL
Kojto	158:b23ee177fd68	1821	* @note Cannot be disabled if the PLL clock is used as the system clock
Kojto	158:b23ee177fd68	1822	* @rmtoll CR PLLON LL_RCC_PLL_Disable
Kojto	158:b23ee177fd68	1823	* @retval None
Kojto	158:b23ee177fd68	1824	*/
Kojto	158:b23ee177fd68	1825	__STATIC_INLINE void LL_RCC_PLL_Disable(void)
Kojto	158:b23ee177fd68	1826	{
Kojto	158:b23ee177fd68	1827	CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
Kojto	158:b23ee177fd68	1828	}
Kojto	158:b23ee177fd68	1829
Kojto	158:b23ee177fd68	1830	/**
Kojto	158:b23ee177fd68	1831	* @brief Check if PLL Ready
Kojto	158:b23ee177fd68	1832	* @rmtoll CR PLLRDY LL_RCC_PLL_IsReady
Kojto	158:b23ee177fd68	1833	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1834	*/
Kojto	158:b23ee177fd68	1835	__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
Kojto	158:b23ee177fd68	1836	{
Kojto	158:b23ee177fd68	1837	return (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == (RCC_CR_PLLRDY));
Kojto	158:b23ee177fd68	1838	}
Kojto	158:b23ee177fd68	1839
Kojto	158:b23ee177fd68	1840	/**
Kojto	158:b23ee177fd68	1841	* @brief Configure PLL used for SYSCLK Domain
Kojto	158:b23ee177fd68	1842	* @rmtoll CFGR PLLSRC LL_RCC_PLL_ConfigDomain_SYS\n
Kojto	158:b23ee177fd68	1843	* CFGR PLLMUL LL_RCC_PLL_ConfigDomain_SYS\n
Kojto	158:b23ee177fd68	1844	* CFGR PLLDIV LL_RCC_PLL_ConfigDomain_SYS
Kojto	158:b23ee177fd68	1845	* @param Source This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1846	* @arg @ref LL_RCC_PLLSOURCE_HSI
Kojto	158:b23ee177fd68	1847	* @arg @ref LL_RCC_PLLSOURCE_HSE
Kojto	158:b23ee177fd68	1848	* @param PLLMul This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1849	* @arg @ref LL_RCC_PLL_MUL_3
Kojto	158:b23ee177fd68	1850	* @arg @ref LL_RCC_PLL_MUL_4
Kojto	158:b23ee177fd68	1851	* @arg @ref LL_RCC_PLL_MUL_6
Kojto	158:b23ee177fd68	1852	* @arg @ref LL_RCC_PLL_MUL_8
Kojto	158:b23ee177fd68	1853	* @arg @ref LL_RCC_PLL_MUL_12
Kojto	158:b23ee177fd68	1854	* @arg @ref LL_RCC_PLL_MUL_16
Kojto	158:b23ee177fd68	1855	* @arg @ref LL_RCC_PLL_MUL_24
Kojto	158:b23ee177fd68	1856	* @arg @ref LL_RCC_PLL_MUL_32
Kojto	158:b23ee177fd68	1857	* @arg @ref LL_RCC_PLL_MUL_48
Kojto	158:b23ee177fd68	1858	* @param PLLDiv This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1859	* @arg @ref LL_RCC_PLL_DIV_2
Kojto	158:b23ee177fd68	1860	* @arg @ref LL_RCC_PLL_DIV_3
Kojto	158:b23ee177fd68	1861	* @arg @ref LL_RCC_PLL_DIV_4
Kojto	158:b23ee177fd68	1862	* @retval None
Kojto	158:b23ee177fd68	1863	*/
Kojto	158:b23ee177fd68	1864	__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLMul, uint32_t PLLDiv)
Kojto	158:b23ee177fd68	1865	{
Kojto	158:b23ee177fd68	1866	MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC \| RCC_CFGR_PLLMUL \| RCC_CFGR_PLLDIV, Source \| PLLMul \| PLLDiv);
Kojto	158:b23ee177fd68	1867	}
Kojto	158:b23ee177fd68	1868
Kojto	158:b23ee177fd68	1869	/**
Kojto	158:b23ee177fd68	1870	* @brief Get the oscillator used as PLL clock source.
Kojto	158:b23ee177fd68	1871	* @rmtoll CFGR PLLSRC LL_RCC_PLL_GetMainSource
Kojto	158:b23ee177fd68	1872	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1873	* @arg @ref LL_RCC_PLLSOURCE_HSI
Kojto	158:b23ee177fd68	1874	* @arg @ref LL_RCC_PLLSOURCE_HSE
Kojto	158:b23ee177fd68	1875	*/
Kojto	158:b23ee177fd68	1876	__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
Kojto	158:b23ee177fd68	1877	{
Kojto	158:b23ee177fd68	1878	return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC));
Kojto	158:b23ee177fd68	1879	}
Kojto	158:b23ee177fd68	1880
Kojto	158:b23ee177fd68	1881	/**
Kojto	158:b23ee177fd68	1882	* @brief Get PLL multiplication Factor
Kojto	158:b23ee177fd68	1883	* @rmtoll CFGR PLLMUL LL_RCC_PLL_GetMultiplicator
Kojto	158:b23ee177fd68	1884	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1885	* @arg @ref LL_RCC_PLL_MUL_3
Kojto	158:b23ee177fd68	1886	* @arg @ref LL_RCC_PLL_MUL_4
Kojto	158:b23ee177fd68	1887	* @arg @ref LL_RCC_PLL_MUL_6
Kojto	158:b23ee177fd68	1888	* @arg @ref LL_RCC_PLL_MUL_8
Kojto	158:b23ee177fd68	1889	* @arg @ref LL_RCC_PLL_MUL_12
Kojto	158:b23ee177fd68	1890	* @arg @ref LL_RCC_PLL_MUL_16
Kojto	158:b23ee177fd68	1891	* @arg @ref LL_RCC_PLL_MUL_24
Kojto	158:b23ee177fd68	1892	* @arg @ref LL_RCC_PLL_MUL_32
Kojto	158:b23ee177fd68	1893	* @arg @ref LL_RCC_PLL_MUL_48
Kojto	158:b23ee177fd68	1894	*/
Kojto	158:b23ee177fd68	1895	__STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void)
Kojto	158:b23ee177fd68	1896	{
Kojto	158:b23ee177fd68	1897	return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL));
Kojto	158:b23ee177fd68	1898	}
Kojto	158:b23ee177fd68	1899
Kojto	158:b23ee177fd68	1900	/**
Kojto	158:b23ee177fd68	1901	* @brief Get Division factor for the main PLL and other PLL
Kojto	158:b23ee177fd68	1902	* @rmtoll CFGR PLLDIV LL_RCC_PLL_GetDivider
Kojto	158:b23ee177fd68	1903	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1904	* @arg @ref LL_RCC_PLL_DIV_2
Kojto	158:b23ee177fd68	1905	* @arg @ref LL_RCC_PLL_DIV_3
Kojto	158:b23ee177fd68	1906	* @arg @ref LL_RCC_PLL_DIV_4
Kojto	158:b23ee177fd68	1907	*/
Kojto	158:b23ee177fd68	1908	__STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void)
Kojto	158:b23ee177fd68	1909	{
Kojto	158:b23ee177fd68	1910	return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV));
Kojto	158:b23ee177fd68	1911	}
Kojto	158:b23ee177fd68	1912
Kojto	158:b23ee177fd68	1913	/**
Kojto	158:b23ee177fd68	1914	* @}
Kojto	158:b23ee177fd68	1915	*/
Kojto	158:b23ee177fd68	1916
Kojto	158:b23ee177fd68	1917	/** @defgroup RCC_LL_EF_FLAG_Management FLAG Management
Kojto	158:b23ee177fd68	1918	* @{
Kojto	158:b23ee177fd68	1919	*/
Kojto	158:b23ee177fd68	1920
Kojto	158:b23ee177fd68	1921	/**
Kojto	158:b23ee177fd68	1922	* @brief Clear LSI ready interrupt flag
Kojto	158:b23ee177fd68	1923	* @rmtoll CICR LSIRDYC LL_RCC_ClearFlag_LSIRDY
Kojto	158:b23ee177fd68	1924	* @retval None
Kojto	158:b23ee177fd68	1925	*/
Kojto	158:b23ee177fd68	1926	__STATIC_INLINE void LL_RCC_ClearFlag_LSIRDY(void)
Kojto	158:b23ee177fd68	1927	{
Kojto	158:b23ee177fd68	1928	SET_BIT(RCC->CICR, RCC_CICR_LSIRDYC);
Kojto	158:b23ee177fd68	1929	}
Kojto	158:b23ee177fd68	1930
Kojto	158:b23ee177fd68	1931	/**
Kojto	158:b23ee177fd68	1932	* @brief Clear LSE ready interrupt flag
Kojto	158:b23ee177fd68	1933	* @rmtoll CICR LSERDYC LL_RCC_ClearFlag_LSERDY
Kojto	158:b23ee177fd68	1934	* @retval None
Kojto	158:b23ee177fd68	1935	*/
Kojto	158:b23ee177fd68	1936	__STATIC_INLINE void LL_RCC_ClearFlag_LSERDY(void)
Kojto	158:b23ee177fd68	1937	{
Kojto	158:b23ee177fd68	1938	SET_BIT(RCC->CICR, RCC_CICR_LSERDYC);
Kojto	158:b23ee177fd68	1939	}
Kojto	158:b23ee177fd68	1940
Kojto	158:b23ee177fd68	1941	/**
Kojto	158:b23ee177fd68	1942	* @brief Clear MSI ready interrupt flag
Kojto	158:b23ee177fd68	1943	* @rmtoll CICR MSIRDYC LL_RCC_ClearFlag_MSIRDY
Kojto	158:b23ee177fd68	1944	* @retval None
Kojto	158:b23ee177fd68	1945	*/
Kojto	158:b23ee177fd68	1946	__STATIC_INLINE void LL_RCC_ClearFlag_MSIRDY(void)
Kojto	158:b23ee177fd68	1947	{
Kojto	158:b23ee177fd68	1948	SET_BIT(RCC->CICR, RCC_CICR_MSIRDYC);
Kojto	158:b23ee177fd68	1949	}
Kojto	158:b23ee177fd68	1950
Kojto	158:b23ee177fd68	1951	/**
Kojto	158:b23ee177fd68	1952	* @brief Clear HSI ready interrupt flag
Kojto	158:b23ee177fd68	1953	* @rmtoll CICR HSIRDYC LL_RCC_ClearFlag_HSIRDY
Kojto	158:b23ee177fd68	1954	* @retval None
Kojto	158:b23ee177fd68	1955	*/
Kojto	158:b23ee177fd68	1956	__STATIC_INLINE void LL_RCC_ClearFlag_HSIRDY(void)
Kojto	158:b23ee177fd68	1957	{
Kojto	158:b23ee177fd68	1958	SET_BIT(RCC->CICR, RCC_CICR_HSIRDYC);
Kojto	158:b23ee177fd68	1959	}
Kojto	158:b23ee177fd68	1960
Kojto	158:b23ee177fd68	1961	/**
Kojto	158:b23ee177fd68	1962	* @brief Clear HSE ready interrupt flag
Kojto	158:b23ee177fd68	1963	* @rmtoll CICR HSERDYC LL_RCC_ClearFlag_HSERDY
Kojto	158:b23ee177fd68	1964	* @retval None
Kojto	158:b23ee177fd68	1965	*/
Kojto	158:b23ee177fd68	1966	__STATIC_INLINE void LL_RCC_ClearFlag_HSERDY(void)
Kojto	158:b23ee177fd68	1967	{
Kojto	158:b23ee177fd68	1968	SET_BIT(RCC->CICR, RCC_CICR_HSERDYC);
Kojto	158:b23ee177fd68	1969	}
Kojto	158:b23ee177fd68	1970
Kojto	158:b23ee177fd68	1971	/**
Kojto	158:b23ee177fd68	1972	* @brief Clear PLL ready interrupt flag
Kojto	158:b23ee177fd68	1973	* @rmtoll CICR PLLRDYC LL_RCC_ClearFlag_PLLRDY
Kojto	158:b23ee177fd68	1974	* @retval None
Kojto	158:b23ee177fd68	1975	*/
Kojto	158:b23ee177fd68	1976	__STATIC_INLINE void LL_RCC_ClearFlag_PLLRDY(void)
Kojto	158:b23ee177fd68	1977	{
Kojto	158:b23ee177fd68	1978	SET_BIT(RCC->CICR, RCC_CICR_PLLRDYC);
Kojto	158:b23ee177fd68	1979	}
Kojto	158:b23ee177fd68	1980
Kojto	158:b23ee177fd68	1981	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	1982	/**
Kojto	158:b23ee177fd68	1983	* @brief Clear HSI48 ready interrupt flag
Kojto	158:b23ee177fd68	1984	* @rmtoll CICR HSI48RDYC LL_RCC_ClearFlag_HSI48RDY
Kojto	158:b23ee177fd68	1985	* @retval None
Kojto	158:b23ee177fd68	1986	*/
Kojto	158:b23ee177fd68	1987	__STATIC_INLINE void LL_RCC_ClearFlag_HSI48RDY(void)
Kojto	158:b23ee177fd68	1988	{
Kojto	158:b23ee177fd68	1989	SET_BIT(RCC->CICR, RCC_CICR_HSI48RDYC);
Kojto	158:b23ee177fd68	1990	}
Kojto	158:b23ee177fd68	1991	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	1992
Kojto	158:b23ee177fd68	1993	#if defined(RCC_HSECSS_SUPPORT)
Kojto	158:b23ee177fd68	1994	/**
Kojto	158:b23ee177fd68	1995	* @brief Clear Clock security system interrupt flag
Kojto	158:b23ee177fd68	1996	* @rmtoll CICR CSSC LL_RCC_ClearFlag_HSECSS
Kojto	158:b23ee177fd68	1997	* @retval None
Kojto	158:b23ee177fd68	1998	*/
Kojto	158:b23ee177fd68	1999	__STATIC_INLINE void LL_RCC_ClearFlag_HSECSS(void)
Kojto	158:b23ee177fd68	2000	{
Kojto	158:b23ee177fd68	2001	SET_BIT(RCC->CICR, RCC_CICR_CSSC);
Kojto	158:b23ee177fd68	2002	}
Kojto	158:b23ee177fd68	2003	#endif /* RCC_HSECSS_SUPPORT */
Kojto	158:b23ee177fd68	2004
Kojto	158:b23ee177fd68	2005	/**
Kojto	158:b23ee177fd68	2006	* @brief Clear LSE Clock security system interrupt flag
Kojto	158:b23ee177fd68	2007	* @rmtoll CICR LSECSSC LL_RCC_ClearFlag_LSECSS
Kojto	158:b23ee177fd68	2008	* @retval None
Kojto	158:b23ee177fd68	2009	*/
Kojto	158:b23ee177fd68	2010	__STATIC_INLINE void LL_RCC_ClearFlag_LSECSS(void)
Kojto	158:b23ee177fd68	2011	{
Kojto	158:b23ee177fd68	2012	SET_BIT(RCC->CICR, RCC_CICR_LSECSSC);
Kojto	158:b23ee177fd68	2013	}
Kojto	158:b23ee177fd68	2014
Kojto	158:b23ee177fd68	2015	/**
Kojto	158:b23ee177fd68	2016	* @brief Check if LSI ready interrupt occurred or not
Kojto	158:b23ee177fd68	2017	* @rmtoll CIFR LSIRDYF LL_RCC_IsActiveFlag_LSIRDY
Kojto	158:b23ee177fd68	2018	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2019	*/
Kojto	158:b23ee177fd68	2020	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSIRDY(void)
Kojto	158:b23ee177fd68	2021	{
Kojto	158:b23ee177fd68	2022	return (READ_BIT(RCC->CIFR, RCC_CIFR_LSIRDYF) == (RCC_CIFR_LSIRDYF));
Kojto	158:b23ee177fd68	2023	}
Kojto	158:b23ee177fd68	2024
Kojto	158:b23ee177fd68	2025	/**
Kojto	158:b23ee177fd68	2026	* @brief Check if LSE ready interrupt occurred or not
Kojto	158:b23ee177fd68	2027	* @rmtoll CIFR LSERDYF LL_RCC_IsActiveFlag_LSERDY
Kojto	158:b23ee177fd68	2028	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2029	*/
Kojto	158:b23ee177fd68	2030	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSERDY(void)
Kojto	158:b23ee177fd68	2031	{
Kojto	158:b23ee177fd68	2032	return (READ_BIT(RCC->CIFR, RCC_CIFR_LSERDYF) == (RCC_CIFR_LSERDYF));
Kojto	158:b23ee177fd68	2033	}
Kojto	158:b23ee177fd68	2034
Kojto	158:b23ee177fd68	2035	/**
Kojto	158:b23ee177fd68	2036	* @brief Check if MSI ready interrupt occurred or not
Kojto	158:b23ee177fd68	2037	* @rmtoll CIFR MSIRDYF LL_RCC_IsActiveFlag_MSIRDY
Kojto	158:b23ee177fd68	2038	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2039	*/
Kojto	158:b23ee177fd68	2040	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_MSIRDY(void)
Kojto	158:b23ee177fd68	2041	{
Kojto	158:b23ee177fd68	2042	return (READ_BIT(RCC->CIFR, RCC_CIFR_MSIRDYF) == (RCC_CIFR_MSIRDYF));
Kojto	158:b23ee177fd68	2043	}
Kojto	158:b23ee177fd68	2044
Kojto	158:b23ee177fd68	2045	/**
Kojto	158:b23ee177fd68	2046	* @brief Check if HSI ready interrupt occurred or not
Kojto	158:b23ee177fd68	2047	* @rmtoll CIFR HSIRDYF LL_RCC_IsActiveFlag_HSIRDY
Kojto	158:b23ee177fd68	2048	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2049	*/
Kojto	158:b23ee177fd68	2050	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIRDY(void)
Kojto	158:b23ee177fd68	2051	{
Kojto	158:b23ee177fd68	2052	return (READ_BIT(RCC->CIFR, RCC_CIFR_HSIRDYF) == (RCC_CIFR_HSIRDYF));
Kojto	158:b23ee177fd68	2053	}
Kojto	158:b23ee177fd68	2054
Kojto	158:b23ee177fd68	2055	/**
Kojto	158:b23ee177fd68	2056	* @brief Check if HSE ready interrupt occurred or not
Kojto	158:b23ee177fd68	2057	* @rmtoll CIFR HSERDYF LL_RCC_IsActiveFlag_HSERDY
Kojto	158:b23ee177fd68	2058	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2059	*/
Kojto	158:b23ee177fd68	2060	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSERDY(void)
Kojto	158:b23ee177fd68	2061	{
Kojto	158:b23ee177fd68	2062	return (READ_BIT(RCC->CIFR, RCC_CIFR_HSERDYF) == (RCC_CIFR_HSERDYF));
Kojto	158:b23ee177fd68	2063	}
Kojto	158:b23ee177fd68	2064
Kojto	158:b23ee177fd68	2065	/**
Kojto	158:b23ee177fd68	2066	* @brief Check if PLL ready interrupt occurred or not
Kojto	158:b23ee177fd68	2067	* @rmtoll CIFR PLLRDYF LL_RCC_IsActiveFlag_PLLRDY
Kojto	158:b23ee177fd68	2068	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2069	*/
Kojto	158:b23ee177fd68	2070	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLRDY(void)
Kojto	158:b23ee177fd68	2071	{
Kojto	158:b23ee177fd68	2072	return (READ_BIT(RCC->CIFR, RCC_CIFR_PLLRDYF) == (RCC_CIFR_PLLRDYF));
Kojto	158:b23ee177fd68	2073	}
Kojto	158:b23ee177fd68	2074
Kojto	158:b23ee177fd68	2075	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	2076	/**
Kojto	158:b23ee177fd68	2077	* @brief Check if HSI48 ready interrupt occurred or not
Kojto	158:b23ee177fd68	2078	* @rmtoll CIFR HSI48RDYF LL_RCC_IsActiveFlag_HSI48RDY
Kojto	158:b23ee177fd68	2079	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2080	*/
Kojto	158:b23ee177fd68	2081	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSI48RDY(void)
Kojto	158:b23ee177fd68	2082	{
Kojto	158:b23ee177fd68	2083	return (READ_BIT(RCC->CIFR, RCC_CIFR_HSI48RDYF) == (RCC_CIFR_HSI48RDYF));
Kojto	158:b23ee177fd68	2084	}
Kojto	158:b23ee177fd68	2085	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	2086
Kojto	158:b23ee177fd68	2087	#if defined(RCC_HSECSS_SUPPORT)
Kojto	158:b23ee177fd68	2088	/**
Kojto	158:b23ee177fd68	2089	* @brief Check if Clock security system interrupt occurred or not
Kojto	158:b23ee177fd68	2090	* @rmtoll CIFR CSSF LL_RCC_IsActiveFlag_HSECSS
Kojto	158:b23ee177fd68	2091	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2092	*/
Kojto	158:b23ee177fd68	2093	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSECSS(void)
Kojto	158:b23ee177fd68	2094	{
Kojto	158:b23ee177fd68	2095	return (READ_BIT(RCC->CIFR, RCC_CIFR_CSSF) == (RCC_CIFR_CSSF));
Kojto	158:b23ee177fd68	2096	}
Kojto	158:b23ee177fd68	2097	#endif /* RCC_HSECSS_SUPPORT */
Kojto	158:b23ee177fd68	2098
Kojto	158:b23ee177fd68	2099	/**
Kojto	158:b23ee177fd68	2100	* @brief Check if LSE Clock security system interrupt occurred or not
Kojto	158:b23ee177fd68	2101	* @rmtoll CIFR LSECSSF LL_RCC_IsActiveFlag_LSECSS
Kojto	158:b23ee177fd68	2102	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2103	*/
Kojto	158:b23ee177fd68	2104	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSECSS(void)
Kojto	158:b23ee177fd68	2105	{
Kojto	158:b23ee177fd68	2106	return (READ_BIT(RCC->CIFR, RCC_CIFR_LSECSSF) == (RCC_CIFR_LSECSSF));
Kojto	158:b23ee177fd68	2107	}
Kojto	158:b23ee177fd68	2108
Kojto	158:b23ee177fd68	2109	/**
Kojto	158:b23ee177fd68	2110	* @brief Check if HSI Divider is enabled (it divides by 4)
Kojto	158:b23ee177fd68	2111	* @rmtoll CR HSIDIVF LL_RCC_IsActiveFlag_HSIDIV
Kojto	158:b23ee177fd68	2112	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2113	*/
Kojto	158:b23ee177fd68	2114	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIDIV(void)
Kojto	158:b23ee177fd68	2115	{
Kojto	158:b23ee177fd68	2116	return (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) == (RCC_CR_HSIDIVF));
Kojto	158:b23ee177fd68	2117	}
Kojto	158:b23ee177fd68	2118
Kojto	158:b23ee177fd68	2119	#if defined(RCC_CSR_FWRSTF)
Kojto	158:b23ee177fd68	2120	/**
Kojto	158:b23ee177fd68	2121	* @brief Check if RCC flag FW reset is set or not.
Kojto	158:b23ee177fd68	2122	* @rmtoll CSR FWRSTF LL_RCC_IsActiveFlag_FWRST
Kojto	158:b23ee177fd68	2123	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2124	*/
Kojto	158:b23ee177fd68	2125	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_FWRST(void)
Kojto	158:b23ee177fd68	2126	{
Kojto	158:b23ee177fd68	2127	return (READ_BIT(RCC->CSR, RCC_CSR_FWRSTF) == (RCC_CSR_FWRSTF));
Kojto	158:b23ee177fd68	2128	}
Kojto	158:b23ee177fd68	2129	#endif /* RCC_CSR_FWRSTF */
Kojto	158:b23ee177fd68	2130
Kojto	158:b23ee177fd68	2131	/**
Kojto	158:b23ee177fd68	2132	* @brief Check if RCC flag Independent Watchdog reset is set or not.
Kojto	158:b23ee177fd68	2133	* @rmtoll CSR IWDGRSTF LL_RCC_IsActiveFlag_IWDGRST
Kojto	158:b23ee177fd68	2134	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2135	*/
Kojto	158:b23ee177fd68	2136	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_IWDGRST(void)
Kojto	158:b23ee177fd68	2137	{
Kojto	158:b23ee177fd68	2138	return (READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == (RCC_CSR_IWDGRSTF));
Kojto	158:b23ee177fd68	2139	}
Kojto	158:b23ee177fd68	2140
Kojto	158:b23ee177fd68	2141	/**
Kojto	158:b23ee177fd68	2142	* @brief Check if RCC flag Low Power reset is set or not.
Kojto	158:b23ee177fd68	2143	* @rmtoll CSR LPWRRSTF LL_RCC_IsActiveFlag_LPWRRST
Kojto	158:b23ee177fd68	2144	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2145	*/
Kojto	158:b23ee177fd68	2146	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LPWRRST(void)
Kojto	158:b23ee177fd68	2147	{
Kojto	158:b23ee177fd68	2148	return (READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == (RCC_CSR_LPWRRSTF));
Kojto	158:b23ee177fd68	2149	}
Kojto	158:b23ee177fd68	2150
Kojto	158:b23ee177fd68	2151	/**
Kojto	158:b23ee177fd68	2152	* @brief Check if RCC flag is set or not.
Kojto	158:b23ee177fd68	2153	* @rmtoll CSR OBLRSTF LL_RCC_IsActiveFlag_OBLRST
Kojto	158:b23ee177fd68	2154	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2155	*/
Kojto	158:b23ee177fd68	2156	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_OBLRST(void)
Kojto	158:b23ee177fd68	2157	{
Kojto	158:b23ee177fd68	2158	return (READ_BIT(RCC->CSR, RCC_CSR_OBLRSTF) == (RCC_CSR_OBLRSTF));
Kojto	158:b23ee177fd68	2159	}
Kojto	158:b23ee177fd68	2160
Kojto	158:b23ee177fd68	2161	/**
Kojto	158:b23ee177fd68	2162	* @brief Check if RCC flag Pin reset is set or not.
Kojto	158:b23ee177fd68	2163	* @rmtoll CSR PINRSTF LL_RCC_IsActiveFlag_PINRST
Kojto	158:b23ee177fd68	2164	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2165	*/
Kojto	158:b23ee177fd68	2166	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PINRST(void)
Kojto	158:b23ee177fd68	2167	{
Kojto	158:b23ee177fd68	2168	return (READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == (RCC_CSR_PINRSTF));
Kojto	158:b23ee177fd68	2169	}
Kojto	158:b23ee177fd68	2170
Kojto	158:b23ee177fd68	2171	/**
Kojto	158:b23ee177fd68	2172	* @brief Check if RCC flag POR/PDR reset is set or not.
Kojto	158:b23ee177fd68	2173	* @rmtoll CSR PORRSTF LL_RCC_IsActiveFlag_PORRST
Kojto	158:b23ee177fd68	2174	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2175	*/
Kojto	158:b23ee177fd68	2176	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PORRST(void)
Kojto	158:b23ee177fd68	2177	{
Kojto	158:b23ee177fd68	2178	return (READ_BIT(RCC->CSR, RCC_CSR_PORRSTF) == (RCC_CSR_PORRSTF));
Kojto	158:b23ee177fd68	2179	}
Kojto	158:b23ee177fd68	2180
Kojto	158:b23ee177fd68	2181	/**
Kojto	158:b23ee177fd68	2182	* @brief Check if RCC flag Software reset is set or not.
Kojto	158:b23ee177fd68	2183	* @rmtoll CSR SFTRSTF LL_RCC_IsActiveFlag_SFTRST
Kojto	158:b23ee177fd68	2184	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2185	*/
Kojto	158:b23ee177fd68	2186	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_SFTRST(void)
Kojto	158:b23ee177fd68	2187	{
Kojto	158:b23ee177fd68	2188	return (READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == (RCC_CSR_SFTRSTF));
Kojto	158:b23ee177fd68	2189	}
Kojto	158:b23ee177fd68	2190
Kojto	158:b23ee177fd68	2191	/**
Kojto	158:b23ee177fd68	2192	* @brief Check if RCC flag Window Watchdog reset is set or not.
Kojto	158:b23ee177fd68	2193	* @rmtoll CSR WWDGRSTF LL_RCC_IsActiveFlag_WWDGRST
Kojto	158:b23ee177fd68	2194	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2195	*/
Kojto	158:b23ee177fd68	2196	__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_WWDGRST(void)
Kojto	158:b23ee177fd68	2197	{
Kojto	158:b23ee177fd68	2198	return (READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == (RCC_CSR_WWDGRSTF));
Kojto	158:b23ee177fd68	2199	}
Kojto	158:b23ee177fd68	2200
Kojto	158:b23ee177fd68	2201	/**
Kojto	158:b23ee177fd68	2202	* @brief Set RMVF bit to clear the reset flags.
Kojto	158:b23ee177fd68	2203	* @rmtoll CSR RMVF LL_RCC_ClearResetFlags
Kojto	158:b23ee177fd68	2204	* @retval None
Kojto	158:b23ee177fd68	2205	*/
Kojto	158:b23ee177fd68	2206	__STATIC_INLINE void LL_RCC_ClearResetFlags(void)
Kojto	158:b23ee177fd68	2207	{
Kojto	158:b23ee177fd68	2208	SET_BIT(RCC->CSR, RCC_CSR_RMVF);
Kojto	158:b23ee177fd68	2209	}
Kojto	158:b23ee177fd68	2210
Kojto	158:b23ee177fd68	2211	/**
Kojto	158:b23ee177fd68	2212	* @}
Kojto	158:b23ee177fd68	2213	*/
Kojto	158:b23ee177fd68	2214
Kojto	158:b23ee177fd68	2215	/** @defgroup RCC_LL_EF_IT_Management IT Management
Kojto	158:b23ee177fd68	2216	* @{
Kojto	158:b23ee177fd68	2217	*/
Kojto	158:b23ee177fd68	2218
Kojto	158:b23ee177fd68	2219	/**
Kojto	158:b23ee177fd68	2220	* @brief Enable LSI ready interrupt
Kojto	158:b23ee177fd68	2221	* @rmtoll CIER LSIRDYIE LL_RCC_EnableIT_LSIRDY
Kojto	158:b23ee177fd68	2222	* @retval None
Kojto	158:b23ee177fd68	2223	*/
Kojto	158:b23ee177fd68	2224	__STATIC_INLINE void LL_RCC_EnableIT_LSIRDY(void)
Kojto	158:b23ee177fd68	2225	{
Kojto	158:b23ee177fd68	2226	SET_BIT(RCC->CIER, RCC_CIER_LSIRDYIE);
Kojto	158:b23ee177fd68	2227	}
Kojto	158:b23ee177fd68	2228
Kojto	158:b23ee177fd68	2229	/**
Kojto	158:b23ee177fd68	2230	* @brief Enable LSE ready interrupt
Kojto	158:b23ee177fd68	2231	* @rmtoll CIER LSERDYIE LL_RCC_EnableIT_LSERDY
Kojto	158:b23ee177fd68	2232	* @retval None
Kojto	158:b23ee177fd68	2233	*/
Kojto	158:b23ee177fd68	2234	__STATIC_INLINE void LL_RCC_EnableIT_LSERDY(void)
Kojto	158:b23ee177fd68	2235	{
Kojto	158:b23ee177fd68	2236	SET_BIT(RCC->CIER, RCC_CIER_LSERDYIE);
Kojto	158:b23ee177fd68	2237	}
Kojto	158:b23ee177fd68	2238
Kojto	158:b23ee177fd68	2239	/**
Kojto	158:b23ee177fd68	2240	* @brief Enable MSI ready interrupt
Kojto	158:b23ee177fd68	2241	* @rmtoll CIER MSIRDYIE LL_RCC_EnableIT_MSIRDY
Kojto	158:b23ee177fd68	2242	* @retval None
Kojto	158:b23ee177fd68	2243	*/
Kojto	158:b23ee177fd68	2244	__STATIC_INLINE void LL_RCC_EnableIT_MSIRDY(void)
Kojto	158:b23ee177fd68	2245	{
Kojto	158:b23ee177fd68	2246	SET_BIT(RCC->CIER, RCC_CIER_MSIRDYIE);
Kojto	158:b23ee177fd68	2247	}
Kojto	158:b23ee177fd68	2248
Kojto	158:b23ee177fd68	2249	/**
Kojto	158:b23ee177fd68	2250	* @brief Enable HSI ready interrupt
Kojto	158:b23ee177fd68	2251	* @rmtoll CIER HSIRDYIE LL_RCC_EnableIT_HSIRDY
Kojto	158:b23ee177fd68	2252	* @retval None
Kojto	158:b23ee177fd68	2253	*/
Kojto	158:b23ee177fd68	2254	__STATIC_INLINE void LL_RCC_EnableIT_HSIRDY(void)
Kojto	158:b23ee177fd68	2255	{
Kojto	158:b23ee177fd68	2256	SET_BIT(RCC->CIER, RCC_CIER_HSIRDYIE);
Kojto	158:b23ee177fd68	2257	}
Kojto	158:b23ee177fd68	2258
Kojto	158:b23ee177fd68	2259	/**
Kojto	158:b23ee177fd68	2260	* @brief Enable HSE ready interrupt
Kojto	158:b23ee177fd68	2261	* @rmtoll CIER HSERDYIE LL_RCC_EnableIT_HSERDY
Kojto	158:b23ee177fd68	2262	* @retval None
Kojto	158:b23ee177fd68	2263	*/
Kojto	158:b23ee177fd68	2264	__STATIC_INLINE void LL_RCC_EnableIT_HSERDY(void)
Kojto	158:b23ee177fd68	2265	{
Kojto	158:b23ee177fd68	2266	SET_BIT(RCC->CIER, RCC_CIER_HSERDYIE);
Kojto	158:b23ee177fd68	2267	}
Kojto	158:b23ee177fd68	2268
Kojto	158:b23ee177fd68	2269	/**
Kojto	158:b23ee177fd68	2270	* @brief Enable PLL ready interrupt
Kojto	158:b23ee177fd68	2271	* @rmtoll CIER PLLRDYIE LL_RCC_EnableIT_PLLRDY
Kojto	158:b23ee177fd68	2272	* @retval None
Kojto	158:b23ee177fd68	2273	*/
Kojto	158:b23ee177fd68	2274	__STATIC_INLINE void LL_RCC_EnableIT_PLLRDY(void)
Kojto	158:b23ee177fd68	2275	{
Kojto	158:b23ee177fd68	2276	SET_BIT(RCC->CIER, RCC_CIER_PLLRDYIE);
Kojto	158:b23ee177fd68	2277	}
Kojto	158:b23ee177fd68	2278
Kojto	158:b23ee177fd68	2279	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	2280	/**
Kojto	158:b23ee177fd68	2281	* @brief Enable HSI48 ready interrupt
Kojto	158:b23ee177fd68	2282	* @rmtoll CIER HSI48RDYIE LL_RCC_EnableIT_HSI48RDY
Kojto	158:b23ee177fd68	2283	* @retval None
Kojto	158:b23ee177fd68	2284	*/
Kojto	158:b23ee177fd68	2285	__STATIC_INLINE void LL_RCC_EnableIT_HSI48RDY(void)
Kojto	158:b23ee177fd68	2286	{
Kojto	158:b23ee177fd68	2287	SET_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE);
Kojto	158:b23ee177fd68	2288	}
Kojto	158:b23ee177fd68	2289	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	2290
Kojto	158:b23ee177fd68	2291	/**
Kojto	158:b23ee177fd68	2292	* @brief Enable LSE clock security system interrupt
Kojto	158:b23ee177fd68	2293	* @rmtoll CIER LSECSSIE LL_RCC_EnableIT_LSECSS
Kojto	158:b23ee177fd68	2294	* @retval None
Kojto	158:b23ee177fd68	2295	*/
Kojto	158:b23ee177fd68	2296	__STATIC_INLINE void LL_RCC_EnableIT_LSECSS(void)
Kojto	158:b23ee177fd68	2297	{
Kojto	158:b23ee177fd68	2298	SET_BIT(RCC->CIER, RCC_CIER_LSECSSIE);
Kojto	158:b23ee177fd68	2299	}
Kojto	158:b23ee177fd68	2300
Kojto	158:b23ee177fd68	2301	/**
Kojto	158:b23ee177fd68	2302	* @brief Disable LSI ready interrupt
Kojto	158:b23ee177fd68	2303	* @rmtoll CIER LSIRDYIE LL_RCC_DisableIT_LSIRDY
Kojto	158:b23ee177fd68	2304	* @retval None
Kojto	158:b23ee177fd68	2305	*/
Kojto	158:b23ee177fd68	2306	__STATIC_INLINE void LL_RCC_DisableIT_LSIRDY(void)
Kojto	158:b23ee177fd68	2307	{
Kojto	158:b23ee177fd68	2308	CLEAR_BIT(RCC->CIER, RCC_CIER_LSIRDYIE);
Kojto	158:b23ee177fd68	2309	}
Kojto	158:b23ee177fd68	2310
Kojto	158:b23ee177fd68	2311	/**
Kojto	158:b23ee177fd68	2312	* @brief Disable LSE ready interrupt
Kojto	158:b23ee177fd68	2313	* @rmtoll CIER LSERDYIE LL_RCC_DisableIT_LSERDY
Kojto	158:b23ee177fd68	2314	* @retval None
Kojto	158:b23ee177fd68	2315	*/
Kojto	158:b23ee177fd68	2316	__STATIC_INLINE void LL_RCC_DisableIT_LSERDY(void)
Kojto	158:b23ee177fd68	2317	{
Kojto	158:b23ee177fd68	2318	CLEAR_BIT(RCC->CIER, RCC_CIER_LSERDYIE);
Kojto	158:b23ee177fd68	2319	}
Kojto	158:b23ee177fd68	2320
Kojto	158:b23ee177fd68	2321	/**
Kojto	158:b23ee177fd68	2322	* @brief Disable MSI ready interrupt
Kojto	158:b23ee177fd68	2323	* @rmtoll CIER MSIRDYIE LL_RCC_DisableIT_MSIRDY
Kojto	158:b23ee177fd68	2324	* @retval None
Kojto	158:b23ee177fd68	2325	*/
Kojto	158:b23ee177fd68	2326	__STATIC_INLINE void LL_RCC_DisableIT_MSIRDY(void)
Kojto	158:b23ee177fd68	2327	{
Kojto	158:b23ee177fd68	2328	CLEAR_BIT(RCC->CIER, RCC_CIER_MSIRDYIE);
Kojto	158:b23ee177fd68	2329	}
Kojto	158:b23ee177fd68	2330
Kojto	158:b23ee177fd68	2331	/**
Kojto	158:b23ee177fd68	2332	* @brief Disable HSI ready interrupt
Kojto	158:b23ee177fd68	2333	* @rmtoll CIER HSIRDYIE LL_RCC_DisableIT_HSIRDY
Kojto	158:b23ee177fd68	2334	* @retval None
Kojto	158:b23ee177fd68	2335	*/
Kojto	158:b23ee177fd68	2336	__STATIC_INLINE void LL_RCC_DisableIT_HSIRDY(void)
Kojto	158:b23ee177fd68	2337	{
Kojto	158:b23ee177fd68	2338	CLEAR_BIT(RCC->CIER, RCC_CIER_HSIRDYIE);
Kojto	158:b23ee177fd68	2339	}
Kojto	158:b23ee177fd68	2340
Kojto	158:b23ee177fd68	2341	/**
Kojto	158:b23ee177fd68	2342	* @brief Disable HSE ready interrupt
Kojto	158:b23ee177fd68	2343	* @rmtoll CIER HSERDYIE LL_RCC_DisableIT_HSERDY
Kojto	158:b23ee177fd68	2344	* @retval None
Kojto	158:b23ee177fd68	2345	*/
Kojto	158:b23ee177fd68	2346	__STATIC_INLINE void LL_RCC_DisableIT_HSERDY(void)
Kojto	158:b23ee177fd68	2347	{
Kojto	158:b23ee177fd68	2348	CLEAR_BIT(RCC->CIER, RCC_CIER_HSERDYIE);
Kojto	158:b23ee177fd68	2349	}
Kojto	158:b23ee177fd68	2350
Kojto	158:b23ee177fd68	2351	/**
Kojto	158:b23ee177fd68	2352	* @brief Disable PLL ready interrupt
Kojto	158:b23ee177fd68	2353	* @rmtoll CIER PLLRDYIE LL_RCC_DisableIT_PLLRDY
Kojto	158:b23ee177fd68	2354	* @retval None
Kojto	158:b23ee177fd68	2355	*/
Kojto	158:b23ee177fd68	2356	__STATIC_INLINE void LL_RCC_DisableIT_PLLRDY(void)
Kojto	158:b23ee177fd68	2357	{
Kojto	158:b23ee177fd68	2358	CLEAR_BIT(RCC->CIER, RCC_CIER_PLLRDYIE);
Kojto	158:b23ee177fd68	2359	}
Kojto	158:b23ee177fd68	2360
Kojto	158:b23ee177fd68	2361	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	2362	/**
Kojto	158:b23ee177fd68	2363	* @brief Disable HSI48 ready interrupt
Kojto	158:b23ee177fd68	2364	* @rmtoll CIER HSI48RDYIE LL_RCC_DisableIT_HSI48RDY
Kojto	158:b23ee177fd68	2365	* @retval None
Kojto	158:b23ee177fd68	2366	*/
Kojto	158:b23ee177fd68	2367	__STATIC_INLINE void LL_RCC_DisableIT_HSI48RDY(void)
Kojto	158:b23ee177fd68	2368	{
Kojto	158:b23ee177fd68	2369	CLEAR_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE);
Kojto	158:b23ee177fd68	2370	}
Kojto	158:b23ee177fd68	2371	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	2372
Kojto	158:b23ee177fd68	2373	/**
Kojto	158:b23ee177fd68	2374	* @brief Disable LSE clock security system interrupt
Kojto	158:b23ee177fd68	2375	* @rmtoll CIER LSECSSIE LL_RCC_DisableIT_LSECSS
Kojto	158:b23ee177fd68	2376	* @retval None
Kojto	158:b23ee177fd68	2377	*/
Kojto	158:b23ee177fd68	2378	__STATIC_INLINE void LL_RCC_DisableIT_LSECSS(void)
Kojto	158:b23ee177fd68	2379	{
Kojto	158:b23ee177fd68	2380	CLEAR_BIT(RCC->CIER, RCC_CIER_LSECSSIE);
Kojto	158:b23ee177fd68	2381	}
Kojto	158:b23ee177fd68	2382
Kojto	158:b23ee177fd68	2383	/**
Kojto	158:b23ee177fd68	2384	* @brief Checks if LSI ready interrupt source is enabled or disabled.
Kojto	158:b23ee177fd68	2385	* @rmtoll CIER LSIRDYIE LL_RCC_IsEnabledIT_LSIRDY
Kojto	158:b23ee177fd68	2386	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2387	*/
Kojto	158:b23ee177fd68	2388	__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSIRDY(void)
Kojto	158:b23ee177fd68	2389	{
Kojto	158:b23ee177fd68	2390	return (READ_BIT(RCC->CIER, RCC_CIER_LSIRDYIE) == (RCC_CIER_LSIRDYIE));
Kojto	158:b23ee177fd68	2391	}
Kojto	158:b23ee177fd68	2392
Kojto	158:b23ee177fd68	2393	/**
Kojto	158:b23ee177fd68	2394	* @brief Checks if LSE ready interrupt source is enabled or disabled.
Kojto	158:b23ee177fd68	2395	* @rmtoll CIER LSERDYIE LL_RCC_IsEnabledIT_LSERDY
Kojto	158:b23ee177fd68	2396	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2397	*/
Kojto	158:b23ee177fd68	2398	__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSERDY(void)
Kojto	158:b23ee177fd68	2399	{
Kojto	158:b23ee177fd68	2400	return (READ_BIT(RCC->CIER, RCC_CIER_LSERDYIE) == (RCC_CIER_LSERDYIE));
Kojto	158:b23ee177fd68	2401	}
Kojto	158:b23ee177fd68	2402
Kojto	158:b23ee177fd68	2403	/**
Kojto	158:b23ee177fd68	2404	* @brief Checks if MSI ready interrupt source is enabled or disabled.
Kojto	158:b23ee177fd68	2405	* @rmtoll CIER MSIRDYIE LL_RCC_IsEnabledIT_MSIRDY
Kojto	158:b23ee177fd68	2406	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2407	*/
Kojto	158:b23ee177fd68	2408	__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_MSIRDY(void)
Kojto	158:b23ee177fd68	2409	{
Kojto	158:b23ee177fd68	2410	return (READ_BIT(RCC->CIER, RCC_CIER_MSIRDYIE) == (RCC_CIER_MSIRDYIE));
Kojto	158:b23ee177fd68	2411	}
Kojto	158:b23ee177fd68	2412
Kojto	158:b23ee177fd68	2413	/**
Kojto	158:b23ee177fd68	2414	* @brief Checks if HSI ready interrupt source is enabled or disabled.
Kojto	158:b23ee177fd68	2415	* @rmtoll CIER HSIRDYIE LL_RCC_IsEnabledIT_HSIRDY
Kojto	158:b23ee177fd68	2416	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2417	*/
Kojto	158:b23ee177fd68	2418	__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSIRDY(void)
Kojto	158:b23ee177fd68	2419	{
Kojto	158:b23ee177fd68	2420	return (READ_BIT(RCC->CIER, RCC_CIER_HSIRDYIE) == (RCC_CIER_HSIRDYIE));
Kojto	158:b23ee177fd68	2421	}
Kojto	158:b23ee177fd68	2422
Kojto	158:b23ee177fd68	2423	/**
Kojto	158:b23ee177fd68	2424	* @brief Checks if HSE ready interrupt source is enabled or disabled.
Kojto	158:b23ee177fd68	2425	* @rmtoll CIER HSERDYIE LL_RCC_IsEnabledIT_HSERDY
Kojto	158:b23ee177fd68	2426	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2427	*/
Kojto	158:b23ee177fd68	2428	__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSERDY(void)
Kojto	158:b23ee177fd68	2429	{
Kojto	158:b23ee177fd68	2430	return (READ_BIT(RCC->CIER, RCC_CIER_HSERDYIE) == (RCC_CIER_HSERDYIE));
Kojto	158:b23ee177fd68	2431	}
Kojto	158:b23ee177fd68	2432
Kojto	158:b23ee177fd68	2433	/**
Kojto	158:b23ee177fd68	2434	* @brief Checks if PLL ready interrupt source is enabled or disabled.
Kojto	158:b23ee177fd68	2435	* @rmtoll CIER PLLRDYIE LL_RCC_IsEnabledIT_PLLRDY
Kojto	158:b23ee177fd68	2436	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2437	*/
Kojto	158:b23ee177fd68	2438	__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLRDY(void)
Kojto	158:b23ee177fd68	2439	{
Kojto	158:b23ee177fd68	2440	return (READ_BIT(RCC->CIER, RCC_CIER_PLLRDYIE) == (RCC_CIER_PLLRDYIE));
Kojto	158:b23ee177fd68	2441	}
Kojto	158:b23ee177fd68	2442
Kojto	158:b23ee177fd68	2443	#if defined(RCC_HSI48_SUPPORT)
Kojto	158:b23ee177fd68	2444	/**
Kojto	158:b23ee177fd68	2445	* @brief Checks if HSI48 ready interrupt source is enabled or disabled.
Kojto	158:b23ee177fd68	2446	* @rmtoll CIER HSI48RDYIE LL_RCC_IsEnabledIT_HSI48RDY
Kojto	158:b23ee177fd68	2447	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2448	*/
Kojto	158:b23ee177fd68	2449	__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSI48RDY(void)
Kojto	158:b23ee177fd68	2450	{
Kojto	158:b23ee177fd68	2451	return (READ_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE) == (RCC_CIER_HSI48RDYIE));
Kojto	158:b23ee177fd68	2452	}
Kojto	158:b23ee177fd68	2453	#endif /* RCC_HSI48_SUPPORT */
Kojto	158:b23ee177fd68	2454
Kojto	158:b23ee177fd68	2455	/**
Kojto	158:b23ee177fd68	2456	* @brief Checks if LSECSS interrupt source is enabled or disabled.
Kojto	158:b23ee177fd68	2457	* @rmtoll CIER LSECSSIE LL_RCC_IsEnabledIT_LSECSS
Kojto	158:b23ee177fd68	2458	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2459	*/
Kojto	158:b23ee177fd68	2460	__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSECSS(void)
Kojto	158:b23ee177fd68	2461	{
Kojto	158:b23ee177fd68	2462	return (READ_BIT(RCC->CIER, RCC_CIER_LSECSSIE) == (RCC_CIER_LSECSSIE));
Kojto	158:b23ee177fd68	2463	}
Kojto	158:b23ee177fd68	2464
Kojto	158:b23ee177fd68	2465	/**
Kojto	158:b23ee177fd68	2466	* @}
Kojto	158:b23ee177fd68	2467	*/
Kojto	158:b23ee177fd68	2468
Kojto	158:b23ee177fd68	2469	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	2470	/** @defgroup RCC_LL_EF_Init De-initialization function
Kojto	158:b23ee177fd68	2471	* @{
Kojto	158:b23ee177fd68	2472	*/
Kojto	158:b23ee177fd68	2473	ErrorStatus LL_RCC_DeInit(void);
Kojto	158:b23ee177fd68	2474	/**
Kojto	158:b23ee177fd68	2475	* @}
Kojto	158:b23ee177fd68	2476	*/
Kojto	158:b23ee177fd68	2477
Kojto	158:b23ee177fd68	2478	/** @defgroup RCC_LL_EF_Get_Freq Get system and peripherals clocks frequency functions
Kojto	158:b23ee177fd68	2479	* @{
Kojto	158:b23ee177fd68	2480	*/
Kojto	158:b23ee177fd68	2481	void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks);
Kojto	158:b23ee177fd68	2482	uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource);
Kojto	158:b23ee177fd68	2483	uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource);
Kojto	158:b23ee177fd68	2484	uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource);
Kojto	158:b23ee177fd68	2485	uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource);
Kojto	158:b23ee177fd68	2486	#if defined(USB_OTG_FS) \|\| defined(USB)
Kojto	158:b23ee177fd68	2487	uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource);
Kojto	158:b23ee177fd68	2488	#endif /* USB_OTG_FS \|\| USB */
Kojto	158:b23ee177fd68	2489	/**
Kojto	158:b23ee177fd68	2490	* @}
Kojto	158:b23ee177fd68	2491	*/
Kojto	158:b23ee177fd68	2492	#endif /* USE_FULL_LL_DRIVER */
Kojto	158:b23ee177fd68	2493
Kojto	158:b23ee177fd68	2494	/**
Kojto	158:b23ee177fd68	2495	* @}
Kojto	158:b23ee177fd68	2496	*/
Kojto	158:b23ee177fd68	2497
Kojto	158:b23ee177fd68	2498	/**
Kojto	158:b23ee177fd68	2499	* @}
Kojto	158:b23ee177fd68	2500	*/
Kojto	158:b23ee177fd68	2501
Kojto	158:b23ee177fd68	2502	#endif /* RCC */
Kojto	158:b23ee177fd68	2503
Kojto	158:b23ee177fd68	2504	/**
Kojto	158:b23ee177fd68	2505	* @}
Kojto	158:b23ee177fd68	2506	*/
Kojto	158:b23ee177fd68	2507
Kojto	158:b23ee177fd68	2508	#ifdef __cplusplus
Kojto	158:b23ee177fd68	2509	}
Kojto	158:b23ee177fd68	2510	#endif
Kojto	158:b23ee177fd68	2511
Kojto	158:b23ee177fd68	2512	#endif /* __STM32L0xx_LL_RCC_H */
Kojto	158:b23ee177fd68	2513
Kojto	158:b23ee177fd68	2514	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/