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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_dma.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 186:707f6e361f3e

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	158:b23ee177fd68	1	/**
Kojto	158:b23ee177fd68	2	******************************************************************************
Kojto	158:b23ee177fd68	3	* @file stm32l0xx_ll_dma.h
Kojto	158:b23ee177fd68	4	* @author MCD Application Team
Kojto	158:b23ee177fd68	5	* @brief Header file of DMA LL module.
Kojto	158:b23ee177fd68	6	******************************************************************************
Kojto	158:b23ee177fd68	7	* @attention
Kojto	158:b23ee177fd68	8	*
Kojto	158:b23ee177fd68	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	158:b23ee177fd68	10	*
Kojto	158:b23ee177fd68	11	* Redistribution and use in source and binary forms, with or without modification,
Kojto	158:b23ee177fd68	12	* are permitted provided that the following conditions are met:
Kojto	158:b23ee177fd68	13	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	158:b23ee177fd68	14	* this list of conditions and the following disclaimer.
Kojto	158:b23ee177fd68	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	158:b23ee177fd68	16	* this list of conditions and the following disclaimer in the documentation
Kojto	158:b23ee177fd68	17	* and/or other materials provided with the distribution.
Kojto	158:b23ee177fd68	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	158:b23ee177fd68	19	* may be used to endorse or promote products derived from this software
Kojto	158:b23ee177fd68	20	* without specific prior written permission.
Kojto	158:b23ee177fd68	21	*
Kojto	158:b23ee177fd68	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	158:b23ee177fd68	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	158:b23ee177fd68	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	158:b23ee177fd68	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	158:b23ee177fd68	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	158:b23ee177fd68	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	158:b23ee177fd68	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	158:b23ee177fd68	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	158:b23ee177fd68	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	158:b23ee177fd68	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	158:b23ee177fd68	32	*
Kojto	158:b23ee177fd68	33	******************************************************************************
Kojto	158:b23ee177fd68	34	*/
Kojto	158:b23ee177fd68	35
Kojto	158:b23ee177fd68	36	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	158:b23ee177fd68	37	#ifndef __STM32L0xx_LL_DMA_H
Kojto	158:b23ee177fd68	38	#define __STM32L0xx_LL_DMA_H
Kojto	158:b23ee177fd68	39
Kojto	158:b23ee177fd68	40	#ifdef __cplusplus
Kojto	158:b23ee177fd68	41	extern "C" {
Kojto	158:b23ee177fd68	42	#endif
Kojto	158:b23ee177fd68	43
Kojto	158:b23ee177fd68	44	/* Includes ------------------------------------------------------------------*/
Kojto	158:b23ee177fd68	45	#include "stm32l0xx.h"
Kojto	158:b23ee177fd68	46
Kojto	158:b23ee177fd68	47	/** @addtogroup STM32L0xx_LL_Driver
Kojto	158:b23ee177fd68	48	* @{
Kojto	158:b23ee177fd68	49	*/
Kojto	158:b23ee177fd68	50
Kojto	158:b23ee177fd68	51	#if defined (DMA1)
Kojto	158:b23ee177fd68	52
Kojto	158:b23ee177fd68	53	/** @defgroup DMA_LL DMA
Kojto	158:b23ee177fd68	54	* @{
Kojto	158:b23ee177fd68	55	*/
Kojto	158:b23ee177fd68	56
Kojto	158:b23ee177fd68	57	/* Private types -------------------------------------------------------------*/
Kojto	158:b23ee177fd68	58	/* Private variables ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	59	/** @defgroup DMA_LL_Private_Variables DMA Private Variables
Kojto	158:b23ee177fd68	60	* @{
Kojto	158:b23ee177fd68	61	*/
Kojto	158:b23ee177fd68	62	/* Array used to get the DMA channel register offset versus channel index LL_DMA_CHANNEL_x */
Kojto	158:b23ee177fd68	63	static const uint8_t CHANNEL_OFFSET_TAB[] =
Kojto	158:b23ee177fd68	64	{
Kojto	158:b23ee177fd68	65	(uint8_t)(DMA1_Channel1_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	66	(uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	67	(uint8_t)(DMA1_Channel3_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	68	(uint8_t)(DMA1_Channel4_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	69	(uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	70	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	71	(uint8_t)(DMA1_Channel6_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	72	#endif /DMA1_Channel6/
Kojto	158:b23ee177fd68	73	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	74	(uint8_t)(DMA1_Channel7_BASE - DMA1_BASE)
Kojto	158:b23ee177fd68	75	#endif /DMA1_Channel7/
Kojto	158:b23ee177fd68	76	};
Kojto	158:b23ee177fd68	77	/**
Kojto	158:b23ee177fd68	78	* @}
Kojto	158:b23ee177fd68	79	*/
Kojto	158:b23ee177fd68	80
Kojto	158:b23ee177fd68	81	/* Private constants ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	82	/** @defgroup DMA_LL_Private_Constants DMA Private Constants
Kojto	158:b23ee177fd68	83	* @{
Kojto	158:b23ee177fd68	84	*/
Kojto	158:b23ee177fd68	85	/* Define used to get CSELR register offset */
Kojto	158:b23ee177fd68	86	#define DMA_CSELR_OFFSET (uint32_t)(DMA1_CSELR_BASE - DMA1_BASE)
Kojto	158:b23ee177fd68	87
Kojto	158:b23ee177fd68	88	/* Defines used for the bit position in the register and perform offsets */
Kojto	158:b23ee177fd68	89	#define DMA_POSITION_CSELR_CXS ((Channel-1U)*4U)
Kojto	158:b23ee177fd68	90	/**
Kojto	158:b23ee177fd68	91	* @}
Kojto	158:b23ee177fd68	92	*/
Kojto	158:b23ee177fd68	93
Kojto	158:b23ee177fd68	94	/* Private macros ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	95	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	96	/** @defgroup DMA_LL_Private_Macros DMA Private Macros
Kojto	158:b23ee177fd68	97	* @{
Kojto	158:b23ee177fd68	98	*/
Kojto	158:b23ee177fd68	99	/**
Kojto	158:b23ee177fd68	100	* @}
Kojto	158:b23ee177fd68	101	*/
Kojto	158:b23ee177fd68	102	#endif /USE_FULL_LL_DRIVER/
Kojto	158:b23ee177fd68	103
Kojto	158:b23ee177fd68	104	/* Exported types ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	105	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	106	/** @defgroup DMA_LL_ES_INIT DMA Exported Init structure
Kojto	158:b23ee177fd68	107	* @{
Kojto	158:b23ee177fd68	108	*/
Kojto	158:b23ee177fd68	109	typedef struct
Kojto	158:b23ee177fd68	110	{
Kojto	158:b23ee177fd68	111	uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer
Kojto	158:b23ee177fd68	112	or as Source base address in case of memory to memory transfer direction.
Kojto	158:b23ee177fd68	113
Kojto	158:b23ee177fd68	114	This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
Kojto	158:b23ee177fd68	115
Kojto	158:b23ee177fd68	116	uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer
Kojto	158:b23ee177fd68	117	or as Destination base address in case of memory to memory transfer direction.
Kojto	158:b23ee177fd68	118
Kojto	158:b23ee177fd68	119	This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
Kojto	158:b23ee177fd68	120
Kojto	158:b23ee177fd68	121	uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto	158:b23ee177fd68	122	from memory to memory or from peripheral to memory.
Kojto	158:b23ee177fd68	123	This parameter can be a value of @ref DMA_LL_EC_DIRECTION
Kojto	158:b23ee177fd68	124
Kojto	158:b23ee177fd68	125	This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataTransferDirection(). */
Kojto	158:b23ee177fd68	126
Kojto	158:b23ee177fd68	127	uint32_t Mode; /*!< Specifies the normal or circular operation mode.
Kojto	158:b23ee177fd68	128	This parameter can be a value of @ref DMA_LL_EC_MODE
Kojto	158:b23ee177fd68	129	@note: The circular buffer mode cannot be used if the memory to memory
Kojto	158:b23ee177fd68	130	data transfer direction is configured on the selected Channel
Kojto	158:b23ee177fd68	131
Kojto	158:b23ee177fd68	132	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMode(). */
Kojto	158:b23ee177fd68	133
Kojto	158:b23ee177fd68	134	uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address in case of memory to memory transfer direction
Kojto	158:b23ee177fd68	135	is incremented or not.
Kojto	158:b23ee177fd68	136	This parameter can be a value of @ref DMA_LL_EC_PERIPH
Kojto	158:b23ee177fd68	137
Kojto	158:b23ee177fd68	138	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphIncMode(). */
Kojto	158:b23ee177fd68	139
Kojto	158:b23ee177fd68	140	uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address in case of memory to memory transfer direction
Kojto	158:b23ee177fd68	141	is incremented or not.
Kojto	158:b23ee177fd68	142	This parameter can be a value of @ref DMA_LL_EC_MEMORY
Kojto	158:b23ee177fd68	143
Kojto	158:b23ee177fd68	144	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemoryIncMode(). */
Kojto	158:b23ee177fd68	145
Kojto	158:b23ee177fd68	146	uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data size alignment (byte, half word, word)
Kojto	158:b23ee177fd68	147	in case of memory to memory transfer direction.
Kojto	158:b23ee177fd68	148	This parameter can be a value of @ref DMA_LL_EC_PDATAALIGN
Kojto	158:b23ee177fd68	149
Kojto	158:b23ee177fd68	150	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphSize(). */
Kojto	158:b23ee177fd68	151
Kojto	158:b23ee177fd68	152	uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination data size alignment (byte, half word, word)
Kojto	158:b23ee177fd68	153	in case of memory to memory transfer direction.
Kojto	158:b23ee177fd68	154	This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN
Kojto	158:b23ee177fd68	155
Kojto	158:b23ee177fd68	156	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemorySize(). */
Kojto	158:b23ee177fd68	157
Kojto	158:b23ee177fd68	158	uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit.
Kojto	158:b23ee177fd68	159	The data unit is equal to the source buffer configuration set in PeripheralSize
Kojto	158:b23ee177fd68	160	or MemorySize parameters depending in the transfer direction.
Kojto	158:b23ee177fd68	161	This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000FFFF
Kojto	158:b23ee177fd68	162
Kojto	158:b23ee177fd68	163	This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataLength(). */
Kojto	158:b23ee177fd68	164
Kojto	158:b23ee177fd68	165	uint32_t PeriphRequest; /*!< Specifies the peripheral request.
Kojto	158:b23ee177fd68	166	This parameter can be a value of @ref DMA_LL_EC_REQUEST
Kojto	158:b23ee177fd68	167
Kojto	158:b23ee177fd68	168	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphRequest(). */
Kojto	158:b23ee177fd68	169
Kojto	158:b23ee177fd68	170	uint32_t Priority; /*!< Specifies the channel priority level.
Kojto	158:b23ee177fd68	171	This parameter can be a value of @ref DMA_LL_EC_PRIORITY
Kojto	158:b23ee177fd68	172
Kojto	158:b23ee177fd68	173	This feature can be modified afterwards using unitary function @ref LL_DMA_SetChannelPriorityLevel(). */
Kojto	158:b23ee177fd68	174
Kojto	158:b23ee177fd68	175	} LL_DMA_InitTypeDef;
Kojto	158:b23ee177fd68	176	/**
Kojto	158:b23ee177fd68	177	* @}
Kojto	158:b23ee177fd68	178	*/
Kojto	158:b23ee177fd68	179	#endif /USE_FULL_LL_DRIVER/
Kojto	158:b23ee177fd68	180
Kojto	158:b23ee177fd68	181	/* Exported constants --------------------------------------------------------*/
Kojto	158:b23ee177fd68	182	/** @defgroup DMA_LL_Exported_Constants DMA Exported Constants
Kojto	158:b23ee177fd68	183	* @{
Kojto	158:b23ee177fd68	184	*/
Kojto	158:b23ee177fd68	185	/** @defgroup DMA_LL_EC_CLEAR_FLAG Clear Flags Defines
Kojto	158:b23ee177fd68	186	* @brief Flags defines which can be used with LL_DMA_WriteReg function
Kojto	158:b23ee177fd68	187	* @{
Kojto	158:b23ee177fd68	188	*/
Kojto	158:b23ee177fd68	189	#define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /!< Channel 1 global flag /
Kojto	158:b23ee177fd68	190	#define LL_DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF1 /!< Channel 1 transfer complete flag /
Kojto	158:b23ee177fd68	191	#define LL_DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF1 /!< Channel 1 half transfer flag /
Kojto	158:b23ee177fd68	192	#define LL_DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF1 /!< Channel 1 transfer error flag /
Kojto	158:b23ee177fd68	193	#define LL_DMA_IFCR_CGIF2 DMA_IFCR_CGIF2 /!< Channel 2 global flag /
Kojto	158:b23ee177fd68	194	#define LL_DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF2 /!< Channel 2 transfer complete flag /
Kojto	158:b23ee177fd68	195	#define LL_DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF2 /!< Channel 2 half transfer flag /
Kojto	158:b23ee177fd68	196	#define LL_DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF2 /!< Channel 2 transfer error flag /
Kojto	158:b23ee177fd68	197	#define LL_DMA_IFCR_CGIF3 DMA_IFCR_CGIF3 /!< Channel 3 global flag /
Kojto	158:b23ee177fd68	198	#define LL_DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF3 /!< Channel 3 transfer complete flag /
Kojto	158:b23ee177fd68	199	#define LL_DMA_IFCR_CHTIF3 DMA_IFCR_CHTIF3 /!< Channel 3 half transfer flag /
Kojto	158:b23ee177fd68	200	#define LL_DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF3 /!< Channel 3 transfer error flag /
Kojto	158:b23ee177fd68	201	#define LL_DMA_IFCR_CGIF4 DMA_IFCR_CGIF4 /!< Channel 4 global flag /
Kojto	158:b23ee177fd68	202	#define LL_DMA_IFCR_CTCIF4 DMA_IFCR_CTCIF4 /!< Channel 4 transfer complete flag /
Kojto	158:b23ee177fd68	203	#define LL_DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF4 /!< Channel 4 half transfer flag /
Kojto	158:b23ee177fd68	204	#define LL_DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF4 /!< Channel 4 transfer error flag /
Kojto	158:b23ee177fd68	205	#define LL_DMA_IFCR_CGIF5 DMA_IFCR_CGIF5 /!< Channel 5 global flag /
Kojto	158:b23ee177fd68	206	#define LL_DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF5 /!< Channel 5 transfer complete flag /
Kojto	158:b23ee177fd68	207	#define LL_DMA_IFCR_CHTIF5 DMA_IFCR_CHTIF5 /!< Channel 5 half transfer flag /
Kojto	158:b23ee177fd68	208	#define LL_DMA_IFCR_CTEIF5 DMA_IFCR_CTEIF5 /!< Channel 5 transfer error flag /
Kojto	158:b23ee177fd68	209	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	210	#define LL_DMA_IFCR_CGIF6 DMA_IFCR_CGIF6 /!< Channel 6 global flag /
Kojto	158:b23ee177fd68	211	#define LL_DMA_IFCR_CTCIF6 DMA_IFCR_CTCIF6 /!< Channel 6 transfer complete flag /
Kojto	158:b23ee177fd68	212	#define LL_DMA_IFCR_CHTIF6 DMA_IFCR_CHTIF6 /!< Channel 6 half transfer flag /
Kojto	158:b23ee177fd68	213	#define LL_DMA_IFCR_CTEIF6 DMA_IFCR_CTEIF6 /!< Channel 6 transfer error flag /
Kojto	158:b23ee177fd68	214	#endif
Kojto	158:b23ee177fd68	215	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	216	#define LL_DMA_IFCR_CGIF7 DMA_IFCR_CGIF7 /!< Channel 7 global flag /
Kojto	158:b23ee177fd68	217	#define LL_DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF7 /!< Channel 7 transfer complete flag /
Kojto	158:b23ee177fd68	218	#define LL_DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF7 /!< Channel 7 half transfer flag /
Kojto	158:b23ee177fd68	219	#define LL_DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF7 /!< Channel 7 transfer error flag /
Kojto	158:b23ee177fd68	220	#endif
Kojto	158:b23ee177fd68	221	/**
Kojto	158:b23ee177fd68	222	* @}
Kojto	158:b23ee177fd68	223	*/
Kojto	158:b23ee177fd68	224
Kojto	158:b23ee177fd68	225	/** @defgroup DMA_LL_EC_GET_FLAG Get Flags Defines
Kojto	158:b23ee177fd68	226	* @brief Flags defines which can be used with LL_DMA_ReadReg function
Kojto	158:b23ee177fd68	227	* @{
Kojto	158:b23ee177fd68	228	*/
Kojto	158:b23ee177fd68	229	#define LL_DMA_ISR_GIF1 DMA_ISR_GIF1 /!< Channel 1 global flag /
Kojto	158:b23ee177fd68	230	#define LL_DMA_ISR_TCIF1 DMA_ISR_TCIF1 /!< Channel 1 transfer complete flag /
Kojto	158:b23ee177fd68	231	#define LL_DMA_ISR_HTIF1 DMA_ISR_HTIF1 /!< Channel 1 half transfer flag /
Kojto	158:b23ee177fd68	232	#define LL_DMA_ISR_TEIF1 DMA_ISR_TEIF1 /!< Channel 1 transfer error flag /
Kojto	158:b23ee177fd68	233	#define LL_DMA_ISR_GIF2 DMA_ISR_GIF2 /!< Channel 2 global flag /
Kojto	158:b23ee177fd68	234	#define LL_DMA_ISR_TCIF2 DMA_ISR_TCIF2 /!< Channel 2 transfer complete flag /
Kojto	158:b23ee177fd68	235	#define LL_DMA_ISR_HTIF2 DMA_ISR_HTIF2 /!< Channel 2 half transfer flag /
Kojto	158:b23ee177fd68	236	#define LL_DMA_ISR_TEIF2 DMA_ISR_TEIF2 /!< Channel 2 transfer error flag /
Kojto	158:b23ee177fd68	237	#define LL_DMA_ISR_GIF3 DMA_ISR_GIF3 /!< Channel 3 global flag /
Kojto	158:b23ee177fd68	238	#define LL_DMA_ISR_TCIF3 DMA_ISR_TCIF3 /!< Channel 3 transfer complete flag /
Kojto	158:b23ee177fd68	239	#define LL_DMA_ISR_HTIF3 DMA_ISR_HTIF3 /!< Channel 3 half transfer flag /
Kojto	158:b23ee177fd68	240	#define LL_DMA_ISR_TEIF3 DMA_ISR_TEIF3 /!< Channel 3 transfer error flag /
Kojto	158:b23ee177fd68	241	#define LL_DMA_ISR_GIF4 DMA_ISR_GIF4 /!< Channel 4 global flag /
Kojto	158:b23ee177fd68	242	#define LL_DMA_ISR_TCIF4 DMA_ISR_TCIF4 /!< Channel 4 transfer complete flag /
Kojto	158:b23ee177fd68	243	#define LL_DMA_ISR_HTIF4 DMA_ISR_HTIF4 /!< Channel 4 half transfer flag /
Kojto	158:b23ee177fd68	244	#define LL_DMA_ISR_TEIF4 DMA_ISR_TEIF4 /!< Channel 4 transfer error flag /
Kojto	158:b23ee177fd68	245	#define LL_DMA_ISR_GIF5 DMA_ISR_GIF5 /!< Channel 5 global flag /
Kojto	158:b23ee177fd68	246	#define LL_DMA_ISR_TCIF5 DMA_ISR_TCIF5 /!< Channel 5 transfer complete flag /
Kojto	158:b23ee177fd68	247	#define LL_DMA_ISR_HTIF5 DMA_ISR_HTIF5 /!< Channel 5 half transfer flag /
Kojto	158:b23ee177fd68	248	#define LL_DMA_ISR_TEIF5 DMA_ISR_TEIF5 /!< Channel 5 transfer error flag /
Kojto	158:b23ee177fd68	249	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	250	#define LL_DMA_ISR_GIF6 DMA_ISR_GIF6 /!< Channel 6 global flag /
Kojto	158:b23ee177fd68	251	#define LL_DMA_ISR_TCIF6 DMA_ISR_TCIF6 /!< Channel 6 transfer complete flag /
Kojto	158:b23ee177fd68	252	#define LL_DMA_ISR_HTIF6 DMA_ISR_HTIF6 /!< Channel 6 half transfer flag /
Kojto	158:b23ee177fd68	253	#define LL_DMA_ISR_TEIF6 DMA_ISR_TEIF6 /!< Channel 6 transfer error flag /
Kojto	158:b23ee177fd68	254	#endif
Kojto	158:b23ee177fd68	255	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	256	#define LL_DMA_ISR_GIF7 DMA_ISR_GIF7 /!< Channel 7 global flag /
Kojto	158:b23ee177fd68	257	#define LL_DMA_ISR_TCIF7 DMA_ISR_TCIF7 /!< Channel 7 transfer complete flag /
Kojto	158:b23ee177fd68	258	#define LL_DMA_ISR_HTIF7 DMA_ISR_HTIF7 /!< Channel 7 half transfer flag /
Kojto	158:b23ee177fd68	259	#define LL_DMA_ISR_TEIF7 DMA_ISR_TEIF7 /!< Channel 7 transfer error flag /
Kojto	158:b23ee177fd68	260	#endif
Kojto	158:b23ee177fd68	261	/**
Kojto	158:b23ee177fd68	262	* @}
Kojto	158:b23ee177fd68	263	*/
Kojto	158:b23ee177fd68	264
Kojto	158:b23ee177fd68	265	/** @defgroup DMA_LL_EC_IT IT Defines
Kojto	158:b23ee177fd68	266	* @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMA_WriteReg functions
Kojto	158:b23ee177fd68	267	* @{
Kojto	158:b23ee177fd68	268	*/
Kojto	158:b23ee177fd68	269	#define LL_DMA_CCR_TCIE DMA_CCR_TCIE /!< Transfer complete interrupt /
Kojto	158:b23ee177fd68	270	#define LL_DMA_CCR_HTIE DMA_CCR_HTIE /!< Half Transfer interrupt /
Kojto	158:b23ee177fd68	271	#define LL_DMA_CCR_TEIE DMA_CCR_TEIE /!< Transfer error interrupt /
Kojto	158:b23ee177fd68	272	/**
Kojto	158:b23ee177fd68	273	* @}
Kojto	158:b23ee177fd68	274	*/
Kojto	158:b23ee177fd68	275
Kojto	158:b23ee177fd68	276	/** @defgroup DMA_LL_EC_CHANNEL CHANNEL
Kojto	158:b23ee177fd68	277	* @{
Kojto	158:b23ee177fd68	278	*/
Kojto	158:b23ee177fd68	279	#define LL_DMA_CHANNEL_1 ((uint32_t)0x00000001U) /!< DMA Channel 1 /
Kojto	158:b23ee177fd68	280	#define LL_DMA_CHANNEL_2 ((uint32_t)0x00000002U) /!< DMA Channel 2 /
Kojto	158:b23ee177fd68	281	#define LL_DMA_CHANNEL_3 ((uint32_t)0x00000003U) /!< DMA Channel 3 /
Kojto	158:b23ee177fd68	282	#define LL_DMA_CHANNEL_4 ((uint32_t)0x00000004U) /!< DMA Channel 4 /
Kojto	158:b23ee177fd68	283	#define LL_DMA_CHANNEL_5 ((uint32_t)0x00000005U) /!< DMA Channel 5 /
Kojto	158:b23ee177fd68	284	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	285	#define LL_DMA_CHANNEL_6 ((uint32_t)0x00000006U) /!< DMA Channel 6 /
Kojto	158:b23ee177fd68	286	#endif
Kojto	158:b23ee177fd68	287	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	288	#define LL_DMA_CHANNEL_7 ((uint32_t)0x00000007U) /!< DMA Channel 7 /
Kojto	158:b23ee177fd68	289	#endif
Kojto	158:b23ee177fd68	290	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	291	#define LL_DMA_CHANNEL_ALL ((uint32_t)0xFFFF0000U) /!< DMA Channel all (used only for function @ref LL_DMA_DeInit(). /
Kojto	158:b23ee177fd68	292	#endif /USE_FULL_LL_DRIVER/
Kojto	158:b23ee177fd68	293	/**
Kojto	158:b23ee177fd68	294	* @}
Kojto	158:b23ee177fd68	295	*/
Kojto	158:b23ee177fd68	296
Kojto	158:b23ee177fd68	297	/** @defgroup DMA_LL_EC_DIRECTION Transfer Direction
Kojto	158:b23ee177fd68	298	* @{
Kojto	158:b23ee177fd68	299	*/
Kojto	158:b23ee177fd68	300	#define LL_DMA_DIRECTION_PERIPH_TO_MEMORY ((uint32_t)0x00000000U) /!< Peripheral to memory direction /
Kojto	158:b23ee177fd68	301	#define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR /!< Memory to peripheral direction /
Kojto	158:b23ee177fd68	302	#define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM /!< Memory to memory direction /
Kojto	158:b23ee177fd68	303	/**
Kojto	158:b23ee177fd68	304	* @}
Kojto	158:b23ee177fd68	305	*/
Kojto	158:b23ee177fd68	306
Kojto	158:b23ee177fd68	307	/** @defgroup DMA_LL_EC_MODE Transfer mode
Kojto	158:b23ee177fd68	308	* @{
Kojto	158:b23ee177fd68	309	*/
Kojto	158:b23ee177fd68	310	#define LL_DMA_MODE_NORMAL ((uint32_t)0x00000000U) /!< Normal Mode /
Kojto	158:b23ee177fd68	311	#define LL_DMA_MODE_CIRCULAR DMA_CCR_CIRC /!< Circular Mode /
Kojto	158:b23ee177fd68	312	/**
Kojto	158:b23ee177fd68	313	* @}
Kojto	158:b23ee177fd68	314	*/
Kojto	158:b23ee177fd68	315
Kojto	158:b23ee177fd68	316	/** @defgroup DMA_LL_EC_PERIPH Peripheral increment mode
Kojto	158:b23ee177fd68	317	* @{
Kojto	158:b23ee177fd68	318	*/
Kojto	158:b23ee177fd68	319	#define LL_DMA_PERIPH_INCREMENT DMA_CCR_PINC /!< Peripheral increment mode Enable /
Kojto	158:b23ee177fd68	320	#define LL_DMA_PERIPH_NOINCREMENT ((uint32_t)0x00000000U) /!< Peripheral increment mode Disable /
Kojto	158:b23ee177fd68	321	/**
Kojto	158:b23ee177fd68	322	* @}
Kojto	158:b23ee177fd68	323	*/
Kojto	158:b23ee177fd68	324
Kojto	158:b23ee177fd68	325	/** @defgroup DMA_LL_EC_MEMORY Memory increment mode
Kojto	158:b23ee177fd68	326	* @{
Kojto	158:b23ee177fd68	327	*/
Kojto	158:b23ee177fd68	328	#define LL_DMA_MEMORY_INCREMENT DMA_CCR_MINC /!< Memory increment mode Enable /
Kojto	158:b23ee177fd68	329	#define LL_DMA_MEMORY_NOINCREMENT ((uint32_t)0x00000000U) /!< Memory increment mode Disable /
Kojto	158:b23ee177fd68	330	/**
Kojto	158:b23ee177fd68	331	* @}
Kojto	158:b23ee177fd68	332	*/
Kojto	158:b23ee177fd68	333
Kojto	158:b23ee177fd68	334	/** @defgroup DMA_LL_EC_PDATAALIGN Peripheral data alignment
Kojto	158:b23ee177fd68	335	* @{
Kojto	158:b23ee177fd68	336	*/
Kojto	158:b23ee177fd68	337	#define LL_DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000U) /!< Peripheral data alignment : Byte /
Kojto	158:b23ee177fd68	338	#define LL_DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /!< Peripheral data alignment : HalfWord /
Kojto	158:b23ee177fd68	339	#define LL_DMA_PDATAALIGN_WORD DMA_CCR_PSIZE_1 /!< Peripheral data alignment : Word /
Kojto	158:b23ee177fd68	340	/**
Kojto	158:b23ee177fd68	341	* @}
Kojto	158:b23ee177fd68	342	*/
Kojto	158:b23ee177fd68	343
Kojto	158:b23ee177fd68	344	/** @defgroup DMA_LL_EC_MDATAALIGN Memory data alignment
Kojto	158:b23ee177fd68	345	* @{
Kojto	158:b23ee177fd68	346	*/
Kojto	158:b23ee177fd68	347	#define LL_DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000U) /!< Memory data alignment : Byte /
Kojto	158:b23ee177fd68	348	#define LL_DMA_MDATAALIGN_HALFWORD DMA_CCR_MSIZE_0 /!< Memory data alignment : HalfWord /
Kojto	158:b23ee177fd68	349	#define LL_DMA_MDATAALIGN_WORD DMA_CCR_MSIZE_1 /!< Memory data alignment : Word /
Kojto	158:b23ee177fd68	350	/**
Kojto	158:b23ee177fd68	351	* @}
Kojto	158:b23ee177fd68	352	*/
Kojto	158:b23ee177fd68	353
Kojto	158:b23ee177fd68	354	/** @defgroup DMA_LL_EC_PRIORITY Transfer Priority level
Kojto	158:b23ee177fd68	355	* @{
Kojto	158:b23ee177fd68	356	*/
Kojto	158:b23ee177fd68	357	#define LL_DMA_PRIORITY_LOW ((uint32_t)0x00000000U) /!< Priority level : Low /
Kojto	158:b23ee177fd68	358	#define LL_DMA_PRIORITY_MEDIUM DMA_CCR_PL_0 /!< Priority level : Medium /
Kojto	158:b23ee177fd68	359	#define LL_DMA_PRIORITY_HIGH DMA_CCR_PL_1 /!< Priority level : High /
Kojto	158:b23ee177fd68	360	#define LL_DMA_PRIORITY_VERYHIGH DMA_CCR_PL /!< Priority level : Very_High /
Kojto	158:b23ee177fd68	361	/**
Kojto	158:b23ee177fd68	362	* @}
Kojto	158:b23ee177fd68	363	*/
Kojto	158:b23ee177fd68	364
Kojto	158:b23ee177fd68	365	/** @defgroup DMA_LL_EC_REQUEST Transfer peripheral request
Kojto	158:b23ee177fd68	366	* @{
Kojto	158:b23ee177fd68	367	*/
Kojto	158:b23ee177fd68	368	#define LL_DMA_REQUEST_0 ((uint32_t)0x00000000U) /!< DMA peripheral request 0 /
Kojto	158:b23ee177fd68	369	#define LL_DMA_REQUEST_1 ((uint32_t)0x00000001U) /!< DMA peripheral request 1 /
Kojto	158:b23ee177fd68	370	#define LL_DMA_REQUEST_2 ((uint32_t)0x00000002U) /!< DMA peripheral request 2 /
Kojto	158:b23ee177fd68	371	#define LL_DMA_REQUEST_3 ((uint32_t)0x00000003U) /!< DMA peripheral request 3 /
Kojto	158:b23ee177fd68	372	#define LL_DMA_REQUEST_4 ((uint32_t)0x00000004U) /!< DMA peripheral request 4 /
Kojto	158:b23ee177fd68	373	#define LL_DMA_REQUEST_5 ((uint32_t)0x00000005U) /!< DMA peripheral request 5 /
Kojto	158:b23ee177fd68	374	#define LL_DMA_REQUEST_6 ((uint32_t)0x00000006U) /!< DMA peripheral request 6 /
Kojto	158:b23ee177fd68	375	#define LL_DMA_REQUEST_7 ((uint32_t)0x00000007U) /!< DMA peripheral request 7 /
Kojto	158:b23ee177fd68	376	#define LL_DMA_REQUEST_8 ((uint32_t)0x00000008U) /!< DMA peripheral request 8 /
Kojto	158:b23ee177fd68	377	#define LL_DMA_REQUEST_9 ((uint32_t)0x00000009U) /!< DMA peripheral request 9 /
Kojto	158:b23ee177fd68	378	#define LL_DMA_REQUEST_10 ((uint32_t)0x0000000AU) /!< DMA peripheral request 10 /
Kojto	158:b23ee177fd68	379	#define LL_DMA_REQUEST_11 ((uint32_t)0x0000000BU) /!< DMA peripheral request 11 /
Kojto	158:b23ee177fd68	380	#define LL_DMA_REQUEST_12 ((uint32_t)0x0000000CU) /!< DMA peripheral request 12 /
Kojto	158:b23ee177fd68	381	#define LL_DMA_REQUEST_13 ((uint32_t)0x0000000DU) /!< DMA peripheral request 13 /
Kojto	158:b23ee177fd68	382	#define LL_DMA_REQUEST_14 ((uint32_t)0x0000000EU) /!< DMA peripheral request 14 /
Kojto	158:b23ee177fd68	383	#define LL_DMA_REQUEST_15 ((uint32_t)0x0000000FU) /!< DMA peripheral request 15 /
Kojto	158:b23ee177fd68	384	/**
Kojto	158:b23ee177fd68	385	* @}
Kojto	158:b23ee177fd68	386	*/
Kojto	158:b23ee177fd68	387
Kojto	158:b23ee177fd68	388	/**
Kojto	158:b23ee177fd68	389	* @}
Kojto	158:b23ee177fd68	390	*/
Kojto	158:b23ee177fd68	391
Kojto	158:b23ee177fd68	392	/* Exported macro ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	393	/** @defgroup DMA_LL_Exported_Macros DMA Exported Macros
Kojto	158:b23ee177fd68	394	* @{
Kojto	158:b23ee177fd68	395	*/
Kojto	158:b23ee177fd68	396
Kojto	158:b23ee177fd68	397	/** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros
Kojto	158:b23ee177fd68	398	* @{
Kojto	158:b23ee177fd68	399	*/
Kojto	158:b23ee177fd68	400	/**
Kojto	158:b23ee177fd68	401	* @brief Write a value in DMA register
Kojto	158:b23ee177fd68	402	* @param __INSTANCE__ DMA Instance
Kojto	158:b23ee177fd68	403	* @param __REG__ Register to be written
Kojto	158:b23ee177fd68	404	* @param __VALUE__ Value to be written in the register
Kojto	158:b23ee177fd68	405	* @retval None
Kojto	158:b23ee177fd68	406	*/
Kojto	158:b23ee177fd68	407	#define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto	158:b23ee177fd68	408
Kojto	158:b23ee177fd68	409	/**
Kojto	158:b23ee177fd68	410	* @brief Read a value in DMA register
Kojto	158:b23ee177fd68	411	* @param __INSTANCE__ DMA Instance
Kojto	158:b23ee177fd68	412	* @param __REG__ Register to be read
Kojto	158:b23ee177fd68	413	* @retval Register value
Kojto	158:b23ee177fd68	414	*/
Kojto	158:b23ee177fd68	415	#define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto	158:b23ee177fd68	416	/**
Kojto	158:b23ee177fd68	417	* @}
Kojto	158:b23ee177fd68	418	*/
Kojto	158:b23ee177fd68	419
Kojto	158:b23ee177fd68	420	/** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxChannely
Kojto	158:b23ee177fd68	421	* @{
Kojto	158:b23ee177fd68	422	*/
Kojto	158:b23ee177fd68	423	/**
Kojto	158:b23ee177fd68	424	* @brief Convert DMAx_Channely into DMAx
Kojto	158:b23ee177fd68	425	* @param __CHANNEL_INSTANCE__ DMAx_Channely
Kojto	158:b23ee177fd68	426	* @retval DMAx
Kojto	158:b23ee177fd68	427	*/
Kojto	158:b23ee177fd68	428	#define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1)
Kojto	158:b23ee177fd68	429
Kojto	158:b23ee177fd68	430	/**
Kojto	158:b23ee177fd68	431	* @brief Convert DMAx_Channely into LL_DMA_CHANNEL_y
Kojto	158:b23ee177fd68	432	* @param __CHANNEL_INSTANCE__ DMAx_Channely
Kojto	158:b23ee177fd68	433	* @retval LL_DMA_CHANNEL_y
Kojto	158:b23ee177fd68	434	*/
Kojto	158:b23ee177fd68	435	#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
Kojto	158:b23ee177fd68	436	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	158:b23ee177fd68	437	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	158:b23ee177fd68	438	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	158:b23ee177fd68	439	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	158:b23ee177fd68	440	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	158:b23ee177fd68	441	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
Kojto	158:b23ee177fd68	442	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \
Kojto	158:b23ee177fd68	443	LL_DMA_CHANNEL_7)
Kojto	158:b23ee177fd68	444	#elif defined (DMA1_Channel6)
Kojto	158:b23ee177fd68	445	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	158:b23ee177fd68	446	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	158:b23ee177fd68	447	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	158:b23ee177fd68	448	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	158:b23ee177fd68	449	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	158:b23ee177fd68	450	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
Kojto	158:b23ee177fd68	451	LL_DMA_CHANNEL_6)
Kojto	158:b23ee177fd68	452	#else
Kojto	158:b23ee177fd68	453	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	158:b23ee177fd68	454	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	158:b23ee177fd68	455	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	158:b23ee177fd68	456	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	158:b23ee177fd68	457	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	158:b23ee177fd68	458	LL_DMA_CHANNEL_5)
Kojto	158:b23ee177fd68	459	#endif /* DMA1_Channel6 && DMA1_Channel7 */
Kojto	158:b23ee177fd68	460
Kojto	158:b23ee177fd68	461	/**
Kojto	158:b23ee177fd68	462	* @brief Convert DMA Instance DMAx and LL_DMA_CHANNEL_y into DMAx_Channely
Kojto	158:b23ee177fd68	463	* @param __DMA_INSTANCE__ DMAx
Kojto	158:b23ee177fd68	464	* @param __CHANNEL__ LL_DMA_CHANNEL_y
Kojto	158:b23ee177fd68	465	* @retval DMAx_Channely
Kojto	158:b23ee177fd68	466	*/
Kojto	158:b23ee177fd68	467	#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
Kojto	158:b23ee177fd68	468	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	158:b23ee177fd68	469	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	158:b23ee177fd68	470	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	158:b23ee177fd68	471	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	158:b23ee177fd68	472	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	158:b23ee177fd68	473	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
Kojto	158:b23ee177fd68	474	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA1_Channel6 : \
Kojto	158:b23ee177fd68	475	DMA1_Channel7)
Kojto	158:b23ee177fd68	476	#elif defined (DMA1_Channel6)
Kojto	158:b23ee177fd68	477	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	158:b23ee177fd68	478	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	158:b23ee177fd68	479	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	158:b23ee177fd68	480	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	158:b23ee177fd68	481	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	158:b23ee177fd68	482	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
Kojto	158:b23ee177fd68	483	DMA1_Channel6)
Kojto	158:b23ee177fd68	484	#else
Kojto	158:b23ee177fd68	485	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	158:b23ee177fd68	486	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	158:b23ee177fd68	487	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	158:b23ee177fd68	488	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	158:b23ee177fd68	489	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	158:b23ee177fd68	490	DMA1_Channel5)
Kojto	158:b23ee177fd68	491	#endif /* DMA1_Channel6 && DMA1_Channel7 */
Kojto	158:b23ee177fd68	492
Kojto	158:b23ee177fd68	493	/**
Kojto	158:b23ee177fd68	494	* @}
Kojto	158:b23ee177fd68	495	*/
Kojto	158:b23ee177fd68	496
Kojto	158:b23ee177fd68	497	/**
Kojto	158:b23ee177fd68	498	* @}
Kojto	158:b23ee177fd68	499	*/
Kojto	158:b23ee177fd68	500
Kojto	158:b23ee177fd68	501	/* Exported functions --------------------------------------------------------*/
Kojto	158:b23ee177fd68	502	/** @defgroup DMA_LL_Exported_Functions DMA Exported Functions
Kojto	158:b23ee177fd68	503	* @{
Kojto	158:b23ee177fd68	504	*/
Kojto	158:b23ee177fd68	505
Kojto	158:b23ee177fd68	506	/** @defgroup DMA_LL_EF_Configuration Configuration
Kojto	158:b23ee177fd68	507	* @{
Kojto	158:b23ee177fd68	508	*/
Kojto	158:b23ee177fd68	509	/**
Kojto	158:b23ee177fd68	510	* @brief Enable DMA channel.
Kojto	158:b23ee177fd68	511	* @rmtoll CCR EN LL_DMA_EnableChannel
Kojto	158:b23ee177fd68	512	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	513	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	514	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	515	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	516	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	517	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	518	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	519	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	520	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	521	* @retval None
Kojto	158:b23ee177fd68	522	*/
Kojto	158:b23ee177fd68	523	__STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	524	{
Kojto	158:b23ee177fd68	525	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
Kojto	158:b23ee177fd68	526	}
Kojto	158:b23ee177fd68	527
Kojto	158:b23ee177fd68	528	/**
Kojto	158:b23ee177fd68	529	* @brief Disable DMA channel.
Kojto	158:b23ee177fd68	530	* @rmtoll CCR EN LL_DMA_DisableChannel
Kojto	158:b23ee177fd68	531	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	532	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	533	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	534	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	535	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	536	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	537	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	538	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	539	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	540	* @retval None
Kojto	158:b23ee177fd68	541	*/
Kojto	158:b23ee177fd68	542	__STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	543	{
Kojto	158:b23ee177fd68	544	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
Kojto	158:b23ee177fd68	545	}
Kojto	158:b23ee177fd68	546
Kojto	158:b23ee177fd68	547	/**
Kojto	158:b23ee177fd68	548	* @brief Check if DMA channel is enabled or disabled.
Kojto	158:b23ee177fd68	549	* @rmtoll CCR EN LL_DMA_IsEnabledChannel
Kojto	158:b23ee177fd68	550	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	551	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	552	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	553	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	554	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	555	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	556	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	557	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	558	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	559	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	560	*/
Kojto	158:b23ee177fd68	561	__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	562	{
Kojto	158:b23ee177fd68	563	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	564	DMA_CCR_EN) == (DMA_CCR_EN));
Kojto	158:b23ee177fd68	565	}
Kojto	158:b23ee177fd68	566
Kojto	158:b23ee177fd68	567	/**
Kojto	158:b23ee177fd68	568	* @brief Configure all parameters link to DMA transfer.
Kojto	158:b23ee177fd68	569	* @rmtoll CCR DIR LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	570	* CCR MEM2MEM LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	571	* CCR CIRC LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	572	* CCR PINC LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	573	* CCR MINC LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	574	* CCR PSIZE LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	575	* CCR MSIZE LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	576	* CCR PL LL_DMA_ConfigTransfer
Kojto	158:b23ee177fd68	577	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	578	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	579	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	580	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	581	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	582	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	583	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	584	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	585	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	586	* @param Configuration This parameter must be a combination of all the following values:
Kojto	158:b23ee177fd68	587	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	158:b23ee177fd68	588	* @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR
Kojto	158:b23ee177fd68	589	* @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	158:b23ee177fd68	590	* @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	158:b23ee177fd68	591	* @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDATAALIGN_WORD
Kojto	158:b23ee177fd68	592	* @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDATAALIGN_WORD
Kojto	158:b23ee177fd68	593	* @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HIGH or @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	158:b23ee177fd68	594	* @retval None
Kojto	158:b23ee177fd68	595	*/
Kojto	158:b23ee177fd68	596	__STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration)
Kojto	158:b23ee177fd68	597	{
Kojto	158:b23ee177fd68	598	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	599	DMA_CCR_DIR \| DMA_CCR_MEM2MEM \| DMA_CCR_CIRC \| DMA_CCR_PINC \| DMA_CCR_MINC \| DMA_CCR_PSIZE \| DMA_CCR_MSIZE \| DMA_CCR_PL,
Kojto	158:b23ee177fd68	600	Configuration);
Kojto	158:b23ee177fd68	601	}
Kojto	158:b23ee177fd68	602
Kojto	158:b23ee177fd68	603	/**
Kojto	158:b23ee177fd68	604	* @brief Set Data transfer direction (read from peripheral or from memory).
Kojto	158:b23ee177fd68	605	* @rmtoll CCR DIR LL_DMA_SetDataTransferDirection\n
Kojto	158:b23ee177fd68	606	* CCR MEM2MEM LL_DMA_SetDataTransferDirection
Kojto	158:b23ee177fd68	607	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	608	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	609	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	610	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	611	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	612	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	613	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	614	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	615	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	616	* @param Direction This parameter can be one of the following values:
Kojto	158:b23ee177fd68	617	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	158:b23ee177fd68	618	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	158:b23ee177fd68	619	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	158:b23ee177fd68	620	* @retval None
Kojto	158:b23ee177fd68	621	*/
Kojto	158:b23ee177fd68	622	__STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction)
Kojto	158:b23ee177fd68	623	{
Kojto	158:b23ee177fd68	624	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	625	DMA_CCR_DIR \| DMA_CCR_MEM2MEM, Direction);
Kojto	158:b23ee177fd68	626	}
Kojto	158:b23ee177fd68	627
Kojto	158:b23ee177fd68	628	/**
Kojto	158:b23ee177fd68	629	* @brief Get Data transfer direction (read from peripheral or from memory).
Kojto	158:b23ee177fd68	630	* @rmtoll CCR DIR LL_DMA_GetDataTransferDirection\n
Kojto	158:b23ee177fd68	631	* CCR MEM2MEM LL_DMA_GetDataTransferDirection
Kojto	158:b23ee177fd68	632	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	633	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	634	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	635	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	636	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	637	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	638	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	639	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	640	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	641	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	642	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	158:b23ee177fd68	643	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	158:b23ee177fd68	644	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	158:b23ee177fd68	645	*/
Kojto	158:b23ee177fd68	646	__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	647	{
Kojto	158:b23ee177fd68	648	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	649	DMA_CCR_DIR \| DMA_CCR_MEM2MEM));
Kojto	158:b23ee177fd68	650	}
Kojto	158:b23ee177fd68	651
Kojto	158:b23ee177fd68	652	/**
Kojto	158:b23ee177fd68	653	* @brief Set DMA mode circular or normal.
Kojto	158:b23ee177fd68	654	* @note The circular buffer mode cannot be used if the memory-to-memory
Kojto	158:b23ee177fd68	655	* data transfer is configured on the selected Channel.
Kojto	158:b23ee177fd68	656	* @rmtoll CCR CIRC LL_DMA_SetMode
Kojto	158:b23ee177fd68	657	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	658	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	659	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	660	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	661	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	662	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	663	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	664	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	665	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	666	* @param Mode This parameter can be one of the following values:
Kojto	158:b23ee177fd68	667	* @arg @ref LL_DMA_MODE_NORMAL
Kojto	158:b23ee177fd68	668	* @arg @ref LL_DMA_MODE_CIRCULAR
Kojto	158:b23ee177fd68	669	* @retval None
Kojto	158:b23ee177fd68	670	*/
Kojto	158:b23ee177fd68	671	__STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)
Kojto	158:b23ee177fd68	672	{
Kojto	158:b23ee177fd68	673	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_CIRC,
Kojto	158:b23ee177fd68	674	Mode);
Kojto	158:b23ee177fd68	675	}
Kojto	158:b23ee177fd68	676
Kojto	158:b23ee177fd68	677	/**
Kojto	158:b23ee177fd68	678	* @brief Get DMA mode circular or normal.
Kojto	158:b23ee177fd68	679	* @rmtoll CCR CIRC LL_DMA_GetMode
Kojto	158:b23ee177fd68	680	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	681	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	682	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	683	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	684	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	685	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	686	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	687	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	688	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	689	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	690	* @arg @ref LL_DMA_MODE_NORMAL
Kojto	158:b23ee177fd68	691	* @arg @ref LL_DMA_MODE_CIRCULAR
Kojto	158:b23ee177fd68	692	*/
Kojto	158:b23ee177fd68	693	__STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	694	{
Kojto	158:b23ee177fd68	695	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	696	DMA_CCR_CIRC));
Kojto	158:b23ee177fd68	697	}
Kojto	158:b23ee177fd68	698
Kojto	158:b23ee177fd68	699	/**
Kojto	158:b23ee177fd68	700	* @brief Set Peripheral increment mode.
Kojto	158:b23ee177fd68	701	* @rmtoll CCR PINC LL_DMA_SetPeriphIncMode
Kojto	158:b23ee177fd68	702	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	703	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	704	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	705	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	706	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	707	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	708	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	709	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	710	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	711	* @param PeriphOrM2MSrcIncMode This parameter can be one of the following values:
Kojto	158:b23ee177fd68	712	* @arg @ref LL_DMA_PERIPH_INCREMENT
Kojto	158:b23ee177fd68	713	* @arg @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	158:b23ee177fd68	714	* @retval None
Kojto	158:b23ee177fd68	715	*/
Kojto	158:b23ee177fd68	716	__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
Kojto	158:b23ee177fd68	717	{
Kojto	158:b23ee177fd68	718	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
Kojto	158:b23ee177fd68	719	PeriphOrM2MSrcIncMode);
Kojto	158:b23ee177fd68	720	}
Kojto	158:b23ee177fd68	721
Kojto	158:b23ee177fd68	722	/**
Kojto	158:b23ee177fd68	723	* @brief Get Peripheral increment mode.
Kojto	158:b23ee177fd68	724	* @rmtoll CCR PINC LL_DMA_GetPeriphIncMode
Kojto	158:b23ee177fd68	725	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	726	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	727	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	728	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	729	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	730	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	731	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	732	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	733	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	734	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	735	* @arg @ref LL_DMA_PERIPH_INCREMENT
Kojto	158:b23ee177fd68	736	* @arg @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	158:b23ee177fd68	737	*/
Kojto	158:b23ee177fd68	738	__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	739	{
Kojto	158:b23ee177fd68	740	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	741	DMA_CCR_PINC));
Kojto	158:b23ee177fd68	742	}
Kojto	158:b23ee177fd68	743
Kojto	158:b23ee177fd68	744	/**
Kojto	158:b23ee177fd68	745	* @brief Set Memory increment mode.
Kojto	158:b23ee177fd68	746	* @rmtoll CCR MINC LL_DMA_SetMemoryIncMode
Kojto	158:b23ee177fd68	747	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	748	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	749	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	750	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	751	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	752	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	753	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	754	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	755	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	756	* @param MemoryOrM2MDstIncMode This parameter can be one of the following values:
Kojto	158:b23ee177fd68	757	* @arg @ref LL_DMA_MEMORY_INCREMENT
Kojto	158:b23ee177fd68	758	* @arg @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	158:b23ee177fd68	759	* @retval None
Kojto	158:b23ee177fd68	760	*/
Kojto	158:b23ee177fd68	761	__STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
Kojto	158:b23ee177fd68	762	{
Kojto	158:b23ee177fd68	763	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MINC,
Kojto	158:b23ee177fd68	764	MemoryOrM2MDstIncMode);
Kojto	158:b23ee177fd68	765	}
Kojto	158:b23ee177fd68	766
Kojto	158:b23ee177fd68	767	/**
Kojto	158:b23ee177fd68	768	* @brief Get Memory increment mode.
Kojto	158:b23ee177fd68	769	* @rmtoll CCR MINC LL_DMA_GetMemoryIncMode
Kojto	158:b23ee177fd68	770	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	771	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	772	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	773	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	774	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	775	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	776	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	777	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	778	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	779	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	780	* @arg @ref LL_DMA_MEMORY_INCREMENT
Kojto	158:b23ee177fd68	781	* @arg @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	158:b23ee177fd68	782	*/
Kojto	158:b23ee177fd68	783	__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	784	{
Kojto	158:b23ee177fd68	785	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	786	DMA_CCR_MINC));
Kojto	158:b23ee177fd68	787	}
Kojto	158:b23ee177fd68	788
Kojto	158:b23ee177fd68	789	/**
Kojto	158:b23ee177fd68	790	* @brief Set Peripheral size.
Kojto	158:b23ee177fd68	791	* @rmtoll CCR PSIZE LL_DMA_SetPeriphSize
Kojto	158:b23ee177fd68	792	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	793	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	794	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	795	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	796	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	797	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	798	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	799	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	800	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	801	* @param PeriphOrM2MSrcDataSize This parameter can be one of the following values:
Kojto	158:b23ee177fd68	802	* @arg @ref LL_DMA_PDATAALIGN_BYTE
Kojto	158:b23ee177fd68	803	* @arg @ref LL_DMA_PDATAALIGN_HALFWORD
Kojto	158:b23ee177fd68	804	* @arg @ref LL_DMA_PDATAALIGN_WORD
Kojto	158:b23ee177fd68	805	* @retval None
Kojto	158:b23ee177fd68	806	*/
Kojto	158:b23ee177fd68	807	__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
Kojto	158:b23ee177fd68	808	{
Kojto	158:b23ee177fd68	809	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PSIZE,
Kojto	158:b23ee177fd68	810	PeriphOrM2MSrcDataSize);
Kojto	158:b23ee177fd68	811	}
Kojto	158:b23ee177fd68	812
Kojto	158:b23ee177fd68	813	/**
Kojto	158:b23ee177fd68	814	* @brief Get Peripheral size.
Kojto	158:b23ee177fd68	815	* @rmtoll CCR PSIZE LL_DMA_GetPeriphSize
Kojto	158:b23ee177fd68	816	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	817	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	818	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	819	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	820	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	821	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	822	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	823	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	824	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	825	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	826	* @arg @ref LL_DMA_PDATAALIGN_BYTE
Kojto	158:b23ee177fd68	827	* @arg @ref LL_DMA_PDATAALIGN_HALFWORD
Kojto	158:b23ee177fd68	828	* @arg @ref LL_DMA_PDATAALIGN_WORD
Kojto	158:b23ee177fd68	829	*/
Kojto	158:b23ee177fd68	830	__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	831	{
Kojto	158:b23ee177fd68	832	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	833	DMA_CCR_PSIZE));
Kojto	158:b23ee177fd68	834	}
Kojto	158:b23ee177fd68	835
Kojto	158:b23ee177fd68	836	/**
Kojto	158:b23ee177fd68	837	* @brief Set Memory size.
Kojto	158:b23ee177fd68	838	* @rmtoll CCR MSIZE LL_DMA_SetMemorySize
Kojto	158:b23ee177fd68	839	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	840	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	841	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	842	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	843	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	844	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	845	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	846	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	847	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	848	* @param MemoryOrM2MDstDataSize This parameter can be one of the following values:
Kojto	158:b23ee177fd68	849	* @arg @ref LL_DMA_MDATAALIGN_BYTE
Kojto	158:b23ee177fd68	850	* @arg @ref LL_DMA_MDATAALIGN_HALFWORD
Kojto	158:b23ee177fd68	851	* @arg @ref LL_DMA_MDATAALIGN_WORD
Kojto	158:b23ee177fd68	852	* @retval None
Kojto	158:b23ee177fd68	853	*/
Kojto	158:b23ee177fd68	854	__STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
Kojto	158:b23ee177fd68	855	{
Kojto	158:b23ee177fd68	856	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MSIZE,
Kojto	158:b23ee177fd68	857	MemoryOrM2MDstDataSize);
Kojto	158:b23ee177fd68	858	}
Kojto	158:b23ee177fd68	859
Kojto	158:b23ee177fd68	860	/**
Kojto	158:b23ee177fd68	861	* @brief Get Memory size.
Kojto	158:b23ee177fd68	862	* @rmtoll CCR MSIZE LL_DMA_GetMemorySize
Kojto	158:b23ee177fd68	863	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	864	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	865	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	866	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	867	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	868	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	869	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	870	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	871	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	872	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	873	* @arg @ref LL_DMA_MDATAALIGN_BYTE
Kojto	158:b23ee177fd68	874	* @arg @ref LL_DMA_MDATAALIGN_HALFWORD
Kojto	158:b23ee177fd68	875	* @arg @ref LL_DMA_MDATAALIGN_WORD
Kojto	158:b23ee177fd68	876	*/
Kojto	158:b23ee177fd68	877	__STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	878	{
Kojto	158:b23ee177fd68	879	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	880	DMA_CCR_MSIZE));
Kojto	158:b23ee177fd68	881	}
Kojto	158:b23ee177fd68	882
Kojto	158:b23ee177fd68	883	/**
Kojto	158:b23ee177fd68	884	* @brief Set Channel priority level.
Kojto	158:b23ee177fd68	885	* @rmtoll CCR PL LL_DMA_SetChannelPriorityLevel
Kojto	158:b23ee177fd68	886	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	887	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	888	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	889	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	890	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	891	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	892	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	893	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	894	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	895	* @param Priority This parameter can be one of the following values:
Kojto	158:b23ee177fd68	896	* @arg @ref LL_DMA_PRIORITY_LOW
Kojto	158:b23ee177fd68	897	* @arg @ref LL_DMA_PRIORITY_MEDIUM
Kojto	158:b23ee177fd68	898	* @arg @ref LL_DMA_PRIORITY_HIGH
Kojto	158:b23ee177fd68	899	* @arg @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	158:b23ee177fd68	900	* @retval None
Kojto	158:b23ee177fd68	901	*/
Kojto	158:b23ee177fd68	902	__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority)
Kojto	158:b23ee177fd68	903	{
Kojto	158:b23ee177fd68	904	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PL,
Kojto	158:b23ee177fd68	905	Priority);
Kojto	158:b23ee177fd68	906	}
Kojto	158:b23ee177fd68	907
Kojto	158:b23ee177fd68	908	/**
Kojto	158:b23ee177fd68	909	* @brief Get Channel priority level.
Kojto	158:b23ee177fd68	910	* @rmtoll CCR PL LL_DMA_GetChannelPriorityLevel
Kojto	158:b23ee177fd68	911	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	912	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	913	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	914	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	915	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	916	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	917	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	918	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	919	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	920	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	921	* @arg @ref LL_DMA_PRIORITY_LOW
Kojto	158:b23ee177fd68	922	* @arg @ref LL_DMA_PRIORITY_MEDIUM
Kojto	158:b23ee177fd68	923	* @arg @ref LL_DMA_PRIORITY_HIGH
Kojto	158:b23ee177fd68	924	* @arg @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	158:b23ee177fd68	925	*/
Kojto	158:b23ee177fd68	926	__STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	927	{
Kojto	158:b23ee177fd68	928	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	929	DMA_CCR_PL));
Kojto	158:b23ee177fd68	930	}
Kojto	158:b23ee177fd68	931
Kojto	158:b23ee177fd68	932	/**
Kojto	158:b23ee177fd68	933	* @brief Set Number of data to transfer.
Kojto	158:b23ee177fd68	934	* @note This action has no effect if
Kojto	158:b23ee177fd68	935	* channel is enabled.
Kojto	158:b23ee177fd68	936	* @rmtoll CNDTR NDT LL_DMA_SetDataLength
Kojto	158:b23ee177fd68	937	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	938	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	939	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	940	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	941	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	942	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	943	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	944	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	945	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	946	* @param NbData Between Min_Data = 0 and Max_Data = 0x0000FFFF
Kojto	158:b23ee177fd68	947	* @retval None
Kojto	158:b23ee177fd68	948	*/
Kojto	158:b23ee177fd68	949	__STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData)
Kojto	158:b23ee177fd68	950	{
Kojto	158:b23ee177fd68	951	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
Kojto	158:b23ee177fd68	952	DMA_CNDTR_NDT, NbData);
Kojto	158:b23ee177fd68	953	}
Kojto	158:b23ee177fd68	954
Kojto	158:b23ee177fd68	955	/**
Kojto	158:b23ee177fd68	956	* @brief Get Number of data to transfer.
Kojto	158:b23ee177fd68	957	* @note Once the channel is enabled, the return value indicate the
Kojto	158:b23ee177fd68	958	* remaining bytes to be transmitted.
Kojto	158:b23ee177fd68	959	* @rmtoll CNDTR NDT LL_DMA_GetDataLength
Kojto	158:b23ee177fd68	960	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	961	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	962	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	963	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	964	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	965	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	966	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	967	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	968	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	969	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	970	*/
Kojto	158:b23ee177fd68	971	__STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	972	{
Kojto	158:b23ee177fd68	973	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
Kojto	158:b23ee177fd68	974	DMA_CNDTR_NDT));
Kojto	158:b23ee177fd68	975	}
Kojto	158:b23ee177fd68	976
Kojto	158:b23ee177fd68	977	/**
Kojto	158:b23ee177fd68	978	* @brief Configure the Source and Destination addresses.
Kojto	158:b23ee177fd68	979	* @note Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr)
Kojto	158:b23ee177fd68	980	* @rmtoll CPAR PA LL_DMA_ConfigAddresses\n
Kojto	158:b23ee177fd68	981	* CMAR MA LL_DMA_ConfigAddresses
Kojto	158:b23ee177fd68	982	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	983	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	984	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	985	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	986	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	987	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	988	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	989	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	990	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	991	* @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	992	* @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	993	* @param Direction This parameter can be one of the following values:
Kojto	158:b23ee177fd68	994	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	158:b23ee177fd68	995	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	158:b23ee177fd68	996	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	158:b23ee177fd68	997	* @retval None
Kojto	158:b23ee177fd68	998	*/
Kojto	158:b23ee177fd68	999	__STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress,
Kojto	158:b23ee177fd68	1000	uint32_t DstAddress, uint32_t Direction)
Kojto	158:b23ee177fd68	1001	{
Kojto	158:b23ee177fd68	1002	/* Direction Memory to Periph */
Kojto	158:b23ee177fd68	1003	if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)
Kojto	158:b23ee177fd68	1004	{
Kojto	158:b23ee177fd68	1005	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	158:b23ee177fd68	1006	SrcAddress);
Kojto	158:b23ee177fd68	1007	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	158:b23ee177fd68	1008	DstAddress);
Kojto	158:b23ee177fd68	1009	}
Kojto	158:b23ee177fd68	1010	/* Direction Periph to Memory and Memory to Memory */
Kojto	158:b23ee177fd68	1011	else
Kojto	158:b23ee177fd68	1012	{
Kojto	158:b23ee177fd68	1013	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	158:b23ee177fd68	1014	SrcAddress);
Kojto	158:b23ee177fd68	1015	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	158:b23ee177fd68	1016	DstAddress);
Kojto	158:b23ee177fd68	1017	}
Kojto	158:b23ee177fd68	1018	}
Kojto	158:b23ee177fd68	1019
Kojto	158:b23ee177fd68	1020	/**
Kojto	158:b23ee177fd68	1021	* @brief Set the Memory address.
Kojto	158:b23ee177fd68	1022	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	158:b23ee177fd68	1023	* @rmtoll CMAR MA LL_DMA_SetMemoryAddress
Kojto	158:b23ee177fd68	1024	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1025	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1026	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1027	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1028	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1029	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1030	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1031	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1032	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1033	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1034	* @retval None
Kojto	158:b23ee177fd68	1035	*/
Kojto	158:b23ee177fd68	1036	__STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	158:b23ee177fd68	1037	{
Kojto	158:b23ee177fd68	1038	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	158:b23ee177fd68	1039	MemoryAddress);
Kojto	158:b23ee177fd68	1040	}
Kojto	158:b23ee177fd68	1041
Kojto	158:b23ee177fd68	1042	/**
Kojto	158:b23ee177fd68	1043	* @brief Set the Peripheral address.
Kojto	158:b23ee177fd68	1044	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	158:b23ee177fd68	1045	* @rmtoll CPAR PA LL_DMA_SetPeriphAddress
Kojto	158:b23ee177fd68	1046	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1047	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1048	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1049	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1050	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1051	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1052	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1053	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1054	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1055	* @param PeriphAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1056	* @retval None
Kojto	158:b23ee177fd68	1057	*/
Kojto	158:b23ee177fd68	1058	__STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
Kojto	158:b23ee177fd68	1059	{
Kojto	158:b23ee177fd68	1060	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	158:b23ee177fd68	1061	PeriphAddress);
Kojto	158:b23ee177fd68	1062	}
Kojto	158:b23ee177fd68	1063
Kojto	158:b23ee177fd68	1064	/**
Kojto	158:b23ee177fd68	1065	* @brief Get Memory address.
Kojto	158:b23ee177fd68	1066	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	158:b23ee177fd68	1067	* @rmtoll CMAR MA LL_DMA_GetMemoryAddress
Kojto	158:b23ee177fd68	1068	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1069	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1070	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1071	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1072	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1073	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1074	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1075	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1076	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1077	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1078	*/
Kojto	158:b23ee177fd68	1079	__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1080	{
Kojto	158:b23ee177fd68	1081	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR,
Kojto	158:b23ee177fd68	1082	DMA_CMAR_MA));
Kojto	158:b23ee177fd68	1083	}
Kojto	158:b23ee177fd68	1084
Kojto	158:b23ee177fd68	1085	/**
Kojto	158:b23ee177fd68	1086	* @brief Get Peripheral address.
Kojto	158:b23ee177fd68	1087	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	158:b23ee177fd68	1088	* @rmtoll CPAR PA LL_DMA_GetPeriphAddress
Kojto	158:b23ee177fd68	1089	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1090	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1091	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1092	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1093	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1094	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1095	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1096	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1097	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1098	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1099	*/
Kojto	158:b23ee177fd68	1100	__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1101	{
Kojto	158:b23ee177fd68	1102	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR,
Kojto	158:b23ee177fd68	1103	DMA_CPAR_PA));
Kojto	158:b23ee177fd68	1104	}
Kojto	158:b23ee177fd68	1105
Kojto	158:b23ee177fd68	1106	/**
Kojto	158:b23ee177fd68	1107	* @brief Set the Memory to Memory Source address.
Kojto	158:b23ee177fd68	1108	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	158:b23ee177fd68	1109	* @rmtoll CPAR PA LL_DMA_SetM2MSrcAddress
Kojto	158:b23ee177fd68	1110	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1111	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1112	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1113	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1114	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1115	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1116	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1117	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1118	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1119	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1120	* @retval None
Kojto	158:b23ee177fd68	1121	*/
Kojto	158:b23ee177fd68	1122	__STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	158:b23ee177fd68	1123	{
Kojto	158:b23ee177fd68	1124	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	158:b23ee177fd68	1125	MemoryAddress);
Kojto	158:b23ee177fd68	1126	}
Kojto	158:b23ee177fd68	1127
Kojto	158:b23ee177fd68	1128	/**
Kojto	158:b23ee177fd68	1129	* @brief Set the Memory to Memory Destination address.
Kojto	158:b23ee177fd68	1130	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	158:b23ee177fd68	1131	* @rmtoll CMAR MA LL_DMA_SetM2MDstAddress
Kojto	158:b23ee177fd68	1132	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1133	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1134	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1135	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1136	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1137	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1138	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1139	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1140	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1141	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1142	* @retval None
Kojto	158:b23ee177fd68	1143	*/
Kojto	158:b23ee177fd68	1144	__STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	158:b23ee177fd68	1145	{
Kojto	158:b23ee177fd68	1146	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	158:b23ee177fd68	1147	MemoryAddress);
Kojto	158:b23ee177fd68	1148	}
Kojto	158:b23ee177fd68	1149
Kojto	158:b23ee177fd68	1150	/**
Kojto	158:b23ee177fd68	1151	* @brief Get the Memory to Memory Source address.
Kojto	158:b23ee177fd68	1152	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	158:b23ee177fd68	1153	* @rmtoll CPAR PA LL_DMA_GetM2MSrcAddress
Kojto	158:b23ee177fd68	1154	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1155	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1156	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1157	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1158	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1159	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1160	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1161	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1162	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1163	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1164	*/
Kojto	158:b23ee177fd68	1165	__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1166	{
Kojto	158:b23ee177fd68	1167	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR,
Kojto	158:b23ee177fd68	1168	DMA_CPAR_PA));
Kojto	158:b23ee177fd68	1169	}
Kojto	158:b23ee177fd68	1170
Kojto	158:b23ee177fd68	1171	/**
Kojto	158:b23ee177fd68	1172	* @brief Get the Memory to Memory Destination address.
Kojto	158:b23ee177fd68	1173	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	158:b23ee177fd68	1174	* @rmtoll CMAR MA LL_DMA_GetM2MDstAddress
Kojto	158:b23ee177fd68	1175	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1176	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1177	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1178	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1179	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1180	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1181	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1182	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1183	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1184	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1185	*/
Kojto	158:b23ee177fd68	1186	__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1187	{
Kojto	158:b23ee177fd68	1188	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR,
Kojto	158:b23ee177fd68	1189	DMA_CMAR_MA));
Kojto	158:b23ee177fd68	1190	}
Kojto	158:b23ee177fd68	1191
Kojto	158:b23ee177fd68	1192	/**
Kojto	158:b23ee177fd68	1193	* @brief Set DMA request for DMA instance on Channel x.
Kojto	158:b23ee177fd68	1194	* @note Please refer to Reference Manual to get the available mapping of Request value link to Channel Selection.
Kojto	158:b23ee177fd68	1195	* @rmtoll CSELR C1S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1196	* CSELR C2S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1197	* CSELR C3S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1198	* CSELR C4S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1199	* CSELR C5S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1200	* CSELR C6S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1201	* CSELR C7S LL_DMA_SetPeriphRequest
Kojto	158:b23ee177fd68	1202	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1203	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1204	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1205	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1206	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1207	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1208	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1209	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1210	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1211	* @param PeriphRequest This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1212	* @arg @ref LL_DMA_REQUEST_0
Kojto	158:b23ee177fd68	1213	* @arg @ref LL_DMA_REQUEST_1
Kojto	158:b23ee177fd68	1214	* @arg @ref LL_DMA_REQUEST_2
Kojto	158:b23ee177fd68	1215	* @arg @ref LL_DMA_REQUEST_3
Kojto	158:b23ee177fd68	1216	* @arg @ref LL_DMA_REQUEST_4
Kojto	158:b23ee177fd68	1217	* @arg @ref LL_DMA_REQUEST_5
Kojto	158:b23ee177fd68	1218	* @arg @ref LL_DMA_REQUEST_6
Kojto	158:b23ee177fd68	1219	* @arg @ref LL_DMA_REQUEST_7
Kojto	158:b23ee177fd68	1220	* @arg @ref LL_DMA_REQUEST_8
Kojto	158:b23ee177fd68	1221	* @arg @ref LL_DMA_REQUEST_9
Kojto	158:b23ee177fd68	1222	* @arg @ref LL_DMA_REQUEST_10
Kojto	158:b23ee177fd68	1223	* @arg @ref LL_DMA_REQUEST_11
Kojto	158:b23ee177fd68	1224	* @arg @ref LL_DMA_REQUEST_12
Kojto	158:b23ee177fd68	1225	* @arg @ref LL_DMA_REQUEST_13
Kojto	158:b23ee177fd68	1226	* @arg @ref LL_DMA_REQUEST_14
Kojto	158:b23ee177fd68	1227	* @arg @ref LL_DMA_REQUEST_15
Kojto	158:b23ee177fd68	1228	* @retval None
Kojto	158:b23ee177fd68	1229	*/
Kojto	158:b23ee177fd68	1230	__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphRequest)
Kojto	158:b23ee177fd68	1231	{
Kojto	158:b23ee177fd68	1232	MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
Kojto	158:b23ee177fd68	1233	DMA_CSELR_C1S << ((Channel - 1U) * 4U), PeriphRequest << DMA_POSITION_CSELR_CXS);
Kojto	158:b23ee177fd68	1234	}
Kojto	158:b23ee177fd68	1235
Kojto	158:b23ee177fd68	1236	/**
Kojto	158:b23ee177fd68	1237	* @brief Get DMA request for DMA instance on Channel x.
Kojto	158:b23ee177fd68	1238	* @rmtoll CSELR C1S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1239	* CSELR C2S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1240	* CSELR C3S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1241	* CSELR C4S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1242	* CSELR C5S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1243	* CSELR C6S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1244	* CSELR C7S LL_DMA_GetPeriphRequest
Kojto	158:b23ee177fd68	1245	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1246	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1247	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1248	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1249	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1250	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1251	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1252	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1253	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1254	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1255	* @arg @ref LL_DMA_REQUEST_0
Kojto	158:b23ee177fd68	1256	* @arg @ref LL_DMA_REQUEST_1
Kojto	158:b23ee177fd68	1257	* @arg @ref LL_DMA_REQUEST_2
Kojto	158:b23ee177fd68	1258	* @arg @ref LL_DMA_REQUEST_3
Kojto	158:b23ee177fd68	1259	* @arg @ref LL_DMA_REQUEST_4
Kojto	158:b23ee177fd68	1260	* @arg @ref LL_DMA_REQUEST_5
Kojto	158:b23ee177fd68	1261	* @arg @ref LL_DMA_REQUEST_6
Kojto	158:b23ee177fd68	1262	* @arg @ref LL_DMA_REQUEST_7
Kojto	158:b23ee177fd68	1263	* @arg @ref LL_DMA_REQUEST_8
Kojto	158:b23ee177fd68	1264	* @arg @ref LL_DMA_REQUEST_9
Kojto	158:b23ee177fd68	1265	* @arg @ref LL_DMA_REQUEST_10
Kojto	158:b23ee177fd68	1266	* @arg @ref LL_DMA_REQUEST_11
Kojto	158:b23ee177fd68	1267	* @arg @ref LL_DMA_REQUEST_12
Kojto	158:b23ee177fd68	1268	* @arg @ref LL_DMA_REQUEST_13
Kojto	158:b23ee177fd68	1269	* @arg @ref LL_DMA_REQUEST_14
Kojto	158:b23ee177fd68	1270	* @arg @ref LL_DMA_REQUEST_15
Kojto	158:b23ee177fd68	1271	*/
Kojto	158:b23ee177fd68	1272	__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1273	{
Kojto	158:b23ee177fd68	1274	return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
Kojto	158:b23ee177fd68	1275	DMA_CSELR_C1S << ((Channel - 1U) * 4U)) >> DMA_POSITION_CSELR_CXS);
Kojto	158:b23ee177fd68	1276	}
Kojto	158:b23ee177fd68	1277
Kojto	158:b23ee177fd68	1278	/**
Kojto	158:b23ee177fd68	1279	* @}
Kojto	158:b23ee177fd68	1280	*/
Kojto	158:b23ee177fd68	1281
Kojto	158:b23ee177fd68	1282	/** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management
Kojto	158:b23ee177fd68	1283	* @{
Kojto	158:b23ee177fd68	1284	*/
Kojto	158:b23ee177fd68	1285
Kojto	158:b23ee177fd68	1286	/**
Kojto	158:b23ee177fd68	1287	* @brief Get Channel 1 global interrupt flag.
Kojto	158:b23ee177fd68	1288	* @rmtoll ISR GIF1 LL_DMA_IsActiveFlag_GI1
Kojto	158:b23ee177fd68	1289	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1290	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1291	*/
Kojto	158:b23ee177fd68	1292	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1293	{
Kojto	158:b23ee177fd68	1294	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1));
Kojto	158:b23ee177fd68	1295	}
Kojto	158:b23ee177fd68	1296
Kojto	158:b23ee177fd68	1297	/**
Kojto	158:b23ee177fd68	1298	* @brief Get Channel 2 global interrupt flag.
Kojto	158:b23ee177fd68	1299	* @rmtoll ISR GIF2 LL_DMA_IsActiveFlag_GI2
Kojto	158:b23ee177fd68	1300	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1301	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1302	*/
Kojto	158:b23ee177fd68	1303	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1304	{
Kojto	158:b23ee177fd68	1305	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2));
Kojto	158:b23ee177fd68	1306	}
Kojto	158:b23ee177fd68	1307
Kojto	158:b23ee177fd68	1308	/**
Kojto	158:b23ee177fd68	1309	* @brief Get Channel 3 global interrupt flag.
Kojto	158:b23ee177fd68	1310	* @rmtoll ISR GIF3 LL_DMA_IsActiveFlag_GI3
Kojto	158:b23ee177fd68	1311	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1312	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1313	*/
Kojto	158:b23ee177fd68	1314	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1315	{
Kojto	158:b23ee177fd68	1316	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3));
Kojto	158:b23ee177fd68	1317	}
Kojto	158:b23ee177fd68	1318
Kojto	158:b23ee177fd68	1319	/**
Kojto	158:b23ee177fd68	1320	* @brief Get Channel 4 global interrupt flag.
Kojto	158:b23ee177fd68	1321	* @rmtoll ISR GIF4 LL_DMA_IsActiveFlag_GI4
Kojto	158:b23ee177fd68	1322	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1323	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1324	*/
Kojto	158:b23ee177fd68	1325	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1326	{
Kojto	158:b23ee177fd68	1327	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4));
Kojto	158:b23ee177fd68	1328	}
Kojto	158:b23ee177fd68	1329
Kojto	158:b23ee177fd68	1330	/**
Kojto	158:b23ee177fd68	1331	* @brief Get Channel 5 global interrupt flag.
Kojto	158:b23ee177fd68	1332	* @rmtoll ISR GIF5 LL_DMA_IsActiveFlag_GI5
Kojto	158:b23ee177fd68	1333	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1334	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1335	*/
Kojto	158:b23ee177fd68	1336	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1337	{
Kojto	158:b23ee177fd68	1338	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5));
Kojto	158:b23ee177fd68	1339	}
Kojto	158:b23ee177fd68	1340
Kojto	158:b23ee177fd68	1341	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1342	/**
Kojto	158:b23ee177fd68	1343	* @brief Get Channel 6 global interrupt flag.
Kojto	158:b23ee177fd68	1344	* @rmtoll ISR GIF6 LL_DMA_IsActiveFlag_GI6
Kojto	158:b23ee177fd68	1345	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1346	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1347	*/
Kojto	158:b23ee177fd68	1348	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1349	{
Kojto	158:b23ee177fd68	1350	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6));
Kojto	158:b23ee177fd68	1351	}
Kojto	158:b23ee177fd68	1352	#endif
Kojto	158:b23ee177fd68	1353
Kojto	158:b23ee177fd68	1354	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1355	/**
Kojto	158:b23ee177fd68	1356	* @brief Get Channel 7 global interrupt flag.
Kojto	158:b23ee177fd68	1357	* @rmtoll ISR GIF7 LL_DMA_IsActiveFlag_GI7
Kojto	158:b23ee177fd68	1358	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1359	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1360	*/
Kojto	158:b23ee177fd68	1361	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1362	{
Kojto	158:b23ee177fd68	1363	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7));
Kojto	158:b23ee177fd68	1364	}
Kojto	158:b23ee177fd68	1365	#endif
Kojto	158:b23ee177fd68	1366
Kojto	158:b23ee177fd68	1367	/**
Kojto	158:b23ee177fd68	1368	* @brief Get Channel 1 transfer complete flag.
Kojto	158:b23ee177fd68	1369	* @rmtoll ISR TCIF1 LL_DMA_IsActiveFlag_TC1
Kojto	158:b23ee177fd68	1370	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1371	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1372	*/
Kojto	158:b23ee177fd68	1373	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1374	{
Kojto	158:b23ee177fd68	1375	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1));
Kojto	158:b23ee177fd68	1376	}
Kojto	158:b23ee177fd68	1377
Kojto	158:b23ee177fd68	1378	/**
Kojto	158:b23ee177fd68	1379	* @brief Get Channel 2 transfer complete flag.
Kojto	158:b23ee177fd68	1380	* @rmtoll ISR TCIF2 LL_DMA_IsActiveFlag_TC2
Kojto	158:b23ee177fd68	1381	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1382	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1383	*/
Kojto	158:b23ee177fd68	1384	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1385	{
Kojto	158:b23ee177fd68	1386	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2));
Kojto	158:b23ee177fd68	1387	}
Kojto	158:b23ee177fd68	1388
Kojto	158:b23ee177fd68	1389	/**
Kojto	158:b23ee177fd68	1390	* @brief Get Channel 3 transfer complete flag.
Kojto	158:b23ee177fd68	1391	* @rmtoll ISR TCIF3 LL_DMA_IsActiveFlag_TC3
Kojto	158:b23ee177fd68	1392	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1393	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1394	*/
Kojto	158:b23ee177fd68	1395	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1396	{
Kojto	158:b23ee177fd68	1397	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3));
Kojto	158:b23ee177fd68	1398	}
Kojto	158:b23ee177fd68	1399
Kojto	158:b23ee177fd68	1400	/**
Kojto	158:b23ee177fd68	1401	* @brief Get Channel 4 transfer complete flag.
Kojto	158:b23ee177fd68	1402	* @rmtoll ISR TCIF4 LL_DMA_IsActiveFlag_TC4
Kojto	158:b23ee177fd68	1403	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1404	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1405	*/
Kojto	158:b23ee177fd68	1406	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1407	{
Kojto	158:b23ee177fd68	1408	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4));
Kojto	158:b23ee177fd68	1409	}
Kojto	158:b23ee177fd68	1410
Kojto	158:b23ee177fd68	1411	/**
Kojto	158:b23ee177fd68	1412	* @brief Get Channel 5 transfer complete flag.
Kojto	158:b23ee177fd68	1413	* @rmtoll ISR TCIF5 LL_DMA_IsActiveFlag_TC5
Kojto	158:b23ee177fd68	1414	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1415	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1416	*/
Kojto	158:b23ee177fd68	1417	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1418	{
Kojto	158:b23ee177fd68	1419	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5));
Kojto	158:b23ee177fd68	1420	}
Kojto	158:b23ee177fd68	1421
Kojto	158:b23ee177fd68	1422	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1423	/**
Kojto	158:b23ee177fd68	1424	* @brief Get Channel 6 transfer complete flag.
Kojto	158:b23ee177fd68	1425	* @rmtoll ISR TCIF6 LL_DMA_IsActiveFlag_TC6
Kojto	158:b23ee177fd68	1426	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1427	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1428	*/
Kojto	158:b23ee177fd68	1429	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1430	{
Kojto	158:b23ee177fd68	1431	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6));
Kojto	158:b23ee177fd68	1432	}
Kojto	158:b23ee177fd68	1433	#endif
Kojto	158:b23ee177fd68	1434
Kojto	158:b23ee177fd68	1435	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1436	/**
Kojto	158:b23ee177fd68	1437	* @brief Get Channel 7 transfer complete flag.
Kojto	158:b23ee177fd68	1438	* @rmtoll ISR TCIF7 LL_DMA_IsActiveFlag_TC7
Kojto	158:b23ee177fd68	1439	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1440	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1441	*/
Kojto	158:b23ee177fd68	1442	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1443	{
Kojto	158:b23ee177fd68	1444	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7));
Kojto	158:b23ee177fd68	1445	}
Kojto	158:b23ee177fd68	1446	#endif
Kojto	158:b23ee177fd68	1447
Kojto	158:b23ee177fd68	1448	/**
Kojto	158:b23ee177fd68	1449	* @brief Get Channel 1 half transfer flag.
Kojto	158:b23ee177fd68	1450	* @rmtoll ISR HTIF1 LL_DMA_IsActiveFlag_HT1
Kojto	158:b23ee177fd68	1451	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1452	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1453	*/
Kojto	158:b23ee177fd68	1454	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1455	{
Kojto	158:b23ee177fd68	1456	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1));
Kojto	158:b23ee177fd68	1457	}
Kojto	158:b23ee177fd68	1458
Kojto	158:b23ee177fd68	1459	/**
Kojto	158:b23ee177fd68	1460	* @brief Get Channel 2 half transfer flag.
Kojto	158:b23ee177fd68	1461	* @rmtoll ISR HTIF2 LL_DMA_IsActiveFlag_HT2
Kojto	158:b23ee177fd68	1462	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1463	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1464	*/
Kojto	158:b23ee177fd68	1465	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1466	{
Kojto	158:b23ee177fd68	1467	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2));
Kojto	158:b23ee177fd68	1468	}
Kojto	158:b23ee177fd68	1469
Kojto	158:b23ee177fd68	1470	/**
Kojto	158:b23ee177fd68	1471	* @brief Get Channel 3 half transfer flag.
Kojto	158:b23ee177fd68	1472	* @rmtoll ISR HTIF3 LL_DMA_IsActiveFlag_HT3
Kojto	158:b23ee177fd68	1473	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1474	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1475	*/
Kojto	158:b23ee177fd68	1476	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1477	{
Kojto	158:b23ee177fd68	1478	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3));
Kojto	158:b23ee177fd68	1479	}
Kojto	158:b23ee177fd68	1480
Kojto	158:b23ee177fd68	1481	/**
Kojto	158:b23ee177fd68	1482	* @brief Get Channel 4 half transfer flag.
Kojto	158:b23ee177fd68	1483	* @rmtoll ISR HTIF4 LL_DMA_IsActiveFlag_HT4
Kojto	158:b23ee177fd68	1484	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1485	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1486	*/
Kojto	158:b23ee177fd68	1487	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1488	{
Kojto	158:b23ee177fd68	1489	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4));
Kojto	158:b23ee177fd68	1490	}
Kojto	158:b23ee177fd68	1491
Kojto	158:b23ee177fd68	1492	/**
Kojto	158:b23ee177fd68	1493	* @brief Get Channel 5 half transfer flag.
Kojto	158:b23ee177fd68	1494	* @rmtoll ISR HTIF5 LL_DMA_IsActiveFlag_HT5
Kojto	158:b23ee177fd68	1495	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1496	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1497	*/
Kojto	158:b23ee177fd68	1498	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1499	{
Kojto	158:b23ee177fd68	1500	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5));
Kojto	158:b23ee177fd68	1501	}
Kojto	158:b23ee177fd68	1502
Kojto	158:b23ee177fd68	1503	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1504	/**
Kojto	158:b23ee177fd68	1505	* @brief Get Channel 6 half transfer flag.
Kojto	158:b23ee177fd68	1506	* @rmtoll ISR HTIF6 LL_DMA_IsActiveFlag_HT6
Kojto	158:b23ee177fd68	1507	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1508	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1509	*/
Kojto	158:b23ee177fd68	1510	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1511	{
Kojto	158:b23ee177fd68	1512	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6));
Kojto	158:b23ee177fd68	1513	}
Kojto	158:b23ee177fd68	1514	#endif
Kojto	158:b23ee177fd68	1515
Kojto	158:b23ee177fd68	1516	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1517	/**
Kojto	158:b23ee177fd68	1518	* @brief Get Channel 7 half transfer flag.
Kojto	158:b23ee177fd68	1519	* @rmtoll ISR HTIF7 LL_DMA_IsActiveFlag_HT7
Kojto	158:b23ee177fd68	1520	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1521	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1522	*/
Kojto	158:b23ee177fd68	1523	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1524	{
Kojto	158:b23ee177fd68	1525	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7));
Kojto	158:b23ee177fd68	1526	}
Kojto	158:b23ee177fd68	1527	#endif
Kojto	158:b23ee177fd68	1528
Kojto	158:b23ee177fd68	1529	/**
Kojto	158:b23ee177fd68	1530	* @brief Get Channel 1 transfer error flag.
Kojto	158:b23ee177fd68	1531	* @rmtoll ISR TEIF1 LL_DMA_IsActiveFlag_TE1
Kojto	158:b23ee177fd68	1532	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1533	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1534	*/
Kojto	158:b23ee177fd68	1535	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1536	{
Kojto	158:b23ee177fd68	1537	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1));
Kojto	158:b23ee177fd68	1538	}
Kojto	158:b23ee177fd68	1539
Kojto	158:b23ee177fd68	1540	/**
Kojto	158:b23ee177fd68	1541	* @brief Get Channel 2 transfer error flag.
Kojto	158:b23ee177fd68	1542	* @rmtoll ISR TEIF2 LL_DMA_IsActiveFlag_TE2
Kojto	158:b23ee177fd68	1543	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1544	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1545	*/
Kojto	158:b23ee177fd68	1546	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1547	{
Kojto	158:b23ee177fd68	1548	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2));
Kojto	158:b23ee177fd68	1549	}
Kojto	158:b23ee177fd68	1550
Kojto	158:b23ee177fd68	1551	/**
Kojto	158:b23ee177fd68	1552	* @brief Get Channel 3 transfer error flag.
Kojto	158:b23ee177fd68	1553	* @rmtoll ISR TEIF3 LL_DMA_IsActiveFlag_TE3
Kojto	158:b23ee177fd68	1554	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1555	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1556	*/
Kojto	158:b23ee177fd68	1557	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1558	{
Kojto	158:b23ee177fd68	1559	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3));
Kojto	158:b23ee177fd68	1560	}
Kojto	158:b23ee177fd68	1561
Kojto	158:b23ee177fd68	1562	/**
Kojto	158:b23ee177fd68	1563	* @brief Get Channel 4 transfer error flag.
Kojto	158:b23ee177fd68	1564	* @rmtoll ISR TEIF4 LL_DMA_IsActiveFlag_TE4
Kojto	158:b23ee177fd68	1565	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1566	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1567	*/
Kojto	158:b23ee177fd68	1568	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1569	{
Kojto	158:b23ee177fd68	1570	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4));
Kojto	158:b23ee177fd68	1571	}
Kojto	158:b23ee177fd68	1572
Kojto	158:b23ee177fd68	1573	/**
Kojto	158:b23ee177fd68	1574	* @brief Get Channel 5 transfer error flag.
Kojto	158:b23ee177fd68	1575	* @rmtoll ISR TEIF5 LL_DMA_IsActiveFlag_TE5
Kojto	158:b23ee177fd68	1576	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1577	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1578	*/
Kojto	158:b23ee177fd68	1579	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1580	{
Kojto	158:b23ee177fd68	1581	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5));
Kojto	158:b23ee177fd68	1582	}
Kojto	158:b23ee177fd68	1583
Kojto	158:b23ee177fd68	1584	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1585	/**
Kojto	158:b23ee177fd68	1586	* @brief Get Channel 6 transfer error flag.
Kojto	158:b23ee177fd68	1587	* @rmtoll ISR TEIF6 LL_DMA_IsActiveFlag_TE6
Kojto	158:b23ee177fd68	1588	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1589	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1590	*/
Kojto	158:b23ee177fd68	1591	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1592	{
Kojto	158:b23ee177fd68	1593	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6));
Kojto	158:b23ee177fd68	1594	}
Kojto	158:b23ee177fd68	1595	#endif
Kojto	158:b23ee177fd68	1596
Kojto	158:b23ee177fd68	1597	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1598	/**
Kojto	158:b23ee177fd68	1599	* @brief Get Channel 7 transfer error flag.
Kojto	158:b23ee177fd68	1600	* @rmtoll ISR TEIF7 LL_DMA_IsActiveFlag_TE7
Kojto	158:b23ee177fd68	1601	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1602	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1603	*/
Kojto	158:b23ee177fd68	1604	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1605	{
Kojto	158:b23ee177fd68	1606	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7));
Kojto	158:b23ee177fd68	1607	}
Kojto	158:b23ee177fd68	1608	#endif
Kojto	158:b23ee177fd68	1609
Kojto	158:b23ee177fd68	1610	/**
Kojto	158:b23ee177fd68	1611	* @brief Clear Channel 1 global interrupt flag.
Kojto	158:b23ee177fd68	1612	* @rmtoll IFCR CGIF1 LL_DMA_ClearFlag_GI1
Kojto	158:b23ee177fd68	1613	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1614	* @retval None
Kojto	158:b23ee177fd68	1615	*/
Kojto	158:b23ee177fd68	1616	__STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1617	{
Kojto	158:b23ee177fd68	1618	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF1);
Kojto	158:b23ee177fd68	1619	}
Kojto	158:b23ee177fd68	1620
Kojto	158:b23ee177fd68	1621	/**
Kojto	158:b23ee177fd68	1622	* @brief Clear Channel 2 global interrupt flag.
Kojto	158:b23ee177fd68	1623	* @rmtoll IFCR CGIF2 LL_DMA_ClearFlag_GI2
Kojto	158:b23ee177fd68	1624	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1625	* @retval None
Kojto	158:b23ee177fd68	1626	*/
Kojto	158:b23ee177fd68	1627	__STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1628	{
Kojto	158:b23ee177fd68	1629	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF2);
Kojto	158:b23ee177fd68	1630	}
Kojto	158:b23ee177fd68	1631
Kojto	158:b23ee177fd68	1632	/**
Kojto	158:b23ee177fd68	1633	* @brief Clear Channel 3 global interrupt flag.
Kojto	158:b23ee177fd68	1634	* @rmtoll IFCR CGIF3 LL_DMA_ClearFlag_GI3
Kojto	158:b23ee177fd68	1635	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1636	* @retval None
Kojto	158:b23ee177fd68	1637	*/
Kojto	158:b23ee177fd68	1638	__STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1639	{
Kojto	158:b23ee177fd68	1640	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF3);
Kojto	158:b23ee177fd68	1641	}
Kojto	158:b23ee177fd68	1642
Kojto	158:b23ee177fd68	1643	/**
Kojto	158:b23ee177fd68	1644	* @brief Clear Channel 4 global interrupt flag.
Kojto	158:b23ee177fd68	1645	* @rmtoll IFCR CGIF4 LL_DMA_ClearFlag_GI4
Kojto	158:b23ee177fd68	1646	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1647	* @retval None
Kojto	158:b23ee177fd68	1648	*/
Kojto	158:b23ee177fd68	1649	__STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1650	{
Kojto	158:b23ee177fd68	1651	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF4);
Kojto	158:b23ee177fd68	1652	}
Kojto	158:b23ee177fd68	1653
Kojto	158:b23ee177fd68	1654	/**
Kojto	158:b23ee177fd68	1655	* @brief Clear Channel 5 global interrupt flag.
Kojto	158:b23ee177fd68	1656	* @rmtoll IFCR CGIF5 LL_DMA_ClearFlag_GI5
Kojto	158:b23ee177fd68	1657	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1658	* @retval None
Kojto	158:b23ee177fd68	1659	*/
Kojto	158:b23ee177fd68	1660	__STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1661	{
Kojto	158:b23ee177fd68	1662	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF5);
Kojto	158:b23ee177fd68	1663	}
Kojto	158:b23ee177fd68	1664
Kojto	158:b23ee177fd68	1665	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1666	/**
Kojto	158:b23ee177fd68	1667	* @brief Clear Channel 6 global interrupt flag.
Kojto	158:b23ee177fd68	1668	* @rmtoll IFCR CGIF6 LL_DMA_ClearFlag_GI6
Kojto	158:b23ee177fd68	1669	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1670	* @retval None
Kojto	158:b23ee177fd68	1671	*/
Kojto	158:b23ee177fd68	1672	__STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1673	{
Kojto	158:b23ee177fd68	1674	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF6);
Kojto	158:b23ee177fd68	1675	}
Kojto	158:b23ee177fd68	1676	#endif
Kojto	158:b23ee177fd68	1677
Kojto	158:b23ee177fd68	1678	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1679	/**
Kojto	158:b23ee177fd68	1680	* @brief Clear Channel 7 global interrupt flag.
Kojto	158:b23ee177fd68	1681	* @rmtoll IFCR CGIF7 LL_DMA_ClearFlag_GI7
Kojto	158:b23ee177fd68	1682	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1683	* @retval None
Kojto	158:b23ee177fd68	1684	*/
Kojto	158:b23ee177fd68	1685	__STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1686	{
Kojto	158:b23ee177fd68	1687	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF7);
Kojto	158:b23ee177fd68	1688	}
Kojto	158:b23ee177fd68	1689	#endif
Kojto	158:b23ee177fd68	1690
Kojto	158:b23ee177fd68	1691	/**
Kojto	158:b23ee177fd68	1692	* @brief Clear Channel 1 transfer complete flag.
Kojto	158:b23ee177fd68	1693	* @rmtoll IFCR CTCIF1 LL_DMA_ClearFlag_TC1
Kojto	158:b23ee177fd68	1694	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1695	* @retval None
Kojto	158:b23ee177fd68	1696	*/
Kojto	158:b23ee177fd68	1697	__STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1698	{
Kojto	158:b23ee177fd68	1699	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF1);
Kojto	158:b23ee177fd68	1700	}
Kojto	158:b23ee177fd68	1701
Kojto	158:b23ee177fd68	1702	/**
Kojto	158:b23ee177fd68	1703	* @brief Clear Channel 2 transfer complete flag.
Kojto	158:b23ee177fd68	1704	* @rmtoll IFCR CTCIF2 LL_DMA_ClearFlag_TC2
Kojto	158:b23ee177fd68	1705	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1706	* @retval None
Kojto	158:b23ee177fd68	1707	*/
Kojto	158:b23ee177fd68	1708	__STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1709	{
Kojto	158:b23ee177fd68	1710	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF2);
Kojto	158:b23ee177fd68	1711	}
Kojto	158:b23ee177fd68	1712
Kojto	158:b23ee177fd68	1713	/**
Kojto	158:b23ee177fd68	1714	* @brief Clear Channel 3 transfer complete flag.
Kojto	158:b23ee177fd68	1715	* @rmtoll IFCR CTCIF3 LL_DMA_ClearFlag_TC3
Kojto	158:b23ee177fd68	1716	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1717	* @retval None
Kojto	158:b23ee177fd68	1718	*/
Kojto	158:b23ee177fd68	1719	__STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1720	{
Kojto	158:b23ee177fd68	1721	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF3);
Kojto	158:b23ee177fd68	1722	}
Kojto	158:b23ee177fd68	1723
Kojto	158:b23ee177fd68	1724	/**
Kojto	158:b23ee177fd68	1725	* @brief Clear Channel 4 transfer complete flag.
Kojto	158:b23ee177fd68	1726	* @rmtoll IFCR CTCIF4 LL_DMA_ClearFlag_TC4
Kojto	158:b23ee177fd68	1727	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1728	* @retval None
Kojto	158:b23ee177fd68	1729	*/
Kojto	158:b23ee177fd68	1730	__STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1731	{
Kojto	158:b23ee177fd68	1732	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF4);
Kojto	158:b23ee177fd68	1733	}
Kojto	158:b23ee177fd68	1734
Kojto	158:b23ee177fd68	1735	/**
Kojto	158:b23ee177fd68	1736	* @brief Clear Channel 5 transfer complete flag.
Kojto	158:b23ee177fd68	1737	* @rmtoll IFCR CTCIF5 LL_DMA_ClearFlag_TC5
Kojto	158:b23ee177fd68	1738	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1739	* @retval None
Kojto	158:b23ee177fd68	1740	*/
Kojto	158:b23ee177fd68	1741	__STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1742	{
Kojto	158:b23ee177fd68	1743	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF5);
Kojto	158:b23ee177fd68	1744	}
Kojto	158:b23ee177fd68	1745
Kojto	158:b23ee177fd68	1746	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1747	/**
Kojto	158:b23ee177fd68	1748	* @brief Clear Channel 6 transfer complete flag.
Kojto	158:b23ee177fd68	1749	* @rmtoll IFCR CTCIF6 LL_DMA_ClearFlag_TC6
Kojto	158:b23ee177fd68	1750	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1751	* @retval None
Kojto	158:b23ee177fd68	1752	*/
Kojto	158:b23ee177fd68	1753	__STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1754	{
Kojto	158:b23ee177fd68	1755	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF6);
Kojto	158:b23ee177fd68	1756	}
Kojto	158:b23ee177fd68	1757	#endif
Kojto	158:b23ee177fd68	1758
Kojto	158:b23ee177fd68	1759	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1760	/**
Kojto	158:b23ee177fd68	1761	* @brief Clear Channel 7 transfer complete flag.
Kojto	158:b23ee177fd68	1762	* @rmtoll IFCR CTCIF7 LL_DMA_ClearFlag_TC7
Kojto	158:b23ee177fd68	1763	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1764	* @retval None
Kojto	158:b23ee177fd68	1765	*/
Kojto	158:b23ee177fd68	1766	__STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1767	{
Kojto	158:b23ee177fd68	1768	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF7);
Kojto	158:b23ee177fd68	1769	}
Kojto	158:b23ee177fd68	1770	#endif
Kojto	158:b23ee177fd68	1771
Kojto	158:b23ee177fd68	1772	/**
Kojto	158:b23ee177fd68	1773	* @brief Clear Channel 1 half transfer flag.
Kojto	158:b23ee177fd68	1774	* @rmtoll IFCR CHTIF1 LL_DMA_ClearFlag_HT1
Kojto	158:b23ee177fd68	1775	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1776	* @retval None
Kojto	158:b23ee177fd68	1777	*/
Kojto	158:b23ee177fd68	1778	__STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1779	{
Kojto	158:b23ee177fd68	1780	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF1);
Kojto	158:b23ee177fd68	1781	}
Kojto	158:b23ee177fd68	1782
Kojto	158:b23ee177fd68	1783	/**
Kojto	158:b23ee177fd68	1784	* @brief Clear Channel 2 half transfer flag.
Kojto	158:b23ee177fd68	1785	* @rmtoll IFCR CHTIF2 LL_DMA_ClearFlag_HT2
Kojto	158:b23ee177fd68	1786	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1787	* @retval None
Kojto	158:b23ee177fd68	1788	*/
Kojto	158:b23ee177fd68	1789	__STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1790	{
Kojto	158:b23ee177fd68	1791	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF2);
Kojto	158:b23ee177fd68	1792	}
Kojto	158:b23ee177fd68	1793
Kojto	158:b23ee177fd68	1794	/**
Kojto	158:b23ee177fd68	1795	* @brief Clear Channel 3 half transfer flag.
Kojto	158:b23ee177fd68	1796	* @rmtoll IFCR CHTIF3 LL_DMA_ClearFlag_HT3
Kojto	158:b23ee177fd68	1797	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1798	* @retval None
Kojto	158:b23ee177fd68	1799	*/
Kojto	158:b23ee177fd68	1800	__STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1801	{
Kojto	158:b23ee177fd68	1802	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF3);
Kojto	158:b23ee177fd68	1803	}
Kojto	158:b23ee177fd68	1804
Kojto	158:b23ee177fd68	1805	/**
Kojto	158:b23ee177fd68	1806	* @brief Clear Channel 4 half transfer flag.
Kojto	158:b23ee177fd68	1807	* @rmtoll IFCR CHTIF4 LL_DMA_ClearFlag_HT4
Kojto	158:b23ee177fd68	1808	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1809	* @retval None
Kojto	158:b23ee177fd68	1810	*/
Kojto	158:b23ee177fd68	1811	__STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1812	{
Kojto	158:b23ee177fd68	1813	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF4);
Kojto	158:b23ee177fd68	1814	}
Kojto	158:b23ee177fd68	1815
Kojto	158:b23ee177fd68	1816	/**
Kojto	158:b23ee177fd68	1817	* @brief Clear Channel 5 half transfer flag.
Kojto	158:b23ee177fd68	1818	* @rmtoll IFCR CHTIF5 LL_DMA_ClearFlag_HT5
Kojto	158:b23ee177fd68	1819	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1820	* @retval None
Kojto	158:b23ee177fd68	1821	*/
Kojto	158:b23ee177fd68	1822	__STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1823	{
Kojto	158:b23ee177fd68	1824	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF5);
Kojto	158:b23ee177fd68	1825	}
Kojto	158:b23ee177fd68	1826
Kojto	158:b23ee177fd68	1827	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1828	/**
Kojto	158:b23ee177fd68	1829	* @brief Clear Channel 6 half transfer flag.
Kojto	158:b23ee177fd68	1830	* @rmtoll IFCR CHTIF6 LL_DMA_ClearFlag_HT6
Kojto	158:b23ee177fd68	1831	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1832	* @retval None
Kojto	158:b23ee177fd68	1833	*/
Kojto	158:b23ee177fd68	1834	__STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1835	{
Kojto	158:b23ee177fd68	1836	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF6);
Kojto	158:b23ee177fd68	1837	}
Kojto	158:b23ee177fd68	1838	#endif
Kojto	158:b23ee177fd68	1839
Kojto	158:b23ee177fd68	1840	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1841	/**
Kojto	158:b23ee177fd68	1842	* @brief Clear Channel 7 half transfer flag.
Kojto	158:b23ee177fd68	1843	* @rmtoll IFCR CHTIF7 LL_DMA_ClearFlag_HT7
Kojto	158:b23ee177fd68	1844	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1845	* @retval None
Kojto	158:b23ee177fd68	1846	*/
Kojto	158:b23ee177fd68	1847	__STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1848	{
Kojto	158:b23ee177fd68	1849	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF7);
Kojto	158:b23ee177fd68	1850	}
Kojto	158:b23ee177fd68	1851	#endif
Kojto	158:b23ee177fd68	1852
Kojto	158:b23ee177fd68	1853	/**
Kojto	158:b23ee177fd68	1854	* @brief Clear Channel 1 transfer error flag.
Kojto	158:b23ee177fd68	1855	* @rmtoll IFCR CTEIF1 LL_DMA_ClearFlag_TE1
Kojto	158:b23ee177fd68	1856	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1857	* @retval None
Kojto	158:b23ee177fd68	1858	*/
Kojto	158:b23ee177fd68	1859	__STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1860	{
Kojto	158:b23ee177fd68	1861	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF1);
Kojto	158:b23ee177fd68	1862	}
Kojto	158:b23ee177fd68	1863
Kojto	158:b23ee177fd68	1864	/**
Kojto	158:b23ee177fd68	1865	* @brief Clear Channel 2 transfer error flag.
Kojto	158:b23ee177fd68	1866	* @rmtoll IFCR CTEIF2 LL_DMA_ClearFlag_TE2
Kojto	158:b23ee177fd68	1867	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1868	* @retval None
Kojto	158:b23ee177fd68	1869	*/
Kojto	158:b23ee177fd68	1870	__STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1871	{
Kojto	158:b23ee177fd68	1872	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF2);
Kojto	158:b23ee177fd68	1873	}
Kojto	158:b23ee177fd68	1874
Kojto	158:b23ee177fd68	1875	/**
Kojto	158:b23ee177fd68	1876	* @brief Clear Channel 3 transfer error flag.
Kojto	158:b23ee177fd68	1877	* @rmtoll IFCR CTEIF3 LL_DMA_ClearFlag_TE3
Kojto	158:b23ee177fd68	1878	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1879	* @retval None
Kojto	158:b23ee177fd68	1880	*/
Kojto	158:b23ee177fd68	1881	__STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1882	{
Kojto	158:b23ee177fd68	1883	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF3);
Kojto	158:b23ee177fd68	1884	}
Kojto	158:b23ee177fd68	1885
Kojto	158:b23ee177fd68	1886	/**
Kojto	158:b23ee177fd68	1887	* @brief Clear Channel 4 transfer error flag.
Kojto	158:b23ee177fd68	1888	* @rmtoll IFCR CTEIF4 LL_DMA_ClearFlag_TE4
Kojto	158:b23ee177fd68	1889	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1890	* @retval None
Kojto	158:b23ee177fd68	1891	*/
Kojto	158:b23ee177fd68	1892	__STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1893	{
Kojto	158:b23ee177fd68	1894	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF4);
Kojto	158:b23ee177fd68	1895	}
Kojto	158:b23ee177fd68	1896
Kojto	158:b23ee177fd68	1897	/**
Kojto	158:b23ee177fd68	1898	* @brief Clear Channel 5 transfer error flag.
Kojto	158:b23ee177fd68	1899	* @rmtoll IFCR CTEIF5 LL_DMA_ClearFlag_TE5
Kojto	158:b23ee177fd68	1900	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1901	* @retval None
Kojto	158:b23ee177fd68	1902	*/
Kojto	158:b23ee177fd68	1903	__STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1904	{
Kojto	158:b23ee177fd68	1905	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF5);
Kojto	158:b23ee177fd68	1906	}
Kojto	158:b23ee177fd68	1907
Kojto	158:b23ee177fd68	1908	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1909	/**
Kojto	158:b23ee177fd68	1910	* @brief Clear Channel 6 transfer error flag.
Kojto	158:b23ee177fd68	1911	* @rmtoll IFCR CTEIF6 LL_DMA_ClearFlag_TE6
Kojto	158:b23ee177fd68	1912	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1913	* @retval None
Kojto	158:b23ee177fd68	1914	*/
Kojto	158:b23ee177fd68	1915	__STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1916	{
Kojto	158:b23ee177fd68	1917	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF6);
Kojto	158:b23ee177fd68	1918	}
Kojto	158:b23ee177fd68	1919	#endif
Kojto	158:b23ee177fd68	1920
Kojto	158:b23ee177fd68	1921	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1922	/**
Kojto	158:b23ee177fd68	1923	* @brief Clear Channel 7 transfer error flag.
Kojto	158:b23ee177fd68	1924	* @rmtoll IFCR CTEIF7 LL_DMA_ClearFlag_TE7
Kojto	158:b23ee177fd68	1925	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1926	* @retval None
Kojto	158:b23ee177fd68	1927	*/
Kojto	158:b23ee177fd68	1928	__STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1929	{
Kojto	158:b23ee177fd68	1930	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF7);
Kojto	158:b23ee177fd68	1931	}
Kojto	158:b23ee177fd68	1932	#endif
Kojto	158:b23ee177fd68	1933
Kojto	158:b23ee177fd68	1934	/**
Kojto	158:b23ee177fd68	1935	* @}
Kojto	158:b23ee177fd68	1936	*/
Kojto	158:b23ee177fd68	1937
Kojto	158:b23ee177fd68	1938	/** @defgroup DMA_LL_EF_IT_Management IT_Management
Kojto	158:b23ee177fd68	1939	* @{
Kojto	158:b23ee177fd68	1940	*/
Kojto	158:b23ee177fd68	1941	/**
Kojto	158:b23ee177fd68	1942	* @brief Enable Transfer complete interrupt.
Kojto	158:b23ee177fd68	1943	* @rmtoll CCR TCIE LL_DMA_EnableIT_TC
Kojto	158:b23ee177fd68	1944	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1945	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1946	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1947	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1948	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1949	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1950	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1951	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1952	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1953	* @retval None
Kojto	158:b23ee177fd68	1954	*/
Kojto	158:b23ee177fd68	1955	__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1956	{
Kojto	158:b23ee177fd68	1957	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
Kojto	158:b23ee177fd68	1958	}
Kojto	158:b23ee177fd68	1959
Kojto	158:b23ee177fd68	1960	/**
Kojto	158:b23ee177fd68	1961	* @brief Enable Half transfer interrupt.
Kojto	158:b23ee177fd68	1962	* @rmtoll CCR HTIE LL_DMA_EnableIT_HT
Kojto	158:b23ee177fd68	1963	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1964	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1965	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1966	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1967	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1968	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1969	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1970	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1971	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1972	* @retval None
Kojto	158:b23ee177fd68	1973	*/
Kojto	158:b23ee177fd68	1974	__STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1975	{
Kojto	158:b23ee177fd68	1976	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
Kojto	158:b23ee177fd68	1977	}
Kojto	158:b23ee177fd68	1978
Kojto	158:b23ee177fd68	1979	/**
Kojto	158:b23ee177fd68	1980	* @brief Enable Transfer error interrupt.
Kojto	158:b23ee177fd68	1981	* @rmtoll CCR TEIE LL_DMA_EnableIT_TE
Kojto	158:b23ee177fd68	1982	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1983	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1984	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1985	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1986	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1987	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1988	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1989	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1990	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1991	* @retval None
Kojto	158:b23ee177fd68	1992	*/
Kojto	158:b23ee177fd68	1993	__STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1994	{
Kojto	158:b23ee177fd68	1995	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
Kojto	158:b23ee177fd68	1996	}
Kojto	158:b23ee177fd68	1997
Kojto	158:b23ee177fd68	1998	/**
Kojto	158:b23ee177fd68	1999	* @brief Disable Transfer complete interrupt.
Kojto	158:b23ee177fd68	2000	* @rmtoll CCR TCIE LL_DMA_DisableIT_TC
Kojto	158:b23ee177fd68	2001	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2002	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2003	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2004	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2005	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2006	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2007	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2008	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2009	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2010	* @retval None
Kojto	158:b23ee177fd68	2011	*/
Kojto	158:b23ee177fd68	2012	__STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2013	{
Kojto	158:b23ee177fd68	2014	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
Kojto	158:b23ee177fd68	2015	}
Kojto	158:b23ee177fd68	2016
Kojto	158:b23ee177fd68	2017	/**
Kojto	158:b23ee177fd68	2018	* @brief Disable Half transfer interrupt.
Kojto	158:b23ee177fd68	2019	* @rmtoll CCR HTIE LL_DMA_DisableIT_HT
Kojto	158:b23ee177fd68	2020	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2021	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2022	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2023	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2024	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2025	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2026	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2027	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2028	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2029	* @retval None
Kojto	158:b23ee177fd68	2030	*/
Kojto	158:b23ee177fd68	2031	__STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2032	{
Kojto	158:b23ee177fd68	2033	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
Kojto	158:b23ee177fd68	2034	}
Kojto	158:b23ee177fd68	2035
Kojto	158:b23ee177fd68	2036	/**
Kojto	158:b23ee177fd68	2037	* @brief Disable Transfer error interrupt.
Kojto	158:b23ee177fd68	2038	* @rmtoll CCR TEIE LL_DMA_DisableIT_TE
Kojto	158:b23ee177fd68	2039	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2040	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2041	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2042	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2043	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2044	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2045	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2046	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2047	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2048	* @retval None
Kojto	158:b23ee177fd68	2049	*/
Kojto	158:b23ee177fd68	2050	__STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2051	{
Kojto	158:b23ee177fd68	2052	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
Kojto	158:b23ee177fd68	2053	}
Kojto	158:b23ee177fd68	2054
Kojto	158:b23ee177fd68	2055	/**
Kojto	158:b23ee177fd68	2056	* @brief Check if Transfer complete Interrupt is enabled.
Kojto	158:b23ee177fd68	2057	* @rmtoll CCR TCIE LL_DMA_IsEnabledIT_TC
Kojto	158:b23ee177fd68	2058	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2059	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2060	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2061	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2062	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2063	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2064	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2065	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2066	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2067	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2068	*/
Kojto	158:b23ee177fd68	2069	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2070	{
Kojto	158:b23ee177fd68	2071	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	2072	DMA_CCR_TCIE) == (DMA_CCR_TCIE));
Kojto	158:b23ee177fd68	2073	}
Kojto	158:b23ee177fd68	2074
Kojto	158:b23ee177fd68	2075	/**
Kojto	158:b23ee177fd68	2076	* @brief Check if Half transfer Interrupt is enabled.
Kojto	158:b23ee177fd68	2077	* @rmtoll CCR HTIE LL_DMA_IsEnabledIT_HT
Kojto	158:b23ee177fd68	2078	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2079	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2080	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2081	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2082	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2083	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2084	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2085	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2086	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2087	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2088	*/
Kojto	158:b23ee177fd68	2089	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2090	{
Kojto	158:b23ee177fd68	2091	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	2092	DMA_CCR_HTIE) == (DMA_CCR_HTIE));
Kojto	158:b23ee177fd68	2093	}
Kojto	158:b23ee177fd68	2094
Kojto	158:b23ee177fd68	2095	/**
Kojto	158:b23ee177fd68	2096	* @brief Check if Transfer error Interrupt is enabled.
Kojto	158:b23ee177fd68	2097	* @rmtoll CCR TEIE LL_DMA_IsEnabledIT_TE
Kojto	158:b23ee177fd68	2098	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2099	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2100	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2101	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2102	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2103	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2104	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2105	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2106	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2107	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2108	*/
Kojto	158:b23ee177fd68	2109	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2110	{
Kojto	158:b23ee177fd68	2111	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	2112	DMA_CCR_TEIE) == (DMA_CCR_TEIE));
Kojto	158:b23ee177fd68	2113	}
Kojto	158:b23ee177fd68	2114
Kojto	158:b23ee177fd68	2115	/**
Kojto	158:b23ee177fd68	2116	* @}
Kojto	158:b23ee177fd68	2117	*/
Kojto	158:b23ee177fd68	2118
Kojto	158:b23ee177fd68	2119	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	2120	/** @defgroup DMA_LL_EF_Init Initialization and de-initialization functions
Kojto	158:b23ee177fd68	2121	* @{
Kojto	158:b23ee177fd68	2122	*/
Kojto	158:b23ee177fd68	2123
Kojto	158:b23ee177fd68	2124	uint32_t LL_DMA_Init(DMA_TypeDef DMAx, uint32_t Channel, LL_DMA_InitTypeDef DMA_InitStruct);
Kojto	158:b23ee177fd68	2125	uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel);
Kojto	158:b23ee177fd68	2126	void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct);
Kojto	158:b23ee177fd68	2127
Kojto	158:b23ee177fd68	2128	/**
Kojto	158:b23ee177fd68	2129	* @}
Kojto	158:b23ee177fd68	2130	*/
Kojto	158:b23ee177fd68	2131	#endif /* USE_FULL_LL_DRIVER */
Kojto	158:b23ee177fd68	2132
Kojto	158:b23ee177fd68	2133	/**
Kojto	158:b23ee177fd68	2134	* @}
Kojto	158:b23ee177fd68	2135	*/
Kojto	158:b23ee177fd68	2136
Kojto	158:b23ee177fd68	2137	/**
Kojto	158:b23ee177fd68	2138	* @}
Kojto	158:b23ee177fd68	2139	*/
Kojto	158:b23ee177fd68	2140
Kojto	158:b23ee177fd68	2141	#endif /* DMA1 */
Kojto	158:b23ee177fd68	2142
Kojto	158:b23ee177fd68	2143	/**
Kojto	158:b23ee177fd68	2144	* @}
Kojto	158:b23ee177fd68	2145	*/
Kojto	158:b23ee177fd68	2146
Kojto	158:b23ee177fd68	2147	#ifdef __cplusplus
Kojto	158:b23ee177fd68	2148	}
Kojto	158:b23ee177fd68	2149	#endif
Kojto	158:b23ee177fd68	2150
Kojto	158:b23ee177fd68	2151	#endif /* __STM32L0xx_LL_DMA_H */
Kojto	158:b23ee177fd68	2152
Kojto	158:b23ee177fd68	2153	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/