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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_adc.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 186:707f6e361f3e

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	158:b23ee177fd68	1	/**
Kojto	158:b23ee177fd68	2	******************************************************************************
Kojto	158:b23ee177fd68	3	* @file stm32l0xx_ll_adc.c
Kojto	158:b23ee177fd68	4	* @author MCD Application Team
Kojto	158:b23ee177fd68	5	* @brief ADC LL module driver
Kojto	158:b23ee177fd68	6	******************************************************************************
Kojto	158:b23ee177fd68	7	* @attention
Kojto	158:b23ee177fd68	8	*
Kojto	158:b23ee177fd68	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	158:b23ee177fd68	10	*
Kojto	158:b23ee177fd68	11	* Redistribution and use in source and binary forms, with or without modification,
Kojto	158:b23ee177fd68	12	* are permitted provided that the following conditions are met:
Kojto	158:b23ee177fd68	13	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	158:b23ee177fd68	14	* this list of conditions and the following disclaimer.
Kojto	158:b23ee177fd68	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	158:b23ee177fd68	16	* this list of conditions and the following disclaimer in the documentation
Kojto	158:b23ee177fd68	17	* and/or other materials provided with the distribution.
Kojto	158:b23ee177fd68	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	158:b23ee177fd68	19	* may be used to endorse or promote products derived from this software
Kojto	158:b23ee177fd68	20	* without specific prior written permission.
Kojto	158:b23ee177fd68	21	*
Kojto	158:b23ee177fd68	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	158:b23ee177fd68	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	158:b23ee177fd68	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	158:b23ee177fd68	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	158:b23ee177fd68	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	158:b23ee177fd68	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	158:b23ee177fd68	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	158:b23ee177fd68	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	158:b23ee177fd68	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	158:b23ee177fd68	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	158:b23ee177fd68	32	*
Kojto	158:b23ee177fd68	33	******************************************************************************
Kojto	158:b23ee177fd68	34	*/
Kojto	158:b23ee177fd68	35	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	36
Kojto	158:b23ee177fd68	37	/* Includes ------------------------------------------------------------------*/
Kojto	158:b23ee177fd68	38	#include "stm32l0xx_ll_adc.h"
Kojto	158:b23ee177fd68	39	#include "stm32l0xx_ll_bus.h"
Kojto	158:b23ee177fd68	40
Kojto	158:b23ee177fd68	41	#ifdef USE_FULL_ASSERT
Kojto	158:b23ee177fd68	42	#include "stm32_assert.h"
Kojto	158:b23ee177fd68	43	#else
Kojto	158:b23ee177fd68	44	#define assert_param(expr) ((void)0U)
Kojto	158:b23ee177fd68	45	#endif
Kojto	158:b23ee177fd68	46
Kojto	158:b23ee177fd68	47	/** @addtogroup STM32L0xx_LL_Driver
Kojto	158:b23ee177fd68	48	* @{
Kojto	158:b23ee177fd68	49	*/
Kojto	158:b23ee177fd68	50
Kojto	158:b23ee177fd68	51	#if defined (ADC1)
Kojto	158:b23ee177fd68	52
Kojto	158:b23ee177fd68	53	/** @addtogroup ADC_LL ADC
Kojto	158:b23ee177fd68	54	* @{
Kojto	158:b23ee177fd68	55	*/
Kojto	158:b23ee177fd68	56
Kojto	158:b23ee177fd68	57	/* Private types -------------------------------------------------------------*/
Kojto	158:b23ee177fd68	58	/* Private variables ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	59	/* Private constants ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	60	/** @addtogroup ADC_LL_Private_Constants
Kojto	158:b23ee177fd68	61	* @{
Kojto	158:b23ee177fd68	62	*/
Kojto	158:b23ee177fd68	63
Kojto	158:b23ee177fd68	64	/* Definitions of ADC hardware constraints delays */
Kojto	158:b23ee177fd68	65	/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
Kojto	158:b23ee177fd68	66	/* not timeout values: */
Kojto	158:b23ee177fd68	67	/* Timeout values for ADC operations are dependent to device clock */
Kojto	158:b23ee177fd68	68	/* configuration (system clock versus ADC clock), */
Kojto	158:b23ee177fd68	69	/* and therefore must be defined in user application. */
Kojto	158:b23ee177fd68	70	/* Refer to @ref ADC_LL_EC_HW_DELAYS for description of ADC timeout */
Kojto	158:b23ee177fd68	71	/* values definition. */
Kojto	158:b23ee177fd68	72	/* Note: ADC timeout values are defined here in CPU cycles to be independent */
Kojto	158:b23ee177fd68	73	/* of device clock setting. */
Kojto	158:b23ee177fd68	74	/* In user application, ADC timeout values should be defined with */
Kojto	158:b23ee177fd68	75	/* temporal values, in function of device clock settings. */
Kojto	158:b23ee177fd68	76	/* Highest ratio CPU clock frequency vs ADC clock frequency: */
Kojto	158:b23ee177fd68	77	/* - ADC clock from synchronous clock with AHB prescaler 512, */
Kojto	158:b23ee177fd68	78	/* APB prescaler 16, ADC prescaler 4. */
Kojto	158:b23ee177fd68	79	/* - ADC clock from asynchronous clock (HSI) with prescaler 1, */
Kojto	158:b23ee177fd68	80	/* with highest ratio CPU clock frequency vs HSI clock frequency: */
Kojto	158:b23ee177fd68	81	/* CPU clock frequency max 32MHz, HSI frequency 16MHz: ratio 2. */
Kojto	158:b23ee177fd68	82	/* Unit: CPU cycles. */
Kojto	158:b23ee177fd68	83	#define ADC_CLOCK_RATIO_VS_CPU_HIGHEST ((uint32_t) 512U * 16U * 4U)
Kojto	158:b23ee177fd68	84	#define ADC_TIMEOUT_DISABLE_CPU_CYCLES (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1U)
Kojto	158:b23ee177fd68	85	#define ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1U)
Kojto	158:b23ee177fd68	86
Kojto	158:b23ee177fd68	87	/**
Kojto	158:b23ee177fd68	88	* @}
Kojto	158:b23ee177fd68	89	*/
Kojto	158:b23ee177fd68	90
Kojto	158:b23ee177fd68	91	/* Private macros ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	92
Kojto	158:b23ee177fd68	93	/** @addtogroup ADC_LL_Private_Macros
Kojto	158:b23ee177fd68	94	* @{
Kojto	158:b23ee177fd68	95	*/
Kojto	158:b23ee177fd68	96
Kojto	158:b23ee177fd68	97	/* Check of parameters for configuration of ADC hierarchical scope: */
Kojto	158:b23ee177fd68	98	/* common to several ADC instances. */
Kojto	158:b23ee177fd68	99	#define IS_LL_ADC_COMMON_CLOCK(__CLOCK__) \
Kojto	158:b23ee177fd68	100	( ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV1) \
Kojto	158:b23ee177fd68	101	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV2) \
Kojto	158:b23ee177fd68	102	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV4) \
Kojto	158:b23ee177fd68	103	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV6) \
Kojto	158:b23ee177fd68	104	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV8) \
Kojto	158:b23ee177fd68	105	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV10) \
Kojto	158:b23ee177fd68	106	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV12) \
Kojto	158:b23ee177fd68	107	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV16) \
Kojto	158:b23ee177fd68	108	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV32) \
Kojto	158:b23ee177fd68	109	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV64) \
Kojto	158:b23ee177fd68	110	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV128) \
Kojto	158:b23ee177fd68	111	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV256) \
Kojto	158:b23ee177fd68	112	)
Kojto	158:b23ee177fd68	113
Kojto	158:b23ee177fd68	114	#define IS_LL_ADC_CLOCK_FREQ_MODE(__CLOCK_FREQ_MODE__) \
Kojto	158:b23ee177fd68	115	( ((__CLOCK_FREQ_MODE__) == LL_ADC_CLOCK_FREQ_MODE_HIGH) \
Kojto	158:b23ee177fd68	116	\|\| ((__CLOCK_FREQ_MODE__) == LL_ADC_CLOCK_FREQ_MODE_LOW) \
Kojto	158:b23ee177fd68	117	)
Kojto	158:b23ee177fd68	118
Kojto	158:b23ee177fd68	119	/* Check of parameters for configuration of ADC hierarchical scope: */
Kojto	158:b23ee177fd68	120	/* ADC instance. */
Kojto	158:b23ee177fd68	121	#define IS_LL_ADC_CLOCK(__CLOCK__) \
Kojto	158:b23ee177fd68	122	( ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV4) \
Kojto	158:b23ee177fd68	123	\|\| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV2) \
Kojto	158:b23ee177fd68	124	\|\| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV1) \
Kojto	158:b23ee177fd68	125	\|\| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC) \
Kojto	158:b23ee177fd68	126	)
Kojto	158:b23ee177fd68	127
Kojto	158:b23ee177fd68	128	#define IS_LL_ADC_RESOLUTION(__RESOLUTION__) \
Kojto	158:b23ee177fd68	129	( ((__RESOLUTION__) == LL_ADC_RESOLUTION_12B) \
Kojto	158:b23ee177fd68	130	\|\| ((__RESOLUTION__) == LL_ADC_RESOLUTION_10B) \
Kojto	158:b23ee177fd68	131	\|\| ((__RESOLUTION__) == LL_ADC_RESOLUTION_8B) \
Kojto	158:b23ee177fd68	132	\|\| ((__RESOLUTION__) == LL_ADC_RESOLUTION_6B) \
Kojto	158:b23ee177fd68	133	)
Kojto	158:b23ee177fd68	134
Kojto	158:b23ee177fd68	135	#define IS_LL_ADC_DATA_ALIGN(__DATA_ALIGN__) \
Kojto	158:b23ee177fd68	136	( ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_RIGHT) \
Kojto	158:b23ee177fd68	137	\|\| ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_LEFT) \
Kojto	158:b23ee177fd68	138	)
Kojto	158:b23ee177fd68	139
Kojto	158:b23ee177fd68	140	#define IS_LL_ADC_LOW_POWER(__LOW_POWER__) \
Kojto	158:b23ee177fd68	141	( ((__LOW_POWER__) == LL_ADC_LP_MODE_NONE) \
Kojto	158:b23ee177fd68	142	\|\| ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT) \
Kojto	158:b23ee177fd68	143	\|\| ((__LOW_POWER__) == LL_ADC_LP_AUTOPOWEROFF) \
Kojto	158:b23ee177fd68	144	\|\| ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF) \
Kojto	158:b23ee177fd68	145	)
Kojto	158:b23ee177fd68	146
Kojto	158:b23ee177fd68	147	/* Check of parameters for configuration of ADC hierarchical scope: */
Kojto	158:b23ee177fd68	148	/* ADC group regular */
Kojto	158:b23ee177fd68	149	#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__) \
Kojto	158:b23ee177fd68	150	( ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE) \
Kojto	158:b23ee177fd68	151	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM6_TRGO) \
Kojto	158:b23ee177fd68	152	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM21_CH2) \
Kojto	158:b23ee177fd68	153	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO) \
Kojto	158:b23ee177fd68	154	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH4) \
Kojto	158:b23ee177fd68	155	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM22_TRGO) \
Kojto	158:b23ee177fd68	156	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH3) \
Kojto	158:b23ee177fd68	157	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO) \
Kojto	158:b23ee177fd68	158	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11) \
Kojto	158:b23ee177fd68	159	)
Kojto	158:b23ee177fd68	160
Kojto	158:b23ee177fd68	161	#define IS_LL_ADC_REG_CONTINUOUS_MODE(__REG_CONTINUOUS_MODE__) \
Kojto	158:b23ee177fd68	162	( ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_SINGLE) \
Kojto	158:b23ee177fd68	163	\|\| ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_CONTINUOUS) \
Kojto	158:b23ee177fd68	164	)
Kojto	158:b23ee177fd68	165
Kojto	158:b23ee177fd68	166	#define IS_LL_ADC_REG_DMA_TRANSFER(__REG_DMA_TRANSFER__) \
Kojto	158:b23ee177fd68	167	( ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_NONE) \
Kojto	158:b23ee177fd68	168	\|\| ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_LIMITED) \
Kojto	158:b23ee177fd68	169	\|\| ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_UNLIMITED) \
Kojto	158:b23ee177fd68	170	)
Kojto	158:b23ee177fd68	171
Kojto	158:b23ee177fd68	172	#define IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(__REG_OVR_DATA_BEHAVIOR__) \
Kojto	158:b23ee177fd68	173	( ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_PRESERVED) \
Kojto	158:b23ee177fd68	174	\|\| ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_OVERWRITTEN) \
Kojto	158:b23ee177fd68	175	)
Kojto	158:b23ee177fd68	176
Kojto	158:b23ee177fd68	177	#define IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(__REG_SEQ_DISCONT_MODE__) \
Kojto	158:b23ee177fd68	178	( ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_DISABLE) \
Kojto	158:b23ee177fd68	179	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_1RANK) \
Kojto	158:b23ee177fd68	180	)
Kojto	158:b23ee177fd68	181
Kojto	158:b23ee177fd68	182	/**
Kojto	158:b23ee177fd68	183	* @}
Kojto	158:b23ee177fd68	184	*/
Kojto	158:b23ee177fd68	185
Kojto	158:b23ee177fd68	186
Kojto	158:b23ee177fd68	187	/* Private function prototypes -----------------------------------------------*/
Kojto	158:b23ee177fd68	188
Kojto	158:b23ee177fd68	189	/* Exported functions --------------------------------------------------------*/
Kojto	158:b23ee177fd68	190	/** @addtogroup ADC_LL_Exported_Functions
Kojto	158:b23ee177fd68	191	* @{
Kojto	158:b23ee177fd68	192	*/
Kojto	158:b23ee177fd68	193
Kojto	158:b23ee177fd68	194	/** @addtogroup ADC_LL_EF_Init
Kojto	158:b23ee177fd68	195	* @{
Kojto	158:b23ee177fd68	196	*/
Kojto	158:b23ee177fd68	197
Kojto	158:b23ee177fd68	198	/**
Kojto	158:b23ee177fd68	199	* @brief De-initialize registers of all ADC instances belonging to
Kojto	158:b23ee177fd68	200	* the same ADC common instance to their default reset values.
Kojto	158:b23ee177fd68	201	* @note This function is performing a hard reset, using high level
Kojto	158:b23ee177fd68	202	* clock source RCC ADC reset.
Kojto	158:b23ee177fd68	203	* @param ADCxy_COMMON ADC common instance
Kojto	158:b23ee177fd68	204	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
Kojto	158:b23ee177fd68	205	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	206	* - SUCCESS: ADC common registers are de-initialized
Kojto	158:b23ee177fd68	207	* - ERROR: not applicable
Kojto	158:b23ee177fd68	208	*/
Kojto	158:b23ee177fd68	209	ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON)
Kojto	158:b23ee177fd68	210	{
Kojto	158:b23ee177fd68	211	/* Check the parameters */
Kojto	158:b23ee177fd68	212	assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
Kojto	158:b23ee177fd68	213
Kojto	158:b23ee177fd68	214	/* Force reset of ADC clock (core clock) */
Kojto	158:b23ee177fd68	215	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_ADC1);
Anna Bridge	186:707f6e361f3e	216
Kojto	158:b23ee177fd68	217	/* Release reset of ADC clock (core clock) */
Kojto	158:b23ee177fd68	218	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_ADC1);
Kojto	158:b23ee177fd68	219
Kojto	158:b23ee177fd68	220	return SUCCESS;
Kojto	158:b23ee177fd68	221	}
Kojto	158:b23ee177fd68	222
Kojto	158:b23ee177fd68	223	/**
Kojto	158:b23ee177fd68	224	* @brief Initialize some features of ADC common parameters
Kojto	158:b23ee177fd68	225	* (all ADC instances belonging to the same ADC common instance)
Kojto	158:b23ee177fd68	226	* and multimode (for devices with several ADC instances available).
Kojto	158:b23ee177fd68	227	* @note The setting of ADC common parameters is conditioned to
Kojto	158:b23ee177fd68	228	* ADC instances state:
Kojto	158:b23ee177fd68	229	* All ADC instances belonging to the same ADC common instance
Kojto	158:b23ee177fd68	230	* must be disabled.
Kojto	158:b23ee177fd68	231	* @param ADCxy_COMMON ADC common instance
Kojto	158:b23ee177fd68	232	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
Kojto	158:b23ee177fd68	233	* @param ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
Kojto	158:b23ee177fd68	234	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	235	* - SUCCESS: ADC common registers are initialized
Kojto	158:b23ee177fd68	236	* - ERROR: ADC common registers are not initialized
Kojto	158:b23ee177fd68	237	*/
Kojto	158:b23ee177fd68	238	ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef ADCxy_COMMON, LL_ADC_CommonInitTypeDef ADC_CommonInitStruct)
Kojto	158:b23ee177fd68	239	{
Kojto	158:b23ee177fd68	240	ErrorStatus status = SUCCESS;
Kojto	158:b23ee177fd68	241
Kojto	158:b23ee177fd68	242	/* Check the parameters */
Kojto	158:b23ee177fd68	243	assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
Kojto	158:b23ee177fd68	244	assert_param(IS_LL_ADC_COMMON_CLOCK(ADC_CommonInitStruct->CommonClock));
Kojto	158:b23ee177fd68	245
Kojto	158:b23ee177fd68	246	/* Note: Hardware constraint (refer to description of functions */
Kojto	158:b23ee177fd68	247	/* "LL_ADC_SetCommonXXX()": */
Kojto	158:b23ee177fd68	248	/* On this STM32 serie, setting of these features is conditioned to */
Kojto	158:b23ee177fd68	249	/* ADC state: */
Kojto	158:b23ee177fd68	250	/* All ADC instances of the ADC common group must be disabled. */
Kojto	158:b23ee177fd68	251	if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(ADCxy_COMMON) == 0U)
Kojto	158:b23ee177fd68	252	{
Kojto	158:b23ee177fd68	253	/* Configuration of ADC hierarchical scope: */
Kojto	158:b23ee177fd68	254	/* - common to several ADC */
Kojto	158:b23ee177fd68	255	/* (all ADC instances belonging to the same ADC common instance) */
Kojto	158:b23ee177fd68	256	/* - Set ADC clock (conversion clock) */
Kojto	158:b23ee177fd68	257	LL_ADC_SetCommonClock(ADCxy_COMMON, ADC_CommonInitStruct->CommonClock);
Kojto	158:b23ee177fd68	258	}
Kojto	158:b23ee177fd68	259	else
Kojto	158:b23ee177fd68	260	{
Kojto	158:b23ee177fd68	261	/* Initialization error: One or several ADC instances belonging to */
Kojto	158:b23ee177fd68	262	/* the same ADC common instance are not disabled. */
Kojto	158:b23ee177fd68	263	status = ERROR;
Kojto	158:b23ee177fd68	264	}
Kojto	158:b23ee177fd68	265
Kojto	158:b23ee177fd68	266	return status;
Kojto	158:b23ee177fd68	267	}
Kojto	158:b23ee177fd68	268
Kojto	158:b23ee177fd68	269	/**
Kojto	158:b23ee177fd68	270	* @brief Set each @ref LL_ADC_CommonInitTypeDef field to default value.
Kojto	158:b23ee177fd68	271	* @param ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
Kojto	158:b23ee177fd68	272	* whose fields will be set to default values.
Kojto	158:b23ee177fd68	273	* @retval None
Kojto	158:b23ee177fd68	274	*/
Kojto	158:b23ee177fd68	275	void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
Kojto	158:b23ee177fd68	276	{
Kojto	158:b23ee177fd68	277	/* Set ADC_CommonInitStruct fields to default values */
Kojto	158:b23ee177fd68	278	/* Set fields of ADC common */
Kojto	158:b23ee177fd68	279	/* (all ADC instances belonging to the same ADC common instance) */
Kojto	158:b23ee177fd68	280	ADC_CommonInitStruct->CommonClock = LL_ADC_CLOCK_ASYNC_DIV2;
Kojto	158:b23ee177fd68	281
Kojto	158:b23ee177fd68	282	}
Kojto	158:b23ee177fd68	283
Kojto	158:b23ee177fd68	284	/**
Kojto	158:b23ee177fd68	285	* @brief De-initialize registers of the selected ADC instance
Kojto	158:b23ee177fd68	286	* to their default reset values.
Kojto	158:b23ee177fd68	287	* @note To reset all ADC instances quickly (perform a hard reset),
Kojto	158:b23ee177fd68	288	* use function @ref LL_ADC_CommonDeInit().
Kojto	158:b23ee177fd68	289	* @note If this functions returns error status, it means that ADC instance
Kojto	158:b23ee177fd68	290	* is in an unknown state.
Kojto	158:b23ee177fd68	291	* In this case, perform a hard reset using high level
Kojto	158:b23ee177fd68	292	* clock source RCC ADC reset.
Kojto	158:b23ee177fd68	293	* Refer to function @ref LL_ADC_CommonDeInit().
Kojto	158:b23ee177fd68	294	* @param ADCx ADC instance
Kojto	158:b23ee177fd68	295	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	296	* - SUCCESS: ADC registers are de-initialized
Kojto	158:b23ee177fd68	297	* - ERROR: ADC registers are not de-initialized
Kojto	158:b23ee177fd68	298	*/
Kojto	158:b23ee177fd68	299	ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
Kojto	158:b23ee177fd68	300	{
Kojto	158:b23ee177fd68	301	ErrorStatus status = SUCCESS;
Kojto	158:b23ee177fd68	302
Kojto	158:b23ee177fd68	303	__IO uint32_t timeout_cpu_cycles = 0U;
Kojto	158:b23ee177fd68	304
Kojto	158:b23ee177fd68	305	/* Check the parameters */
Kojto	158:b23ee177fd68	306	assert_param(IS_ADC_ALL_INSTANCE(ADCx));
Kojto	158:b23ee177fd68	307
Kojto	158:b23ee177fd68	308	/* Disable ADC instance if not already disabled. */
Kojto	158:b23ee177fd68	309	if(LL_ADC_IsEnabled(ADCx) == 1U)
Kojto	158:b23ee177fd68	310	{
Kojto	158:b23ee177fd68	311	/* Set ADC group regular trigger source to SW start to ensure to not */
Kojto	158:b23ee177fd68	312	/* have an external trigger event occurring during the conversion stop */
Kojto	158:b23ee177fd68	313	/* ADC disable process. */
Kojto	158:b23ee177fd68	314	LL_ADC_REG_SetTriggerSource(ADCx, LL_ADC_REG_TRIG_SOFTWARE);
Kojto	158:b23ee177fd68	315
Kojto	158:b23ee177fd68	316	/* Stop potential ADC conversion on going on ADC group regular. */
Kojto	158:b23ee177fd68	317	if(LL_ADC_REG_IsConversionOngoing(ADCx) != 0U)
Kojto	158:b23ee177fd68	318	{
Kojto	158:b23ee177fd68	319	if(LL_ADC_REG_IsStopConversionOngoing(ADCx) == 0U)
Kojto	158:b23ee177fd68	320	{
Kojto	158:b23ee177fd68	321	LL_ADC_REG_StopConversion(ADCx);
Kojto	158:b23ee177fd68	322	}
Kojto	158:b23ee177fd68	323	}
Kojto	158:b23ee177fd68	324
Kojto	158:b23ee177fd68	325	/* Wait for ADC conversions are effectively stopped */
Kojto	158:b23ee177fd68	326	timeout_cpu_cycles = ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES;
Kojto	158:b23ee177fd68	327	while (LL_ADC_REG_IsStopConversionOngoing(ADCx) == 1U)
Kojto	158:b23ee177fd68	328	{
Kojto	158:b23ee177fd68	329	if(timeout_cpu_cycles-- == 0U)
Kojto	158:b23ee177fd68	330	{
Kojto	158:b23ee177fd68	331	/* Time-out error */
Kojto	158:b23ee177fd68	332	status = ERROR;
Kojto	158:b23ee177fd68	333	}
Kojto	158:b23ee177fd68	334	}
Kojto	158:b23ee177fd68	335
Kojto	158:b23ee177fd68	336	/* Disable the ADC instance */
Kojto	158:b23ee177fd68	337	LL_ADC_Disable(ADCx);
Kojto	158:b23ee177fd68	338
Kojto	158:b23ee177fd68	339	/* Wait for ADC instance is effectively disabled */
Kojto	158:b23ee177fd68	340	timeout_cpu_cycles = ADC_TIMEOUT_DISABLE_CPU_CYCLES;
Kojto	158:b23ee177fd68	341	while (LL_ADC_IsDisableOngoing(ADCx) == 1U)
Kojto	158:b23ee177fd68	342	{
Kojto	158:b23ee177fd68	343	if(timeout_cpu_cycles-- == 0U)
Kojto	158:b23ee177fd68	344	{
Kojto	158:b23ee177fd68	345	/* Time-out error */
Kojto	158:b23ee177fd68	346	status = ERROR;
Kojto	158:b23ee177fd68	347	}
Kojto	158:b23ee177fd68	348	}
Kojto	158:b23ee177fd68	349	}
Kojto	158:b23ee177fd68	350
Kojto	158:b23ee177fd68	351	/* Check whether ADC state is compliant with expected state */
Kojto	158:b23ee177fd68	352	if(READ_BIT(ADCx->CR,
Kojto	158:b23ee177fd68	353	( ADC_CR_ADSTP \| ADC_CR_ADSTART
Kojto	158:b23ee177fd68	354	\| ADC_CR_ADDIS \| ADC_CR_ADEN )
Kojto	158:b23ee177fd68	355	)
Kojto	158:b23ee177fd68	356	== 0U)
Kojto	158:b23ee177fd68	357	{
Kojto	158:b23ee177fd68	358	/* ========== Reset ADC registers ========== */
Kojto	158:b23ee177fd68	359	/* Reset register IER */
Kojto	158:b23ee177fd68	360	CLEAR_BIT(ADCx->IER,
Kojto	158:b23ee177fd68	361	( LL_ADC_IT_ADRDY
Kojto	158:b23ee177fd68	362	\| LL_ADC_IT_EOC
Kojto	158:b23ee177fd68	363	\| LL_ADC_IT_EOS
Kojto	158:b23ee177fd68	364	\| LL_ADC_IT_OVR
Kojto	158:b23ee177fd68	365	\| LL_ADC_IT_EOSMP
Kojto	158:b23ee177fd68	366	\| LL_ADC_IT_AWD1 )
Kojto	158:b23ee177fd68	367	);
Kojto	158:b23ee177fd68	368
Kojto	158:b23ee177fd68	369	/* Reset register ISR */
Kojto	158:b23ee177fd68	370	SET_BIT(ADCx->ISR,
Kojto	158:b23ee177fd68	371	( LL_ADC_FLAG_ADRDY
Kojto	158:b23ee177fd68	372	\| LL_ADC_FLAG_EOC
Kojto	158:b23ee177fd68	373	\| LL_ADC_FLAG_EOS
Kojto	158:b23ee177fd68	374	\| LL_ADC_FLAG_OVR
Kojto	158:b23ee177fd68	375	\| LL_ADC_FLAG_EOSMP
Kojto	158:b23ee177fd68	376	\| LL_ADC_FLAG_AWD1 )
Kojto	158:b23ee177fd68	377	);
Kojto	158:b23ee177fd68	378
Kojto	158:b23ee177fd68	379	/* Reset register CR */
Kojto	158:b23ee177fd68	380	/* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */
Kojto	158:b23ee177fd68	381	/* "read-set": no direct reset applicable. */
Kojto	158:b23ee177fd68	382	CLEAR_BIT(ADCx->CR, ADC_CR_ADVREGEN);
Kojto	158:b23ee177fd68	383
Kojto	158:b23ee177fd68	384	/* Reset register CFGR1 */
Kojto	158:b23ee177fd68	385	CLEAR_BIT(ADCx->CFGR1,
Anna Bridge	186:707f6e361f3e	386	( ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_DISCEN
Anna Bridge	186:707f6e361f3e	387	\| ADC_CFGR1_AUTOFF \| ADC_CFGR1_WAIT \| ADC_CFGR1_CONT \| ADC_CFGR1_OVRMOD
Anna Bridge	186:707f6e361f3e	388	\| ADC_CFGR1_EXTEN \| ADC_CFGR1_EXTSEL \| ADC_CFGR1_ALIGN \| ADC_CFGR1_RES
Anna Bridge	186:707f6e361f3e	389	\| ADC_CFGR1_SCANDIR \| ADC_CFGR1_DMACFG \| ADC_CFGR1_DMAEN )
Kojto	158:b23ee177fd68	390	);
Kojto	158:b23ee177fd68	391
Kojto	158:b23ee177fd68	392	/* Reset register CFGR2 */
Kojto	158:b23ee177fd68	393	/* Note: Update of ADC clock mode is conditioned to ADC state disabled: */
Kojto	158:b23ee177fd68	394	/* already done above. */
Kojto	158:b23ee177fd68	395	CLEAR_BIT(ADCx->CFGR2,
Kojto	158:b23ee177fd68	396	( ADC_CFGR2_CKMODE
Kojto	158:b23ee177fd68	397	\| ADC_CFGR2_TOVS \| ADC_CFGR2_OVSS \| ADC_CFGR2_OVSR
Kojto	158:b23ee177fd68	398	\| ADC_CFGR2_OVSE \| ADC_CFGR2_CKMODE )
Kojto	158:b23ee177fd68	399	);
Kojto	158:b23ee177fd68	400
Kojto	158:b23ee177fd68	401	/* Reset register SMPR */
Kojto	158:b23ee177fd68	402	CLEAR_BIT(ADCx->SMPR, ADC_SMPR_SMP);
Kojto	158:b23ee177fd68	403
Kojto	158:b23ee177fd68	404	/* Reset register TR */
Kojto	158:b23ee177fd68	405	MODIFY_REG(ADCx->TR, ADC_TR_HT \| ADC_TR_LT, ADC_TR_HT);
Kojto	158:b23ee177fd68	406
Kojto	158:b23ee177fd68	407	/* Reset register CHSELR */
Kojto	158:b23ee177fd68	408	#if defined(ADC_CCR_VLCDEN)
Kojto	158:b23ee177fd68	409	CLEAR_BIT(ADCx->CHSELR,
Kojto	158:b23ee177fd68	410	( ADC_CHSELR_CHSEL18 \| ADC_CHSELR_CHSEL17 \| ADC_CHSELR_CHSEL16
Kojto	158:b23ee177fd68	411	\| ADC_CHSELR_CHSEL15 \| ADC_CHSELR_CHSEL14 \| ADC_CHSELR_CHSEL13 \| ADC_CHSELR_CHSEL12
Kojto	158:b23ee177fd68	412	\| ADC_CHSELR_CHSEL11 \| ADC_CHSELR_CHSEL10 \| ADC_CHSELR_CHSEL9 \| ADC_CHSELR_CHSEL8
Kojto	158:b23ee177fd68	413	\| ADC_CHSELR_CHSEL7 \| ADC_CHSELR_CHSEL6 \| ADC_CHSELR_CHSEL5 \| ADC_CHSELR_CHSEL4
Kojto	158:b23ee177fd68	414	\| ADC_CHSELR_CHSEL3 \| ADC_CHSELR_CHSEL2 \| ADC_CHSELR_CHSEL1 \| ADC_CHSELR_CHSEL0 )
Kojto	158:b23ee177fd68	415	);
Kojto	158:b23ee177fd68	416	#else
Kojto	158:b23ee177fd68	417	CLEAR_BIT(ADCx->CHSELR,
Kojto	158:b23ee177fd68	418	( ADC_CHSELR_CHSEL18 \| ADC_CHSELR_CHSEL17
Kojto	158:b23ee177fd68	419	\| ADC_CHSELR_CHSEL15 \| ADC_CHSELR_CHSEL14 \| ADC_CHSELR_CHSEL13 \| ADC_CHSELR_CHSEL12
Kojto	158:b23ee177fd68	420	\| ADC_CHSELR_CHSEL11 \| ADC_CHSELR_CHSEL10 \| ADC_CHSELR_CHSEL9 \| ADC_CHSELR_CHSEL8
Kojto	158:b23ee177fd68	421	\| ADC_CHSELR_CHSEL7 \| ADC_CHSELR_CHSEL6 \| ADC_CHSELR_CHSEL5 \| ADC_CHSELR_CHSEL4
Kojto	158:b23ee177fd68	422	\| ADC_CHSELR_CHSEL3 \| ADC_CHSELR_CHSEL2 \| ADC_CHSELR_CHSEL1 \| ADC_CHSELR_CHSEL0 )
Kojto	158:b23ee177fd68	423	);
Kojto	158:b23ee177fd68	424	#endif
Kojto	158:b23ee177fd68	425
Kojto	158:b23ee177fd68	426	/* Reset register DR */
Kojto	158:b23ee177fd68	427	/* bits in access mode read only, no direct reset applicable */
Kojto	158:b23ee177fd68	428
Kojto	158:b23ee177fd68	429	/* Reset register CALFACT */
Kojto	158:b23ee177fd68	430	CLEAR_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT);
Kojto	158:b23ee177fd68	431
Kojto	158:b23ee177fd68	432	}
Kojto	158:b23ee177fd68	433	else
Kojto	158:b23ee177fd68	434	{
Kojto	158:b23ee177fd68	435	/* ADC instance is in an unknown state */
Kojto	158:b23ee177fd68	436	/* Need to performing a hard reset of ADC instance, using high level */
Kojto	158:b23ee177fd68	437	/* clock source RCC ADC reset. */
Kojto	158:b23ee177fd68	438	/* Caution: On this STM32 serie, if several ADC instances are available */
Kojto	158:b23ee177fd68	439	/* on the selected device, RCC ADC reset will reset */
Kojto	158:b23ee177fd68	440	/* all ADC instances belonging to the common ADC instance. */
Kojto	158:b23ee177fd68	441	status = ERROR;
Kojto	158:b23ee177fd68	442	}
Kojto	158:b23ee177fd68	443
Kojto	158:b23ee177fd68	444	return status;
Kojto	158:b23ee177fd68	445	}
Kojto	158:b23ee177fd68	446
Kojto	158:b23ee177fd68	447	/**
Kojto	158:b23ee177fd68	448	* @brief Initialize some features of ADC instance.
Kojto	158:b23ee177fd68	449	* @note These parameters have an impact on ADC scope: ADC instance.
Kojto	158:b23ee177fd68	450	* Refer to corresponding unitary functions into
Kojto	158:b23ee177fd68	451	* @ref ADC_LL_EF_Configuration_ADC_Instance .
Kojto	158:b23ee177fd68	452	* @note The setting of these parameters by function @ref LL_ADC_Init()
Kojto	158:b23ee177fd68	453	* is conditioned to ADC state:
Kojto	158:b23ee177fd68	454	* ADC instance must be disabled.
Kojto	158:b23ee177fd68	455	* This condition is applied to all ADC features, for efficiency
Kojto	158:b23ee177fd68	456	* and compatibility over all STM32 families. However, the different
Kojto	158:b23ee177fd68	457	* features can be set under different ADC state conditions
Kojto	158:b23ee177fd68	458	* (setting possible with ADC enabled without conversion on going,
Kojto	158:b23ee177fd68	459	* ADC enabled with conversion on going, ...)
Kojto	158:b23ee177fd68	460	* Each feature can be updated afterwards with a unitary function
Kojto	158:b23ee177fd68	461	* and potentially with ADC in a different state than disabled,
Kojto	158:b23ee177fd68	462	* refer to description of each function for setting
Kojto	158:b23ee177fd68	463	* conditioned to ADC state.
Kojto	158:b23ee177fd68	464	* @note After using this function, some other features must be configured
Kojto	158:b23ee177fd68	465	* using LL unitary functions.
Kojto	158:b23ee177fd68	466	* The minimum configuration remaining to be done is:
Kojto	158:b23ee177fd68	467	* - Set ADC group regular sequencer:
Kojto	158:b23ee177fd68	468	* map channel on rank corresponding to channel number.
Kojto	158:b23ee177fd68	469	* Refer to function @ref LL_ADC_REG_SetSequencerChannels();
Kojto	158:b23ee177fd68	470	* - Set ADC channel sampling time
Kojto	158:b23ee177fd68	471	* Refer to function LL_ADC_SetChannelSamplingTime();
Kojto	158:b23ee177fd68	472	* @param ADCx ADC instance
Kojto	158:b23ee177fd68	473	* @param ADC_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
Kojto	158:b23ee177fd68	474	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	475	* - SUCCESS: ADC registers are initialized
Kojto	158:b23ee177fd68	476	* - ERROR: ADC registers are not initialized
Kojto	158:b23ee177fd68	477	*/
Kojto	158:b23ee177fd68	478	ErrorStatus LL_ADC_Init(ADC_TypeDef ADCx, LL_ADC_InitTypeDef ADC_InitStruct)
Kojto	158:b23ee177fd68	479	{
Kojto	158:b23ee177fd68	480	ErrorStatus status = SUCCESS;
Kojto	158:b23ee177fd68	481
Kojto	158:b23ee177fd68	482	/* Check the parameters */
Kojto	158:b23ee177fd68	483	assert_param(IS_ADC_ALL_INSTANCE(ADCx));
Kojto	158:b23ee177fd68	484
Kojto	158:b23ee177fd68	485	assert_param(IS_LL_ADC_CLOCK(ADC_InitStruct->Clock));
Kojto	158:b23ee177fd68	486	assert_param(IS_LL_ADC_RESOLUTION(ADC_InitStruct->Resolution));
Kojto	158:b23ee177fd68	487	assert_param(IS_LL_ADC_DATA_ALIGN(ADC_InitStruct->DataAlignment));
Kojto	158:b23ee177fd68	488	assert_param(IS_LL_ADC_LOW_POWER(ADC_InitStruct->LowPowerMode));
Kojto	158:b23ee177fd68	489
Kojto	158:b23ee177fd68	490	/* Note: Hardware constraint (refer to description of this function): */
Kojto	158:b23ee177fd68	491	/* ADC instance must be disabled. */
Kojto	158:b23ee177fd68	492	if(LL_ADC_IsEnabled(ADCx) == 0U)
Kojto	158:b23ee177fd68	493	{
Kojto	158:b23ee177fd68	494	/* Configuration of ADC hierarchical scope: */
Kojto	158:b23ee177fd68	495	/* - ADC instance */
Kojto	158:b23ee177fd68	496	/* - Set ADC data resolution */
Kojto	158:b23ee177fd68	497	/* - Set ADC conversion data alignment */
Kojto	158:b23ee177fd68	498	/* - Set ADC low power mode */
Kojto	158:b23ee177fd68	499	MODIFY_REG(ADCx->CFGR1,
Kojto	158:b23ee177fd68	500	ADC_CFGR1_RES
Kojto	158:b23ee177fd68	501	\| ADC_CFGR1_ALIGN
Kojto	158:b23ee177fd68	502	\| ADC_CFGR1_WAIT
Kojto	158:b23ee177fd68	503	\| ADC_CFGR1_AUTOFF
Kojto	158:b23ee177fd68	504	,
Kojto	158:b23ee177fd68	505	ADC_InitStruct->Resolution
Kojto	158:b23ee177fd68	506	\| ADC_InitStruct->DataAlignment
Kojto	158:b23ee177fd68	507	\| ADC_InitStruct->LowPowerMode
Kojto	158:b23ee177fd68	508	);
Kojto	158:b23ee177fd68	509
Kojto	158:b23ee177fd68	510	}
Kojto	158:b23ee177fd68	511	else
Kojto	158:b23ee177fd68	512	{
Kojto	158:b23ee177fd68	513	/* Initialization error: ADC instance is not disabled. */
Kojto	158:b23ee177fd68	514	status = ERROR;
Kojto	158:b23ee177fd68	515	}
Kojto	158:b23ee177fd68	516	return status;
Kojto	158:b23ee177fd68	517	}
Kojto	158:b23ee177fd68	518
Kojto	158:b23ee177fd68	519	/**
Kojto	158:b23ee177fd68	520	* @brief Set each @ref LL_ADC_InitTypeDef field to default value.
Kojto	158:b23ee177fd68	521	* @param ADC_InitStruct Pointer to a @ref LL_ADC_InitTypeDef structure
Kojto	158:b23ee177fd68	522	* whose fields will be set to default values.
Kojto	158:b23ee177fd68	523	* @retval None
Kojto	158:b23ee177fd68	524	*/
Kojto	158:b23ee177fd68	525	void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct)
Kojto	158:b23ee177fd68	526	{
Kojto	158:b23ee177fd68	527	/* Set ADC_InitStruct fields to default values */
Kojto	158:b23ee177fd68	528	/* Set fields of ADC instance */
Kojto	158:b23ee177fd68	529	ADC_InitStruct->Clock = LL_ADC_CLOCK_SYNC_PCLK_DIV2;
Kojto	158:b23ee177fd68	530	ADC_InitStruct->Resolution = LL_ADC_RESOLUTION_12B;
Kojto	158:b23ee177fd68	531	ADC_InitStruct->DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
Kojto	158:b23ee177fd68	532	ADC_InitStruct->LowPowerMode = LL_ADC_LP_MODE_NONE;
Kojto	158:b23ee177fd68	533
Kojto	158:b23ee177fd68	534	}
Kojto	158:b23ee177fd68	535
Kojto	158:b23ee177fd68	536	/**
Kojto	158:b23ee177fd68	537	* @brief Initialize some features of ADC group regular.
Kojto	158:b23ee177fd68	538	* @note These parameters have an impact on ADC scope: ADC group regular.
Kojto	158:b23ee177fd68	539	* Refer to corresponding unitary functions into
Kojto	158:b23ee177fd68	540	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
Kojto	158:b23ee177fd68	541	* (functions with prefix "REG").
Kojto	158:b23ee177fd68	542	* @note The setting of these parameters by function @ref LL_ADC_Init()
Kojto	158:b23ee177fd68	543	* is conditioned to ADC state:
Kojto	158:b23ee177fd68	544	* ADC instance must be disabled.
Kojto	158:b23ee177fd68	545	* This condition is applied to all ADC features, for efficiency
Kojto	158:b23ee177fd68	546	* and compatibility over all STM32 families. However, the different
Kojto	158:b23ee177fd68	547	* features can be set under different ADC state conditions
Kojto	158:b23ee177fd68	548	* (setting possible with ADC enabled without conversion on going,
Kojto	158:b23ee177fd68	549	* ADC enabled with conversion on going, ...)
Kojto	158:b23ee177fd68	550	* Each feature can be updated afterwards with a unitary function
Kojto	158:b23ee177fd68	551	* and potentially with ADC in a different state than disabled,
Kojto	158:b23ee177fd68	552	* refer to description of each function for setting
Kojto	158:b23ee177fd68	553	* conditioned to ADC state.
Kojto	158:b23ee177fd68	554	* @note After using this function, other features must be configured
Kojto	158:b23ee177fd68	555	* using LL unitary functions.
Kojto	158:b23ee177fd68	556	* The minimum configuration remaining to be done is:
Kojto	158:b23ee177fd68	557	* - Set ADC group regular sequencer:
Kojto	158:b23ee177fd68	558	* map channel on rank corresponding to channel number.
Kojto	158:b23ee177fd68	559	* Refer to function @ref LL_ADC_REG_SetSequencerChannels();
Kojto	158:b23ee177fd68	560	* - Set ADC channel sampling time
Kojto	158:b23ee177fd68	561	* Refer to function LL_ADC_SetChannelSamplingTime();
Kojto	158:b23ee177fd68	562	* @param ADCx ADC instance
Kojto	158:b23ee177fd68	563	* @param ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
Kojto	158:b23ee177fd68	564	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	565	* - SUCCESS: ADC registers are initialized
Kojto	158:b23ee177fd68	566	* - ERROR: ADC registers are not initialized
Kojto	158:b23ee177fd68	567	*/
Kojto	158:b23ee177fd68	568	ErrorStatus LL_ADC_REG_Init(ADC_TypeDef ADCx, LL_ADC_REG_InitTypeDef ADC_REG_InitStruct)
Kojto	158:b23ee177fd68	569	{
Kojto	158:b23ee177fd68	570	ErrorStatus status = SUCCESS;
Kojto	158:b23ee177fd68	571
Kojto	158:b23ee177fd68	572	/* Check the parameters */
Kojto	158:b23ee177fd68	573	assert_param(IS_ADC_ALL_INSTANCE(ADCx));
Kojto	158:b23ee177fd68	574	assert_param(IS_LL_ADC_REG_TRIG_SOURCE(ADC_REG_InitStruct->TriggerSource));
Kojto	158:b23ee177fd68	575	assert_param(IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(ADC_REG_InitStruct->SequencerDiscont));
Kojto	158:b23ee177fd68	576	assert_param(IS_LL_ADC_REG_CONTINUOUS_MODE(ADC_REG_InitStruct->ContinuousMode));
Kojto	158:b23ee177fd68	577	assert_param(IS_LL_ADC_REG_DMA_TRANSFER(ADC_REG_InitStruct->DMATransfer));
Kojto	158:b23ee177fd68	578	assert_param(IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(ADC_REG_InitStruct->Overrun));
Kojto	158:b23ee177fd68	579
Kojto	158:b23ee177fd68	580	/* Note: Hardware constraint (refer to description of this function): */
Kojto	158:b23ee177fd68	581	/* ADC instance must be disabled. */
Kojto	158:b23ee177fd68	582	if(LL_ADC_IsEnabled(ADCx) == 0U)
Kojto	158:b23ee177fd68	583	{
Kojto	158:b23ee177fd68	584	/* Configuration of ADC hierarchical scope: */
Kojto	158:b23ee177fd68	585	/* - ADC group regular */
Kojto	158:b23ee177fd68	586	/* - Set ADC group regular trigger source */
Kojto	158:b23ee177fd68	587	/* - Set ADC group regular sequencer discontinuous mode */
Kojto	158:b23ee177fd68	588	/* - Set ADC group regular continuous mode */
Kojto	158:b23ee177fd68	589	/* - Set ADC group regular conversion data transfer: no transfer or */
Kojto	158:b23ee177fd68	590	/* transfer by DMA, and DMA requests mode */
Kojto	158:b23ee177fd68	591	/* - Set ADC group regular overrun behavior */
Kojto	158:b23ee177fd68	592	/* Note: On this STM32 serie, ADC trigger edge is set to value 0x0 by */
Kojto	158:b23ee177fd68	593	/* setting of trigger source to SW start. */
Kojto	158:b23ee177fd68	594	MODIFY_REG(ADCx->CFGR1,
Kojto	158:b23ee177fd68	595	ADC_CFGR1_EXTSEL
Kojto	158:b23ee177fd68	596	\| ADC_CFGR1_EXTEN
Kojto	158:b23ee177fd68	597	\| ADC_CFGR1_DISCEN
Kojto	158:b23ee177fd68	598	\| ADC_CFGR1_CONT
Kojto	158:b23ee177fd68	599	\| ADC_CFGR1_DMAEN
Kojto	158:b23ee177fd68	600	\| ADC_CFGR1_DMACFG
Kojto	158:b23ee177fd68	601	\| ADC_CFGR1_OVRMOD
Kojto	158:b23ee177fd68	602	,
Kojto	158:b23ee177fd68	603	ADC_REG_InitStruct->TriggerSource
Kojto	158:b23ee177fd68	604	\| ADC_REG_InitStruct->SequencerDiscont
Kojto	158:b23ee177fd68	605	\| ADC_REG_InitStruct->ContinuousMode
Kojto	158:b23ee177fd68	606	\| ADC_REG_InitStruct->DMATransfer
Kojto	158:b23ee177fd68	607	\| ADC_REG_InitStruct->Overrun
Kojto	158:b23ee177fd68	608	);
Kojto	158:b23ee177fd68	609
Kojto	158:b23ee177fd68	610	}
Kojto	158:b23ee177fd68	611	else
Kojto	158:b23ee177fd68	612	{
Kojto	158:b23ee177fd68	613	/* Initialization error: ADC instance is not disabled. */
Kojto	158:b23ee177fd68	614	status = ERROR;
Kojto	158:b23ee177fd68	615	}
Kojto	158:b23ee177fd68	616	return status;
Kojto	158:b23ee177fd68	617	}
Kojto	158:b23ee177fd68	618
Kojto	158:b23ee177fd68	619	/**
Kojto	158:b23ee177fd68	620	* @brief Set each @ref LL_ADC_REG_InitTypeDef field to default value.
Kojto	158:b23ee177fd68	621	* @param ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
Kojto	158:b23ee177fd68	622	* whose fields will be set to default values.
Kojto	158:b23ee177fd68	623	* @retval None
Kojto	158:b23ee177fd68	624	*/
Kojto	158:b23ee177fd68	625	void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
Kojto	158:b23ee177fd68	626	{
Kojto	158:b23ee177fd68	627	/* Set ADC_REG_InitStruct fields to default values */
Kojto	158:b23ee177fd68	628	/* Set fields of ADC group regular */
Kojto	158:b23ee177fd68	629	/* Note: On this STM32 serie, ADC trigger edge is set to value 0x0 by */
Kojto	158:b23ee177fd68	630	/* setting of trigger source to SW start. */
Kojto	158:b23ee177fd68	631	ADC_REG_InitStruct->TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;
Kojto	158:b23ee177fd68	632	ADC_REG_InitStruct->SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
Kojto	158:b23ee177fd68	633	ADC_REG_InitStruct->ContinuousMode = LL_ADC_REG_CONV_SINGLE;
Kojto	158:b23ee177fd68	634	ADC_REG_InitStruct->DMATransfer = LL_ADC_REG_DMA_TRANSFER_NONE;
Kojto	158:b23ee177fd68	635	ADC_REG_InitStruct->Overrun = LL_ADC_REG_OVR_DATA_OVERWRITTEN;
Kojto	158:b23ee177fd68	636	}
Kojto	158:b23ee177fd68	637
Kojto	158:b23ee177fd68	638	/**
Kojto	158:b23ee177fd68	639	* @}
Kojto	158:b23ee177fd68	640	*/
Kojto	158:b23ee177fd68	641
Kojto	158:b23ee177fd68	642	/**
Kojto	158:b23ee177fd68	643	* @}
Kojto	158:b23ee177fd68	644	*/
Kojto	158:b23ee177fd68	645
Kojto	158:b23ee177fd68	646	/**
Kojto	158:b23ee177fd68	647	* @}
Kojto	158:b23ee177fd68	648	*/
Kojto	158:b23ee177fd68	649
Kojto	158:b23ee177fd68	650	#endif /* ADC1 */
Kojto	158:b23ee177fd68	651
Kojto	158:b23ee177fd68	652	/**
Kojto	158:b23ee177fd68	653	* @}
Kojto	158:b23ee177fd68	654	*/
Kojto	158:b23ee177fd68	655
Kojto	158:b23ee177fd68	656	#endif /* USE_FULL_LL_DRIVER */
Kojto	158:b23ee177fd68	657
Kojto	158:b23ee177fd68	658	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/