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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_smbus.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 186:707f6e361f3e

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	144:ef7eb2e8f9f7	1	/**
<>	144:ef7eb2e8f9f7	2	******************************************************************************
<>	144:ef7eb2e8f9f7	3	* @file stm32l0xx_hal_smbus.h
<>	144:ef7eb2e8f9f7	4	* @author MCD Application Team
<>	144:ef7eb2e8f9f7	5	* @brief Header file of SMBUS HAL module.
<>	144:ef7eb2e8f9f7	6	******************************************************************************
<>	144:ef7eb2e8f9f7	7	* @attention
<>	144:ef7eb2e8f9f7	8	*
<>	144:ef7eb2e8f9f7	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<>	144:ef7eb2e8f9f7	10	*
<>	144:ef7eb2e8f9f7	11	* Redistribution and use in source and binary forms, with or without modification,
<>	144:ef7eb2e8f9f7	12	* are permitted provided that the following conditions are met:
<>	144:ef7eb2e8f9f7	13	* 1. Redistributions of source code must retain the above copyright notice,
<>	144:ef7eb2e8f9f7	14	* this list of conditions and the following disclaimer.
<>	144:ef7eb2e8f9f7	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	144:ef7eb2e8f9f7	16	* this list of conditions and the following disclaimer in the documentation
<>	144:ef7eb2e8f9f7	17	* and/or other materials provided with the distribution.
<>	144:ef7eb2e8f9f7	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	144:ef7eb2e8f9f7	19	* may be used to endorse or promote products derived from this software
<>	144:ef7eb2e8f9f7	20	* without specific prior written permission.
<>	144:ef7eb2e8f9f7	21	*
<>	144:ef7eb2e8f9f7	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	144:ef7eb2e8f9f7	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	144:ef7eb2e8f9f7	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	144:ef7eb2e8f9f7	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	144:ef7eb2e8f9f7	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	144:ef7eb2e8f9f7	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	144:ef7eb2e8f9f7	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	144:ef7eb2e8f9f7	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	144:ef7eb2e8f9f7	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	144:ef7eb2e8f9f7	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	144:ef7eb2e8f9f7	32	*
<>	144:ef7eb2e8f9f7	33	******************************************************************************
Anna Bridge	186:707f6e361f3e	34	*/
<>	144:ef7eb2e8f9f7	35
<>	144:ef7eb2e8f9f7	36	/* Define to prevent recursive inclusion -------------------------------------*/
<>	144:ef7eb2e8f9f7	37	#ifndef __STM32L0xx_HAL_SMBUS_H
<>	144:ef7eb2e8f9f7	38	#define __STM32L0xx_HAL_SMBUS_H
<>	144:ef7eb2e8f9f7	39
<>	144:ef7eb2e8f9f7	40	#ifdef __cplusplus
Anna Bridge	186:707f6e361f3e	41	extern "C" {
<>	144:ef7eb2e8f9f7	42	#endif
<>	144:ef7eb2e8f9f7	43
<>	144:ef7eb2e8f9f7	44	/* Includes ------------------------------------------------------------------*/
Anna Bridge	186:707f6e361f3e	45	#include "stm32l0xx_hal_def.h"
<>	144:ef7eb2e8f9f7	46
<>	144:ef7eb2e8f9f7	47	/** @addtogroup STM32L0xx_HAL_Driver
<>	144:ef7eb2e8f9f7	48	* @{
<>	144:ef7eb2e8f9f7	49	*/
<>	144:ef7eb2e8f9f7	50
Anna Bridge	186:707f6e361f3e	51	/** @addtogroup SMBUS
<>	144:ef7eb2e8f9f7	52	* @{
Anna Bridge	186:707f6e361f3e	53	*/
<>	144:ef7eb2e8f9f7	54
<>	144:ef7eb2e8f9f7	55	/* Exported types ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	56	/** @defgroup SMBUS_Exported_Types SMBUS Exported Types
<>	144:ef7eb2e8f9f7	57	* @{
<>	144:ef7eb2e8f9f7	58	*/
<>	144:ef7eb2e8f9f7	59
Anna Bridge	186:707f6e361f3e	60	/** @defgroup SMBUS_Configuration_Structure_definition SMBUS Configuration Structure definition
Anna Bridge	186:707f6e361f3e	61	* @brief SMBUS Configuration Structure definition
Anna Bridge	186:707f6e361f3e	62	* @{
<>	144:ef7eb2e8f9f7	63	*/
<>	144:ef7eb2e8f9f7	64	typedef struct
<>	144:ef7eb2e8f9f7	65	{
<>	144:ef7eb2e8f9f7	66	uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value.
Anna Bridge	186:707f6e361f3e	67	This parameter calculated by referring to SMBUS initialization
Anna Bridge	186:707f6e361f3e	68	section in Reference manual */
<>	144:ef7eb2e8f9f7	69	uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not.
Anna Bridge	186:707f6e361f3e	70	This parameter can be a value of @ref SMBUS_Analog_Filter */
<>	144:ef7eb2e8f9f7	71
<>	144:ef7eb2e8f9f7	72	uint32_t OwnAddress1; /*!< Specifies the first device own address.
<>	144:ef7eb2e8f9f7	73	This parameter can be a 7-bit or 10-bit address. */
<>	144:ef7eb2e8f9f7	74
<>	144:ef7eb2e8f9f7	75	uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected.
<>	144:ef7eb2e8f9f7	76	This parameter can be a value of @ref SMBUS_addressing_mode */
<>	144:ef7eb2e8f9f7	77
<>	144:ef7eb2e8f9f7	78	uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
<>	144:ef7eb2e8f9f7	79	This parameter can be a value of @ref SMBUS_dual_addressing_mode */
<>	144:ef7eb2e8f9f7	80
<>	144:ef7eb2e8f9f7	81	uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
<>	144:ef7eb2e8f9f7	82	This parameter can be a 7-bit address. */
<>	144:ef7eb2e8f9f7	83
<>	144:ef7eb2e8f9f7	84	uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
Anna Bridge	186:707f6e361f3e	85	This parameter can be a value of @ref SMBUS_own_address2_masks. */
<>	144:ef7eb2e8f9f7	86
<>	144:ef7eb2e8f9f7	87	uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
Anna Bridge	186:707f6e361f3e	88	This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */
<>	144:ef7eb2e8f9f7	89
<>	144:ef7eb2e8f9f7	90	uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
<>	144:ef7eb2e8f9f7	91	This parameter can be a value of @ref SMBUS_nostretch_mode */
<>	144:ef7eb2e8f9f7	92
<>	144:ef7eb2e8f9f7	93	uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected.
<>	144:ef7eb2e8f9f7	94	This parameter can be a value of @ref SMBUS_packet_error_check_mode */
<>	144:ef7eb2e8f9f7	95
<>	144:ef7eb2e8f9f7	96	uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected.
<>	144:ef7eb2e8f9f7	97	This parameter can be a value of @ref SMBUS_peripheral_mode */
<>	144:ef7eb2e8f9f7	98
<>	144:ef7eb2e8f9f7	99	uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value.
Anna Bridge	186:707f6e361f3e	100	(Enable bits and different timeout values)
Anna Bridge	186:707f6e361f3e	101	This parameter calculated by referring to SMBUS initialization
<>	144:ef7eb2e8f9f7	102	section in Reference manual */
<>	144:ef7eb2e8f9f7	103	} SMBUS_InitTypeDef;
Anna Bridge	186:707f6e361f3e	104	/**
Anna Bridge	186:707f6e361f3e	105	* @}
Anna Bridge	186:707f6e361f3e	106	*/
<>	144:ef7eb2e8f9f7	107
Anna Bridge	186:707f6e361f3e	108	/** @defgroup HAL_state_definition HAL state definition
Anna Bridge	186:707f6e361f3e	109	* @brief HAL State definition
<>	144:ef7eb2e8f9f7	110	* @{
Anna Bridge	186:707f6e361f3e	111	*/
Anna Bridge	186:707f6e361f3e	112	#define HAL_SMBUS_STATE_RESET (0x00000000U) /!< SMBUS not yet initialized or disabled /
Anna Bridge	186:707f6e361f3e	113	#define HAL_SMBUS_STATE_READY (0x00000001U) /!< SMBUS initialized and ready for use /
Anna Bridge	186:707f6e361f3e	114	#define HAL_SMBUS_STATE_BUSY (0x00000002U) /!< SMBUS internal process is ongoing /
Anna Bridge	186:707f6e361f3e	115	#define HAL_SMBUS_STATE_MASTER_BUSY_TX (0x00000012U) /!< Master Data Transmission process is ongoing /
Anna Bridge	186:707f6e361f3e	116	#define HAL_SMBUS_STATE_MASTER_BUSY_RX (0x00000022U) /!< Master Data Reception process is ongoing /
Anna Bridge	186:707f6e361f3e	117	#define HAL_SMBUS_STATE_SLAVE_BUSY_TX (0x00000032U) /!< Slave Data Transmission process is ongoing /
Anna Bridge	186:707f6e361f3e	118	#define HAL_SMBUS_STATE_SLAVE_BUSY_RX (0x00000042U) /!< Slave Data Reception process is ongoing /
Anna Bridge	186:707f6e361f3e	119	#define HAL_SMBUS_STATE_TIMEOUT (0x00000003U) /!< Timeout state /
Anna Bridge	186:707f6e361f3e	120	#define HAL_SMBUS_STATE_ERROR (0x00000004U) /!< Reception process is ongoing /
Anna Bridge	186:707f6e361f3e	121	#define HAL_SMBUS_STATE_LISTEN (0x00000008U) /!< Address Listen Mode is ongoing /
Anna Bridge	186:707f6e361f3e	122	/**
<>	144:ef7eb2e8f9f7	123	* @}
<>	144:ef7eb2e8f9f7	124	*/
<>	144:ef7eb2e8f9f7	125
Anna Bridge	186:707f6e361f3e	126	/** @defgroup SMBUS_Error_Code_definition SMBUS Error Code definition
Anna Bridge	186:707f6e361f3e	127	* @brief SMBUS Error Code definition
Anna Bridge	186:707f6e361f3e	128	* @{
Anna Bridge	186:707f6e361f3e	129	*/
Anna Bridge	186:707f6e361f3e	130	#define HAL_SMBUS_ERROR_NONE (0x00000000U) /!< No error /
Anna Bridge	186:707f6e361f3e	131	#define HAL_SMBUS_ERROR_BERR (0x00000001U) /!< BERR error /
Anna Bridge	186:707f6e361f3e	132	#define HAL_SMBUS_ERROR_ARLO (0x00000002U) /!< ARLO error /
Anna Bridge	186:707f6e361f3e	133	#define HAL_SMBUS_ERROR_ACKF (0x00000004U) /!< ACKF error /
Anna Bridge	186:707f6e361f3e	134	#define HAL_SMBUS_ERROR_OVR (0x00000008U) /!< OVR error /
Anna Bridge	186:707f6e361f3e	135	#define HAL_SMBUS_ERROR_HALTIMEOUT (0x00000010U) /!< Timeout error /
Anna Bridge	186:707f6e361f3e	136	#define HAL_SMBUS_ERROR_BUSTIMEOUT (0x00000020U) /!< Bus Timeout error /
Anna Bridge	186:707f6e361f3e	137	#define HAL_SMBUS_ERROR_ALERT (0x00000040U) /!< Alert error /
Anna Bridge	186:707f6e361f3e	138	#define HAL_SMBUS_ERROR_PECERR (0x00000080U) /!< PEC error /
Anna Bridge	186:707f6e361f3e	139	/**
Anna Bridge	186:707f6e361f3e	140	* @}
Anna Bridge	186:707f6e361f3e	141	*/
Anna Bridge	186:707f6e361f3e	142
Anna Bridge	186:707f6e361f3e	143	/** @defgroup SMBUS_handle_Structure_definition SMBUS handle Structure definition
Anna Bridge	186:707f6e361f3e	144	* @brief SMBUS handle Structure definition
Anna Bridge	186:707f6e361f3e	145	* @{
<>	144:ef7eb2e8f9f7	146	*/
<>	144:ef7eb2e8f9f7	147	typedef struct
<>	144:ef7eb2e8f9f7	148	{
Anna Bridge	186:707f6e361f3e	149	I2C_TypeDef Instance; /!< SMBUS registers base address */
Anna Bridge	186:707f6e361f3e	150
Anna Bridge	186:707f6e361f3e	151	SMBUS_InitTypeDef Init; /!< SMBUS communication parameters /
Anna Bridge	186:707f6e361f3e	152
Anna Bridge	186:707f6e361f3e	153	uint8_t pBuffPtr; /!< Pointer to SMBUS transfer buffer */
Anna Bridge	186:707f6e361f3e	154
Anna Bridge	186:707f6e361f3e	155	uint16_t XferSize; /!< SMBUS transfer size /
Anna Bridge	186:707f6e361f3e	156
Anna Bridge	186:707f6e361f3e	157	__IO uint16_t XferCount; /!< SMBUS transfer counter /
Anna Bridge	186:707f6e361f3e	158
Anna Bridge	186:707f6e361f3e	159	__IO uint32_t XferOptions; /!< SMBUS transfer options /
Anna Bridge	186:707f6e361f3e	160
Anna Bridge	186:707f6e361f3e	161	__IO uint32_t PreviousState; /!< SMBUS communication Previous state /
<>	144:ef7eb2e8f9f7	162
Anna Bridge	186:707f6e361f3e	163	HAL_LockTypeDef Lock; /!< SMBUS locking object /
<>	144:ef7eb2e8f9f7	164
Anna Bridge	186:707f6e361f3e	165	__IO uint32_t State; /!< SMBUS communication state /
Anna Bridge	186:707f6e361f3e	166
Anna Bridge	186:707f6e361f3e	167	__IO uint32_t ErrorCode; /!< SMBUS Error code /
<>	144:ef7eb2e8f9f7	168
Anna Bridge	186:707f6e361f3e	169	} SMBUS_HandleTypeDef;
Anna Bridge	186:707f6e361f3e	170	/**
Anna Bridge	186:707f6e361f3e	171	* @}
Anna Bridge	186:707f6e361f3e	172	*/
<>	144:ef7eb2e8f9f7	173
Anna Bridge	186:707f6e361f3e	174	/**
Anna Bridge	186:707f6e361f3e	175	* @}
Anna Bridge	186:707f6e361f3e	176	*/
<>	144:ef7eb2e8f9f7	177	/* Exported constants --------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	178
<>	144:ef7eb2e8f9f7	179	/** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants
<>	144:ef7eb2e8f9f7	180	* @{
<>	144:ef7eb2e8f9f7	181	*/
<>	144:ef7eb2e8f9f7	182
<>	144:ef7eb2e8f9f7	183	/** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter
<>	144:ef7eb2e8f9f7	184	* @{
<>	144:ef7eb2e8f9f7	185	*/
Anna Bridge	186:707f6e361f3e	186	#define SMBUS_ANALOGFILTER_ENABLE (0x00000000U)
Anna Bridge	186:707f6e361f3e	187	#define SMBUS_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
<>	144:ef7eb2e8f9f7	188	/**
<>	144:ef7eb2e8f9f7	189	* @}
<>	144:ef7eb2e8f9f7	190	*/
<>	144:ef7eb2e8f9f7	191
Anna Bridge	186:707f6e361f3e	192	/** @defgroup SMBUS_addressing_mode SMBUS addressing mode
<>	144:ef7eb2e8f9f7	193	* @{
<>	144:ef7eb2e8f9f7	194	*/
Anna Bridge	186:707f6e361f3e	195	#define SMBUS_ADDRESSINGMODE_7BIT (0x00000001U)
Anna Bridge	186:707f6e361f3e	196	#define SMBUS_ADDRESSINGMODE_10BIT (0x00000002U)
<>	144:ef7eb2e8f9f7	197	/**
<>	144:ef7eb2e8f9f7	198	* @}
<>	144:ef7eb2e8f9f7	199	*/
<>	144:ef7eb2e8f9f7	200
Anna Bridge	186:707f6e361f3e	201	/** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode
<>	144:ef7eb2e8f9f7	202	* @{
<>	144:ef7eb2e8f9f7	203	*/
<>	144:ef7eb2e8f9f7	204
Anna Bridge	186:707f6e361f3e	205	#define SMBUS_DUALADDRESS_DISABLE (0x00000000U)
Anna Bridge	186:707f6e361f3e	206	#define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
<>	144:ef7eb2e8f9f7	207	/**
<>	144:ef7eb2e8f9f7	208	* @}
<>	144:ef7eb2e8f9f7	209	*/
<>	144:ef7eb2e8f9f7	210
Anna Bridge	186:707f6e361f3e	211	/** @defgroup SMBUS_own_address2_masks SMBUS ownaddress2 masks
<>	144:ef7eb2e8f9f7	212	* @{
<>	144:ef7eb2e8f9f7	213	*/
<>	144:ef7eb2e8f9f7	214
<>	151:5eaa88a5bcc7	215	#define SMBUS_OA2_NOMASK ((uint8_t)0x00U)
<>	151:5eaa88a5bcc7	216	#define SMBUS_OA2_MASK01 ((uint8_t)0x01U)
<>	151:5eaa88a5bcc7	217	#define SMBUS_OA2_MASK02 ((uint8_t)0x02U)
<>	151:5eaa88a5bcc7	218	#define SMBUS_OA2_MASK03 ((uint8_t)0x03U)
<>	151:5eaa88a5bcc7	219	#define SMBUS_OA2_MASK04 ((uint8_t)0x04U)
<>	151:5eaa88a5bcc7	220	#define SMBUS_OA2_MASK05 ((uint8_t)0x05U)
<>	151:5eaa88a5bcc7	221	#define SMBUS_OA2_MASK06 ((uint8_t)0x06U)
<>	151:5eaa88a5bcc7	222	#define SMBUS_OA2_MASK07 ((uint8_t)0x07U)
<>	144:ef7eb2e8f9f7	223	/**
<>	144:ef7eb2e8f9f7	224	* @}
<>	144:ef7eb2e8f9f7	225	*/
<>	144:ef7eb2e8f9f7	226
<>	144:ef7eb2e8f9f7	227
Anna Bridge	186:707f6e361f3e	228	/** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode
<>	144:ef7eb2e8f9f7	229	* @{
<>	144:ef7eb2e8f9f7	230	*/
Anna Bridge	186:707f6e361f3e	231	#define SMBUS_GENERALCALL_DISABLE (0x00000000U)
Anna Bridge	186:707f6e361f3e	232	#define SMBUS_GENERALCALL_ENABLE I2C_CR1_GCEN
<>	144:ef7eb2e8f9f7	233	/**
<>	144:ef7eb2e8f9f7	234	* @}
<>	144:ef7eb2e8f9f7	235	*/
<>	144:ef7eb2e8f9f7	236
Anna Bridge	186:707f6e361f3e	237	/** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
<>	144:ef7eb2e8f9f7	238	* @{
<>	144:ef7eb2e8f9f7	239	*/
Anna Bridge	186:707f6e361f3e	240	#define SMBUS_NOSTRETCH_DISABLE (0x00000000U)
Anna Bridge	186:707f6e361f3e	241	#define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
<>	144:ef7eb2e8f9f7	242	/**
<>	144:ef7eb2e8f9f7	243	* @}
<>	144:ef7eb2e8f9f7	244	*/
<>	144:ef7eb2e8f9f7	245
Anna Bridge	186:707f6e361f3e	246	/** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode
<>	144:ef7eb2e8f9f7	247	* @{
<>	144:ef7eb2e8f9f7	248	*/
Anna Bridge	186:707f6e361f3e	249	#define SMBUS_PEC_DISABLE (0x00000000U)
<>	144:ef7eb2e8f9f7	250	#define SMBUS_PEC_ENABLE I2C_CR1_PECEN
<>	144:ef7eb2e8f9f7	251	/**
<>	144:ef7eb2e8f9f7	252	* @}
<>	144:ef7eb2e8f9f7	253	*/
<>	144:ef7eb2e8f9f7	254
Anna Bridge	186:707f6e361f3e	255	/** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode
<>	144:ef7eb2e8f9f7	256	* @{
<>	144:ef7eb2e8f9f7	257	*/
Anna Bridge	186:707f6e361f3e	258	#define SMBUS_PERIPHERAL_MODE_SMBUS_HOST I2C_CR1_SMBHEN
Anna Bridge	186:707f6e361f3e	259	#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (0x00000000U)
Anna Bridge	186:707f6e361f3e	260	#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP I2C_CR1_SMBDEN
<>	144:ef7eb2e8f9f7	261	/**
<>	144:ef7eb2e8f9f7	262	* @}
<>	144:ef7eb2e8f9f7	263	*/
<>	144:ef7eb2e8f9f7	264
Anna Bridge	186:707f6e361f3e	265	/** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition
<>	144:ef7eb2e8f9f7	266	* @{
<>	144:ef7eb2e8f9f7	267	*/
<>	144:ef7eb2e8f9f7	268
Anna Bridge	186:707f6e361f3e	269	#define SMBUS_SOFTEND_MODE (0x00000000U)
<>	144:ef7eb2e8f9f7	270	#define SMBUS_RELOAD_MODE I2C_CR2_RELOAD
<>	144:ef7eb2e8f9f7	271	#define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND
<>	144:ef7eb2e8f9f7	272	#define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE
Anna Bridge	186:707f6e361f3e	273	/**
Anna Bridge	186:707f6e361f3e	274	* @}
Anna Bridge	186:707f6e361f3e	275	*/
<>	144:ef7eb2e8f9f7	276
Anna Bridge	186:707f6e361f3e	277	/** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition
Anna Bridge	186:707f6e361f3e	278	* @{
Anna Bridge	186:707f6e361f3e	279	*/
<>	144:ef7eb2e8f9f7	280
Anna Bridge	186:707f6e361f3e	281	#define SMBUS_NO_STARTSTOP (0x00000000U)
Anna Bridge	186:707f6e361f3e	282	#define SMBUS_GENERATE_STOP (uint32_t)(0x80000000U \| I2C_CR2_STOP)
Anna Bridge	186:707f6e361f3e	283	#define SMBUS_GENERATE_START_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN)
Anna Bridge	186:707f6e361f3e	284	#define SMBUS_GENERATE_START_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START)
<>	144:ef7eb2e8f9f7	285	/**
<>	144:ef7eb2e8f9f7	286	* @}
<>	144:ef7eb2e8f9f7	287	*/
<>	144:ef7eb2e8f9f7	288
Anna Bridge	186:707f6e361f3e	289	/** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition
<>	144:ef7eb2e8f9f7	290	* @{
<>	144:ef7eb2e8f9f7	291	*/
<>	144:ef7eb2e8f9f7	292
Anna Bridge	186:707f6e361f3e	293	/* List of XferOptions in usage of :
Anna Bridge	186:707f6e361f3e	294	* 1- Restart condition when direction change
Anna Bridge	186:707f6e361f3e	295	* 2- No Restart condition in other use cases
Anna Bridge	186:707f6e361f3e	296	*/
Anna Bridge	186:707f6e361f3e	297	#define SMBUS_FIRST_FRAME SMBUS_SOFTEND_MODE
Anna Bridge	186:707f6e361f3e	298	#define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE \| SMBUS_SOFTEND_MODE))
Anna Bridge	186:707f6e361f3e	299	#define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE
Anna Bridge	186:707f6e361f3e	300	#define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE
Anna Bridge	186:707f6e361f3e	301	#define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE \| SMBUS_SENDPEC_MODE))
Anna Bridge	186:707f6e361f3e	302	#define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE \| SMBUS_SENDPEC_MODE))
Anna Bridge	186:707f6e361f3e	303
Anna Bridge	186:707f6e361f3e	304	/* List of XferOptions in usage of :
Anna Bridge	186:707f6e361f3e	305	* 1- Restart condition in all use cases (direction change or not)
Anna Bridge	186:707f6e361f3e	306	*/
Anna Bridge	186:707f6e361f3e	307	#define SMBUS_OTHER_FRAME_NO_PEC (0x000000AAU)
Anna Bridge	186:707f6e361f3e	308	#define SMBUS_OTHER_FRAME_WITH_PEC (0x0000AA00U)
Anna Bridge	186:707f6e361f3e	309	#define SMBUS_OTHER_AND_LAST_FRAME_NO_PEC (0x00AA0000U)
Anna Bridge	186:707f6e361f3e	310	#define SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC (0xAA000000U)
<>	144:ef7eb2e8f9f7	311	/**
<>	144:ef7eb2e8f9f7	312	* @}
<>	144:ef7eb2e8f9f7	313	*/
<>	144:ef7eb2e8f9f7	314
Anna Bridge	186:707f6e361f3e	315	/** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition
<>	144:ef7eb2e8f9f7	316	* @brief SMBUS Interrupt definition
<>	144:ef7eb2e8f9f7	317	* Elements values convention: 0xXXXXXXXX
<>	144:ef7eb2e8f9f7	318	* - XXXXXXXX : Interrupt control mask
<>	144:ef7eb2e8f9f7	319	* @{
<>	144:ef7eb2e8f9f7	320	*/
Anna Bridge	186:707f6e361f3e	321	#define SMBUS_IT_ERRI I2C_CR1_ERRIE
Anna Bridge	186:707f6e361f3e	322	#define SMBUS_IT_TCI I2C_CR1_TCIE
Anna Bridge	186:707f6e361f3e	323	#define SMBUS_IT_STOPI I2C_CR1_STOPIE
Anna Bridge	186:707f6e361f3e	324	#define SMBUS_IT_NACKI I2C_CR1_NACKIE
Anna Bridge	186:707f6e361f3e	325	#define SMBUS_IT_ADDRI I2C_CR1_ADDRIE
Anna Bridge	186:707f6e361f3e	326	#define SMBUS_IT_RXI I2C_CR1_RXIE
Anna Bridge	186:707f6e361f3e	327	#define SMBUS_IT_TXI I2C_CR1_TXIE
Anna Bridge	186:707f6e361f3e	328	#define SMBUS_IT_TX (SMBUS_IT_ERRI \| SMBUS_IT_TCI \| SMBUS_IT_STOPI \| SMBUS_IT_NACKI \| SMBUS_IT_TXI)
Anna Bridge	186:707f6e361f3e	329	#define SMBUS_IT_RX (SMBUS_IT_ERRI \| SMBUS_IT_TCI \| SMBUS_IT_NACKI \| SMBUS_IT_RXI)
Anna Bridge	186:707f6e361f3e	330	#define SMBUS_IT_ALERT (SMBUS_IT_ERRI)
Anna Bridge	186:707f6e361f3e	331	#define SMBUS_IT_ADDR (SMBUS_IT_ADDRI \| SMBUS_IT_STOPI \| SMBUS_IT_NACKI)
<>	144:ef7eb2e8f9f7	332	/**
<>	144:ef7eb2e8f9f7	333	* @}
<>	144:ef7eb2e8f9f7	334	*/
<>	144:ef7eb2e8f9f7	335
Anna Bridge	186:707f6e361f3e	336	/** @defgroup SMBUS_Flag_definition SMBUS Flag definition
<>	144:ef7eb2e8f9f7	337	* @brief Flag definition
<>	144:ef7eb2e8f9f7	338	* Elements values convention: 0xXXXXYYYY
<>	144:ef7eb2e8f9f7	339	* - XXXXXXXX : Flag mask
<>	144:ef7eb2e8f9f7	340	* @{
Anna Bridge	186:707f6e361f3e	341	*/
<>	144:ef7eb2e8f9f7	342
Anna Bridge	186:707f6e361f3e	343	#define SMBUS_FLAG_TXE I2C_ISR_TXE
Anna Bridge	186:707f6e361f3e	344	#define SMBUS_FLAG_TXIS I2C_ISR_TXIS
Anna Bridge	186:707f6e361f3e	345	#define SMBUS_FLAG_RXNE I2C_ISR_RXNE
Anna Bridge	186:707f6e361f3e	346	#define SMBUS_FLAG_ADDR I2C_ISR_ADDR
Anna Bridge	186:707f6e361f3e	347	#define SMBUS_FLAG_AF I2C_ISR_NACKF
Anna Bridge	186:707f6e361f3e	348	#define SMBUS_FLAG_STOPF I2C_ISR_STOPF
Anna Bridge	186:707f6e361f3e	349	#define SMBUS_FLAG_TC I2C_ISR_TC
Anna Bridge	186:707f6e361f3e	350	#define SMBUS_FLAG_TCR I2C_ISR_TCR
Anna Bridge	186:707f6e361f3e	351	#define SMBUS_FLAG_BERR I2C_ISR_BERR
Anna Bridge	186:707f6e361f3e	352	#define SMBUS_FLAG_ARLO I2C_ISR_ARLO
Anna Bridge	186:707f6e361f3e	353	#define SMBUS_FLAG_OVR I2C_ISR_OVR
Anna Bridge	186:707f6e361f3e	354	#define SMBUS_FLAG_PECERR I2C_ISR_PECERR
Anna Bridge	186:707f6e361f3e	355	#define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT
Anna Bridge	186:707f6e361f3e	356	#define SMBUS_FLAG_ALERT I2C_ISR_ALERT
Anna Bridge	186:707f6e361f3e	357	#define SMBUS_FLAG_BUSY I2C_ISR_BUSY
Anna Bridge	186:707f6e361f3e	358	#define SMBUS_FLAG_DIR I2C_ISR_DIR
<>	144:ef7eb2e8f9f7	359	/**
<>	144:ef7eb2e8f9f7	360	* @}
<>	144:ef7eb2e8f9f7	361	*/
<>	144:ef7eb2e8f9f7	362
<>	144:ef7eb2e8f9f7	363	/**
<>	144:ef7eb2e8f9f7	364	* @}
<>	144:ef7eb2e8f9f7	365	*/
<>	144:ef7eb2e8f9f7	366
Anna Bridge	186:707f6e361f3e	367	/* Exported macros ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	368	/** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros
<>	144:ef7eb2e8f9f7	369	* @{
<>	144:ef7eb2e8f9f7	370	*/
<>	144:ef7eb2e8f9f7	371
Anna Bridge	186:707f6e361f3e	372	/** @brief Reset SMBUS handle state.
Anna Bridge	186:707f6e361f3e	373	* @param __HANDLE__ specifies the SMBUS Handle.
<>	144:ef7eb2e8f9f7	374	* @retval None
<>	144:ef7eb2e8f9f7	375	*/
<>	144:ef7eb2e8f9f7	376	#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
<>	144:ef7eb2e8f9f7	377
Anna Bridge	186:707f6e361f3e	378	/** @brief Enable the specified SMBUS interrupts.
Anna Bridge	186:707f6e361f3e	379	* @param __HANDLE__ specifies the SMBUS Handle.
Anna Bridge	186:707f6e361f3e	380	* @param __INTERRUPT__ specifies the interrupt source to enable.
<>	144:ef7eb2e8f9f7	381	* This parameter can be one of the following values:
Anna Bridge	186:707f6e361f3e	382	* @arg @ref SMBUS_IT_ERRI Errors interrupt enable
Anna Bridge	186:707f6e361f3e	383	* @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable
Anna Bridge	186:707f6e361f3e	384	* @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
Anna Bridge	186:707f6e361f3e	385	* @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
Anna Bridge	186:707f6e361f3e	386	* @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
Anna Bridge	186:707f6e361f3e	387	* @arg @ref SMBUS_IT_RXI RX interrupt enable
Anna Bridge	186:707f6e361f3e	388	* @arg @ref SMBUS_IT_TXI TX interrupt enable
Anna Bridge	186:707f6e361f3e	389	*
<>	144:ef7eb2e8f9f7	390	* @retval None
<>	144:ef7eb2e8f9f7	391	*/
<>	144:ef7eb2e8f9f7	392	#define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 \|= (__INTERRUPT__))
Anna Bridge	186:707f6e361f3e	393
Anna Bridge	186:707f6e361f3e	394	/** @brief Disable the specified SMBUS interrupts.
Anna Bridge	186:707f6e361f3e	395	* @param __HANDLE__ specifies the SMBUS Handle.
Anna Bridge	186:707f6e361f3e	396	* @param __INTERRUPT__ specifies the interrupt source to disable.
Anna Bridge	186:707f6e361f3e	397	* This parameter can be one of the following values:
Anna Bridge	186:707f6e361f3e	398	* @arg @ref SMBUS_IT_ERRI Errors interrupt enable
Anna Bridge	186:707f6e361f3e	399	* @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable
Anna Bridge	186:707f6e361f3e	400	* @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
Anna Bridge	186:707f6e361f3e	401	* @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
Anna Bridge	186:707f6e361f3e	402	* @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
Anna Bridge	186:707f6e361f3e	403	* @arg @ref SMBUS_IT_RXI RX interrupt enable
Anna Bridge	186:707f6e361f3e	404	* @arg @ref SMBUS_IT_TXI TX interrupt enable
Anna Bridge	186:707f6e361f3e	405	*
Anna Bridge	186:707f6e361f3e	406	* @retval None
Anna Bridge	186:707f6e361f3e	407	*/
<>	144:ef7eb2e8f9f7	408	#define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
Anna Bridge	186:707f6e361f3e	409
Anna Bridge	186:707f6e361f3e	410	/** @brief Check whether the specified SMBUS interrupt source is enabled or not.
Anna Bridge	186:707f6e361f3e	411	* @param __HANDLE__ specifies the SMBUS Handle.
Anna Bridge	186:707f6e361f3e	412	* @param __INTERRUPT__ specifies the SMBUS interrupt source to check.
<>	144:ef7eb2e8f9f7	413	* This parameter can be one of the following values:
Anna Bridge	186:707f6e361f3e	414	* @arg @ref SMBUS_IT_ERRI Errors interrupt enable
Anna Bridge	186:707f6e361f3e	415	* @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable
Anna Bridge	186:707f6e361f3e	416	* @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
Anna Bridge	186:707f6e361f3e	417	* @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
Anna Bridge	186:707f6e361f3e	418	* @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
Anna Bridge	186:707f6e361f3e	419	* @arg @ref SMBUS_IT_RXI RX interrupt enable
Anna Bridge	186:707f6e361f3e	420	* @arg @ref SMBUS_IT_TXI TX interrupt enable
Anna Bridge	186:707f6e361f3e	421	*
<>	144:ef7eb2e8f9f7	422	* @retval The new state of __IT__ (TRUE or FALSE).
<>	144:ef7eb2e8f9f7	423	*/
<>	144:ef7eb2e8f9f7	424	#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
<>	144:ef7eb2e8f9f7	425
Anna Bridge	186:707f6e361f3e	426	/** @brief Check whether the specified SMBUS flag is set or not.
Anna Bridge	186:707f6e361f3e	427	* @param __HANDLE__ specifies the SMBUS Handle.
Anna Bridge	186:707f6e361f3e	428	* @param __FLAG__ specifies the flag to check.
<>	144:ef7eb2e8f9f7	429	* This parameter can be one of the following values:
Anna Bridge	186:707f6e361f3e	430	* @arg @ref SMBUS_FLAG_TXE Transmit data register empty
Anna Bridge	186:707f6e361f3e	431	* @arg @ref SMBUS_FLAG_TXIS Transmit interrupt status
Anna Bridge	186:707f6e361f3e	432	* @arg @ref SMBUS_FLAG_RXNE Receive data register not empty
Anna Bridge	186:707f6e361f3e	433	* @arg @ref SMBUS_FLAG_ADDR Address matched (slave mode)
Anna Bridge	186:707f6e361f3e	434	* @arg @ref SMBUS_FLAG_AF NACK received flag
Anna Bridge	186:707f6e361f3e	435	* @arg @ref SMBUS_FLAG_STOPF STOP detection flag
Anna Bridge	186:707f6e361f3e	436	* @arg @ref SMBUS_FLAG_TC Transfer complete (master mode)
Anna Bridge	186:707f6e361f3e	437	* @arg @ref SMBUS_FLAG_TCR Transfer complete reload
Anna Bridge	186:707f6e361f3e	438	* @arg @ref SMBUS_FLAG_BERR Bus error
Anna Bridge	186:707f6e361f3e	439	* @arg @ref SMBUS_FLAG_ARLO Arbitration lost
Anna Bridge	186:707f6e361f3e	440	* @arg @ref SMBUS_FLAG_OVR Overrun/Underrun
Anna Bridge	186:707f6e361f3e	441	* @arg @ref SMBUS_FLAG_PECERR PEC error in reception
Anna Bridge	186:707f6e361f3e	442	* @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag
Anna Bridge	186:707f6e361f3e	443	* @arg @ref SMBUS_FLAG_ALERT SMBus alert
Anna Bridge	186:707f6e361f3e	444	* @arg @ref SMBUS_FLAG_BUSY Bus busy
Anna Bridge	186:707f6e361f3e	445	* @arg @ref SMBUS_FLAG_DIR Transfer direction (slave mode)
Anna Bridge	186:707f6e361f3e	446	*
<>	144:ef7eb2e8f9f7	447	* @retval The new state of __FLAG__ (TRUE or FALSE).
<>	144:ef7eb2e8f9f7	448	*/
Anna Bridge	186:707f6e361f3e	449	#define SMBUS_FLAG_MASK (0x0001FFFFU)
<>	144:ef7eb2e8f9f7	450	#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
Anna Bridge	186:707f6e361f3e	451
Anna Bridge	186:707f6e361f3e	452	/** @brief Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit.
Anna Bridge	186:707f6e361f3e	453	* @param __HANDLE__ specifies the SMBUS Handle.
Anna Bridge	186:707f6e361f3e	454	* @param __FLAG__ specifies the flag to clear.
<>	144:ef7eb2e8f9f7	455	* This parameter can be any combination of the following values:
Anna Bridge	186:707f6e361f3e	456	* @arg @ref SMBUS_FLAG_ADDR Address matched (slave mode)
Anna Bridge	186:707f6e361f3e	457	* @arg @ref SMBUS_FLAG_AF NACK received flag
Anna Bridge	186:707f6e361f3e	458	* @arg @ref SMBUS_FLAG_STOPF STOP detection flag
Anna Bridge	186:707f6e361f3e	459	* @arg @ref SMBUS_FLAG_BERR Bus error
Anna Bridge	186:707f6e361f3e	460	* @arg @ref SMBUS_FLAG_ARLO Arbitration lost
Anna Bridge	186:707f6e361f3e	461	* @arg @ref SMBUS_FLAG_OVR Overrun/Underrun
Anna Bridge	186:707f6e361f3e	462	* @arg @ref SMBUS_FLAG_PECERR PEC error in reception
Anna Bridge	186:707f6e361f3e	463	* @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag
Anna Bridge	186:707f6e361f3e	464	* @arg @ref SMBUS_FLAG_ALERT SMBus alert
Anna Bridge	186:707f6e361f3e	465	*
<>	144:ef7eb2e8f9f7	466	* @retval None
<>	144:ef7eb2e8f9f7	467	*/
Anna Bridge	186:707f6e361f3e	468	#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
<>	144:ef7eb2e8f9f7	469
Anna Bridge	186:707f6e361f3e	470	/** @brief Enable the specified SMBUS peripheral.
Anna Bridge	186:707f6e361f3e	471	* @param __HANDLE__ specifies the SMBUS Handle.
Anna Bridge	186:707f6e361f3e	472	* @retval None
Anna Bridge	186:707f6e361f3e	473	*/
Anna Bridge	186:707f6e361f3e	474	#define __HAL_SMBUS_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
<>	144:ef7eb2e8f9f7	475
Anna Bridge	186:707f6e361f3e	476	/** @brief Disable the specified SMBUS peripheral.
Anna Bridge	186:707f6e361f3e	477	* @param __HANDLE__ specifies the SMBUS Handle.
Anna Bridge	186:707f6e361f3e	478	* @retval None
Anna Bridge	186:707f6e361f3e	479	*/
Anna Bridge	186:707f6e361f3e	480	#define __HAL_SMBUS_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
<>	144:ef7eb2e8f9f7	481
Anna Bridge	186:707f6e361f3e	482	/** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode.
Anna Bridge	186:707f6e361f3e	483	* @param __HANDLE__ specifies the SMBUS Handle.
Anna Bridge	186:707f6e361f3e	484	* @retval None
Anna Bridge	186:707f6e361f3e	485	*/
Anna Bridge	186:707f6e361f3e	486	#define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
<>	144:ef7eb2e8f9f7	487
<>	144:ef7eb2e8f9f7	488	/**
<>	144:ef7eb2e8f9f7	489	* @}
Anna Bridge	186:707f6e361f3e	490	*/
<>	144:ef7eb2e8f9f7	491
<>	144:ef7eb2e8f9f7	492
Anna Bridge	186:707f6e361f3e	493	/* Private constants ---------------------------------------------------------*/
Anna Bridge	186:707f6e361f3e	494
Anna Bridge	186:707f6e361f3e	495	/* Private macros ------------------------------------------------------------*/
Anna Bridge	186:707f6e361f3e	496	/** @defgroup SMBUS_Private_Macro SMBUS Private Macros
<>	144:ef7eb2e8f9f7	497	* @{
<>	144:ef7eb2e8f9f7	498	*/
<>	144:ef7eb2e8f9f7	499
Anna Bridge	186:707f6e361f3e	500	#define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) \|\| \
Anna Bridge	186:707f6e361f3e	501	((FILTER) == SMBUS_ANALOGFILTER_DISABLE))
Anna Bridge	186:707f6e361f3e	502
Anna Bridge	186:707f6e361f3e	503	#define IS_SMBUS_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
Anna Bridge	186:707f6e361f3e	504
Anna Bridge	186:707f6e361f3e	505	#define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) \|\| \
Anna Bridge	186:707f6e361f3e	506	((MODE) == SMBUS_ADDRESSINGMODE_10BIT))
Anna Bridge	186:707f6e361f3e	507
Anna Bridge	186:707f6e361f3e	508	#define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) \|\| \
Anna Bridge	186:707f6e361f3e	509	((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))
Anna Bridge	186:707f6e361f3e	510
Anna Bridge	186:707f6e361f3e	511	#define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) \|\| \
Anna Bridge	186:707f6e361f3e	512	((MASK) == SMBUS_OA2_MASK01) \|\| \
Anna Bridge	186:707f6e361f3e	513	((MASK) == SMBUS_OA2_MASK02) \|\| \
Anna Bridge	186:707f6e361f3e	514	((MASK) == SMBUS_OA2_MASK03) \|\| \
Anna Bridge	186:707f6e361f3e	515	((MASK) == SMBUS_OA2_MASK04) \|\| \
Anna Bridge	186:707f6e361f3e	516	((MASK) == SMBUS_OA2_MASK05) \|\| \
Anna Bridge	186:707f6e361f3e	517	((MASK) == SMBUS_OA2_MASK06) \|\| \
Anna Bridge	186:707f6e361f3e	518	((MASK) == SMBUS_OA2_MASK07))
Anna Bridge	186:707f6e361f3e	519
Anna Bridge	186:707f6e361f3e	520	#define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) \|\| \
Anna Bridge	186:707f6e361f3e	521	((CALL) == SMBUS_GENERALCALL_ENABLE))
Anna Bridge	186:707f6e361f3e	522
Anna Bridge	186:707f6e361f3e	523	#define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) \|\| \
Anna Bridge	186:707f6e361f3e	524	((STRETCH) == SMBUS_NOSTRETCH_ENABLE))
Anna Bridge	186:707f6e361f3e	525
Anna Bridge	186:707f6e361f3e	526	#define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) \|\| \
Anna Bridge	186:707f6e361f3e	527	((PEC) == SMBUS_PEC_ENABLE))
Anna Bridge	186:707f6e361f3e	528
Anna Bridge	186:707f6e361f3e	529	#define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) \|\| \
Anna Bridge	186:707f6e361f3e	530	((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) \|\| \
Anna Bridge	186:707f6e361f3e	531	((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
Anna Bridge	186:707f6e361f3e	532
Anna Bridge	186:707f6e361f3e	533	#define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) \|\| \
Anna Bridge	186:707f6e361f3e	534	((MODE) == SMBUS_AUTOEND_MODE) \|\| \
Anna Bridge	186:707f6e361f3e	535	((MODE) == SMBUS_SOFTEND_MODE) \|\| \
Anna Bridge	186:707f6e361f3e	536	((MODE) == SMBUS_SENDPEC_MODE) \|\| \
Anna Bridge	186:707f6e361f3e	537	((MODE) == (SMBUS_RELOAD_MODE \| SMBUS_SENDPEC_MODE)) \|\| \
Anna Bridge	186:707f6e361f3e	538	((MODE) == (SMBUS_AUTOEND_MODE \| SMBUS_SENDPEC_MODE)) \|\| \
Anna Bridge	186:707f6e361f3e	539	((MODE) == (SMBUS_AUTOEND_MODE \| SMBUS_RELOAD_MODE)) \|\| \
Anna Bridge	186:707f6e361f3e	540	((MODE) == (SMBUS_AUTOEND_MODE \| SMBUS_SENDPEC_MODE \| SMBUS_RELOAD_MODE )))
Anna Bridge	186:707f6e361f3e	541
Anna Bridge	186:707f6e361f3e	542
Anna Bridge	186:707f6e361f3e	543	#define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) \|\| \
Anna Bridge	186:707f6e361f3e	544	((REQUEST) == SMBUS_GENERATE_START_READ) \|\| \
Anna Bridge	186:707f6e361f3e	545	((REQUEST) == SMBUS_GENERATE_START_WRITE) \|\| \
Anna Bridge	186:707f6e361f3e	546	((REQUEST) == SMBUS_NO_STARTSTOP))
Anna Bridge	186:707f6e361f3e	547
Anna Bridge	186:707f6e361f3e	548
Anna Bridge	186:707f6e361f3e	549	#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) \|\| \
Anna Bridge	186:707f6e361f3e	550	((REQUEST) == SMBUS_NEXT_FRAME) \|\| \
Anna Bridge	186:707f6e361f3e	551	((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) \|\| \
Anna Bridge	186:707f6e361f3e	552	((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) \|\| \
Anna Bridge	186:707f6e361f3e	553	((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) \|\| \
Anna Bridge	186:707f6e361f3e	554	((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC) \|\| \
Anna Bridge	186:707f6e361f3e	555	IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
Anna Bridge	186:707f6e361f3e	556
Anna Bridge	186:707f6e361f3e	557	#define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC) \|\| \
Anna Bridge	186:707f6e361f3e	558	((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC) \|\| \
Anna Bridge	186:707f6e361f3e	559	((REQUEST) == SMBUS_OTHER_FRAME_WITH_PEC) \|\| \
Anna Bridge	186:707f6e361f3e	560	((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC))
Anna Bridge	186:707f6e361f3e	561
Anna Bridge	186:707f6e361f3e	562	#define SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN \| I2C_CR1_PECEN)))
Anna Bridge	186:707f6e361f3e	563	#define SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD \| I2C_CR2_HEAD10R \| I2C_CR2_NBYTES \| I2C_CR2_RELOAD \| I2C_CR2_RD_WRN)))
Anna Bridge	186:707f6e361f3e	564
Anna Bridge	186:707f6e361f3e	565	#define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) \| (I2C_CR2_START) \| (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
Anna Bridge	186:707f6e361f3e	566	(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) \| (I2C_CR2_ADD10) \| (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
Anna Bridge	186:707f6e361f3e	567
Anna Bridge	186:707f6e361f3e	568	#define SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17U)
Anna Bridge	186:707f6e361f3e	569	#define SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
Anna Bridge	186:707f6e361f3e	570	#define SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
Anna Bridge	186:707f6e361f3e	571	#define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE)
Anna Bridge	186:707f6e361f3e	572	#define SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN)
Anna Bridge	186:707f6e361f3e	573
Anna Bridge	186:707f6e361f3e	574	#define SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR)
Anna Bridge	186:707f6e361f3e	575	#define SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
Anna Bridge	186:707f6e361f3e	576
Anna Bridge	186:707f6e361f3e	577	#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
Anna Bridge	186:707f6e361f3e	578	#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
Anna Bridge	186:707f6e361f3e	579
<>	144:ef7eb2e8f9f7	580	/**
<>	144:ef7eb2e8f9f7	581	* @}
Anna Bridge	186:707f6e361f3e	582	*/
Anna Bridge	186:707f6e361f3e	583
Anna Bridge	186:707f6e361f3e	584	/* Exported functions --------------------------------------------------------*/
Anna Bridge	186:707f6e361f3e	585	/** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions
<>	144:ef7eb2e8f9f7	586	* @{
<>	144:ef7eb2e8f9f7	587	*/
Anna Bridge	186:707f6e361f3e	588
Anna Bridge	186:707f6e361f3e	589	/** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
Anna Bridge	186:707f6e361f3e	590	* @{
Anna Bridge	186:707f6e361f3e	591	*/
Anna Bridge	186:707f6e361f3e	592
Anna Bridge	186:707f6e361f3e	593	/* Initialization and de-initialization functions **********************************/
Anna Bridge	186:707f6e361f3e	594	HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	595	HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	596	void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	597	void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	598	HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);
Anna Bridge	186:707f6e361f3e	599	HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);
<>	144:ef7eb2e8f9f7	600
Anna Bridge	186:707f6e361f3e	601	/**
Anna Bridge	186:707f6e361f3e	602	* @}
Anna Bridge	186:707f6e361f3e	603	*/
Anna Bridge	186:707f6e361f3e	604
Anna Bridge	186:707f6e361f3e	605	/** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
Anna Bridge	186:707f6e361f3e	606	* @{
Anna Bridge	186:707f6e361f3e	607	*/
Anna Bridge	186:707f6e361f3e	608
Anna Bridge	186:707f6e361f3e	609	/* IO operation functions *****************************************************/
Anna Bridge	186:707f6e361f3e	610	/** @addtogroup Blocking_mode_Polling Blocking mode Polling
Anna Bridge	186:707f6e361f3e	611	* @{
Anna Bridge	186:707f6e361f3e	612	*/
<>	144:ef7eb2e8f9f7	613	/******* Blocking mode: Polling */
<>	144:ef7eb2e8f9f7	614	HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
Anna Bridge	186:707f6e361f3e	615	/**
Anna Bridge	186:707f6e361f3e	616	* @}
Anna Bridge	186:707f6e361f3e	617	*/
<>	144:ef7eb2e8f9f7	618
Anna Bridge	186:707f6e361f3e	619	/** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt
Anna Bridge	186:707f6e361f3e	620	* @{
Anna Bridge	186:707f6e361f3e	621	*/
<>	144:ef7eb2e8f9f7	622	/******* Non-Blocking mode: Interrupt */
<>	144:ef7eb2e8f9f7	623	HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef hsmbus, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
<>	144:ef7eb2e8f9f7	624	HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef hsmbus, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
<>	144:ef7eb2e8f9f7	625	HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
<>	144:ef7eb2e8f9f7	626	HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef hsmbus, uint8_t pData, uint16_t Size, uint32_t XferOptions);
<>	144:ef7eb2e8f9f7	627	HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef hsmbus, uint8_t pData, uint16_t Size, uint32_t XferOptions);
<>	144:ef7eb2e8f9f7	628
Anna Bridge	186:707f6e361f3e	629	HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	630	HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	631	HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	632	HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	633	/**
Anna Bridge	186:707f6e361f3e	634	* @}
Anna Bridge	186:707f6e361f3e	635	*/
Anna Bridge	186:707f6e361f3e	636
Anna Bridge	186:707f6e361f3e	637	/** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
Anna Bridge	186:707f6e361f3e	638	* @{
Anna Bridge	186:707f6e361f3e	639	*/
<>	144:ef7eb2e8f9f7	640	/******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
<>	144:ef7eb2e8f9f7	641	void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	642	void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	643	void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	644	void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	645	void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	646	void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	647	void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
<>	144:ef7eb2e8f9f7	648	void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
Anna Bridge	186:707f6e361f3e	649	void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	650
<>	144:ef7eb2e8f9f7	651	/**
<>	144:ef7eb2e8f9f7	652	* @}
<>	144:ef7eb2e8f9f7	653	*/
<>	144:ef7eb2e8f9f7	654
Anna Bridge	186:707f6e361f3e	655	/** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
Anna Bridge	186:707f6e361f3e	656	* @{
Anna Bridge	186:707f6e361f3e	657	*/
Anna Bridge	186:707f6e361f3e	658
Anna Bridge	186:707f6e361f3e	659	/* Peripheral State and Errors functions **************************************************/
<>	144:ef7eb2e8f9f7	660	uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	661	uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
<>	144:ef7eb2e8f9f7	662
<>	144:ef7eb2e8f9f7	663	/**
<>	144:ef7eb2e8f9f7	664	* @}
<>	144:ef7eb2e8f9f7	665	*/
<>	144:ef7eb2e8f9f7	666
<>	144:ef7eb2e8f9f7	667	/**
<>	144:ef7eb2e8f9f7	668	* @}
<>	144:ef7eb2e8f9f7	669	*/
Anna Bridge	186:707f6e361f3e	670
Anna Bridge	186:707f6e361f3e	671	/* Private Functions ---------------------------------------------------------*/
Anna Bridge	186:707f6e361f3e	672	/** @defgroup SMBUS_Private_Functions SMBUS Private Functions
Anna Bridge	186:707f6e361f3e	673	* @{
Anna Bridge	186:707f6e361f3e	674	*/
Anna Bridge	186:707f6e361f3e	675	/* Private functions are defined in stm32l0xx_hal_smbus.c file */
Anna Bridge	186:707f6e361f3e	676	/**
Anna Bridge	186:707f6e361f3e	677	* @}
Anna Bridge	186:707f6e361f3e	678	*/
Anna Bridge	186:707f6e361f3e	679
Anna Bridge	186:707f6e361f3e	680	/**
Anna Bridge	186:707f6e361f3e	681	* @}
Anna Bridge	186:707f6e361f3e	682	*/
Anna Bridge	186:707f6e361f3e	683
Anna Bridge	186:707f6e361f3e	684	/**
Anna Bridge	186:707f6e361f3e	685	* @}
Anna Bridge	186:707f6e361f3e	686	*/
Anna Bridge	186:707f6e361f3e	687
Anna Bridge	186:707f6e361f3e	688	/**
Anna Bridge	186:707f6e361f3e	689	* @}
Anna Bridge	186:707f6e361f3e	690	*/
Anna Bridge	186:707f6e361f3e	691
<>	144:ef7eb2e8f9f7	692	#ifdef __cplusplus
<>	144:ef7eb2e8f9f7	693	}
<>	144:ef7eb2e8f9f7	694	#endif
<>	144:ef7eb2e8f9f7	695
<>	144:ef7eb2e8f9f7	696
<>	144:ef7eb2e8f9f7	697	#endif /* __STM32L0xx_HAL_SMBUS_H */
<>	144:ef7eb2e8f9f7	698
<>	144:ef7eb2e8f9f7	699	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/