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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_rtc_ex.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
186:707f6e361f3e 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_rtc_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Extended RTC HAL module driver.
<> 144:ef7eb2e8f9f7 6 *
<> 144:ef7eb2e8f9f7 7 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 8 * functionalities of the Real Time Clock (RTC) Extended peripheral:
<> 144:ef7eb2e8f9f7 9 * + RTC Time Stamp functions
<> 144:ef7eb2e8f9f7 10 * + RTC Tamper functions
<> 144:ef7eb2e8f9f7 11 * + RTC Wake-up functions
<> 144:ef7eb2e8f9f7 12 * + Extended Control functions
<> 144:ef7eb2e8f9f7 13 * + Extended RTC features functions
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 @verbatim
<> 144:ef7eb2e8f9f7 16 ==============================================================================
<> 144:ef7eb2e8f9f7 17 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 18 ==============================================================================
<> 144:ef7eb2e8f9f7 19 [..]
<> 144:ef7eb2e8f9f7 20 (+) Enable the RTC domain access.
<> 144:ef7eb2e8f9f7 21 (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
<> 144:ef7eb2e8f9f7 22 format using the HAL_RTC_Init() function.
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 *** RTC Wakeup configuration ***
<> 144:ef7eb2e8f9f7 25 ================================
<> 144:ef7eb2e8f9f7 26 [..]
<> 144:ef7eb2e8f9f7 27 (+) To configure the RTC Wakeup Clock source and Counter use the HAL_RTCEx_SetWakeUpTimer()
<> 144:ef7eb2e8f9f7 28 function. You can also configure the RTC Wakeup timer with interrupt mode
<> 144:ef7eb2e8f9f7 29 using the HAL_RTCEx_SetWakeUpTimer_IT() function.
<> 144:ef7eb2e8f9f7 30 (+) To read the RTC WakeUp Counter register, use the HAL_RTCEx_GetWakeUpTimer()
<> 144:ef7eb2e8f9f7 31 function.
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 *** Outputs configuration ***
<> 144:ef7eb2e8f9f7 34 =============================
<> 144:ef7eb2e8f9f7 35 [..] The RTC has 2 different outputs:
<> 144:ef7eb2e8f9f7 36 (+) RTC_ALARM: this output is used to manage the RTC Alarm A, Alarm B
<> 144:ef7eb2e8f9f7 37 and WaKeUp signals.
<> 144:ef7eb2e8f9f7 38 To output the selected RTC signal, use the HAL_RTC_Init() function.
<> 144:ef7eb2e8f9f7 39 (+) RTC_CALIB: this output is 512Hz signal or 1Hz.
<> 144:ef7eb2e8f9f7 40 To enable the RTC_CALIB, use the HAL_RTCEx_SetCalibrationOutPut() function.
<> 144:ef7eb2e8f9f7 41 (+) Two pins can be used as RTC_ALARM or RTC_CALIB (PC13, PB14) for STM32L05x/6x/7x/8x
<> 144:ef7eb2e8f9f7 42 and (PA2, PB14) for STM32L03x/4x managed on the RTC_OR register.
<> 144:ef7eb2e8f9f7 43 (+) When the RTC_CALIB or RTC_ALARM output is selected, the RTC_OUT pin is
<> 144:ef7eb2e8f9f7 44 automatically configured in output alternate function.
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 *** Smooth digital Calibration configuration ***
<> 144:ef7eb2e8f9f7 47 ================================================
<> 144:ef7eb2e8f9f7 48 [..]
<> 144:ef7eb2e8f9f7 49 (+) Configure the RTC Original Digital Calibration Value and the corresponding
<> 144:ef7eb2e8f9f7 50 calibration cycle period (32s,16s and 8s) using the HAL_RTCEx_SetSmoothCalib()
<> 144:ef7eb2e8f9f7 51 function.
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 *** TimeStamp configuration ***
<> 144:ef7eb2e8f9f7 54 ===============================
<> 144:ef7eb2e8f9f7 55 [..]
<> 144:ef7eb2e8f9f7 56 (+) Configure the RTC_AF trigger and enable the RTC TimeStamp using the
<> 144:ef7eb2e8f9f7 57 HAL_RTCEx_SetTimeStamp() function. You can also configure the RTC TimeStamp with
<> 144:ef7eb2e8f9f7 58 interrupt mode using the HAL_RTCEx_SetTimeStamp_IT() function.
<> 144:ef7eb2e8f9f7 59 (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp()
<> 144:ef7eb2e8f9f7 60 function.
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 *** Tamper configuration ***
<> 144:ef7eb2e8f9f7 63 ============================
<> 144:ef7eb2e8f9f7 64 [..]
<> 144:ef7eb2e8f9f7 65 (+) Enable the RTC Tamper and configure the Tamper filter count, trigger Edge
<> 144:ef7eb2e8f9f7 66 or Level according to the Tamper filter (if equal to 0 Edge else Level)
<> 144:ef7eb2e8f9f7 67 value, sampling frequency, NoErase, MaskFlag, precharge or discharge and
<> 144:ef7eb2e8f9f7 68 Pull-UP using the HAL_RTCEx_SetTamper() function. You can configure RTC Tamper
<> 144:ef7eb2e8f9f7 69 with interrupt mode using HAL_RTCEx_SetTamper_IT() function.
<> 144:ef7eb2e8f9f7 70 (+) The default configuration of the Tamper erases the backup registers. To avoid
<> 144:ef7eb2e8f9f7 71 erase, enable the NoErase field on the RTC_TAMPCR register.
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 *** Backup Data Registers configuration ***
<> 144:ef7eb2e8f9f7 74 ===========================================
<> 144:ef7eb2e8f9f7 75 [..]
<> 144:ef7eb2e8f9f7 76 (+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite()
<> 144:ef7eb2e8f9f7 77 function.
<> 144:ef7eb2e8f9f7 78 (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead()
<> 144:ef7eb2e8f9f7 79 function.
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 @endverbatim
<> 144:ef7eb2e8f9f7 82 ******************************************************************************
<> 144:ef7eb2e8f9f7 83 * @attention
<> 144:ef7eb2e8f9f7 84 *
<> 144:ef7eb2e8f9f7 85 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 86 *
<> 144:ef7eb2e8f9f7 87 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 88 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 89 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 90 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 91 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 92 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 93 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 94 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 95 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 96 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 97 *
<> 144:ef7eb2e8f9f7 98 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 99 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 100 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 101 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 102 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 103 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 104 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 105 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 106 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 107 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 108 *
<> 144:ef7eb2e8f9f7 109 ******************************************************************************
<> 144:ef7eb2e8f9f7 110 */
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 113 #include "stm32l0xx_hal.h"
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 116 * @{
<> 144:ef7eb2e8f9f7 117 */
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /** @addtogroup RTCEx
<> 144:ef7eb2e8f9f7 120 * @brief RTC Extended HAL module driver
<> 144:ef7eb2e8f9f7 121 * @{
<> 144:ef7eb2e8f9f7 122 */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 #ifdef HAL_RTC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 127 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 128 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 129 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 130 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 131 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /** @addtogroup RTCEx_Exported_Functions
<> 144:ef7eb2e8f9f7 134 * @{
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /** @addtogroup RTCEx_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 139 * @brief RTC TimeStamp and Tamper functions
<> 144:ef7eb2e8f9f7 140 *
<> 144:ef7eb2e8f9f7 141 @verbatim
<> 144:ef7eb2e8f9f7 142 ===============================================================================
<> 144:ef7eb2e8f9f7 143 ##### RTC TimeStamp and Tamper functions #####
<> 144:ef7eb2e8f9f7 144 ===============================================================================
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 [..] This section provides functions allowing to configure TimeStamp feature
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 @endverbatim
<> 144:ef7eb2e8f9f7 149 * @{
<> 144:ef7eb2e8f9f7 150 */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 /**
<> 144:ef7eb2e8f9f7 153 * @brief Set TimeStamp.
<> 144:ef7eb2e8f9f7 154 * @note This API must be called before enabling the TimeStamp feature.
<> 144:ef7eb2e8f9f7 155 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 156 * @param TimeStampEdge: Specifies the pin edge on which the TimeStamp is
<> 144:ef7eb2e8f9f7 157 * activated.
<> 144:ef7eb2e8f9f7 158 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 159 * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 160 * rising edge of the related pin.
<> 144:ef7eb2e8f9f7 161 * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 162 * falling edge of the related pin.
<> 144:ef7eb2e8f9f7 163 * @param RTC_TimeStampPin: specifies the RTC TimeStamp Pin.
<> 144:ef7eb2e8f9f7 164 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 165 * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin on STM32L05x/6x/7x/8x
<> 144:ef7eb2e8f9f7 166 * and PA2 on STM32L03x/4x/2x/1x.
<> 144:ef7eb2e8f9f7 167 * @retval HAL status
<> 144:ef7eb2e8f9f7 168 */
<> 144:ef7eb2e8f9f7 169 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
<> 144:ef7eb2e8f9f7 170 {
<> 151:5eaa88a5bcc7 171 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 /* Check the parameters */
<> 144:ef7eb2e8f9f7 174 assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
<> 144:ef7eb2e8f9f7 175 assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 /* Process Locked */
<> 144:ef7eb2e8f9f7 178 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 183 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 tmpreg|= TimeStampEdge;
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 188 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 191 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 196 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /* Change RTC state */
<> 144:ef7eb2e8f9f7 199 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 202 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 return HAL_OK;
<> 144:ef7eb2e8f9f7 205 }
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /**
<> 144:ef7eb2e8f9f7 208 * @brief Set TimeStamp with Interrupt.
<> 144:ef7eb2e8f9f7 209 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 210 * @note This API must be called before enabling the TimeStamp feature.
<> 144:ef7eb2e8f9f7 211 * @param TimeStampEdge: Specifies the pin edge on which the TimeStamp is
<> 144:ef7eb2e8f9f7 212 * activated.
<> 144:ef7eb2e8f9f7 213 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 214 * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 215 * rising edge of the related pin.
<> 144:ef7eb2e8f9f7 216 * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 217 * falling edge of the related pin.
<> 144:ef7eb2e8f9f7 218 * @param RTC_TimeStampPin: Specifies the RTC TimeStamp Pin.
<> 144:ef7eb2e8f9f7 219 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 220 * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin on STM32L05x/6x/7x/8x
<> 144:ef7eb2e8f9f7 221 * and PA2 on STM32L03x/4x/2x/1x.
<> 144:ef7eb2e8f9f7 222 * @retval HAL status
<> 144:ef7eb2e8f9f7 223 */
<> 144:ef7eb2e8f9f7 224 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
<> 144:ef7eb2e8f9f7 225 {
<> 151:5eaa88a5bcc7 226 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 /* Check the parameters */
<> 144:ef7eb2e8f9f7 229 assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
<> 144:ef7eb2e8f9f7 230 assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 /* Process Locked */
<> 144:ef7eb2e8f9f7 233 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 238 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 tmpreg |= TimeStampEdge;
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 243 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 246 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /* Enable IT timestamp */
<> 144:ef7eb2e8f9f7 251 __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc,RTC_IT_TS);
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /* RTC timestamp Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 254 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 259 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 264 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 return HAL_OK;
<> 144:ef7eb2e8f9f7 267 }
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 /**
<> 144:ef7eb2e8f9f7 270 * @brief Deactivate TimeStamp.
<> 144:ef7eb2e8f9f7 271 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 272 * @retval HAL status
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274 HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 275 {
<> 151:5eaa88a5bcc7 276 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 /* Process Locked */
<> 144:ef7eb2e8f9f7 279 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 284 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 287 __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS);
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 290 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 293 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 296 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 301 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 return HAL_OK;
<> 144:ef7eb2e8f9f7 304 }
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /**
<> 144:ef7eb2e8f9f7 307 * @brief Get the RTC TimeStamp value.
<> 144:ef7eb2e8f9f7 308 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 * @param sTimeStamp: Pointer to Time structure
<> 144:ef7eb2e8f9f7 311 * @param sTimeStampDate: Pointer to Date structure
<> 144:ef7eb2e8f9f7 312 * @param Format: specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 313 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 314 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 315 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 316 * @retval HAL status
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318 HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef* sTimeStamp, RTC_DateTypeDef* sTimeStampDate, uint32_t Format)
<> 144:ef7eb2e8f9f7 319 {
<> 151:5eaa88a5bcc7 320 uint32_t tmptime = 0U, tmpdate = 0U;
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 /* Check the parameters */
<> 144:ef7eb2e8f9f7 323 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 324
<> 144:ef7eb2e8f9f7 325 /* Get the TimeStamp time and date registers values */
<> 144:ef7eb2e8f9f7 326 tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 327 tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 /* Fill the Time structure fields with the read parameters */
<> 151:5eaa88a5bcc7 330 sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
<> 151:5eaa88a5bcc7 331 sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U);
<> 144:ef7eb2e8f9f7 332 sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU));
<> 151:5eaa88a5bcc7 333 sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16U);
<> 144:ef7eb2e8f9f7 334 sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR;
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 /* Fill the Date structure fields with the read parameters */
<> 151:5eaa88a5bcc7 337 sTimeStampDate->Year = 0U;
<> 151:5eaa88a5bcc7 338 sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
<> 144:ef7eb2e8f9f7 339 sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU));
<> 151:5eaa88a5bcc7 340 sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13U);
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 /* Check the input parameters format */
<> 144:ef7eb2e8f9f7 343 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 344 {
<> 144:ef7eb2e8f9f7 345 /* Convert the TimeStamp structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 346 sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours);
<> 144:ef7eb2e8f9f7 347 sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes);
<> 144:ef7eb2e8f9f7 348 sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds);
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /* Convert the DateTimeStamp structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 351 sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month);
<> 144:ef7eb2e8f9f7 352 sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date);
<> 144:ef7eb2e8f9f7 353 sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay);
<> 144:ef7eb2e8f9f7 354 }
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 /* Clear the TIMESTAMP Flag */
<> 144:ef7eb2e8f9f7 357 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
<> 144:ef7eb2e8f9f7 358
<> 144:ef7eb2e8f9f7 359 return HAL_OK;
<> 144:ef7eb2e8f9f7 360 }
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /**
<> 144:ef7eb2e8f9f7 363 * @brief Set Tamper
<> 144:ef7eb2e8f9f7 364 * @note By calling this API we disable the tamper interrupt for all tampers.
<> 144:ef7eb2e8f9f7 365 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 366 * @param sTamper: Pointer to Tamper Structure.
<> 144:ef7eb2e8f9f7 367 * @retval HAL status
<> 144:ef7eb2e8f9f7 368 */
<> 144:ef7eb2e8f9f7 369 HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
<> 144:ef7eb2e8f9f7 370 {
<> 151:5eaa88a5bcc7 371 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /* Check the parameters */
<> 144:ef7eb2e8f9f7 374 assert_param( IS_RTC_TAMPER(sTamper->Tamper));
<> 144:ef7eb2e8f9f7 375 assert_param( IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
<> 144:ef7eb2e8f9f7 376 assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
<> 144:ef7eb2e8f9f7 377 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
<> 144:ef7eb2e8f9f7 378 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
<> 144:ef7eb2e8f9f7 379 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
<> 144:ef7eb2e8f9f7 380 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
<> 144:ef7eb2e8f9f7 381 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
<> 144:ef7eb2e8f9f7 382 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
<> 144:ef7eb2e8f9f7 383
<> 144:ef7eb2e8f9f7 384 /* Process Locked */
<> 144:ef7eb2e8f9f7 385 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 388
<> 144:ef7eb2e8f9f7 389 /* Configure the tamper trigger */
<> 144:ef7eb2e8f9f7 390 if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
<> 144:ef7eb2e8f9f7 391 {
<> 151:5eaa88a5bcc7 392 sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U);
<> 144:ef7eb2e8f9f7 393 }
<> 144:ef7eb2e8f9f7 394
<> 144:ef7eb2e8f9f7 395 if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
<> 144:ef7eb2e8f9f7 396 {
<> 151:5eaa88a5bcc7 397 sTamper->NoErase = 0U;
<> 144:ef7eb2e8f9f7 398 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 399 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 400 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 401 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 402 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 403
<> 151:5eaa88a5bcc7 404 if((sTamper->Tamper & RTC_TAMPER_1) != 0U)
<> 144:ef7eb2e8f9f7 405 {
<> 144:ef7eb2e8f9f7 406 sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE;
<> 144:ef7eb2e8f9f7 407 }
<> 144:ef7eb2e8f9f7 408 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 409 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 410 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 411 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 412 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414
<> 151:5eaa88a5bcc7 415 if((sTamper->Tamper & RTC_TAMPER_2) != 0U)
<> 144:ef7eb2e8f9f7 416 {
<> 144:ef7eb2e8f9f7 417 sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE;
<> 144:ef7eb2e8f9f7 418 }
<> 144:ef7eb2e8f9f7 419 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 420 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 421 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 422
<> 151:5eaa88a5bcc7 423 if((sTamper->Tamper & RTC_TAMPER_3) != 0U)
<> 144:ef7eb2e8f9f7 424 {
<> 144:ef7eb2e8f9f7 425 sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE;
<> 144:ef7eb2e8f9f7 426 }
<> 144:ef7eb2e8f9f7 427
<> 144:ef7eb2e8f9f7 428 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 429 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 430 */
<> 144:ef7eb2e8f9f7 431 }
<> 144:ef7eb2e8f9f7 432
<> 144:ef7eb2e8f9f7 433 if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
<> 144:ef7eb2e8f9f7 434 {
<> 151:5eaa88a5bcc7 435 sTamper->MaskFlag = 0U;
<> 144:ef7eb2e8f9f7 436
<> 144:ef7eb2e8f9f7 437 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 438 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 439 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 440 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 441 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 442
<> 151:5eaa88a5bcc7 443 if((sTamper->Tamper & RTC_TAMPER_1) != 0U)
<> 144:ef7eb2e8f9f7 444 {
<> 144:ef7eb2e8f9f7 445 sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF;
<> 144:ef7eb2e8f9f7 446 }
<> 144:ef7eb2e8f9f7 447 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 448 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 449 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 450 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 451 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 452 */
<> 144:ef7eb2e8f9f7 453
<> 151:5eaa88a5bcc7 454 if((sTamper->Tamper & RTC_TAMPER_2) != 0U)
<> 144:ef7eb2e8f9f7 455 {
<> 144:ef7eb2e8f9f7 456 sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF;
<> 144:ef7eb2e8f9f7 457 }
<> 144:ef7eb2e8f9f7 458 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 459 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 460 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 461
<> 151:5eaa88a5bcc7 462 if((sTamper->Tamper & RTC_TAMPER_3) != 0U)
<> 144:ef7eb2e8f9f7 463 {
<> 144:ef7eb2e8f9f7 464 sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF;
<> 144:ef7eb2e8f9f7 465 }
<> 144:ef7eb2e8f9f7 466 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 467 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx)|| (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 468 */
<> 144:ef7eb2e8f9f7 469 }
<> 144:ef7eb2e8f9f7 470
<> 144:ef7eb2e8f9f7 471 /* Configure the RTC_TAMPCR register */
<> 144:ef7eb2e8f9f7 472 tmpreg = (uint32_t)((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->NoErase |\
<> 144:ef7eb2e8f9f7 473 (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\
<> 144:ef7eb2e8f9f7 474 (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | (uint32_t)sTamper->TimeStampOnTamperDetection);
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 477 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
<> 151:5eaa88a5bcc7 478 hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 479 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 480 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE |\
<> 144:ef7eb2e8f9f7 481 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP1NOERASE | RTC_TAMPCR_TAMP2NOERASE|\
<> 144:ef7eb2e8f9f7 482 RTC_TAMPCR_TAMP1MF | RTC_TAMPCR_TAMP2MF));
<> 144:ef7eb2e8f9f7 483
<> 144:ef7eb2e8f9f7 484 #elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 485 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 486 defined (STM32L031xx) || defined (STM32L041xx)
<> 151:5eaa88a5bcc7 487 hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 488 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 489 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE |\
<> 144:ef7eb2e8f9f7 490 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE | RTC_TAMPCR_TAMP1NOERASE |\
<> 144:ef7eb2e8f9f7 491 RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE | RTC_TAMPCR_TAMP1MF |\
<> 144:ef7eb2e8f9f7 492 RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF));
<> 144:ef7eb2e8f9f7 493
<> 144:ef7eb2e8f9f7 494 #elif defined (STM32L011xx) || defined (STM32L021xx)
<> 151:5eaa88a5bcc7 495 hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 496 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 497 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE |\
<> 144:ef7eb2e8f9f7 498 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE |\
<> 144:ef7eb2e8f9f7 499 RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE |\
<> 144:ef7eb2e8f9f7 500 RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF));
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 #endif /* (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 503 */
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 hrtc->Instance->TAMPCR |= tmpreg;
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 508
<> 144:ef7eb2e8f9f7 509 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 510 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 511
<> 144:ef7eb2e8f9f7 512 return HAL_OK;
<> 144:ef7eb2e8f9f7 513 }
<> 144:ef7eb2e8f9f7 514
<> 144:ef7eb2e8f9f7 515 /**
<> 144:ef7eb2e8f9f7 516 * @brief Set Tamper with interrupt.
<> 144:ef7eb2e8f9f7 517 * @note By calling this API we force the tamper interrupt for all tampers.
<> 144:ef7eb2e8f9f7 518 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 519 * @param sTamper: Pointer to RTC Tamper.
<> 144:ef7eb2e8f9f7 520 * @retval HAL status
<> 144:ef7eb2e8f9f7 521 */
<> 144:ef7eb2e8f9f7 522 HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
<> 144:ef7eb2e8f9f7 523 {
<> 151:5eaa88a5bcc7 524 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 525
<> 144:ef7eb2e8f9f7 526 /* Check the parameters */
<> 144:ef7eb2e8f9f7 527 assert_param( IS_RTC_TAMPER(sTamper->Tamper));
<> 144:ef7eb2e8f9f7 528 assert_param(IS_RTC_TAMPER_INTERRUPT(sTamper->Interrupt));
<> 144:ef7eb2e8f9f7 529 assert_param( IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
<> 144:ef7eb2e8f9f7 530 assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
<> 144:ef7eb2e8f9f7 531 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
<> 144:ef7eb2e8f9f7 532 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
<> 144:ef7eb2e8f9f7 533 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
<> 144:ef7eb2e8f9f7 534 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
<> 144:ef7eb2e8f9f7 535 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
<> 144:ef7eb2e8f9f7 536 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
<> 144:ef7eb2e8f9f7 537
<> 144:ef7eb2e8f9f7 538 /* Process Locked */
<> 144:ef7eb2e8f9f7 539 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 542
<> 144:ef7eb2e8f9f7 543 /* Configure the tamper trigger */
<> 144:ef7eb2e8f9f7 544 if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
<> 144:ef7eb2e8f9f7 545 {
<> 151:5eaa88a5bcc7 546 sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U);
<> 144:ef7eb2e8f9f7 547 }
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
<> 144:ef7eb2e8f9f7 550 {
<> 151:5eaa88a5bcc7 551 sTamper->NoErase = 0U;
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 554 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 555 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 556 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 557 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 558
<> 151:5eaa88a5bcc7 559 if((sTamper->Tamper & RTC_TAMPER_1) != 0U)
<> 144:ef7eb2e8f9f7 560 {
<> 144:ef7eb2e8f9f7 561 sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE;
<> 144:ef7eb2e8f9f7 562 }
<> 144:ef7eb2e8f9f7 563 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 564 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 565 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 566 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 567 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 568 */
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570
<> 151:5eaa88a5bcc7 571 if((sTamper->Tamper & RTC_TAMPER_2) != 0U)
<> 144:ef7eb2e8f9f7 572 {
<> 144:ef7eb2e8f9f7 573 sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE;
<> 144:ef7eb2e8f9f7 574 }
<> 144:ef7eb2e8f9f7 575 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 576 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 577 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 578
<> 151:5eaa88a5bcc7 579 if((sTamper->Tamper & RTC_TAMPER_3) != 0U)
<> 144:ef7eb2e8f9f7 580 {
<> 144:ef7eb2e8f9f7 581 sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE;
<> 144:ef7eb2e8f9f7 582 }
<> 144:ef7eb2e8f9f7 583 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 584 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 585 */
<> 144:ef7eb2e8f9f7 586 }
<> 144:ef7eb2e8f9f7 587
<> 144:ef7eb2e8f9f7 588 if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
<> 144:ef7eb2e8f9f7 589 {
<> 151:5eaa88a5bcc7 590 sTamper->MaskFlag = 0U;
<> 144:ef7eb2e8f9f7 591
<> 144:ef7eb2e8f9f7 592 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 593 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 594 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 595 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 596 defined (STM32L031xx) || defined (STM32L041xx)
<> 151:5eaa88a5bcc7 597 if((sTamper->Tamper & RTC_TAMPER_1) != 0U)
<> 144:ef7eb2e8f9f7 598 {
<> 144:ef7eb2e8f9f7 599 sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF;
<> 144:ef7eb2e8f9f7 600 }
<> 144:ef7eb2e8f9f7 601 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 602 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 603 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 604 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 605 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 606 */
<> 144:ef7eb2e8f9f7 607
<> 151:5eaa88a5bcc7 608 if((sTamper->Tamper & RTC_TAMPER_2) != 0U)
<> 144:ef7eb2e8f9f7 609 {
<> 144:ef7eb2e8f9f7 610 sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF;
<> 144:ef7eb2e8f9f7 611 }
<> 144:ef7eb2e8f9f7 612 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 613 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 614 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 615
<> 151:5eaa88a5bcc7 616 if((sTamper->Tamper & RTC_TAMPER_3) != 0U)
<> 144:ef7eb2e8f9f7 617 {
<> 144:ef7eb2e8f9f7 618 sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF;
<> 144:ef7eb2e8f9f7 619 }
<> 144:ef7eb2e8f9f7 620 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 621 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 622 */
<> 144:ef7eb2e8f9f7 623 }
<> 144:ef7eb2e8f9f7 624
<> 144:ef7eb2e8f9f7 625 /* Configure the RTC_TAMPCR register */
<> 144:ef7eb2e8f9f7 626 tmpreg = (uint32_t)((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Interrupt | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->NoErase |\
<> 144:ef7eb2e8f9f7 627 (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\
<> 144:ef7eb2e8f9f7 628 (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | (uint32_t)sTamper->TimeStampOnTamperDetection);
<> 144:ef7eb2e8f9f7 629
<> 144:ef7eb2e8f9f7 630 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 631 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
<> 151:5eaa88a5bcc7 632 hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 633 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 634 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE |\
<> 144:ef7eb2e8f9f7 635 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP1NOERASE | RTC_TAMPCR_TAMP2NOERASE |\
<> 144:ef7eb2e8f9f7 636 RTC_TAMPCR_TAMP1MF | RTC_TAMPCR_TAMP2MF);
<> 144:ef7eb2e8f9f7 637
<> 144:ef7eb2e8f9f7 638 #elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 639 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 640 defined (STM32L031xx) || defined (STM32L041xx)
<> 151:5eaa88a5bcc7 641 hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 642 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 643 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE |\
<> 144:ef7eb2e8f9f7 644 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE | RTC_TAMPCR_TAMP1NOERASE |\
<> 144:ef7eb2e8f9f7 645 RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE | RTC_TAMPCR_TAMP1MF |\
<> 144:ef7eb2e8f9f7 646 RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF);
<> 144:ef7eb2e8f9f7 647
<> 144:ef7eb2e8f9f7 648 #elif defined (STM32L011xx) || defined (STM32L021xx)
<> 151:5eaa88a5bcc7 649 hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 650 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 651 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE |\
<> 144:ef7eb2e8f9f7 652 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE |\
<> 144:ef7eb2e8f9f7 653 RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE |\
<> 144:ef7eb2e8f9f7 654 RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF);
<> 144:ef7eb2e8f9f7 655
<> 144:ef7eb2e8f9f7 656 #endif /* (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 657 */
<> 144:ef7eb2e8f9f7 658
<> 144:ef7eb2e8f9f7 659 hrtc->Instance->TAMPCR |= tmpreg;
<> 144:ef7eb2e8f9f7 660
<> 144:ef7eb2e8f9f7 661 /* RTC Tamper Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 662 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 663
<> 144:ef7eb2e8f9f7 664 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
<> 144:ef7eb2e8f9f7 665
<> 144:ef7eb2e8f9f7 666 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 667
<> 144:ef7eb2e8f9f7 668 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 669 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 670
<> 144:ef7eb2e8f9f7 671 return HAL_OK;
<> 144:ef7eb2e8f9f7 672 }
<> 144:ef7eb2e8f9f7 673
<> 144:ef7eb2e8f9f7 674 /**
<> 144:ef7eb2e8f9f7 675 * @brief Deactivate Tamper.
<> 144:ef7eb2e8f9f7 676 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 677 * @param Tamper: Selected tamper pin.
<> 144:ef7eb2e8f9f7 678 * This parameter can be RTC_Tamper_1 and/or RTC_TAMPER_2 for STM32L05x/6x.
<> 144:ef7eb2e8f9f7 679 * This parameter can be any combination of RTC_TAMPER_1, RTC_TAMPER_2 and RTC_TAMPER_3 for STM32L01x/2x/3x/7x/8x.
<> 144:ef7eb2e8f9f7 680 * @retval HAL status
<> 144:ef7eb2e8f9f7 681 */
<> 144:ef7eb2e8f9f7 682 HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper)
<> 144:ef7eb2e8f9f7 683 {
<> 144:ef7eb2e8f9f7 684 assert_param( IS_RTC_TAMPER(Tamper));
<> 144:ef7eb2e8f9f7 685
<> 144:ef7eb2e8f9f7 686 /* Process Locked */
<> 144:ef7eb2e8f9f7 687 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 688
<> 144:ef7eb2e8f9f7 689 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 690
<> 144:ef7eb2e8f9f7 691 /* Disable the selected Tamper pin */
<> 144:ef7eb2e8f9f7 692 hrtc->Instance->TAMPCR &= ((uint32_t)~Tamper);
<> 144:ef7eb2e8f9f7 693
<> 144:ef7eb2e8f9f7 694 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 695 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 696 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 697 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 698 defined (STM32L031xx) || defined (STM32L041xx)
<> 151:5eaa88a5bcc7 699 if ((Tamper & RTC_TAMPER_1) != 0U)
<> 144:ef7eb2e8f9f7 700 {
<> 144:ef7eb2e8f9f7 701 /* Disable the Tamper1 interrupt */
<> 144:ef7eb2e8f9f7 702 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP1));
<> 144:ef7eb2e8f9f7 703 }
<> 144:ef7eb2e8f9f7 704
<> 144:ef7eb2e8f9f7 705 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 706 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 707 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 708 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 709 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 710 */
<> 144:ef7eb2e8f9f7 711
<> 151:5eaa88a5bcc7 712 if ((Tamper & RTC_TAMPER_2) != 0U)
<> 144:ef7eb2e8f9f7 713 {
<> 144:ef7eb2e8f9f7 714 /* Disable the Tamper2 interrupt */
<> 144:ef7eb2e8f9f7 715 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP2));
<> 144:ef7eb2e8f9f7 716 }
<> 144:ef7eb2e8f9f7 717
<> 144:ef7eb2e8f9f7 718 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 719 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 720 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 721
<> 151:5eaa88a5bcc7 722 if ((Tamper & RTC_TAMPER_3) != 0U)
<> 144:ef7eb2e8f9f7 723 {
<> 144:ef7eb2e8f9f7 724 /* Disable the Tamper3 interrupt */
<> 144:ef7eb2e8f9f7 725 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP3));
<> 144:ef7eb2e8f9f7 726 }
<> 144:ef7eb2e8f9f7 727
<> 144:ef7eb2e8f9f7 728 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 729 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 730 */
<> 144:ef7eb2e8f9f7 731
<> 144:ef7eb2e8f9f7 732 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 733
<> 144:ef7eb2e8f9f7 734 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 735 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 736
<> 144:ef7eb2e8f9f7 737 return HAL_OK;
<> 144:ef7eb2e8f9f7 738 }
<> 144:ef7eb2e8f9f7 739
<> 144:ef7eb2e8f9f7 740 /**
<> 144:ef7eb2e8f9f7 741 * @brief Handle TimeStamp interrupt request.
<> 144:ef7eb2e8f9f7 742 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 743 * @retval None
<> 144:ef7eb2e8f9f7 744 */
<> 144:ef7eb2e8f9f7 745 void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 746 {
<> 144:ef7eb2e8f9f7 747 /* Get the TimeStamp interrupt source enable status */
<> 144:ef7eb2e8f9f7 748 if(__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET)
<> 144:ef7eb2e8f9f7 749 {
<> 144:ef7eb2e8f9f7 750 /* Get the pending status of the TIMESTAMP Interrupt */
<> 144:ef7eb2e8f9f7 751 if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET)
<> 144:ef7eb2e8f9f7 752 {
<> 144:ef7eb2e8f9f7 753 /* TIMESTAMP callback */
<> 144:ef7eb2e8f9f7 754 HAL_RTCEx_TimeStampEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 755
<> 144:ef7eb2e8f9f7 756 /* Clear the TIMESTAMP interrupt pending bit */
<> 144:ef7eb2e8f9f7 757 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
<> 144:ef7eb2e8f9f7 758 }
<> 144:ef7eb2e8f9f7 759 }
<> 144:ef7eb2e8f9f7 760
<> 144:ef7eb2e8f9f7 761 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 762 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 763 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 764 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 765 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 766
<> 144:ef7eb2e8f9f7 767 /* Get the Tamper1 interrupts source enable status */
<> 144:ef7eb2e8f9f7 768 if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != RESET)
<> 144:ef7eb2e8f9f7 769 {
<> 144:ef7eb2e8f9f7 770 /* Get the pending status of the Tamper1 Interrupt */
<> 144:ef7eb2e8f9f7 771 if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET)
<> 144:ef7eb2e8f9f7 772 {
<> 144:ef7eb2e8f9f7 773 /* Tamper1 callback */
<> 144:ef7eb2e8f9f7 774 HAL_RTCEx_Tamper1EventCallback(hrtc);
<> 144:ef7eb2e8f9f7 775
<> 144:ef7eb2e8f9f7 776 /* Clear the Tamper1 interrupt pending bit */
<> 144:ef7eb2e8f9f7 777 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
<> 144:ef7eb2e8f9f7 778 }
<> 144:ef7eb2e8f9f7 779 }
<> 144:ef7eb2e8f9f7 780 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 781 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 782 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 783 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 784 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 785 */
<> 144:ef7eb2e8f9f7 786
<> 144:ef7eb2e8f9f7 787 /* Get the Tamper2 interrupts source enable status */
<> 144:ef7eb2e8f9f7 788 if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP2) != RESET)
<> 144:ef7eb2e8f9f7 789 {
<> 144:ef7eb2e8f9f7 790 /* Get the pending status of the Tamper2 Interrupt */
<> 144:ef7eb2e8f9f7 791 if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET)
<> 144:ef7eb2e8f9f7 792 {
<> 144:ef7eb2e8f9f7 793 /* Tamper2 callback */
<> 144:ef7eb2e8f9f7 794 HAL_RTCEx_Tamper2EventCallback(hrtc);
<> 144:ef7eb2e8f9f7 795
<> 144:ef7eb2e8f9f7 796 /* Clear the Tamper2 interrupt pending bit */
<> 144:ef7eb2e8f9f7 797 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);
<> 144:ef7eb2e8f9f7 798 }
<> 144:ef7eb2e8f9f7 799 }
<> 144:ef7eb2e8f9f7 800
<> 144:ef7eb2e8f9f7 801 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 802 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 803 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 804
<> 144:ef7eb2e8f9f7 805 /* Get the Tamper3 interrupts source enable status */
<> 144:ef7eb2e8f9f7 806 if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP3) != RESET)
<> 144:ef7eb2e8f9f7 807 {
<> 144:ef7eb2e8f9f7 808 /* Get the pending status of the Tamper3 Interrupt */
<> 144:ef7eb2e8f9f7 809 if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET)
<> 144:ef7eb2e8f9f7 810 {
<> 144:ef7eb2e8f9f7 811 /* Tamper3 callback */
<> 144:ef7eb2e8f9f7 812 HAL_RTCEx_Tamper3EventCallback(hrtc);
<> 144:ef7eb2e8f9f7 813
<> 144:ef7eb2e8f9f7 814 /* Clear the Tamper3 interrupt pending bit */
<> 144:ef7eb2e8f9f7 815 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F);
<> 144:ef7eb2e8f9f7 816 }
<> 144:ef7eb2e8f9f7 817 }
<> 144:ef7eb2e8f9f7 818
<> 144:ef7eb2e8f9f7 819 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 820 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
<> 144:ef7eb2e8f9f7 821 * (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 822 */
<> 144:ef7eb2e8f9f7 823
<> 144:ef7eb2e8f9f7 824 /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */
<> 144:ef7eb2e8f9f7 825 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 826
<> 144:ef7eb2e8f9f7 827 /* Change RTC state */
<> 144:ef7eb2e8f9f7 828 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 829 }
<> 144:ef7eb2e8f9f7 830
<> 144:ef7eb2e8f9f7 831 /**
<> 144:ef7eb2e8f9f7 832 * @brief TimeStamp callback.
<> 144:ef7eb2e8f9f7 833 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 834 * @retval None
<> 144:ef7eb2e8f9f7 835 */
<> 144:ef7eb2e8f9f7 836 __weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 837 {
<> 144:ef7eb2e8f9f7 838 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 839 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 840
<> 144:ef7eb2e8f9f7 841 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 842 the HAL_RTCEx_TimeStampEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 843 */
<> 144:ef7eb2e8f9f7 844 }
<> 144:ef7eb2e8f9f7 845
<> 144:ef7eb2e8f9f7 846 /**
<> 144:ef7eb2e8f9f7 847 * @brief Tamper 1 callback.
<> 144:ef7eb2e8f9f7 848 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 849 * @retval None
<> 144:ef7eb2e8f9f7 850 */
<> 144:ef7eb2e8f9f7 851 __weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 852 {
<> 144:ef7eb2e8f9f7 853 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 854 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 855
<> 144:ef7eb2e8f9f7 856 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 857 the HAL_RTCEx_Tamper1EventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 858 */
<> 144:ef7eb2e8f9f7 859 }
<> 144:ef7eb2e8f9f7 860
<> 144:ef7eb2e8f9f7 861 /**
<> 144:ef7eb2e8f9f7 862 * @brief Tamper 2 callback.
<> 144:ef7eb2e8f9f7 863 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 864 * @retval None
<> 144:ef7eb2e8f9f7 865 */
<> 144:ef7eb2e8f9f7 866 __weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 867 {
<> 144:ef7eb2e8f9f7 868 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 869 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 870
<> 144:ef7eb2e8f9f7 871 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 872 the HAL_RTCEx_Tamper2EventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 873 */
<> 144:ef7eb2e8f9f7 874 }
<> 144:ef7eb2e8f9f7 875
<> 144:ef7eb2e8f9f7 876
<> 144:ef7eb2e8f9f7 877 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 878 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 879 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 880
<> 144:ef7eb2e8f9f7 881 /**
<> 144:ef7eb2e8f9f7 882 * @brief Tamper 3 callback.
<> 144:ef7eb2e8f9f7 883 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 884 * @retval None
<> 144:ef7eb2e8f9f7 885 */
<> 144:ef7eb2e8f9f7 886 __weak void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 887 {
<> 144:ef7eb2e8f9f7 888 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 889 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 890
<> 144:ef7eb2e8f9f7 891 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 892 the HAL_RTCEx_Tamper3EventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 893 */
<> 144:ef7eb2e8f9f7 894 }
<> 144:ef7eb2e8f9f7 895
<> 144:ef7eb2e8f9f7 896 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 897 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 898 */
<> 144:ef7eb2e8f9f7 899
<> 144:ef7eb2e8f9f7 900
<> 144:ef7eb2e8f9f7 901 /**
<> 144:ef7eb2e8f9f7 902 * @brief Handle TimeStamp polling request.
<> 144:ef7eb2e8f9f7 903 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 904 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 905 * @retval HAL status
<> 144:ef7eb2e8f9f7 906 */
<> 144:ef7eb2e8f9f7 907 HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 908 {
<> 144:ef7eb2e8f9f7 909 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 910
<> 144:ef7eb2e8f9f7 911 while(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET)
<> 144:ef7eb2e8f9f7 912 {
<> 144:ef7eb2e8f9f7 913 if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET)
<> 144:ef7eb2e8f9f7 914 {
<> 144:ef7eb2e8f9f7 915 /* Clear the TIMESTAMP OverRun Flag */
<> 144:ef7eb2e8f9f7 916 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
<> 144:ef7eb2e8f9f7 917
<> 144:ef7eb2e8f9f7 918 /* Change TIMESTAMP state */
<> 144:ef7eb2e8f9f7 919 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 920
<> 144:ef7eb2e8f9f7 921 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 922 }
<> 144:ef7eb2e8f9f7 923
<> 144:ef7eb2e8f9f7 924 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 925 {
<> 151:5eaa88a5bcc7 926 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 927 {
<> 144:ef7eb2e8f9f7 928 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 929 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 930 }
<> 144:ef7eb2e8f9f7 931 }
<> 144:ef7eb2e8f9f7 932 }
<> 144:ef7eb2e8f9f7 933
<> 144:ef7eb2e8f9f7 934 /* Change RTC state */
<> 144:ef7eb2e8f9f7 935 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 936
<> 144:ef7eb2e8f9f7 937 return HAL_OK;
<> 144:ef7eb2e8f9f7 938 }
<> 144:ef7eb2e8f9f7 939
<> 144:ef7eb2e8f9f7 940 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 941 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 942 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 943 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 944 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 945 /**
<> 144:ef7eb2e8f9f7 946 * @brief Handle Tamper 1 Polling.
<> 144:ef7eb2e8f9f7 947 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 948 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 949 * @retval HAL status
<> 144:ef7eb2e8f9f7 950 */
<> 144:ef7eb2e8f9f7 951 HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 952 {
<> 144:ef7eb2e8f9f7 953 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 954
<> 144:ef7eb2e8f9f7 955 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 956 while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F)== RESET)
<> 144:ef7eb2e8f9f7 957 {
<> 144:ef7eb2e8f9f7 958 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 959 {
<> 151:5eaa88a5bcc7 960 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 961 {
<> 144:ef7eb2e8f9f7 962 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 963 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 964 }
<> 144:ef7eb2e8f9f7 965 }
<> 144:ef7eb2e8f9f7 966 }
<> 144:ef7eb2e8f9f7 967
<> 144:ef7eb2e8f9f7 968 /* Clear the Tamper Flag */
<> 144:ef7eb2e8f9f7 969 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP1F);
<> 144:ef7eb2e8f9f7 970
<> 144:ef7eb2e8f9f7 971 /* Change RTC state */
<> 144:ef7eb2e8f9f7 972 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 973
<> 144:ef7eb2e8f9f7 974 return HAL_OK;
<> 144:ef7eb2e8f9f7 975 }
<> 144:ef7eb2e8f9f7 976 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 977 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 978 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 979 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 980 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 981 */
<> 144:ef7eb2e8f9f7 982
<> 144:ef7eb2e8f9f7 983 /**
<> 144:ef7eb2e8f9f7 984 * @brief Handle Tamper 2 Polling.
<> 144:ef7eb2e8f9f7 985 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 986 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 987 * @retval HAL status
<> 144:ef7eb2e8f9f7 988 */
<> 144:ef7eb2e8f9f7 989 HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 990 {
<> 144:ef7eb2e8f9f7 991 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 992
<> 144:ef7eb2e8f9f7 993 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 994 while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) == RESET)
<> 144:ef7eb2e8f9f7 995 {
<> 144:ef7eb2e8f9f7 996 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 997 {
<> 151:5eaa88a5bcc7 998 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 999 {
<> 144:ef7eb2e8f9f7 1000 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1001 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1002 }
<> 144:ef7eb2e8f9f7 1003 }
<> 144:ef7eb2e8f9f7 1004 }
<> 144:ef7eb2e8f9f7 1005
<> 144:ef7eb2e8f9f7 1006 /* Clear the Tamper Flag */
<> 144:ef7eb2e8f9f7 1007 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP2F);
<> 144:ef7eb2e8f9f7 1008
<> 144:ef7eb2e8f9f7 1009 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1010 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1011
<> 144:ef7eb2e8f9f7 1012 return HAL_OK;
<> 144:ef7eb2e8f9f7 1013 }
<> 144:ef7eb2e8f9f7 1014
<> 144:ef7eb2e8f9f7 1015
<> 144:ef7eb2e8f9f7 1016 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 1017 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 1018 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 1019
<> 144:ef7eb2e8f9f7 1020 /**
<> 144:ef7eb2e8f9f7 1021 * @brief Handle Tamper 3 Polling.
<> 144:ef7eb2e8f9f7 1022 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1023 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 1024 * @retval HAL status
<> 144:ef7eb2e8f9f7 1025 */
<> 144:ef7eb2e8f9f7 1026 HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1027 {
<> 144:ef7eb2e8f9f7 1028 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1029
<> 144:ef7eb2e8f9f7 1030 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 1031 while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP3F) == RESET)
<> 144:ef7eb2e8f9f7 1032 {
<> 144:ef7eb2e8f9f7 1033 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1034 {
<> 151:5eaa88a5bcc7 1035 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
<> 144:ef7eb2e8f9f7 1036 {
<> 144:ef7eb2e8f9f7 1037 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1038 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1039 }
<> 144:ef7eb2e8f9f7 1040 }
<> 144:ef7eb2e8f9f7 1041 }
<> 144:ef7eb2e8f9f7 1042
<> 144:ef7eb2e8f9f7 1043 /* Clear the Tamper Flag */
<> 144:ef7eb2e8f9f7 1044 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP3F);
<> 144:ef7eb2e8f9f7 1045
<> 144:ef7eb2e8f9f7 1046 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1047 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1048
<> 144:ef7eb2e8f9f7 1049 return HAL_OK;
<> 144:ef7eb2e8f9f7 1050 }
<> 144:ef7eb2e8f9f7 1051 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 1052 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 1053 */
<> 144:ef7eb2e8f9f7 1054
<> 144:ef7eb2e8f9f7 1055 /**
<> 144:ef7eb2e8f9f7 1056 * @}
<> 144:ef7eb2e8f9f7 1057 */
<> 144:ef7eb2e8f9f7 1058
<> 144:ef7eb2e8f9f7 1059 /** @addtogroup RTCEx_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 1060 * @brief RTC Wake-up functions
<> 144:ef7eb2e8f9f7 1061 *
<> 144:ef7eb2e8f9f7 1062 @verbatim
<> 144:ef7eb2e8f9f7 1063 ===============================================================================
<> 144:ef7eb2e8f9f7 1064 ##### RTC Wake-up functions #####
<> 144:ef7eb2e8f9f7 1065 ===============================================================================
<> 144:ef7eb2e8f9f7 1066
<> 144:ef7eb2e8f9f7 1067 [..] This section provides functions allowing to configure Wake-up feature
<> 144:ef7eb2e8f9f7 1068
<> 144:ef7eb2e8f9f7 1069 @endverbatim
<> 144:ef7eb2e8f9f7 1070 * @{
<> 144:ef7eb2e8f9f7 1071 */
<> 144:ef7eb2e8f9f7 1072
<> 144:ef7eb2e8f9f7 1073 /**
<> 144:ef7eb2e8f9f7 1074 * @brief Set wake up timer.
<> 144:ef7eb2e8f9f7 1075 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1076 * @param WakeUpCounter: Wake up counter
<> 144:ef7eb2e8f9f7 1077 * @param WakeUpClock: Wake up clock
<> 144:ef7eb2e8f9f7 1078 * @retval HAL status
<> 144:ef7eb2e8f9f7 1079 */
<> 144:ef7eb2e8f9f7 1080 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
<> 144:ef7eb2e8f9f7 1081 {
<> 151:5eaa88a5bcc7 1082 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1083
<> 144:ef7eb2e8f9f7 1084 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1085 assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
<> 144:ef7eb2e8f9f7 1086 assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
<> 144:ef7eb2e8f9f7 1087
<> 144:ef7eb2e8f9f7 1088 /* Process Locked */
<> 144:ef7eb2e8f9f7 1089 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1090
<> 144:ef7eb2e8f9f7 1091 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1092
<> 144:ef7eb2e8f9f7 1093 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1094 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1095
<> 144:ef7eb2e8f9f7 1096 /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
<> 144:ef7eb2e8f9f7 1097 if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){
<> 144:ef7eb2e8f9f7 1098 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1099
<> 144:ef7eb2e8f9f7 1100 /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1101 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
<> 144:ef7eb2e8f9f7 1102 {
<> 144:ef7eb2e8f9f7 1103 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1104 {
<> 144:ef7eb2e8f9f7 1105 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1106 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1107
<> 144:ef7eb2e8f9f7 1108 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1109
<> 144:ef7eb2e8f9f7 1110 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1111 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1112
<> 144:ef7eb2e8f9f7 1113 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1114 }
<> 144:ef7eb2e8f9f7 1115 }
<> 144:ef7eb2e8f9f7 1116 }
<> 144:ef7eb2e8f9f7 1117
<> 144:ef7eb2e8f9f7 1118 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1119
<> 144:ef7eb2e8f9f7 1120 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1121
<> 144:ef7eb2e8f9f7 1122 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1123 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
<> 144:ef7eb2e8f9f7 1124 {
<> 144:ef7eb2e8f9f7 1125 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1126 {
<> 144:ef7eb2e8f9f7 1127 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1128 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1129
<> 144:ef7eb2e8f9f7 1130 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1131
<> 144:ef7eb2e8f9f7 1132 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1133 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1134
<> 144:ef7eb2e8f9f7 1135 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1136 }
<> 144:ef7eb2e8f9f7 1137 }
<> 144:ef7eb2e8f9f7 1138
<> 144:ef7eb2e8f9f7 1139 /* Clear the Wakeup Timer clock source bits in CR register */
<> 144:ef7eb2e8f9f7 1140 hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
<> 144:ef7eb2e8f9f7 1141
<> 144:ef7eb2e8f9f7 1142 /* Configure the clock source */
<> 144:ef7eb2e8f9f7 1143 hrtc->Instance->CR |= (uint32_t)WakeUpClock;
<> 144:ef7eb2e8f9f7 1144
<> 144:ef7eb2e8f9f7 1145 /* Configure the Wakeup Timer counter */
<> 144:ef7eb2e8f9f7 1146 hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
<> 144:ef7eb2e8f9f7 1147
<> 144:ef7eb2e8f9f7 1148 /* Enable the Wakeup Timer */
<> 144:ef7eb2e8f9f7 1149 __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1150
<> 144:ef7eb2e8f9f7 1151 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1152 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1153
<> 144:ef7eb2e8f9f7 1154 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1155
<> 144:ef7eb2e8f9f7 1156 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1157 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1158
<> 144:ef7eb2e8f9f7 1159 return HAL_OK;
<> 144:ef7eb2e8f9f7 1160 }
<> 144:ef7eb2e8f9f7 1161
<> 144:ef7eb2e8f9f7 1162 /**
<> 144:ef7eb2e8f9f7 1163 * @brief Set wake up timer with interrupt.
<> 144:ef7eb2e8f9f7 1164 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1165 * @param WakeUpCounter: Wake up counter
<> 144:ef7eb2e8f9f7 1166 * @param WakeUpClock: Wake up clock
<> 144:ef7eb2e8f9f7 1167 * @retval HAL status
<> 144:ef7eb2e8f9f7 1168 */
<> 144:ef7eb2e8f9f7 1169 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
<> 144:ef7eb2e8f9f7 1170 {
<> 151:5eaa88a5bcc7 1171 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1172
<> 144:ef7eb2e8f9f7 1173 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1174 assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
<> 144:ef7eb2e8f9f7 1175 assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
<> 144:ef7eb2e8f9f7 1176
<> 144:ef7eb2e8f9f7 1177 /* Process Locked */
<> 144:ef7eb2e8f9f7 1178 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1179
<> 144:ef7eb2e8f9f7 1180 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1181
<> 144:ef7eb2e8f9f7 1182 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1183 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1184
<> 144:ef7eb2e8f9f7 1185 /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
<> 144:ef7eb2e8f9f7 1186 if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){
<> 144:ef7eb2e8f9f7 1187 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1188
<> 144:ef7eb2e8f9f7 1189 /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1190 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
<> 144:ef7eb2e8f9f7 1191 {
<> 144:ef7eb2e8f9f7 1192 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1193 {
<> 144:ef7eb2e8f9f7 1194 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1195 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1196
<> 144:ef7eb2e8f9f7 1197 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1198
<> 144:ef7eb2e8f9f7 1199 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1200 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1201
<> 144:ef7eb2e8f9f7 1202 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1203 }
<> 144:ef7eb2e8f9f7 1204 }
<> 144:ef7eb2e8f9f7 1205 }
<> 151:5eaa88a5bcc7 1206 /* Disable the Wake-Up timer */
<> 151:5eaa88a5bcc7 1207 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1208
<> 151:5eaa88a5bcc7 1209 /* Clear flag Wake-Up */
<> 151:5eaa88a5bcc7 1210 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
<> 144:ef7eb2e8f9f7 1211
<> 144:ef7eb2e8f9f7 1212 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1213
<> 144:ef7eb2e8f9f7 1214 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1215 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
<> 144:ef7eb2e8f9f7 1216 {
<> 144:ef7eb2e8f9f7 1217 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1218 {
<> 144:ef7eb2e8f9f7 1219 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1220 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1221
<> 144:ef7eb2e8f9f7 1222 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1223
<> 144:ef7eb2e8f9f7 1224 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1225 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1226
<> 144:ef7eb2e8f9f7 1227 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1228 }
<> 144:ef7eb2e8f9f7 1229 }
<> 144:ef7eb2e8f9f7 1230
<> 144:ef7eb2e8f9f7 1231 /* Configure the Wakeup Timer counter */
<> 144:ef7eb2e8f9f7 1232 hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
<> 144:ef7eb2e8f9f7 1233
<> 144:ef7eb2e8f9f7 1234 /* Clear the Wakeup Timer clock source bits in CR register */
<> 144:ef7eb2e8f9f7 1235 hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
<> 144:ef7eb2e8f9f7 1236
<> 144:ef7eb2e8f9f7 1237 /* Configure the clock source */
<> 144:ef7eb2e8f9f7 1238 hrtc->Instance->CR |= (uint32_t)WakeUpClock;
<> 144:ef7eb2e8f9f7 1239
<> 144:ef7eb2e8f9f7 1240 /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 1241 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 1242
<> 144:ef7eb2e8f9f7 1243 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
<> 144:ef7eb2e8f9f7 1244
<> 144:ef7eb2e8f9f7 1245 /* Configure the Interrupt in the RTC_CR register */
<> 144:ef7eb2e8f9f7 1246 __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT);
<> 144:ef7eb2e8f9f7 1247
<> 144:ef7eb2e8f9f7 1248 /* Enable the Wakeup Timer */
<> 144:ef7eb2e8f9f7 1249 __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1250
<> 144:ef7eb2e8f9f7 1251 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1252 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1253
<> 144:ef7eb2e8f9f7 1254 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1255
<> 144:ef7eb2e8f9f7 1256 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1257 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1258
<> 144:ef7eb2e8f9f7 1259 return HAL_OK;
<> 144:ef7eb2e8f9f7 1260 }
<> 144:ef7eb2e8f9f7 1261
<> 144:ef7eb2e8f9f7 1262 /**
<> 144:ef7eb2e8f9f7 1263 * @brief Deactivate wake up timer counter.
<> 144:ef7eb2e8f9f7 1264 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1265 * @retval HAL status
<> 144:ef7eb2e8f9f7 1266 */
<> 144:ef7eb2e8f9f7 1267 uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1268 {
<> 151:5eaa88a5bcc7 1269 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1270
<> 144:ef7eb2e8f9f7 1271 /* Process Locked */
<> 144:ef7eb2e8f9f7 1272 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1273
<> 144:ef7eb2e8f9f7 1274 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1275
<> 144:ef7eb2e8f9f7 1276 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1277 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1278
<> 144:ef7eb2e8f9f7 1279 /* Disable the Wakeup Timer */
<> 144:ef7eb2e8f9f7 1280 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1281
<> 144:ef7eb2e8f9f7 1282 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 1283 __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc,RTC_IT_WUT);
<> 144:ef7eb2e8f9f7 1284
<> 144:ef7eb2e8f9f7 1285 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1286 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1287 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
<> 144:ef7eb2e8f9f7 1288 {
<> 144:ef7eb2e8f9f7 1289 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1290 {
<> 144:ef7eb2e8f9f7 1291 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1292 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1293
<> 144:ef7eb2e8f9f7 1294 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1295
<> 144:ef7eb2e8f9f7 1296 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1297 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1298
<> 144:ef7eb2e8f9f7 1299 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1300 }
<> 144:ef7eb2e8f9f7 1301 }
<> 144:ef7eb2e8f9f7 1302
<> 144:ef7eb2e8f9f7 1303 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1304 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1305
<> 144:ef7eb2e8f9f7 1306 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1307
<> 144:ef7eb2e8f9f7 1308 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1309 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1310
<> 144:ef7eb2e8f9f7 1311 return HAL_OK;
<> 144:ef7eb2e8f9f7 1312 }
<> 144:ef7eb2e8f9f7 1313
<> 144:ef7eb2e8f9f7 1314 /**
<> 144:ef7eb2e8f9f7 1315 * @brief Get wake up timer counter.
<> 144:ef7eb2e8f9f7 1316 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1317 * @retval Counter value
<> 144:ef7eb2e8f9f7 1318 */
<> 144:ef7eb2e8f9f7 1319 uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1320 {
<> 144:ef7eb2e8f9f7 1321 /* Get the counter value */
<> 144:ef7eb2e8f9f7 1322 return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT));
<> 144:ef7eb2e8f9f7 1323 }
<> 144:ef7eb2e8f9f7 1324
<> 144:ef7eb2e8f9f7 1325 /**
<> 144:ef7eb2e8f9f7 1326 * @brief Handle Wake Up Timer interrupt request.
<> 144:ef7eb2e8f9f7 1327 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1328 * @retval None
<> 144:ef7eb2e8f9f7 1329 */
<> 144:ef7eb2e8f9f7 1330 void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1331 {
<> 144:ef7eb2e8f9f7 1332 /* Get the pending status of the WAKEUPTIMER Interrupt */
<> 144:ef7eb2e8f9f7 1333 if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != RESET)
<> 144:ef7eb2e8f9f7 1334 {
<> 144:ef7eb2e8f9f7 1335 /* WAKEUPTIMER callback */
<> 144:ef7eb2e8f9f7 1336 HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 1337
<> 144:ef7eb2e8f9f7 1338 /* Clear the WAKEUPTIMER interrupt pending bit */
<> 144:ef7eb2e8f9f7 1339 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
<> 144:ef7eb2e8f9f7 1340 }
<> 144:ef7eb2e8f9f7 1341
<> 144:ef7eb2e8f9f7 1342
<> 144:ef7eb2e8f9f7 1343 /* Clear the EXTI's line Flag for RTC WakeUpTimer */
<> 144:ef7eb2e8f9f7 1344 __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 1345
<> 144:ef7eb2e8f9f7 1346 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1347 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1348 }
<> 144:ef7eb2e8f9f7 1349
<> 144:ef7eb2e8f9f7 1350 /**
<> 144:ef7eb2e8f9f7 1351 * @brief Wake Up Timer callback.
<> 144:ef7eb2e8f9f7 1352 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1353 * @retval None
<> 144:ef7eb2e8f9f7 1354 */
<> 144:ef7eb2e8f9f7 1355 __weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1356 {
<> 144:ef7eb2e8f9f7 1357 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1358 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 1359
<> 144:ef7eb2e8f9f7 1360 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1361 the HAL_RTCEx_WakeUpTimerEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1362 */
<> 144:ef7eb2e8f9f7 1363 }
<> 144:ef7eb2e8f9f7 1364
<> 144:ef7eb2e8f9f7 1365
<> 144:ef7eb2e8f9f7 1366 /**
<> 144:ef7eb2e8f9f7 1367 * @brief Handle Wake Up Timer Polling.
<> 144:ef7eb2e8f9f7 1368 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1369 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 1370 * @retval HAL status
<> 144:ef7eb2e8f9f7 1371 */
<> 144:ef7eb2e8f9f7 1372 HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1373 {
<> 144:ef7eb2e8f9f7 1374 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1375
<> 144:ef7eb2e8f9f7 1376 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET)
<> 144:ef7eb2e8f9f7 1377 {
<> 144:ef7eb2e8f9f7 1378 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1379 {
<> 151:5eaa88a5bcc7 1380 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1381 {
<> 144:ef7eb2e8f9f7 1382 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1383
<> 144:ef7eb2e8f9f7 1384 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1385 }
<> 144:ef7eb2e8f9f7 1386 }
<> 144:ef7eb2e8f9f7 1387 }
<> 144:ef7eb2e8f9f7 1388
<> 144:ef7eb2e8f9f7 1389 /* Clear the WAKEUPTIMER Flag */
<> 144:ef7eb2e8f9f7 1390 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
<> 144:ef7eb2e8f9f7 1391
<> 144:ef7eb2e8f9f7 1392 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1393 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1394
<> 144:ef7eb2e8f9f7 1395 return HAL_OK;
<> 144:ef7eb2e8f9f7 1396 }
<> 144:ef7eb2e8f9f7 1397
<> 144:ef7eb2e8f9f7 1398 /**
<> 144:ef7eb2e8f9f7 1399 * @}
<> 144:ef7eb2e8f9f7 1400 */
<> 144:ef7eb2e8f9f7 1401
<> 144:ef7eb2e8f9f7 1402
<> 144:ef7eb2e8f9f7 1403 /** @addtogroup RTCEx_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 1404 * @brief Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 1405 *
<> 144:ef7eb2e8f9f7 1406 @verbatim
<> 144:ef7eb2e8f9f7 1407 ===============================================================================
<> 144:ef7eb2e8f9f7 1408 ##### Extended Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 1409 ===============================================================================
<> 144:ef7eb2e8f9f7 1410 [..]
<> 144:ef7eb2e8f9f7 1411 This subsection provides functions allowing to
<> 144:ef7eb2e8f9f7 1412 (+) Write a data in a specified RTC Backup data register
<> 144:ef7eb2e8f9f7 1413 (+) Read a data in a specified RTC Backup data register
<> 144:ef7eb2e8f9f7 1414 (+) Set the Coarse calibration parameters.
<> 144:ef7eb2e8f9f7 1415 (+) Deactivate the Coarse calibration parameters
<> 144:ef7eb2e8f9f7 1416 (+) Set the Smooth calibration parameters.
<> 144:ef7eb2e8f9f7 1417 (+) Configure the Synchronization Shift Control Settings.
<> 144:ef7eb2e8f9f7 1418 (+) Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1419 (+) Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1420 (+) Enable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1421 (+) Disable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1422 (+) Enable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1423 (+) Disable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1424
<> 144:ef7eb2e8f9f7 1425 @endverbatim
<> 144:ef7eb2e8f9f7 1426 * @{
<> 144:ef7eb2e8f9f7 1427 */
<> 144:ef7eb2e8f9f7 1428
<> 144:ef7eb2e8f9f7 1429 /**
<> 144:ef7eb2e8f9f7 1430 * @brief Write a data in a specified RTC Backup data register.
<> 144:ef7eb2e8f9f7 1431 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1432 * @param BackupRegister: RTC Backup data Register number.
<> 144:ef7eb2e8f9f7 1433 * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
<> 144:ef7eb2e8f9f7 1434 * specify the register.
<> 144:ef7eb2e8f9f7 1435 * @param Data: Data to be written in the specified RTC Backup data register.
<> 144:ef7eb2e8f9f7 1436 * @retval None
<> 144:ef7eb2e8f9f7 1437 */
<> 144:ef7eb2e8f9f7 1438 void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data)
<> 144:ef7eb2e8f9f7 1439 {
<> 151:5eaa88a5bcc7 1440 uint32_t tmp = 0U;
<> 144:ef7eb2e8f9f7 1441
<> 144:ef7eb2e8f9f7 1442 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1443 assert_param(IS_RTC_BKP(BackupRegister));
<> 144:ef7eb2e8f9f7 1444
<> 144:ef7eb2e8f9f7 1445 tmp = (uint32_t)&(hrtc->Instance->BKP0R);
<> 151:5eaa88a5bcc7 1446 tmp += (BackupRegister * 4U);
<> 144:ef7eb2e8f9f7 1447
<> 144:ef7eb2e8f9f7 1448 /* Write the specified register */
<> 144:ef7eb2e8f9f7 1449 *(__IO uint32_t *)tmp = (uint32_t)Data;
<> 144:ef7eb2e8f9f7 1450 }
<> 144:ef7eb2e8f9f7 1451
<> 144:ef7eb2e8f9f7 1452 /**
<> 144:ef7eb2e8f9f7 1453 * @brief Reads data from the specified RTC Backup data Register.
<> 144:ef7eb2e8f9f7 1454 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1455 * @param BackupRegister: RTC Backup data Register number.
<> 144:ef7eb2e8f9f7 1456 * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
<> 144:ef7eb2e8f9f7 1457 * specify the register.
<> 144:ef7eb2e8f9f7 1458 * @retval Read value
<> 144:ef7eb2e8f9f7 1459 */
<> 144:ef7eb2e8f9f7 1460 uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
<> 144:ef7eb2e8f9f7 1461 {
<> 151:5eaa88a5bcc7 1462 uint32_t tmp = 0U;
<> 144:ef7eb2e8f9f7 1463
<> 144:ef7eb2e8f9f7 1464 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1465 assert_param(IS_RTC_BKP(BackupRegister));
<> 144:ef7eb2e8f9f7 1466
<> 144:ef7eb2e8f9f7 1467 tmp = (uint32_t)&(hrtc->Instance->BKP0R);
<> 151:5eaa88a5bcc7 1468 tmp += (BackupRegister * 4U);
<> 144:ef7eb2e8f9f7 1469
<> 144:ef7eb2e8f9f7 1470 /* Read the specified register */
<> 144:ef7eb2e8f9f7 1471 return (*(__IO uint32_t *)tmp);
<> 144:ef7eb2e8f9f7 1472 }
<> 144:ef7eb2e8f9f7 1473
<> 144:ef7eb2e8f9f7 1474 /**
<> 144:ef7eb2e8f9f7 1475 * @brief Set the Smooth calibration parameters.
<> 144:ef7eb2e8f9f7 1476 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1477 * @param SmoothCalibPeriod: Select the Smooth Calibration Period.
<> 144:ef7eb2e8f9f7 1478 * This parameter can be can be one of the following values :
<> 144:ef7eb2e8f9f7 1479 * @arg RTC_SMOOTHCALIB_PERIOD_32SEC: The smooth calibration period is 32s.
<> 144:ef7eb2e8f9f7 1480 * @arg RTC_SMOOTHCALIB_PERIOD_16SEC: The smooth calibration period is 16s.
<> 144:ef7eb2e8f9f7 1481 * @arg RTC_SMOOTHCALIB_PERIOD_8SEC: The smooth calibration period is 8s.
<> 144:ef7eb2e8f9f7 1482 * @param SmoothCalibPlusPulses: Select to Set or reset the CALP bit.
<> 144:ef7eb2e8f9f7 1483 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1484 * @arg RTC_SMOOTHCALIB_PLUSPULSES_SET: Add one RTCCLK pulse every 2*11 pulses.
<> 144:ef7eb2e8f9f7 1485 * @arg RTC_SMOOTHCALIB_PLUSPULSES_RESET: No RTCCLK pulses are added.
<> 144:ef7eb2e8f9f7 1486 * @param SmoothCalibMinusPulsesValue: Select the value of CALM[8:0] bits.
<> 144:ef7eb2e8f9f7 1487 * This parameter can be one any value from 0 to 0x000001FF.
<> 144:ef7eb2e8f9f7 1488 * @note To deactivate the smooth calibration, the field SmoothCalibPlusPulses
<> 144:ef7eb2e8f9f7 1489 * must be equal to SMOOTHCALIB_PLUSPULSES_RESET and the field
<> 144:ef7eb2e8f9f7 1490 * SmoothCalibMinusPulsesValue mut be equal to 0.
<> 144:ef7eb2e8f9f7 1491 * @retval HAL status
<> 144:ef7eb2e8f9f7 1492 */
<> 144:ef7eb2e8f9f7 1493 HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef* hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue)
<> 144:ef7eb2e8f9f7 1494 {
<> 151:5eaa88a5bcc7 1495 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1496
<> 144:ef7eb2e8f9f7 1497 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1498 assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod));
<> 144:ef7eb2e8f9f7 1499 assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses));
<> 144:ef7eb2e8f9f7 1500 assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmoothCalibMinusPulsesValue));
<> 144:ef7eb2e8f9f7 1501
<> 144:ef7eb2e8f9f7 1502 /* Process Locked */
<> 144:ef7eb2e8f9f7 1503 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1504
<> 144:ef7eb2e8f9f7 1505 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1506
<> 144:ef7eb2e8f9f7 1507 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1508 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1509
<> 144:ef7eb2e8f9f7 1510 /* check if a calibration is pending*/
<> 144:ef7eb2e8f9f7 1511 if((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
<> 144:ef7eb2e8f9f7 1512 {
<> 144:ef7eb2e8f9f7 1513 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1514
<> 144:ef7eb2e8f9f7 1515 /* check if a calibration is pending*/
<> 144:ef7eb2e8f9f7 1516 while((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
<> 144:ef7eb2e8f9f7 1517 {
<> 144:ef7eb2e8f9f7 1518 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1519 {
<> 144:ef7eb2e8f9f7 1520 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1521 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1522
<> 144:ef7eb2e8f9f7 1523 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1524 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1525
<> 144:ef7eb2e8f9f7 1526 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1527 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1528
<> 144:ef7eb2e8f9f7 1529 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1530 }
<> 144:ef7eb2e8f9f7 1531 }
<> 144:ef7eb2e8f9f7 1532 }
<> 144:ef7eb2e8f9f7 1533
<> 144:ef7eb2e8f9f7 1534 /* Configure the Smooth calibration settings */
<> 144:ef7eb2e8f9f7 1535 hrtc->Instance->CALR = (uint32_t)((uint32_t)SmoothCalibPeriod | (uint32_t)SmoothCalibPlusPulses | (uint32_t)SmoothCalibMinusPulsesValue);
<> 144:ef7eb2e8f9f7 1536
<> 144:ef7eb2e8f9f7 1537 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1538 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1539
<> 144:ef7eb2e8f9f7 1540 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1541 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1542
<> 144:ef7eb2e8f9f7 1543 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1544 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1545
<> 144:ef7eb2e8f9f7 1546 return HAL_OK;
<> 144:ef7eb2e8f9f7 1547 }
<> 144:ef7eb2e8f9f7 1548
<> 144:ef7eb2e8f9f7 1549 /**
<> 144:ef7eb2e8f9f7 1550 * @brief Configure the Synchronization Shift Control Settings.
<> 144:ef7eb2e8f9f7 1551 * @note When REFCKON is set, firmware must not write to Shift control register.
<> 144:ef7eb2e8f9f7 1552 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1553 * @param ShiftAdd1S: Select to add or not 1 second to the time calendar.
<> 144:ef7eb2e8f9f7 1554 * This parameter can be one of the following values :
<> 144:ef7eb2e8f9f7 1555 * @arg RTC_SHIFTADD1S_SET: Add one second to the clock calendar.
<> 144:ef7eb2e8f9f7 1556 * @arg RTC_SHIFTADD1S_RESET: No effect.
<> 144:ef7eb2e8f9f7 1557 * @param ShiftSubFS: Select the number of Second Fractions to substitute.
<> 144:ef7eb2e8f9f7 1558 * This parameter can be one any value from 0 to 0x7FFF.
<> 144:ef7eb2e8f9f7 1559 * @retval HAL status
<> 144:ef7eb2e8f9f7 1560 */
<> 144:ef7eb2e8f9f7 1561 HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef* hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS)
<> 144:ef7eb2e8f9f7 1562 {
<> 151:5eaa88a5bcc7 1563 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1564
<> 144:ef7eb2e8f9f7 1565 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1566 assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S));
<> 144:ef7eb2e8f9f7 1567 assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS));
<> 144:ef7eb2e8f9f7 1568
<> 144:ef7eb2e8f9f7 1569 /* Process Locked */
<> 144:ef7eb2e8f9f7 1570 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1571
<> 144:ef7eb2e8f9f7 1572 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1573
<> 144:ef7eb2e8f9f7 1574 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1575 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1576
<> 144:ef7eb2e8f9f7 1577 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1578
<> 144:ef7eb2e8f9f7 1579 /* Wait until the shift is completed*/
<> 144:ef7eb2e8f9f7 1580 while((hrtc->Instance->ISR & RTC_ISR_SHPF) != RESET)
<> 144:ef7eb2e8f9f7 1581 {
<> 144:ef7eb2e8f9f7 1582 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1583 {
<> 144:ef7eb2e8f9f7 1584 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1585 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1586
<> 144:ef7eb2e8f9f7 1587 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1588
<> 144:ef7eb2e8f9f7 1589 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1590 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1591
<> 144:ef7eb2e8f9f7 1592 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1593 }
<> 144:ef7eb2e8f9f7 1594 }
<> 144:ef7eb2e8f9f7 1595
<> 144:ef7eb2e8f9f7 1596 /* Check if the reference clock detection is disabled */
<> 144:ef7eb2e8f9f7 1597 if((hrtc->Instance->CR & RTC_CR_REFCKON) == RESET)
<> 144:ef7eb2e8f9f7 1598 {
<> 144:ef7eb2e8f9f7 1599 /* Configure the Shift settings */
<> 144:ef7eb2e8f9f7 1600 hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S);
<> 144:ef7eb2e8f9f7 1601
<> 144:ef7eb2e8f9f7 1602 /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 1603 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 1604 {
<> 144:ef7eb2e8f9f7 1605 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1606 {
<> 144:ef7eb2e8f9f7 1607 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1608 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1609
<> 144:ef7eb2e8f9f7 1610 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1611
<> 144:ef7eb2e8f9f7 1612 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1613 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1614
<> 144:ef7eb2e8f9f7 1615 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1616 }
<> 144:ef7eb2e8f9f7 1617 }
<> 144:ef7eb2e8f9f7 1618 }
<> 144:ef7eb2e8f9f7 1619 else
<> 144:ef7eb2e8f9f7 1620 {
<> 144:ef7eb2e8f9f7 1621 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1622 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1623
<> 144:ef7eb2e8f9f7 1624 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1625 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1626
<> 144:ef7eb2e8f9f7 1627 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1628 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1629
<> 144:ef7eb2e8f9f7 1630 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1631 }
<> 144:ef7eb2e8f9f7 1632
<> 144:ef7eb2e8f9f7 1633 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1634 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1635
<> 144:ef7eb2e8f9f7 1636 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1637 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1638
<> 144:ef7eb2e8f9f7 1639 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1640 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1641
<> 144:ef7eb2e8f9f7 1642 return HAL_OK;
<> 144:ef7eb2e8f9f7 1643 }
<> 144:ef7eb2e8f9f7 1644
<> 144:ef7eb2e8f9f7 1645 /**
<> 144:ef7eb2e8f9f7 1646 * @brief Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1647 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1648 * @param CalibOutput : Select the Calibration output Selection .
<> 144:ef7eb2e8f9f7 1649 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1650 * @arg RTC_CALIBOUTPUT_512HZ: A signal has a regular waveform at 512Hz.
<> 144:ef7eb2e8f9f7 1651 * @arg RTC_CALIBOUTPUT_1HZ: A signal has a regular waveform at 1Hz.
<> 144:ef7eb2e8f9f7 1652 * @retval HAL status
<> 144:ef7eb2e8f9f7 1653 */
<> 144:ef7eb2e8f9f7 1654 HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef* hrtc, uint32_t CalibOutput)
<> 144:ef7eb2e8f9f7 1655 {
<> 144:ef7eb2e8f9f7 1656 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1657 assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput));
<> 144:ef7eb2e8f9f7 1658
<> 144:ef7eb2e8f9f7 1659 /* Process Locked */
<> 144:ef7eb2e8f9f7 1660 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1661
<> 144:ef7eb2e8f9f7 1662 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1663
<> 144:ef7eb2e8f9f7 1664 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1665 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1666
<> 144:ef7eb2e8f9f7 1667 /* Clear flags before config */
<> 144:ef7eb2e8f9f7 1668 hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL;
<> 144:ef7eb2e8f9f7 1669
<> 144:ef7eb2e8f9f7 1670 /* Configure the RTC_CR register */
<> 144:ef7eb2e8f9f7 1671 hrtc->Instance->CR |= (uint32_t)CalibOutput;
<> 144:ef7eb2e8f9f7 1672
<> 144:ef7eb2e8f9f7 1673 __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1674
<> 144:ef7eb2e8f9f7 1675 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1676 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1677
<> 144:ef7eb2e8f9f7 1678 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1679 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1680
<> 144:ef7eb2e8f9f7 1681 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1682 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1683
<> 144:ef7eb2e8f9f7 1684 return HAL_OK;
<> 144:ef7eb2e8f9f7 1685 }
<> 144:ef7eb2e8f9f7 1686
<> 144:ef7eb2e8f9f7 1687 /**
<> 144:ef7eb2e8f9f7 1688 * @brief Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1689 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1690 * @retval HAL status
<> 144:ef7eb2e8f9f7 1691 */
<> 144:ef7eb2e8f9f7 1692 HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1693 {
<> 144:ef7eb2e8f9f7 1694 /* Process Locked */
<> 144:ef7eb2e8f9f7 1695 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1696
<> 144:ef7eb2e8f9f7 1697 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1698
<> 144:ef7eb2e8f9f7 1699 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1700 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1701
<> 144:ef7eb2e8f9f7 1702 __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1703
<> 144:ef7eb2e8f9f7 1704 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1705 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1706
<> 144:ef7eb2e8f9f7 1707 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1708 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1709
<> 144:ef7eb2e8f9f7 1710 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1711 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1712
<> 144:ef7eb2e8f9f7 1713 return HAL_OK;
<> 144:ef7eb2e8f9f7 1714 }
<> 144:ef7eb2e8f9f7 1715
<> 144:ef7eb2e8f9f7 1716 /**
<> 144:ef7eb2e8f9f7 1717 * @brief Enable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1718 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1719 * @retval HAL status
<> 144:ef7eb2e8f9f7 1720 */
<> 144:ef7eb2e8f9f7 1721 HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1722 {
<> 144:ef7eb2e8f9f7 1723 /* Process Locked */
<> 144:ef7eb2e8f9f7 1724 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1725
<> 144:ef7eb2e8f9f7 1726 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1727
<> 144:ef7eb2e8f9f7 1728 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1729 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1730
<> 144:ef7eb2e8f9f7 1731 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 1732 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1733 {
<> 144:ef7eb2e8f9f7 1734 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1735 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1736
<> 144:ef7eb2e8f9f7 1737 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 1738 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1739
<> 144:ef7eb2e8f9f7 1740 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1741 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1742
<> 144:ef7eb2e8f9f7 1743 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1744 }
<> 144:ef7eb2e8f9f7 1745 else
<> 144:ef7eb2e8f9f7 1746 {
<> 144:ef7eb2e8f9f7 1747 __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1748
<> 144:ef7eb2e8f9f7 1749 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 1750 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 1751 }
<> 144:ef7eb2e8f9f7 1752
<> 144:ef7eb2e8f9f7 1753 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1754 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1755
<> 144:ef7eb2e8f9f7 1756 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1757 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1758
<> 144:ef7eb2e8f9f7 1759 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1760 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1761
<> 144:ef7eb2e8f9f7 1762 return HAL_OK;
<> 144:ef7eb2e8f9f7 1763 }
<> 144:ef7eb2e8f9f7 1764
<> 144:ef7eb2e8f9f7 1765 /**
<> 144:ef7eb2e8f9f7 1766 * @brief Disable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1767 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1768 * @retval HAL status
<> 144:ef7eb2e8f9f7 1769 */
<> 144:ef7eb2e8f9f7 1770 HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1771 {
<> 144:ef7eb2e8f9f7 1772 /* Process Locked */
<> 144:ef7eb2e8f9f7 1773 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1774
<> 144:ef7eb2e8f9f7 1775 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1776
<> 144:ef7eb2e8f9f7 1777 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1778 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1779
<> 144:ef7eb2e8f9f7 1780 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 1781 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1782 {
<> 144:ef7eb2e8f9f7 1783 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1784 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1785
<> 144:ef7eb2e8f9f7 1786 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 1787 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1788
<> 144:ef7eb2e8f9f7 1789 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1790 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1791
<> 144:ef7eb2e8f9f7 1792 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1793 }
<> 144:ef7eb2e8f9f7 1794 else
<> 144:ef7eb2e8f9f7 1795 {
<> 144:ef7eb2e8f9f7 1796 __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1797
<> 144:ef7eb2e8f9f7 1798 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 1799 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 1800 }
<> 144:ef7eb2e8f9f7 1801
<> 144:ef7eb2e8f9f7 1802 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1803 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1804
<> 144:ef7eb2e8f9f7 1805 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1806 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1807
<> 144:ef7eb2e8f9f7 1808 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1809 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1810
<> 144:ef7eb2e8f9f7 1811 return HAL_OK;
<> 144:ef7eb2e8f9f7 1812 }
<> 144:ef7eb2e8f9f7 1813
<> 144:ef7eb2e8f9f7 1814 /**
<> 144:ef7eb2e8f9f7 1815 * @brief Enable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1816 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1817 * @note When the Bypass Shadow is enabled the calendar value are taken
<> 144:ef7eb2e8f9f7 1818 * directly from the Calendar counter.
<> 144:ef7eb2e8f9f7 1819 * @retval HAL status
<> 144:ef7eb2e8f9f7 1820 */
<> 144:ef7eb2e8f9f7 1821 HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1822 {
<> 144:ef7eb2e8f9f7 1823 /* Process Locked */
<> 144:ef7eb2e8f9f7 1824 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1825
<> 144:ef7eb2e8f9f7 1826 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1827
<> 144:ef7eb2e8f9f7 1828 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1829 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1830
<> 144:ef7eb2e8f9f7 1831 /* Set the BYPSHAD bit */
<> 144:ef7eb2e8f9f7 1832 hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD;
<> 144:ef7eb2e8f9f7 1833
<> 144:ef7eb2e8f9f7 1834 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1835 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1836
<> 144:ef7eb2e8f9f7 1837 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1838 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1839
<> 144:ef7eb2e8f9f7 1840 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1841 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1842
<> 144:ef7eb2e8f9f7 1843 return HAL_OK;
<> 144:ef7eb2e8f9f7 1844 }
<> 144:ef7eb2e8f9f7 1845
<> 144:ef7eb2e8f9f7 1846 /**
<> 144:ef7eb2e8f9f7 1847 * @brief Disable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1848 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1849 * @note When the Bypass Shadow is enabled the calendar value are taken
<> 144:ef7eb2e8f9f7 1850 * directly from the Calendar counter.
<> 144:ef7eb2e8f9f7 1851 * @retval HAL status
<> 144:ef7eb2e8f9f7 1852 */
<> 144:ef7eb2e8f9f7 1853 HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1854 {
<> 144:ef7eb2e8f9f7 1855 /* Process Locked */
<> 144:ef7eb2e8f9f7 1856 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1857
<> 144:ef7eb2e8f9f7 1858 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1859
<> 144:ef7eb2e8f9f7 1860 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1861 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1862
<> 144:ef7eb2e8f9f7 1863 /* Reset the BYPSHAD bit */
<> 144:ef7eb2e8f9f7 1864 hrtc->Instance->CR &= ((uint8_t)~RTC_CR_BYPSHAD);
<> 144:ef7eb2e8f9f7 1865
<> 144:ef7eb2e8f9f7 1866 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1867 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1868
<> 144:ef7eb2e8f9f7 1869 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1870 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1871
<> 144:ef7eb2e8f9f7 1872 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1873 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1874
<> 144:ef7eb2e8f9f7 1875 return HAL_OK;
<> 144:ef7eb2e8f9f7 1876 }
<> 144:ef7eb2e8f9f7 1877
<> 144:ef7eb2e8f9f7 1878 /**
<> 144:ef7eb2e8f9f7 1879 * @}
<> 144:ef7eb2e8f9f7 1880 */
<> 144:ef7eb2e8f9f7 1881
<> 144:ef7eb2e8f9f7 1882 /** @addtogroup RTCEx_Exported_Functions_Group4
<> 144:ef7eb2e8f9f7 1883 * @brief Extended features functions
<> 144:ef7eb2e8f9f7 1884 *
<> 144:ef7eb2e8f9f7 1885 @verbatim
<> 144:ef7eb2e8f9f7 1886 ===============================================================================
<> 144:ef7eb2e8f9f7 1887 ##### Extended features functions #####
<> 144:ef7eb2e8f9f7 1888 ===============================================================================
<> 144:ef7eb2e8f9f7 1889 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 1890 (+) RTC Alram B callback
<> 144:ef7eb2e8f9f7 1891 (+) RTC Poll for Alarm B request
<> 144:ef7eb2e8f9f7 1892
<> 144:ef7eb2e8f9f7 1893 @endverbatim
<> 144:ef7eb2e8f9f7 1894 * @{
<> 144:ef7eb2e8f9f7 1895 */
<> 144:ef7eb2e8f9f7 1896
<> 144:ef7eb2e8f9f7 1897 /**
<> 144:ef7eb2e8f9f7 1898 * @brief Alarm B callback.
<> 144:ef7eb2e8f9f7 1899 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1900 * @retval None
<> 144:ef7eb2e8f9f7 1901 */
<> 144:ef7eb2e8f9f7 1902 __weak void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1903 {
<> 144:ef7eb2e8f9f7 1904 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1905 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 1906
<> 144:ef7eb2e8f9f7 1907 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1908 the HAL_RTCEx_AlarmBEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1909 */
<> 144:ef7eb2e8f9f7 1910 }
<> 144:ef7eb2e8f9f7 1911
<> 144:ef7eb2e8f9f7 1912 /**
<> 144:ef7eb2e8f9f7 1913 * @brief Handle Alarm B Polling request.
<> 144:ef7eb2e8f9f7 1914 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1915 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 1916 * @retval HAL status
<> 144:ef7eb2e8f9f7 1917 */
<> 144:ef7eb2e8f9f7 1918 HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1919 {
<> 144:ef7eb2e8f9f7 1920 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1921
<> 144:ef7eb2e8f9f7 1922 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == RESET)
<> 144:ef7eb2e8f9f7 1923 {
<> 144:ef7eb2e8f9f7 1924 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1925 {
<> 151:5eaa88a5bcc7 1926 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1927 {
<> 144:ef7eb2e8f9f7 1928 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1929 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1930 }
<> 144:ef7eb2e8f9f7 1931 }
<> 144:ef7eb2e8f9f7 1932 }
<> 144:ef7eb2e8f9f7 1933
<> 144:ef7eb2e8f9f7 1934 /* Clear the Alarm Flag */
<> 144:ef7eb2e8f9f7 1935 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
<> 144:ef7eb2e8f9f7 1936
<> 144:ef7eb2e8f9f7 1937 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1938 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1939
<> 144:ef7eb2e8f9f7 1940 return HAL_OK;
<> 144:ef7eb2e8f9f7 1941 }
<> 144:ef7eb2e8f9f7 1942
<> 144:ef7eb2e8f9f7 1943 /**
<> 144:ef7eb2e8f9f7 1944 * @}
<> 144:ef7eb2e8f9f7 1945 */
<> 144:ef7eb2e8f9f7 1946
<> 144:ef7eb2e8f9f7 1947 /**
<> 144:ef7eb2e8f9f7 1948 * @}
<> 144:ef7eb2e8f9f7 1949 */
<> 144:ef7eb2e8f9f7 1950
<> 144:ef7eb2e8f9f7 1951 #endif /* HAL_RTC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 1952 /**
<> 144:ef7eb2e8f9f7 1953 * @}
<> 144:ef7eb2e8f9f7 1954 */
<> 144:ef7eb2e8f9f7 1955
<> 144:ef7eb2e8f9f7 1956
<> 144:ef7eb2e8f9f7 1957 /**
<> 144:ef7eb2e8f9f7 1958 * @}
<> 144:ef7eb2e8f9f7 1959 */
<> 144:ef7eb2e8f9f7 1960
<> 144:ef7eb2e8f9f7 1961 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 1962